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author | Angela Stegmaier <angelabaker@ti.com> | |
Mon, 1 Apr 2013 22:40:33 +0000 (17:40 -0500) | ||
committer | VW <vwan@ti.com> | |
Tue, 30 Apr 2013 17:28:02 +0000 (10:28 -0700) |
Add support for HOST->IPU2 and HOST->DSP1 support
for Vayu.
for Vayu.
43 files changed:
diff --git a/ipc-bios.bld b/ipc-bios.bld
index 002a5946d19a1197070b8bcf9cc38d56856f5d8d..e8dec958e0a645ed5fa42e4894a41b9ef83e92e0 100644 (file)
--- a/ipc-bios.bld
+++ b/ipc-bios.bld
}
if (targetName.match(/elf\.C66/)) {
+ target.lnkOpts.prefix += " -e=ti_sysbios_family_c64p_Hwi0";
target.lnkOpts.suffix += " -cr";
target.platforms = [
//"ti.platforms.simKepler"
//"ti.platforms.evm6614:DSP"
- "ti.platforms.evmTCI6638K2K"
+ "ti.platforms.evmTCI6638K2K",
+ /* NOTE: This platform (from omapzoom) is local, custom: */
+ "ti.platform.vayu.dsp1"
];
}
target.platforms = [
"ti.platform.omap54xx.ipu",
+ "ti.platform.vayu.ipu2",
];
}
diff --git a/packages/ti/configs/vayu/Dsp1.cfg b/packages/ti/configs/vayu/Dsp1.cfg
--- /dev/null
@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * The SysMin is used here instead of StdMin, as trace buffer address is
+ * required for Linux trace debug driver, plus provides better performance.
+ */
+var System = xdc.useModule('xdc.runtime.System');
+var SysMin = xdc.useModule('ti.trace.SysMin');
+System.SupportProxy = SysMin;
+SysMin.bufSize = 0x8000;
+
+/* Define default memory heap properties */
+var Memory = xdc.useModule('xdc.runtime.Memory');
+Memory.defaultHeapSize = 0x20000;
+
+/* Modules used in the virtqueue/MessageQCopy/ServiceMgr libraries: */
+var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
+var BIOS = xdc.useModule('ti.sysbios.BIOS');
+
+var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
+Cache.setMarMeta(0xa0000000, 0x02000000, Cache.Mar_DISABLE);
+var L1cache = new Cache.Size();
+L1cache.l1dSize = Cache.L1Size_0K;
+
+/* Reduces code size, by only pulling in modules explicitly referenced: */
+//BIOS.libType = BIOS.LibType_Custom;
+
+/* Use LibType_Debug option for now to avoid linking error due to bug in BIOS */
+BIOS.libType = BIOS.LibType_Debug;
+
+xdc.loadPackage('ti.sdo.ipc.family.vayu');
+xdc.useModule('ti.sdo.ipc.family.vayu.InterruptDsp');
+xdc.loadPackage('ti.ipc.rpmsg');
+xdc.loadPackage('ti.ipc.family.vayu');
+
+/* TBD: Not yet taken in from omapzoom:
+xdc.loadPackage('ti.srvmgr');
+xdc.useModule('ti.srvmgr.omx.OmxSrvMgr');
+xdc.loadPackage('ti.resmgr');
+*/
+
+/* Enable Memory Translation module that operates on the BIOS Resource Table */
+var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
+Resource.loadSegment = "EXT_CODE"
+
+/* Modules used in Power Management */
+xdc.loadPackage('ti.pm');
+/*
+var Power = xdc.useModule('ti.sysbios.family.c64p.tesla.Power');
+Power.loadSegment = "PM_DATA";
+*/
+
+/* Idle function that periodically flushes the unicache */
+var Idle = xdc.useModule('ti.sysbios.knl.Idle');
+Idle.addFunc('&VirtQueue_cacheWb');
+
+//TBD: Idle.addFunc('&ti_deh_Deh_idleBegin'); /* Must be placed before pwr mgmt */
+//TBD: Idle.addFunc('&IpcPower_idle'); /* IpcPower_idle must be at the end */
+
+var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
+var List = xdc.useModule('ti.sdo.utils.List');
+
+/* ti.grcm Configuration */
+/* TBD:
+var rcmSettings = xdc.useModule('ti.grcm.Settings');
+rcmSettings.ipc = rcmSettings.IpcSupport_ti_sdo_ipc;
+xdc.useModule('ti.grcm.RcmServer');
+*/
+xdc.useModule('ti.sysbios.xdcruntime.GateThreadSupport');
+var GateSwi = xdc.useModule('ti.sysbios.gates.GateSwi');
+
+var Task = xdc.useModule('ti.sysbios.knl.Task');
+Task.common$.namedInstance = true;
+
+var Assert = xdc.useModule('xdc.runtime.Assert');
+var Defaults = xdc.useModule('xdc.runtime.Defaults');
+var Diags = xdc.useModule('xdc.runtime.Diags');
+var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
+var LoggerSysParams = new LoggerSys.Params();
+
+/* Enable Logger: */
+Defaults.common$.logger = LoggerSys.create(LoggerSysParams);
+
+/* Enable runtime Diags_setMask() for non-XDC spec'd modules: */
+var Text = xdc.useModule('xdc.runtime.Text');
+Text.isLoaded = true;
+var Registry = xdc.useModule('xdc.runtime.Registry');
+Registry.common$.diags_ENTRY = Diags.RUNTIME_OFF;
+Registry.common$.diags_EXIT = Diags.RUNTIME_OFF;
+Registry.common$.diags_USER1 = Diags.ALWAYS_ON;
+Registry.common$.diags_INFO = Diags.ALWAYS_ON;
+Registry.common$.diags_LIFECYCLE = Diags.ALWAYS_ON;
+Registry.common$.diags_STATUS = Diags.ALWAYS_ON;
+Diags.setMaskEnabled = true;
+
+var Main = xdc.useModule('xdc.runtime.Main');
+Main.common$.diags_ASSERT = Diags.ALWAYS_ON;
+Main.common$.diags_INTERNAL = Diags.ALWAYS_ON;
+
+var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi');
+//TBD: var Deh = xdc.useModule('ti.deh.Deh');
+Hwi.enableException = true;
+
+/* -------------------------------- DSP ----------------------------------*/
+var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
+MultiProc.setConfig("DSP1", ["HOST", "IPU2", "IPU1", "DSP2", "DSP1", "EVE4", "EVE3", "EVE2", "EVE1"]);
+
+/* --------------------------- TICK --------------------------------------*/
+var Clock = xdc.useModule('ti.sysbios.knl.Clock');
+Clock.tickSource = Clock.TickSource_NULL;
+//Clock.tickSource = Clock.TickSource_USER;
+/* Configure BIOS clock source as GPTimer5 */
+//Clock.timerId = 0;
+
+var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
+
+/* Skip the Timer frequency verification check. Need to remove this later */
+Timer.checkFrequency = false;
+
+/* Match this to the SYS_CLK frequency sourcing the dmTimers.
+ * Not needed once the SYS/BIOS family settings is updated. */
+Timer.intFreq.hi = 0;
+Timer.intFreq.lo = 19200000;
+
+//var timerParams = new Timer.Params();
+//timerParams.period = Clock.tickPeriod;
+//timerParams.periodType = Timer.PeriodType_MICROSECS;
+/* Switch off Software Reset to make the below settings effective */
+//timerParams.tiocpCfg.softreset = 0x0;
+/* Smart-idle wake-up-capable mode */
+//timerParams.tiocpCfg.idlemode = 0x3;
+/* Wake-up generation for Overflow */
+//timerParams.twer.ovf_wup_ena = 0x1;
+//Timer.create(Clock.timerId, Clock.doTick, timerParams);
+
+Program.sectMap[".tracebuf"] = "TRACE_BUF";
+Program.sectMap[".errorbuf"] = "EXC_DATA";
+
+/* Version module */
+/* ???
+xdc.useModule('ti.utils.Version');
+*/
diff --git a/packages/ti/configs/vayu/IpcCommon.cfg.xs b/packages/ti/configs/vayu/IpcCommon.cfg.xs
--- /dev/null
@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * The SysMin used here vs StdMin, as trace buffer address is required for
+ * Linux trace debug driver, plus provides better performance.
+ */
+var System = xdc.useModule('xdc.runtime.System');
+var SysMin = xdc.useModule('ti.trace.SysMin');
+System.SupportProxy = SysMin;
+SysMin.bufSize = 0x8000;
+
+/* Define default memory heap properties */
+var Memory = xdc.useModule('xdc.runtime.Memory');
+Memory.defaultHeapSize = 0x20000;
+
+/* Modules used in the virtqueue/RPMessage/ServiceMgr libraries: */
+var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
+var BIOS = xdc.useModule('ti.sysbios.BIOS');
+
+/* Reduces code size, by only pulling in modules explicitly referenced: */
+BIOS.libType = BIOS.LibType_Custom;
+
+xdc.loadPackage('ti.sdo.ipc.family.vayu');
+xdc.useModule('ti.sdo.ipc.family.vayu.InterruptIpu');
+xdc.loadPackage('ti.ipc.rpmsg');
+xdc.loadPackage('ti.ipc.family.vayu');
+
+/* TBD:
+xdc.loadPackage('ti.srvmgr');
+xdc.useModule('ti.srvmgr.omx.OmxSrvMgr');
+xdc.loadPackage('ti.resmgr');
+*/
+
+/* Enable Memory Translation module that operates on the BIOS Resource Table */
+var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
+
+var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
+var List = xdc.useModule('ti.sdo.utils.List');
+
+/* ti.grcm Configuration */
+/* TBD:
+var rcmSettings = xdc.useModule('ti.grcm.Settings');
+rcmSettings.ipc = rcmSettings.IpcSupport_ti_sdo_ipc;
+xdc.useModule('ti.grcm.RcmServer');
+*/
+xdc.useModule('ti.sysbios.xdcruntime.GateThreadSupport');
+var GateSwi = xdc.useModule('ti.sysbios.gates.GateSwi');
+
+var Task = xdc.useModule('ti.sysbios.knl.Task');
+Task.common$.namedInstance = true;
+
+var Assert = xdc.useModule('xdc.runtime.Assert');
+var Defaults = xdc.useModule('xdc.runtime.Defaults');
+var Diags = xdc.useModule('xdc.runtime.Diags');
+var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
+var LoggerSysParams = new LoggerSys.Params();
+
+/* Enable Logger: */
+Defaults.common$.logger = LoggerSys.create(LoggerSysParams);
+
+/* Enable runtime Diags_setMask() for non-XDC spec'd modules: */
+var Text = xdc.useModule('xdc.runtime.Text');
+Text.isLoaded = true;
+var Registry = xdc.useModule('xdc.runtime.Registry');
+Registry.common$.diags_ENTRY = Diags.RUNTIME_OFF;
+Registry.common$.diags_EXIT = Diags.RUNTIME_OFF;
+Registry.common$.diags_USER1 = Diags.ALWAYS_ON;
+Registry.common$.diags_INFO = Diags.ALWAYS_ON;
+Registry.common$.diags_LIFECYCLE = Diags.ALWAYS_ON;
+Registry.common$.diags_STATUS = Diags.ALWAYS_ON;
+Diags.setMaskEnabled = true;
+
+var Main = xdc.useModule('xdc.runtime.Main');
+Main.common$.diags_ASSERT = Diags.ALWAYS_ON;
+Main.common$.diags_INTERNAL = Diags.ALWAYS_ON;
+
+var Hwi = xdc.useModule('ti.sysbios.family.arm.m3.Hwi');
+//TBD: var Deh = xdc.useModule('ti.deh.Deh');
+Hwi.enableException = true;
+Hwi.nvicCCR.DIV_0_TRP = 1;
+
+/* Include stack debug helper */
+/* TBD:
+var StackDbg = xdc.useModule('ti.trace.StackDbg');
+*/
+
+var dmTimer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
+/* dmTimer 0 mapped to GPT3 */
+dmTimer.timerSettings[0].baseAddr = 0xA8034000;
+/* dmTimer 1 mapped to GPT4 */
+dmTimer.timerSettings[1].baseAddr = 0xA8036000;
+/* dmTimer 2 mapped to GPT9 */
+dmTimer.timerSettings[2].baseAddr = 0xA803E000;
+/* dmTimer 3 mapped to GPT11 */
+dmTimer.timerSettings[3].baseAddr = 0xA8088000;
+
+/* Skip the Timer frequency verification check. Need to remove this later */
+dmTimer.checkFrequency = false;
+
+/* Match this to the SYS_CLK frequency sourcing the dmTimers.
+ * Not needed once the SYS/BIOS family settings is updated. */
+dmTimer.intFreq.hi = 0;
+dmTimer.intFreq.lo = 19200000;
+
+/* Override the internal sysTick timer with dmTimer for Bios Timer */
+var halTimer = xdc.useModule('ti.sysbios.hal.Timer');
+halTimer.TimerProxy = dmTimer;
+
+/* Version module */
+/* ???
+xdc.useModule('ti.utils.Version');
+*/
diff --git a/packages/ti/configs/vayu/Ipu2Smp.cfg b/packages/ti/configs/vayu/Ipu2Smp.cfg
--- /dev/null
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* Configure BIOS for SMP-mode */
+var BIOS = xdc.useModule('ti.sysbios.BIOS');
+BIOS.smpEnabled = true;
+
+/* -------------------------------- CORE0 ----------------------------------*/
+var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
+MultiProc.setConfig("IPU2", ["HOST", "IPU2", "IPU1", "DSP2", "DSP1", "EVE4", "EVE3", "EVE2", "EVE1"]);
+
+/* We are IPU2 */
+var Core = xdc.useModule('ti.sysbios.family.arm.ducati.Core');
+Core.ipuId = 2;
+
+/* ----------------------------- TICK ---------------------------------------*/
+var Clock = xdc.useModule('ti.sysbios.knl.Clock');
+Clock.tickSource = Clock.TickSource_USER;
+/* Configure GPTimer3 as BIOS clock source */
+Clock.timerId = 0;
+
+var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
+var timerParams = new Timer.Params();
+timerParams.period = Clock.tickPeriod;
+timerParams.periodType = Timer.PeriodType_MICROSECS;
+/* Smart-idle wake-up-capable mode */
+timerParams.tiocpCfg.idlemode = 0x3;
+/* Wake-up generation for Overflow */
+timerParams.twer.ovf_wup_ena = 0x1;
+Timer.create(Clock.timerId, Clock.doTick, timerParams);
+
+/* Modules used in Power Management */
+xdc.loadPackage('ti.pm');
+var Power = xdc.useModule('ti.sysbios.family.arm.ducati.smp.Power');
+Power.loadSegment = "PM_DATA";
+
+/* Idle functions - PM functions should be last */
+var Idle = xdc.useModule('ti.sysbios.knl.Idle');
+/* Function to flush unicache in each core */
+Idle.addCoreFunc('&VirtQueue_cacheWb', 0);
+Idle.addCoreFunc('&VirtQueue_cacheWb', 1);
+
+/* Watchdog detection functions in each core */
+/* TBD: DEH not taken from omapzoom yet:
+Idle.addCoreFunc('&ti_deh_Deh_idleBegin', 0);
+Idle.addCoreFunc('&ti_deh_Deh_idleBegin', 1);
+*/
+
+/* Idle Power Management functions for each core */
+Idle.addCoreFunc('&IpcPower_idle', 0);
+Idle.addCoreFunc('&IpcPower_idle', 1);
+
+Program.sectMap[".tracebuf"] = "TRACE_BUF";
+Program.sectMap[".errorbuf"] = "EXC_DATA";
diff --git a/packages/ti/configs/vayu/IpuAmmu.cfg b/packages/ti/configs/vayu/IpuAmmu.cfg
--- /dev/null
@@ -0,0 +1,177 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* -------------------------------- Cache ----------------------------------*/
+var Cache = xdc.useModule('ti.sysbios.hal.unicache.Cache');
+Cache.enableCache = true;
+
+/* -------------------------------- AMMU -----------------------------------*/
+var AMMU = xdc.useModule('ti.sysbios.hal.ammu.AMMU');
+/*********************** Small Pages *************************/
+/* smallPages[0] & smallPages[1] are auto-programmed by h/w */
+
+/* Overwrite smallPage[1] so that 16K is covered. H/w reset value configures
+ * only 4K */
+AMMU.smallPages[1].pageEnabled = AMMU.Enable_YES;
+AMMU.smallPages[1].logicalAddress = 0x40000000;
+AMMU.smallPages[1].translatedAddress = 0x55080000;
+AMMU.smallPages[1].translationEnabled = AMMU.Enable_YES;
+AMMU.smallPages[1].size = AMMU.Small_16K;
+
+/* L2RAM: 64K mapped using 4 smallPages(16K); cacheable; translated */
+/* config small page[2] to map 16K VA 0x20000000 to PA 0x55020000 */
+AMMU.smallPages[2].pageEnabled = AMMU.Enable_YES;
+AMMU.smallPages[2].logicalAddress = 0x20000000;
+AMMU.smallPages[2].translatedAddress = 0x55020000;
+AMMU.smallPages[2].translationEnabled = AMMU.Enable_YES;
+AMMU.smallPages[2].L1_writePolicy = AMMU.WritePolicy_WRITE_BACK;
+AMMU.smallPages[2].L1_allocate = AMMU.AllocatePolicy_ALLOCATE;
+AMMU.smallPages[2].L1_posted = AMMU.PostedPolicy_POSTED;
+AMMU.smallPages[2].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
+AMMU.smallPages[2].size = AMMU.Small_16K;
+
+/* config small page[3] to map 16K VA 0x20004000 to PA 0x55024000 */
+AMMU.smallPages[3].pageEnabled = AMMU.Enable_YES;
+AMMU.smallPages[3].logicalAddress = 0x20004000;
+AMMU.smallPages[3].translatedAddress = 0x55024000;
+AMMU.smallPages[3].translationEnabled = AMMU.Enable_YES;
+AMMU.smallPages[3].L1_writePolicy = AMMU.WritePolicy_WRITE_BACK;
+AMMU.smallPages[3].L1_allocate = AMMU.AllocatePolicy_ALLOCATE;
+AMMU.smallPages[3].L1_posted = AMMU.PostedPolicy_POSTED;
+AMMU.smallPages[3].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
+AMMU.smallPages[3].size = AMMU.Small_16K;
+
+/* config small page[4] to map 16K VA 0x20008000 to PA 0x55028000 */
+AMMU.smallPages[4].pageEnabled = AMMU.Enable_YES;
+AMMU.smallPages[4].logicalAddress = 0x20008000;
+AMMU.smallPages[4].translatedAddress = 0x55028000;
+AMMU.smallPages[4].translationEnabled = AMMU.Enable_YES;
+AMMU.smallPages[4].L1_writePolicy = AMMU.WritePolicy_WRITE_BACK;
+AMMU.smallPages[4].L1_allocate = AMMU.AllocatePolicy_ALLOCATE;
+AMMU.smallPages[4].L1_posted = AMMU.PostedPolicy_POSTED;
+AMMU.smallPages[4].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
+AMMU.smallPages[4].size = AMMU.Small_16K;
+
+/* config small page[5] to map 16K VA 0x2000C000 to PA 0x5502C000 */
+AMMU.smallPages[5].pageEnabled = AMMU.Enable_YES;
+AMMU.smallPages[5].logicalAddress = 0x2000C000;
+AMMU.smallPages[5].translatedAddress = 0x5502C000;
+AMMU.smallPages[5].translationEnabled = AMMU.Enable_YES;
+AMMU.smallPages[5].L1_writePolicy = AMMU.WritePolicy_WRITE_BACK;
+AMMU.smallPages[5].L1_allocate = AMMU.AllocatePolicy_ALLOCATE;
+AMMU.smallPages[5].L1_posted = AMMU.PostedPolicy_POSTED;
+AMMU.smallPages[5].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
+AMMU.smallPages[5].size = AMMU.Small_16K;
+
+/* ISS: Use 3 small pages(1 4K and 2 16K) for various ISP registers; non-cacheable; translated */
+/* config small page[6] to map 16K VA 0x50000000 to PA 0x55040000 */
+/* non cacheable by default */
+AMMU.smallPages[6].pageEnabled = AMMU.Enable_YES;
+AMMU.smallPages[6].logicalAddress = 0x50000000;
+AMMU.smallPages[6].translatedAddress = 0x55040000;
+AMMU.smallPages[6].translationEnabled = AMMU.Enable_YES;
+AMMU.smallPages[6].size = AMMU.Small_16K;
+
+/* config small page[7] to map 16K VA 0x50010000 to PA 0x55050000 */
+/* non cacheable by default */
+AMMU.smallPages[7].pageEnabled = AMMU.Enable_YES;
+AMMU.smallPages[7].logicalAddress = 0x50010000;
+AMMU.smallPages[7].translatedAddress = 0x55050000;
+AMMU.smallPages[7].translationEnabled = AMMU.Enable_YES;
+AMMU.smallPages[7].size = AMMU.Small_16K;
+
+/* config small page[8] to map 4K VA 0x50020000 to PA 0x55060000 */
+/* non cacheable by default */
+AMMU.smallPages[8].pageEnabled = AMMU.Enable_YES;
+AMMU.smallPages[8].logicalAddress = 0x50020000;
+AMMU.smallPages[8].translatedAddress = 0x55060000;
+AMMU.smallPages[8].translationEnabled = AMMU.Enable_YES;
+AMMU.smallPages[8].size = AMMU.Small_4K;
+
+/* Map the control module, needed for crossbar configuration */
+/* config small page[9] to map 16K VA 0x4a000000 to PA 0x4a000000 */
+/* non cacheable by default */
+AMMU.smallPages[9].pageEnabled = AMMU.Enable_YES;
+AMMU.smallPages[9].logicalAddress = 0x4a000000;
+AMMU.smallPages[9].translationEnabled = AMMU.Enable_NO;
+AMMU.smallPages[9].size = AMMU.Small_16K;
+
+
+/*********************** Medium Pages *************************/
+/* ISS: The entire ISS register space using a medium page (256K); cacheable; translated */
+/* config medium page[0] to map 256K VA 0x50000000 to PA 0x55040000 */
+/* Make it L1 cacheable */
+AMMU.mediumPages[0].pageEnabled = AMMU.Enable_YES;
+AMMU.mediumPages[0].logicalAddress = 0x50000000;
+AMMU.mediumPages[0].translatedAddress = 0x55040000;
+AMMU.mediumPages[0].translationEnabled = AMMU.Enable_YES;
+AMMU.mediumPages[0].size = AMMU.Medium_256K;
+AMMU.mediumPages[0].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
+AMMU.mediumPages[0].L1_posted = AMMU.PostedPolicy_POSTED;
+
+
+/*********************** Large Pages *************************/
+/* Instruction Code: Large page (512M); cacheable */
+/* config large page[0] to map 512MB VA 0x0 to L3 0x0 */
+AMMU.largePages[0].pageEnabled = AMMU.Enable_YES;
+AMMU.largePages[0].logicalAddress = 0x0;
+AMMU.largePages[0].translationEnabled = AMMU.Enable_NO;
+AMMU.largePages[0].size = AMMU.Large_512M;
+AMMU.largePages[0].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
+AMMU.largePages[0].L1_posted = AMMU.PostedPolicy_POSTED;
+
+/* TILER & DMM regions: Large page (512M); cacheable */
+/* config large page[1] to map 512MB VA 0x60000000 to L3 0x60000000 */
+AMMU.largePages[1].pageEnabled = AMMU.Enable_YES;
+AMMU.largePages[1].logicalAddress = 0x60000000;
+AMMU.largePages[1].translationEnabled = AMMU.Enable_NO;
+AMMU.largePages[1].size = AMMU.Large_512M;
+AMMU.largePages[1].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
+AMMU.largePages[1].L1_posted = AMMU.PostedPolicy_POSTED;
+
+/* Private, Shared and IPC Data regions: Large page (512M); cacheable */
+/* config large page[2] to map 512MB VA 0x80000000 to L3 0x80000000 */
+AMMU.largePages[2].pageEnabled = AMMU.Enable_YES;
+AMMU.largePages[2].logicalAddress = 0x80000000;
+AMMU.largePages[2].translationEnabled = AMMU.Enable_NO;
+AMMU.largePages[2].size = AMMU.Large_512M;
+AMMU.largePages[2].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
+AMMU.largePages[2].L1_posted = AMMU.PostedPolicy_POSTED;
+
+/* Peripheral regions: Large Page (512M); non-cacheable */
+/* config large page[3] to map 512MB VA 0xA0000000 to L3 0xA0000000 */
+AMMU.largePages[3].pageEnabled = AMMU.Enable_YES;
+AMMU.largePages[3].logicalAddress = 0xA0000000;
+AMMU.largePages[3].translationEnabled = AMMU.Enable_NO;
+AMMU.largePages[3].size = AMMU.Large_512M;
+AMMU.largePages[3].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
+AMMU.largePages[3].L1_posted = AMMU.PostedPolicy_POSTED;
diff --git a/packages/ti/configs/vayu/package.bld b/packages/ti/configs/vayu/package.bld
--- /dev/null
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*!
+ * File generated by platform wizard.
+ *
+ */
+
+Pkg.attrs.exportAll = true;
diff --git a/packages/ti/configs/vayu/package.xdc b/packages/ti/configs/vayu/package.xdc
--- /dev/null
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== package.xdc ========
+ *
+ */
+
+/*!
+ * ======== ti.configs.vayu ========
+ * Common config files.
+ *
+ */
+
+package ti.configs.vayu [1,0,0] {
+}
diff --git a/packages/ti/ipc/family/vayu/InterruptProxy.h b/packages/ti/ipc/family/vayu/InterruptProxy.h
--- /dev/null
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== InterruptProxy.h ========
+ * Proxy Interrupt Manager
+ */
+
+#ifndef ti_ipc_rpmsg_InterruptProxy__include
+#define ti_ipc_rpmsg_InterruptProxy__include
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#include <ti/sysbios/hal/Hwi.h>
+
+#define INVALIDPAYLOAD (0xFFFFFFFF)
+
+#if defined(M3_ONLY) || defined(SMP)
+#include <ti/sdo/ipc/family/vayu/InterruptIpu.h>
+
+/*
+ *************************************************************************
+ * M3 Interrupt Proxy Macros
+ *************************************************************************
+ */
+
+#define InterruptProxy_intEnable InterruptIpu_intEnable
+
+#define InterruptProxy_intDisable InterruptIpu_intDisable
+
+#define InterruptProxy_intRegister InterruptIpu_intRegister
+
+#define InterruptProxy_intSend InterruptIpu_intSend
+
+#define InterruptProxy_intClear InterruptIpu_intClear
+#endif
+
+#if defined(DSP)
+#include <ti/sdo/ipc/family/vayu/InterruptDsp.h>
+
+/*
+ *************************************************************************
+ * DSP Interrupt Proxy Macros
+ *************************************************************************
+ */
+#define InterruptProxy_intEnable InterruptDsp_intEnable
+
+#define InterruptProxy_intDisable InterruptDsp_intDisable
+
+#define InterruptProxy_intRegister InterruptDsp_intRegister
+
+#define InterruptProxy_intSend InterruptDsp_intSend
+
+#define InterruptProxy_intClear InterruptDsp_intClear
+#endif
+
+#if defined(__cplusplus)
+}
+#endif /* defined (__cplusplus) */
+
+#endif /* ti_ipc_rpmsg_InterruptProxy__include */
diff --git a/packages/ti/ipc/family/vayu/VirtQueue.c b/packages/ti/ipc/family/vayu/VirtQueue.c
--- /dev/null
@@ -0,0 +1,619 @@
+/*
+ * Copyright (c) 2011-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** ============================================================================
+ * @file VirtQueue.c
+ *
+ * @brief Virtio Queue implementation for BIOS
+ *
+ * Differences between BIOS version and Linux kernel (include/linux/virtio.h):
+ * - Renamed module from virtio.h to VirtQueue_Object.h to match the API prefixes;
+ * - BIOS (XDC) types and CamelCasing used;
+ * - virtio_device concept removed (i.e, assumes no containing device);
+ * - simplified scatterlist from Linux version;
+ * - VirtQueue_Objects are created statically here, so just added a VirtQueue_Object_init()
+ * fxn to take the place of the Virtio vring_new_virtqueue() API;
+ * - The notify function is implicit in the implementation, and not provided
+ * by the client, as it is in Linux virtio.
+ *
+ * All VirtQueue operations can be called in any context.
+ *
+ * The virtio header should be included in an application as follows:
+ * @code
+ * #include <ti/ipc/family/vayu/VirtQueue.h>
+ * @endcode
+ *
+ */
+
+#include <xdc/std.h>
+#include <xdc/runtime/System.h>
+#include <xdc/runtime/Error.h>
+#include <xdc/runtime/Memory.h>
+#include <xdc/runtime/Log.h>
+#include <xdc/runtime/Diags.h>
+
+#include <ti/sysbios/hal/Hwi.h>
+#include <ti/sysbios/knl/Clock.h>
+#include <ti/sysbios/gates/GateAll.h>
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/hal/Cache.h>
+
+#include <ti/ipc/MultiProc.h>
+
+#include <ti/ipc/rpmsg/virtio_ring.h>
+#ifndef DSP
+#include <ti/pm/IpcPower.h>
+#endif
+#include <string.h>
+
+#include <ti/ipc/rpmsg/_VirtQueue.h>
+
+#include <ti/sdo/ipc/notifyDrivers/IInterrupt.h>
+#include "InterruptProxy.h"
+#include "VirtQueue.h"
+
+
+/* Used for defining the size of the virtqueue registry */
+#define NUM_QUEUES 4
+
+/* Predefined device addresses */
+#define IPC_MEM_VRING0 0xA0000000
+#define IPC_MEM_VRING1 0xA0004000
+#define IPC_MEM_VRING2 0xA0008000
+#define IPC_MEM_VRING3 0xA000c000
+
+/*
+ * Sizes of the virtqueues (expressed in number of buffers supported,
+ * and must be power of two)
+ */
+#define VQ0_SIZE 256
+#define VQ1_SIZE 256
+#define VQ2_SIZE 256
+#define VQ3_SIZE 256
+
+/*
+ * enum - Predefined Mailbox Messages
+ *
+ * @RP_MSG_MBOX_READY: informs the M3's that we're up and running. will be
+ * followed by another mailbox message that carries the A9's virtual address
+ * of the shared buffer. This would allow the A9's drivers to send virtual
+ * addresses of the buffers.
+ *
+ * @RP_MSG_MBOX_STATE_CHANGE: informs the receiver that there is an inbound
+ * message waiting in its own receive-side vring. please note that currently
+ * this message is optional: alternatively, one can explicitly send the index
+ * of the triggered virtqueue itself. the preferred approach will be decided
+ * as we progress and experiment with those design ideas.
+ *
+ * @RP_MSG_MBOX_CRASH: this message indicates that the BIOS side is unhappy
+ *
+ * @RP_MBOX_ECHO_REQUEST: this message requests the remote processor to reply
+ * with RP_MBOX_ECHO_REPLY
+ *
+ * @RP_MBOX_ECHO_REPLY: this is a reply that is sent when RP_MBOX_ECHO_REQUEST
+ * is received.
+ *
+ * @RP_MBOX_ABORT_REQUEST: tells the M3 to crash on demand
+ *
+ * @RP_MBOX_BOOTINIT_DONE: this message indicates the BIOS side has reached a
+ * certain state during the boot process. This message is used to inform the
+ * host that the basic BIOS initialization is done, and lets the host use this
+ * notification to perform certain actions.
+ */
+enum {
+ RP_MSG_MBOX_READY = (Int)0xFFFFFF00,
+ RP_MSG_MBOX_STATE_CHANGE = (Int)0xFFFFFF01,
+ RP_MSG_MBOX_CRASH = (Int)0xFFFFFF02,
+ RP_MBOX_ECHO_REQUEST = (Int)0xFFFFFF03,
+ RP_MBOX_ECHO_REPLY = (Int)0xFFFFFF04,
+ RP_MBOX_ABORT_REQUEST = (Int)0xFFFFFF05,
+ RP_MSG_FLUSH_CACHE = (Int)0xFFFFFF06,
+ RP_MSG_BOOTINIT_DONE = (Int)0xFFFFFF07,
+ RP_MSG_HIBERNATION = (Int)0xFFFFFF10,
+ RP_MSG_HIBERNATION_FORCE = (Int)0xFFFFFF11,
+ RP_MSG_HIBERNATION_ACK = (Int)0xFFFFFF12,
+ RP_MSG_HIBERNATION_CANCEL = (Int)0xFFFFFF13
+};
+
+#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
+#define RP_MSG_NUM_BUFS (VQ0_SIZE) /* must be power of two */
+#define RP_MSG_BUF_SIZE (512)
+#define RP_MSG_BUFS_SPACE (RP_MSG_NUM_BUFS * RP_MSG_BUF_SIZE * 2)
+
+#define PAGE_SIZE (4096)
+/*
+ * The alignment to use between consumer and producer parts of vring.
+ * Note: this is part of the "wire" protocol. If you change this, you need
+ * to update your BIOS image as well
+ */
+#define RP_MSG_VRING_ALIGN (4096)
+
+/* With 256 buffers, our vring will occupy 3 pages */
+#define RP_MSG_RING_SIZE ((DIV_ROUND_UP(vring_size(RP_MSG_NUM_BUFS, \
+ RP_MSG_VRING_ALIGN), PAGE_SIZE)) * PAGE_SIZE)
+
+/* The total IPC space needed to communicate with a remote processor */
+#define RPMSG_IPC_MEM (RP_MSG_BUFS_SPACE + 2 * RP_MSG_RING_SIZE)
+
+#define ID_SYSM3_TO_A9 ID_SELF_TO_A9
+#define ID_A9_TO_SYSM3 ID_A9_TO_SELF
+#define ID_DSP_TO_A9 ID_SELF_TO_A9
+#define ID_A9_TO_DSP ID_A9_TO_SELF
+#define ID_APPM3_TO_A9 2
+#define ID_A9_TO_APPM3 3
+
+typedef struct VirtQueue_Object {
+ /* Id for this VirtQueue_Object */
+ UInt16 id;
+
+ /* The function to call when buffers are consumed (can be NULL) */
+ VirtQueue_callback callback;
+
+ /* Shared state */
+ struct vring vring;
+
+ /* Number of free buffers */
+ UInt16 num_free;
+
+ /* Last available index; updated by VirtQueue_getAvailBuf */
+ UInt16 last_avail_idx;
+
+ /* Last available index; updated by VirtQueue_addUsedBuf */
+ UInt16 last_used_idx;
+
+ /* Will eventually be used to kick remote processor */
+ UInt16 procId;
+
+ /* Gate to protect from multiple threads */
+ GateAll_Handle gateH;
+} VirtQueue_Object;
+
+static struct VirtQueue_Object *queueRegistry[NUM_QUEUES] = {NULL};
+
+static UInt16 hostProcId;
+#ifndef SMP
+static UInt16 dsp1ProcId;
+static UInt16 sysm3ProcId;
+static UInt16 appm3ProcId;
+#endif
+
+#define DSPEVENTID 5
+IInterrupt_IntInfo intInfo;
+
+#if defined(M3_ONLY) && !defined(SMP)
+extern Void OffloadM3_init();
+extern Int OffloadM3_processSysM3Tasks(UArg msg);
+#endif
+
+static inline Void * mapPAtoVA(UInt pa)
+{
+ return (Void *)((pa & 0x000fffffU) | IPC_MEM_VRING0);
+}
+
+static inline UInt mapVAtoPA(Void * va)
+{
+ return ((UInt)va & 0x000fffffU) | 0x9cf00000U;
+}
+
+/*!
+ * ======== VirtQueue_kick ========
+ */
+Void VirtQueue_kick(VirtQueue_Handle vq)
+{
+ /* For now, simply interrupt remote processor */
+ if (vq->vring.avail->flags & VRING_AVAIL_F_NO_INTERRUPT) {
+ Log_print0(Diags_USER1,
+ "VirtQueue_kick: no kick because of VRING_AVAIL_F_NO_INTERRUPT\n");
+ return;
+ }
+
+ Log_print2(Diags_USER1,
+ "VirtQueue_kick: Sending interrupt to proc %d with payload 0x%x\n",
+ (IArg)vq->procId, (IArg)vq->id);
+ InterruptProxy_intSend(vq->procId, NULL, vq->id);
+}
+
+/*!
+ * ======== VirtQueue_addUsedBuf ========
+ */
+Int VirtQueue_addUsedBuf(VirtQueue_Handle vq, Int16 head, Int len)
+{
+ struct vring_used_elem *used;
+ IArg key;
+
+ key = GateAll_enter(vq->gateH);
+ if ((head > vq->vring.num) || (head < 0)) {
+ GateAll_leave(vq->gateH, key);
+ Error_raise(NULL, Error_E_generic, 0, 0);
+ }
+
+ /*
+ * The virtqueue contains a ring of used buffers. Get a pointer to the
+ * next entry in that used ring.
+ */
+ used = &vq->vring.used->ring[vq->vring.used->idx % vq->vring.num];
+ used->id = head;
+ used->len = len;
+
+ vq->vring.used->idx++;
+ GateAll_leave(vq->gateH, key);
+
+ return (0);
+}
+
+/*!
+ * ======== VirtQueue_addAvailBuf ========
+ */
+Int VirtQueue_addAvailBuf(VirtQueue_Object *vq, Void *buf)
+{
+ UInt16 avail;
+ IArg key;
+
+ if (vq->num_free == 0) {
+ /* There's no more space */
+ Error_raise(NULL, Error_E_generic, 0, 0);
+ }
+
+ vq->num_free--;
+
+ key = GateAll_enter(vq->gateH);
+ avail = vq->vring.avail->idx++ % vq->vring.num;
+
+ vq->vring.desc[avail].addr = mapVAtoPA(buf);
+ vq->vring.desc[avail].len = RP_MSG_BUF_SIZE;
+ GateAll_leave(vq->gateH, key);
+
+ return (vq->num_free);
+}
+
+/*!
+ * ======== VirtQueue_getUsedBuf ========
+ */
+Void *VirtQueue_getUsedBuf(VirtQueue_Object *vq)
+{
+ UInt16 head;
+ Void *buf;
+ IArg key;
+
+ key = GateAll_enter(vq->gateH);
+ /* There's nothing available? */
+ if (vq->last_used_idx == vq->vring.used->idx) {
+ buf = NULL;
+ }
+ else {
+ head = vq->vring.used->ring[vq->last_used_idx % vq->vring.num].id;
+ vq->last_used_idx++;
+
+ buf = mapPAtoVA(vq->vring.desc[head].addr);
+ }
+ GateAll_leave(vq->gateH, key);
+
+ return (buf);
+}
+
+/*!
+ * ======== VirtQueue_getAvailBuf ========
+ */
+Int16 VirtQueue_getAvailBuf(VirtQueue_Handle vq, Void **buf, Int *len)
+{
+ Int16 head;
+ IArg key;
+
+ key = GateAll_enter(vq->gateH);
+ Log_print6(Diags_USER1, "getAvailBuf vq: 0x%x %d %d %d 0x%x 0x%x\n",
+ (IArg)vq, vq->last_avail_idx, vq->vring.avail->idx, vq->vring.num,
+ (IArg)&vq->vring.avail, (IArg)vq->vring.avail);
+
+ /* There's nothing available? */
+ if (vq->last_avail_idx == vq->vring.avail->idx) {
+ /* We need to know about added buffers */
+ vq->vring.used->flags &= ~VRING_USED_F_NO_NOTIFY;
+ head = (-1);
+ }
+ else {
+ /*
+ * Grab the next descriptor number they're advertising, and increment
+ * the index we've seen.
+ */
+ head = vq->vring.avail->ring[vq->last_avail_idx++ % vq->vring.num];
+
+ *buf = mapPAtoVA(vq->vring.desc[head].addr);
+ *len = vq->vring.desc[head].len;
+ }
+ GateAll_leave(vq->gateH, key);
+
+ return (head);
+}
+
+/*!
+ * ======== VirtQueue_disableCallback ========
+ */
+Void VirtQueue_disableCallback(VirtQueue_Object *vq)
+{
+ //TODO
+ Log_print0(Diags_USER1, "VirtQueue_disableCallback called.");
+}
+
+/*!
+ * ======== VirtQueue_enableCallback ========
+ */
+Bool VirtQueue_enableCallback(VirtQueue_Object *vq)
+{
+ Log_print0(Diags_USER1, "VirtQueue_enableCallback called.");
+
+ //TODO
+ return (FALSE);
+}
+
+/*!
+ * ======== VirtQueue_isr ========
+ * Note 'arg' is ignored: it is the Hwi argument, not the mailbox argument.
+ */
+Void VirtQueue_isr(UArg msg)
+{
+ VirtQueue_Object *vq;
+
+ msg = InterruptProxy_intClear(hostProcId, &intInfo);
+
+ Log_print1(Diags_USER1, "VirtQueue_isr received msg = 0x%x\n", msg);
+
+#ifndef SMP
+ if (MultiProc_self() == sysm3ProcId || MultiProc_self() == dsp1ProcId) {
+#endif
+ switch(msg) {
+ case (UInt)RP_MSG_MBOX_READY:
+ return;
+
+ case (UInt)RP_MBOX_ECHO_REQUEST:
+ InterruptProxy_intSend(hostProcId, NULL,
+ (UInt)(RP_MBOX_ECHO_REPLY));
+ return;
+
+ case (UInt)RP_MBOX_ABORT_REQUEST:
+ {
+ /* Suppress Coverity Error: FORWARD_NULL: */
+ // coverity[assign_zero]
+ Fxn f = (Fxn)0x0;
+ Log_print0(Diags_USER1, "Crash on demand ...\n");
+ // coverity[var_deref_op]
+ f();
+ }
+ return;
+
+ case (UInt)RP_MSG_FLUSH_CACHE:
+ Cache_wbAll();
+ return;
+
+#ifndef DSP
+ case (UInt)RP_MSG_HIBERNATION:
+ if (IpcPower_canHibernate() == FALSE) {
+ InterruptProxy_intSend(hostProcId, NULL,
+ (UInt)RP_MSG_HIBERNATION_CANCEL);
+ return;
+ }
+
+ /* Fall through */
+ case (UInt)RP_MSG_HIBERNATION_FORCE:
+#ifndef SMP
+ /* Core0 should notify Core1 */
+ if (MultiProc_self() == sysm3ProcId) {
+ InterruptProxy_intSend(appm3ProcId, NULL,
+ (UInt)(RP_MSG_HIBERNATION));
+ }
+#endif
+ /* Ack request */
+ InterruptProxy_intSend(hostProcId, NULL,
+ (UInt)RP_MSG_HIBERNATION_ACK);
+ IpcPower_suspend();
+ return;
+#endif
+ default:
+#if defined(M3_ONLY) && !defined(SMP)
+ /* Check and process any Inter-M3 Offload messages */
+ if (OffloadM3_processSysM3Tasks(msg))
+ return;
+#endif
+
+ /*
+ * If the message isn't one of the above, it's either part of the
+ * 2-message synchronization sequence or it a virtqueue message
+ */
+ break;
+ }
+#ifndef SMP
+ }
+ else if (msg & 0xFFFF0000) {
+#ifndef DSP
+ if (msg == (UInt)RP_MSG_HIBERNATION) {
+ IpcPower_suspend();
+ }
+#endif
+ return;
+ }
+
+ if (MultiProc_self() == sysm3ProcId && (msg == ID_A9_TO_APPM3 || msg == ID_APPM3_TO_A9)) {
+ InterruptProxy_intSend(appm3ProcId, NULL, (UInt)msg);
+ }
+ else {
+#endif
+ /* Don't let unknown messages to pass as a virtqueue index */
+ if (msg >= NUM_QUEUES) {
+ /* Adding print here deliberately, we should never see this */
+ System_printf("VirtQueue_isr: Invalid mailbox message 0x%x "
+ "received\n", msg);
+ return;
+ }
+
+ vq = queueRegistry[msg];
+ if (vq) {
+ vq->callback(vq);
+ }
+#ifndef SMP
+ }
+#endif
+}
+
+
+/*!
+ * ======== VirtQueue_create ========
+ */
+VirtQueue_Handle VirtQueue_create(UInt16 remoteProcId, VirtQueue_Params *params,
+ Error_Block *eb)
+{
+ VirtQueue_Object *vq;
+ Void *vringAddr;
+
+ vq = Memory_alloc(NULL, sizeof(VirtQueue_Object), 0, eb);
+ if (NULL == vq) {
+ return (NULL);
+ }
+
+ /* Create the thread protection gate */
+ vq->gateH = GateAll_create(NULL, eb);
+ if (Error_check(eb)) {
+ Log_error0("VirtQueue_create: could not create gate object");
+ Memory_free(NULL, vq, sizeof(VirtQueue_Object));
+ return (NULL);
+ }
+
+ vq->callback = params->callback;
+ vq->id = params->vqId;
+ vq->procId = remoteProcId;
+ vq->last_avail_idx = 0;
+
+#ifndef SMP
+ if (MultiProc_self() == appm3ProcId) {
+ /* vqindices that belong to AppM3 should be big so they don't
+ * collide with SysM3's virtqueues */
+ vq->id += 2;
+ }
+#endif
+
+ switch (vq->id) {
+ /* IPC transport vrings */
+ case ID_SELF_TO_A9:
+ /* IPU/DSP -> A9 */
+ vringAddr = (struct vring *) IPC_MEM_VRING0;
+ break;
+ case ID_A9_TO_SELF:
+ /* A9 -> IPU/DSP */
+ vringAddr = (struct vring *) IPC_MEM_VRING1;
+ break;
+#ifndef SMP
+ case ID_APPM3_TO_A9:
+ /* APPM3 -> A9 */
+ vringAddr = (struct vring *) IPC_MEM_VRING2;
+ break;
+ case ID_A9_TO_APPM3:
+ /* A9 -> APPM3 */
+ vringAddr = (struct vring *) IPC_MEM_VRING3;
+ break;
+#endif
+ default:
+ GateAll_delete(&vq->gateH);
+ Memory_free(NULL, vq, sizeof(VirtQueue_Object));
+ return (NULL);
+ }
+
+ Log_print3(Diags_USER1,
+ "vring: %d 0x%x (0x%x)\n", vq->id, (IArg)vringAddr,
+ RP_MSG_RING_SIZE);
+
+ /* See coverity related comment in vring_init() */
+ // coverity[overrun-call]
+ vring_init(&(vq->vring), RP_MSG_NUM_BUFS, vringAddr, RP_MSG_VRING_ALIGN);
+
+ /*
+ * Don't trigger a mailbox message every time MPU makes another buffer
+ * available
+ */
+ if (vq->procId == hostProcId) {
+ vq->vring.used->flags |= VRING_USED_F_NO_NOTIFY;
+ }
+
+ queueRegistry[vq->id] = vq;
+
+ return (vq);
+}
+
+/*!
+ * ======== VirtQueue_startup ========
+ */
+Void VirtQueue_startup()
+{
+ hostProcId = MultiProc_getId("HOST");
+#ifndef SMP
+ dsp1ProcId = MultiProc_getId("DSP1");
+ sysm3ProcId = MultiProc_getId("CORE0");
+ appm3ProcId = MultiProc_getId("CORE1");
+#endif
+
+#ifdef DSP
+ intInfo.intVectorId = DSPEVENTID;
+#else
+ /* Initilize the IpcPower module */
+ IpcPower_init();
+#endif
+
+ InterruptProxy_intRegister(hostProcId, &intInfo, (Fxn)VirtQueue_isr, NULL);
+}
+
+/*!
+ * ======== VirtQueue_postCrashToMailbox ========
+ */
+Void VirtQueue_postCrashToMailbox(Void)
+{
+ InterruptProxy_intSend(0, NULL, (UInt)RP_MSG_MBOX_CRASH);
+}
+
+#define CACHE_WB_TICK_PERIOD 5
+
+/*!
+ * ======== VirtQueue_cacheWb ========
+ *
+ * Used for flushing SysMin trace buffer.
+ */
+Void VirtQueue_cacheWb()
+{
+ static UInt32 oldticks = 0;
+ UInt32 newticks;
+
+ newticks = Clock_getTicks();
+ if (newticks - oldticks < (UInt32)CACHE_WB_TICK_PERIOD) {
+ /* Don't keep flushing cache */
+ return;
+ }
+
+ oldticks = newticks;
+
+ /* Flush the cache */
+ Cache_wbAll();
+}
diff --git a/packages/ti/ipc/family/vayu/VirtQueue.h b/packages/ti/ipc/family/vayu/VirtQueue.h
--- /dev/null
@@ -0,0 +1,238 @@
+/*
+ * Copyright (c) 2011-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** ============================================================================
+ * @file VirtQueue.h
+ *
+ * @brief Virtio Queue interface for BIOS
+ *
+ * Differences between BIOS version and Linux kernel (include/linux/virtio.h):
+ * - Renamed module from virtio.h to VirtQueue.h to match the API prefixes;
+ * - BIOS (XDC) types and CamelCasing used;
+ * - virtio_device concept removed (i.e, assumes no containing device);
+ * - removed scatterlist;
+ * - VirtQueues are created statically here, so just added a VirtQueue_init()
+ * fxn to take the place of the Virtio vring_new_virtqueue() API;
+ * - The notify function is implicit in the implementation, and not provided
+ * by the client, as it is in Linux virtio.
+ * - Broke into APIs to add/get used and avail buffers, as the API is
+ * assymmetric.
+ *
+ * Usage:
+ * This IPC only works between one processor designated as the Host (Linux)
+ * and one or more Slave processors (BIOS).
+ *
+ * For any Host/Slave pair, there are 2 VirtQueues (aka Vrings);
+ * Only the Host adds new buffers to the avail list of a vring;
+ * Available buffers can be empty or full, depending on direction;
+ * Used buffer means "processed" (emptied or filled);
+ *
+ * Host:
+ * - To send buffer to the slave processor:
+ * add_avail_buf(slave_virtqueue);
+ * kick(slave_virtqueue);
+ * get_used_buf(slave_virtqueue);
+ * - To receive buffer from slave processor:
+ * add_avail_buf(host_virtqueue);
+ * kick(host_virtqueue);
+ * get_used_buf(host_virtqueue);
+ *
+ * Slave:
+ * - To send buffer to the host:
+ * get_avail_buf(host_virtqueue);
+ * add_used_buf(host_virtqueue);
+ * kick(host_virtqueue);
+ * - To receive buffer from the host:
+ * get_avail_buf(slave_virtqueue);
+ * add_used_buf(slave_virtqueue);
+ * kick(slave_virtqueue);
+ *
+ * All VirtQueue operations can be called in any context.
+ *
+ * The virtio header should be included in an application as follows:
+ * @code
+ * #include <ti/ipc/rpmsg/VirtQueue.h>
+ * @endcode
+ *
+ * ============================================================================
+ */
+
+#ifndef ti_ipc_family_vayu_VirtQueue__include
+#define ti_ipc_family_vayu_VirtQueue__include
+
+#include <xdc/runtime/Error.h>
+
+#if defined (__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief VirtQueue Ids for the basic IPC transport rings.
+ */
+#define ID_SELF_TO_A9 0
+#define ID_A9_TO_SELF 1
+
+/*!
+ * @brief a queue to register buffers for sending or receiving.
+ */
+typedef struct VirtQueue_Object *VirtQueue_Handle;
+
+/*!
+ * @var VirtQueue_callback
+ * @brief Signature of any callback function that can be registered with the
+ * VirtQueue
+ *
+ * @param[in] VirtQueue Pointer to the VirtQueue which was signalled.
+ */
+typedef Void (*VirtQueue_callback)(VirtQueue_Handle);
+
+/*!
+ * @brief VirtQueue_params
+ */
+typedef struct VirtQueue_Params {
+ VirtQueue_callback callback;
+ Int vqId;
+} VirtQueue_Params;
+
+/* Params_init */
+static inline void VirtQueue_Params_init( VirtQueue_Params *prms )
+{
+ /* Do nothing: We are emulating an XDC generated fxn, w/o XDC config! */
+}
+
+/*!
+ * @brief Initialize at runtime the VirtQueue
+ *
+ * @param[in] procId Processor ID associated with this VirtQueue.
+ * @param[in] params VirtQueue_Params {callback, vqId}.
+ * @param[in] eb Error_Block (or NULL).
+ *
+ * @Returns Returns a handle to a new initialized VirtQueue.
+ */
+VirtQueue_Handle VirtQueue_create(UInt16 procId, VirtQueue_Params *params,
+ Error_Block *eb);
+
+/*!
+ * @brief Notify other processor of new buffers in the queue.
+ *
+ * After one or more add_buf calls, invoke this to kick the other side.
+ *
+ * @param[in] vq the VirtQueue.
+ *
+ * @sa VirtQueue_addBuf
+ */
+Void VirtQueue_kick(VirtQueue_Handle vq);
+
+/*!
+ * @brief Used at startup-time for initialization
+ *
+ * Should be called before any other VirtQueue APIs
+ */
+Void VirtQueue_startup();
+
+
+/*
+ * ============================================================================
+ * Host Only Functions:
+ * ============================================================================
+ */
+
+/*!
+ * @brief Add available buffer to virtqueue's available buffer list.
+ * Only used by Host.
+ *
+ * @param[in] vq the VirtQueue.
+ * @param[in] buf the buffer to be processed by the slave.
+ *
+ * @return Remaining capacity of queue or a negative error.
+ *
+ * @sa VirtQueue_getUsedBuf
+ */
+Int VirtQueue_addAvailBuf(VirtQueue_Handle vq, Void *buf);
+
+/*!
+ * @brief Get the next used buffer.
+ * Only used by Host.
+ *
+ * @param[in] vq the VirtQueue.
+ *
+ * @return Returns NULL or the processed buffer.
+ *
+ * @sa VirtQueue_addAvailBuf
+ */
+Void *VirtQueue_getUsedBuf(VirtQueue_Handle vq);
+
+/*
+ * ============================================================================
+ * Slave Only Functions:
+ * ============================================================================
+ */
+
+/*!
+ * @brief Get the next available buffer.
+ * Only used by Slave.
+ *
+ * @param[in] vq the VirtQueue.
+ * @param[out] buf Pointer to location of available buffer;
+ * @param[out] len Length of the available buffer message.
+ *
+ * @return Returns a token used to identify the available buffer, to be
+ * passed back into VirtQueue_addUsedBuf();
+ * token is negative if failure to find an available buffer.
+ *
+ * @sa VirtQueue_addUsedBuf
+ */
+Int16 VirtQueue_getAvailBuf(VirtQueue_Handle vq, Void **buf, Int *len);
+
+/*!
+ * @brief Add used buffer to virtqueue's used buffer list.
+ * Only used by Slave.
+ *
+ * @param[in] vq the VirtQueue.
+ * @param[in] token token of the buffer to be added to vring used list.
+ * @param[in] len length of the message being added.
+ *
+ * @return Remaining capacity of queue or a negative error.
+ *
+ * @sa VirtQueue_getAvailBuf
+ */
+Int VirtQueue_addUsedBuf(VirtQueue_Handle vq, Int16 token, Int len);
+
+/*!
+ * @brief Post crash message to host mailbox
+ */
+Void VirtQueue_postCrashToMailbox(Void);
+
+#if defined (__cplusplus)
+}
+#endif /* defined (__cplusplus) */
+
+#endif /* ti_ipc_family_vayu_VirtQueue__include */
diff --git a/packages/ti/ipc/family/vayu/package.bld b/packages/ti/ipc/family/vayu/package.bld
--- /dev/null
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2011-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== package.bld ========
+ */
+
+var Build = xdc.useModule('xdc.bld.BuildEnvironment');
+var Pkg = xdc.useModule('xdc.bld.PackageContents');
+
+/*
+ * This package distributes its sources in the default release. This is to
+ * enable better understanding by the customer/field, as well as enable
+ * modification and profiling techniques in the field.
+ */
+Pkg.attrs.exportSrc = true;
+
+Pkg.otherFiles = ["package.bld", "InterruptProxy.h", "VirtQueue.h"];
+
+/* remove this output directory during a clean */
+Pkg.generatedFiles.$add("lib/");
+
+/* list of libraries to build */
+var libArray = new Array();
+
+/* IPU SMP library */
+libArray.push(
+ {
+ name: "ti.ipc.family.vayu_smp",
+ sources: [
+ "VirtQueue",
+ ],
+ libAttrs: {
+ defs: " -DSMP"
+ },
+ isas: [ "v7M", "v7M4" ],
+ }
+);
+
+/* DSP library */
+libArray.push(
+ {
+ name: "ti.ipc.family.vayu",
+ sources: [
+ "VirtQueue",
+ ],
+ libAttrs: {
+ defs: " -DDSP"
+ },
+ isas: [ "66" ],
+ }
+);
+
+
+/* ==== loop over array of libraries ==== */
+for (var i = 0; i < libArray.length; i++) {
+ var lib = libArray[i];
+
+ /* ==== loop over all targets in build array ==== */
+ for (var j = 0; j < Build.targets.length; j++) {
+ var targ = Build.targets[j];
+
+ /* skip target if it does not generate code for the given isa */
+ if ("isas" in lib) {
+ var skipTarget = true;
+ var list = "/" + lib.isas.join("/") + "/";
+ if (list.match("/" + targ.isa + "/")) {
+ skipTarget = false;
+ }
+ if (skipTarget) continue;
+ }
+
+ /* ==== loop over all profiles ==== */
+ for (var profile in targ.profiles) {
+
+ /* name = lib/profile/name.a+suffix */
+ var name = "lib/" + profile + "/" + lib.name;
+
+ /* pass along library attributes specified in library array */
+ var libAttrs = "libAttrs" in lib ? lib.libAttrs : {};
+
+ /* must set profile explicitly */
+ libAttrs.profile = profile;
+
+ /* build the library */
+ var library = Pkg.addLibrary(name, targ, libAttrs);
+
+ /* add the source files */
+ library.addObjects(lib.sources);
+ }
+ }
+}
diff --git a/packages/ti/ipc/family/vayu/package.xdc b/packages/ti/ipc/family/vayu/package.xdc
--- /dev/null
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2011-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * ======== package.xdc ========
+ *
+ */
+
+/*!
+ * ======== ti.ipc.family.vayu ========
+ */
+
+package ti.ipc.family.vayu[1,0,0] {
+}
diff --git a/packages/ti/ipc/family/vayu/package.xs b/packages/ti/ipc/family/vayu/package.xs
--- /dev/null
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2011-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== package.xs ========
+ *
+ */
+
+/*
+ * ======== close ========
+ */
+function close()
+{
+ if (xdc.om.$name != "cfg") {
+ return;
+ }
+
+ /* bring in modules we use in this package */
+ xdc.useModule('ti.ipc.remoteproc.Resource');
+ xdc.loadPackage('ti.pm');
+ xdc.useModule('ti.sysbios.gates.GateAll');
+ xdc.useModule('ti.sysbios.hal.Cache');
+ xdc.useModule('ti.sysbios.knl.Semaphore');
+ xdc.useModule('ti.sysbios.knl.Swi');
+}
+
+/*
+ * ======== getLibs ========
+ */
+function getLibs(prog)
+{
+ var file;
+ var libAry = [];
+ var profile = this.profile;
+ var smp = "";
+
+ var suffix = prog.build.target.findSuffix(this);
+ if (suffix == null) {
+ /* no matching lib found in this package, return "" */
+ $trace("Unable to locate a compatible library, returning none.",
+ 1, ['getLibs']);
+ return ("");
+ }
+
+ if (prog.platformName.match(/ipu/)) {
+ smp = "_smp";
+ }
+
+ /* make sure the library exists, else fallback to a built library */
+ file = "lib/" + profile + "/ti.ipc.family.vayu" + smp + ".a" + suffix;
+ if (java.io.File(this.packageBase + file).exists()) {
+ libAry.push(file);
+ }
+ else {
+ file = "lib/release/ti.ipc.family.vayu" + smp + ".a" + suffix;
+ if (java.io.File(this.packageBase + file).exists()) {
+ libAry.push(file);
+ }
+ else {
+ /* fallback to a compatible library built by this package */
+ for (var p in this.build.libDesc) {
+ if (suffix == this.build.libDesc[p].suffix) {
+ libAry.push(p);
+ break;
+ }
+ }
+ }
+ }
+
+ return libAry.join(";");
+}
+
+/*
+ * ======== validate ========
+ */
+function validate()
+{
+ var BIOS = xdc.module('ti.sysbios.BIOS');
+ var suffix = prog.build.target.findSuffix(this);
+
+ if (!BIOS.smpEnabled && (suffix != "e66")) {
+ throw new Error(Pkg.$name+" must have BIOS.smpEnabled set to true.");
+ }
+}
index 55a9e92bff4f82e72a73987d848d270dbc734842..df66c2a5eb85983681622141777f6926dd540434 100644 (file)
% print("ti.ipc.remoteproc.Resource.xdt - unable to provide resource table " +
% "(" + prog.cpu.deviceName + ", " + prog.cpu.attrs.cpuCore + ")");
%}
+%if (prog.platformName.match(/vayu\.ipu2/)) {
+#define OMAP5
+#include <ti/ipc/remoteproc/rsc_table_vayu_ipu.h>
+%}
+%if (prog.platformName.match(/vayu\.dsp1/)) {
+#define OMAP5
+#include <ti/ipc/remoteproc/rsc_table_vayu_dsp.h>
+%}
Void ti_ipc_remoteproc_Resource_init__I()
{
index 2c5c6e8084017fc71cdad99416bd91a49d3f6740..6d0372c7a0e74b610a93e7afc3cf9ff1d119db95 100644 (file)
"rsc_table_tci6614_v3.3.h",
"rsc_table_tci6638.h",
"rsc_table_omap5_dsp.h",
- "rsc_table_omap5_ipu.h"
+ "rsc_table_omap5_ipu.h",
+ "rsc_table_vayu_dsp.h",
+ "rsc_table_vayu_ipu.h"
];
var SRCS = ["Resource.c"];
diff --git a/packages/ti/ipc/remoteproc/rsc_table_vayu_dsp.h b/packages/ti/ipc/remoteproc/rsc_table_vayu_dsp.h
--- /dev/null
@@ -0,0 +1,302 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== rsc_table_omap5_dsp.h ========
+ *
+ * Define the resource table entries for all DSP cores. This will be
+ * incorporated into corresponding base images, and used by the remoteproc
+ * on the host-side to allocated/reserve resources.
+ *
+ */
+
+#ifndef _RSC_TABLE_DSP_H_
+#define _RSC_TABLE_DSP_H_
+
+#include "rsc_types.h"
+
+/* DSP Memory Map */
+#define L4_44XX_BASE 0x4A000000
+
+#define L4_PERIPHERAL_L4CFG (L4_44XX_BASE)
+#define DSP_PERIPHERAL_L4CFG 0x4A000000
+
+#define L4_PERIPHERAL_L4PER 0x48000000
+#define DSP_PERIPHERAL_L4PER 0x48000000
+
+#define L4_PERIPHERAL_L4EMU 0x54000000
+#define DSP_PERIPHERAL_L4EMU 0x54000000
+
+#define L3_PERIPHERAL_DMM 0x4E000000
+#define DSP_PERIPHERAL_DMM 0x4E000000
+
+#define L3_PERIPHERAL_ISS 0x52000000
+#define DSP_PERIPHERAL_ISS 0x52000000
+
+#define L3_TILER_MODE_0_1 0x60000000
+#define DSP_TILER_MODE_0_1 0x60000000
+
+#define L3_TILER_MODE_2 0x70000000
+#define DSP_TILER_MODE_2 0x70000000
+
+#define L3_TILER_MODE_3 0x78000000
+#define DSP_TILER_MODE_3 0x78000000
+
+#define DSP_MEM_TEXT 0x20000000
+/* Co-locate alongside TILER region for easier flushing */
+#define DSP_MEM_IOBUFS 0x80000000
+#define DSP_MEM_DATA 0x90000000
+#define DSP_MEM_HEAP 0x90100000
+
+#define DSP_MEM_IPC_DATA 0x9F000000
+#define DSP_MEM_IPC_VRING 0xA0000000
+#define DSP_MEM_RPMSG_VRING0 0xA0000000
+#define DSP_MEM_RPMSG_VRING1 0xA0004000
+#define DSP_MEM_VRING_BUFS0 0xA0040000
+#define DSP_MEM_VRING_BUFS1 0xA0080000
+
+#define DSP_MEM_IPC_VRING_SIZE SZ_1M
+#define DSP_MEM_IPC_DATA_SIZE SZ_1M
+#define DSP_MEM_TEXT_SIZE SZ_1M
+#define DSP_MEM_DATA_SIZE SZ_1M
+#define DSP_MEM_HEAP_SIZE (SZ_1M * 3)
+#define DSP_MEM_IOBUFS_SIZE (SZ_1M * 90)
+
+/*
+ * Assign fixed RAM addresses to facilitate a fixed MMU table.
+ */
+/* This address is derived from current IPU & ION carveouts */
+#ifdef OMAP5
+#define PHYS_MEM_IPC_VRING 0x95000000
+#else
+#define PHYS_MEM_IPC_VRING 0x98800000
+#endif
+
+/* Need to be identical to that of Ducati */
+#define PHYS_MEM_IOBUFS 0xBA300000
+
+/*
+ * Sizes of the virtqueues (expressed in number of buffers supported,
+ * and must be power of 2)
+ */
+#define DSP_RPMSG_VQ0_SIZE 256
+#define DSP_RPMSG_VQ1_SIZE 256
+
+/* flip up bits whose indices represent features we support */
+#define RPMSG_DSP_C0_FEATURES 1
+
+struct resource_table {
+ UInt32 version;
+ UInt32 num;
+ UInt32 reserved[2];
+ UInt32 offset[16]; /* Should match 'num' in actual definition */
+
+ /* rpmsg vdev entry */
+ struct fw_rsc_vdev rpmsg_vdev;
+ struct fw_rsc_vdev_vring rpmsg_vring0;
+ struct fw_rsc_vdev_vring rpmsg_vring1;
+
+ /* text carveout entry */
+ struct fw_rsc_carveout text_cout;
+
+ /* data carveout entry */
+ struct fw_rsc_carveout data_cout;
+
+ /* heap carveout entry */
+ struct fw_rsc_carveout heap_cout;
+
+ /* ipcdata carveout entry */
+ struct fw_rsc_carveout ipcdata_cout;
+
+ /* trace entry */
+ struct fw_rsc_trace trace;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem0;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem1;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem2;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem3;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem4;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem5;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem6;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem7;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem8;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem9;
+};
+
+#define TRACEBUFADDR (UInt32)&ti_trace_SysMin_Module_State_0_outbuf__A
+
+#pragma DATA_SECTION(ti_ipc_remoteproc_ResourceTable, ".resource_table")
+#pragma DATA_ALIGN(ti_ipc_remoteproc_ResourceTable, 4096)
+
+struct resource_table ti_ipc_remoteproc_ResourceTable = {
+ 1, /* we're the first version that implements this */
+ 16, /* number of entries in the table */
+ 0, 0, /* reserved, must be zero */
+ /* offsets to entries */
+ {
+ offsetof(struct resource_table, rpmsg_vdev),
+ offsetof(struct resource_table, text_cout),
+ offsetof(struct resource_table, data_cout),
+ offsetof(struct resource_table, heap_cout),
+ offsetof(struct resource_table, ipcdata_cout),
+ offsetof(struct resource_table, trace),
+ offsetof(struct resource_table, devmem0),
+ offsetof(struct resource_table, devmem1),
+ offsetof(struct resource_table, devmem2),
+ offsetof(struct resource_table, devmem3),
+ offsetof(struct resource_table, devmem4),
+ offsetof(struct resource_table, devmem5),
+ offsetof(struct resource_table, devmem6),
+ offsetof(struct resource_table, devmem7),
+ offsetof(struct resource_table, devmem8),
+ offsetof(struct resource_table, devmem9),
+ },
+
+ /* rpmsg vdev entry */
+ {
+ TYPE_VDEV, VIRTIO_ID_RPMSG, 0,
+ RPMSG_DSP_C0_FEATURES, 0, 0, 0, 2, { 0, 0 },
+ /* no config data */
+ },
+ /* the two vrings */
+ { DSP_MEM_RPMSG_VRING0, 4096, DSP_RPMSG_VQ0_SIZE, 1, 0 },
+ { DSP_MEM_RPMSG_VRING1, 4096, DSP_RPMSG_VQ1_SIZE, 2, 0 },
+
+ {
+ TYPE_CARVEOUT,
+ DSP_MEM_TEXT, 0,
+ DSP_MEM_TEXT_SIZE, 0, 0, "DSP_MEM_TEXT",
+ },
+
+ {
+ TYPE_CARVEOUT,
+ DSP_MEM_DATA, 0,
+ DSP_MEM_DATA_SIZE, 0, 0, "DSP_MEM_DATA",
+ },
+
+ {
+ TYPE_CARVEOUT,
+ DSP_MEM_HEAP, 0,
+ DSP_MEM_HEAP_SIZE, 0, 0, "DSP_MEM_HEAP",
+ },
+
+ {
+ TYPE_CARVEOUT,
+ DSP_MEM_IPC_DATA, 0,
+ DSP_MEM_IPC_DATA_SIZE, 0, 0, "DSP_MEM_IPC_DATA",
+ },
+
+ {
+ TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:dsp",
+ },
+
+ {
+ TYPE_DEVMEM,
+ DSP_MEM_IPC_VRING, PHYS_MEM_IPC_VRING,
+ DSP_MEM_IPC_VRING_SIZE, 0, 0, "DSP_MEM_IPC_VRING",
+ },
+
+ {
+ TYPE_DEVMEM,
+ DSP_MEM_IOBUFS, PHYS_MEM_IOBUFS,
+ DSP_MEM_IOBUFS_SIZE, 0, 0, "DSP_MEM_IOBUFS",
+ },
+
+ {
+ TYPE_DEVMEM,
+ DSP_TILER_MODE_0_1, L3_TILER_MODE_0_1,
+ SZ_256M, 0, 0, "DSP_TILER_MODE_0_1",
+ },
+
+ {
+ TYPE_DEVMEM,
+ DSP_TILER_MODE_2, L3_TILER_MODE_2,
+ SZ_128M, 0, 0, "DSP_TILER_MODE_2",
+ },
+
+ {
+ TYPE_DEVMEM,
+ DSP_TILER_MODE_3, L3_TILER_MODE_3,
+ SZ_128M, 0, 0, "DSP_TILER_MODE_3",
+ },
+
+ {
+ TYPE_DEVMEM,
+ DSP_PERIPHERAL_L4CFG, L4_PERIPHERAL_L4CFG,
+ SZ_16M, 0, 0, "DSP_PERIPHERAL_L4CFG",
+ },
+
+ {
+ TYPE_DEVMEM,
+ DSP_PERIPHERAL_L4PER, L4_PERIPHERAL_L4PER,
+ SZ_16M, 0, 0, "DSP_PERIPHERAL_L4PER",
+ },
+
+ {
+ TYPE_DEVMEM,
+ DSP_PERIPHERAL_L4EMU, L4_PERIPHERAL_L4EMU,
+ SZ_16M, 0, 0, "DSP_PERIPHERAL_L4EMU",
+ },
+
+ {
+ TYPE_DEVMEM,
+ DSP_PERIPHERAL_DMM, L3_PERIPHERAL_DMM,
+ SZ_1M, 0, 0, "DSP_PERIPHERAL_DMM",
+ },
+
+ {
+ TYPE_DEVMEM,
+ DSP_PERIPHERAL_ISS, L3_PERIPHERAL_ISS,
+ SZ_256K, 0, 0, "DSP_PERIPHERAL_ISS",
+ },
+};
+
+#endif /* _RSC_TABLE_DSP_H_ */
diff --git a/packages/ti/ipc/remoteproc/rsc_table_vayu_ipu.h b/packages/ti/ipc/remoteproc/rsc_table_vayu_ipu.h
--- /dev/null
@@ -0,0 +1,310 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ======== rsc_table_omap5_ipu.h ========
+ *
+ * Define the resource table entries for all IPU cores. This will be
+ * incorporated into corresponding base images, and used by the remoteproc
+ * on the host-side to allocated/reserve resources.
+ *
+ */
+
+#ifndef _RSC_TABLE_IPU_H_
+#define _RSC_TABLE_IPU_H_
+
+#include "rsc_types.h"
+
+/* IPU Memory Map */
+#define L4_44XX_BASE 0x4a000000
+
+#define L4_PERIPHERAL_L4CFG (L4_44XX_BASE)
+#define IPU_PERIPHERAL_L4CFG 0xAA000000
+
+#define L4_PERIPHERAL_L4PER 0x48000000
+#define IPU_PERIPHERAL_L4PER 0xA8000000
+
+#define L4_PERIPHERAL_L4EMU 0x54000000
+#define IPU_PERIPHERAL_L4EMU 0xB4000000
+
+#define L3_PERIPHERAL_DMM 0x4E000000
+#define IPU_PERIPHERAL_DMM 0xAE000000
+
+#define L3_IVAHD_CONFIG 0x5A000000
+#define IPU_IVAHD_CONFIG 0xBA000000
+
+#define L3_IVAHD_SL2 0x5B000000
+#define IPU_IVAHD_SL2 0xBB000000
+
+#define L3_TILER_MODE_0_1 0x60000000
+#define IPU_TILER_MODE_0_1 0x60000000
+
+#define L3_TILER_MODE_2 0x70000000
+#define IPU_TILER_MODE_2 0x70000000
+
+#define L3_TILER_MODE_3 0x78000000
+#define IPU_TILER_MODE_3 0x78000000
+
+#define IPU_MEM_TEXT 0x0
+#define IPU_MEM_DATA 0x80000000
+
+#ifdef OMAP5
+#define IPU_MEM_IOBUFS 0x90000000
+#else
+#define IPU_MEM_IOBUFS 0x88000000
+#endif
+
+#define IPU_MEM_IPC_DATA 0x9F000000
+#define IPU_MEM_IPC_VRING 0xA0000000
+#define IPU_MEM_RPMSG_VRING0 0xA0000000
+#define IPU_MEM_RPMSG_VRING1 0xA0004000
+#define IPU_MEM_VRING_BUFS0 0xA0040000
+#define IPU_MEM_VRING_BUFS1 0xA0080000
+
+#define IPU_MEM_IPC_VRING_SIZE SZ_1M
+#define IPU_MEM_IPC_DATA_SIZE SZ_1M
+#define IPU_MEM_TEXT_SIZE (SZ_1M * 6)
+#ifdef OMAP5
+#define IPU_MEM_DATA_SIZE (SZ_1M * 156)
+#else
+#define IPU_MEM_DATA_SIZE (SZ_1M * 100)
+#endif
+#define IPU_MEM_IOBUFS_SIZE (SZ_1M * 90)
+
+/*
+ * Assign fixed RAM addresses to facilitate a fixed MMU table.
+ * PHYS_MEM_IPC_VRING & PHYS_MEM_IPC_DATA MUST be together.
+ */
+#ifdef OMAP5
+#define PHYS_MEM_IPC_VRING 0x95800000
+#else
+#define PHYS_MEM_IPC_VRING 0x99000000
+#endif
+
+#define PHYS_MEM_IOBUFS 0xBA300000
+
+/*
+ * Sizes of the virtqueues (expressed in number of buffers supported,
+ * and must be power of 2)
+ */
+#define IPU_RPMSG_VQ0_SIZE 256
+#define IPU_RPMSG_VQ1_SIZE 256
+
+/* flip up bits whose indices represent features we support */
+#define RPMSG_IPU_C0_FEATURES 1
+
+struct resource_table {
+ UInt32 version;
+ UInt32 num;
+ UInt32 reserved[2];
+ UInt32 offset[16]; /* Should match 'num' in actual definition */
+
+ /* rpmsg vdev entry */
+ struct fw_rsc_vdev rpmsg_vdev;
+ struct fw_rsc_vdev_vring rpmsg_vring0;
+ struct fw_rsc_vdev_vring rpmsg_vring1;
+
+ /* text carveout entry */
+ struct fw_rsc_carveout text_cout;
+
+ /* data carveout entry */
+ struct fw_rsc_carveout data_cout;
+
+ /* ipcdata carveout entry */
+ struct fw_rsc_carveout ipcdata_cout;
+
+ /* trace entry */
+ struct fw_rsc_trace trace;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem0;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem1;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem2;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem3;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem4;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem5;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem6;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem7;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem8;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem9;
+
+ /* devmem entry */
+ struct fw_rsc_devmem devmem10;
+};
+
+#define TRACEBUFADDR (UInt32)&ti_trace_SysMin_Module_State_0_outbuf__A
+
+#pragma DATA_SECTION(ti_ipc_remoteproc_ResourceTable, ".resource_table")
+#pragma DATA_ALIGN(ti_ipc_remoteproc_ResourceTable, 4096)
+
+struct resource_table ti_ipc_remoteproc_ResourceTable = {
+ 1, /* we're the first version that implements this */
+ 16, /* number of entries in the table */
+ 0, 0, /* reserved, must be zero */
+ /* offsets to entries */
+ {
+ offsetof(struct resource_table, rpmsg_vdev),
+ offsetof(struct resource_table, text_cout),
+ offsetof(struct resource_table, data_cout),
+ offsetof(struct resource_table, ipcdata_cout),
+ offsetof(struct resource_table, trace),
+ offsetof(struct resource_table, devmem0),
+ offsetof(struct resource_table, devmem1),
+ offsetof(struct resource_table, devmem2),
+ offsetof(struct resource_table, devmem3),
+ offsetof(struct resource_table, devmem4),
+ offsetof(struct resource_table, devmem5),
+ offsetof(struct resource_table, devmem6),
+ offsetof(struct resource_table, devmem7),
+ offsetof(struct resource_table, devmem8),
+ offsetof(struct resource_table, devmem9),
+ offsetof(struct resource_table, devmem10),
+ },
+
+ /* rpmsg vdev entry */
+ {
+ TYPE_VDEV, VIRTIO_ID_RPMSG, 0,
+ RPMSG_IPU_C0_FEATURES, 0, 0, 0, 2, { 0, 0 },
+ /* no config data */
+ },
+ /* the two vrings */
+ { IPU_MEM_RPMSG_VRING0, 4096, IPU_RPMSG_VQ0_SIZE, 1, 0 },
+ { IPU_MEM_RPMSG_VRING1, 4096, IPU_RPMSG_VQ1_SIZE, 2, 0 },
+
+ {
+ TYPE_CARVEOUT,
+ IPU_MEM_TEXT, 0,
+ IPU_MEM_TEXT_SIZE, 0, RPROC_MEMREGION_CODE, "IPU_MEM_TEXT",
+ },
+
+ {
+ TYPE_CARVEOUT,
+ IPU_MEM_DATA, 0,
+ IPU_MEM_DATA_SIZE, 0, RPROC_MEMREGION_DATA, "IPU_MEM_DATA",
+ },
+
+ {
+ TYPE_CARVEOUT,
+ IPU_MEM_IPC_DATA, 0,
+ IPU_MEM_IPC_DATA_SIZE, 0, RPROC_MEMREGION_SMEM, "IPU_MEM_IPC_DATA",
+ },
+
+ {
+ TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:sysm3",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_MEM_IPC_VRING, PHYS_MEM_IPC_VRING,
+ IPU_MEM_IPC_VRING_SIZE, 0, RPROC_MEMREGION_VRING, "IPU_MEM_IPC_VRING",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_MEM_IOBUFS, PHYS_MEM_IOBUFS,
+ IPU_MEM_IOBUFS_SIZE, 0, RPROC_MEMREGION_1D, "IPU_MEM_IOBUFS",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_TILER_MODE_0_1, L3_TILER_MODE_0_1,
+ SZ_256M, 0, 0, "IPU_TILER_MODE_0_1",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_TILER_MODE_2, L3_TILER_MODE_2,
+ SZ_128M, 0, 0, "IPU_TILER_MODE_2",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_TILER_MODE_3, L3_TILER_MODE_3,
+ SZ_128M, 0, 0, "IPU_TILER_MODE_3",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_PERIPHERAL_L4CFG, L4_PERIPHERAL_L4CFG,
+ SZ_16M, 0, 0, "IPU_PERIPHERAL_L4CFG",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_PERIPHERAL_L4PER, L4_PERIPHERAL_L4PER,
+ SZ_16M, 0, 0, "IPU_PERIPHERAL_L4PER",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_PERIPHERAL_L4EMU, L4_PERIPHERAL_L4EMU,
+ SZ_16M, 0, 0, "IPU_PERIPHERAL_L4EMU",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_IVAHD_CONFIG, L3_IVAHD_CONFIG,
+ SZ_16M, 0, 0, "IPU_IVAHD_CONFIG",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_IVAHD_SL2, L3_IVAHD_SL2,
+ SZ_16M, 0, 0, "IPU_IVAHD_SL2",
+ },
+
+ {
+ TYPE_DEVMEM,
+ IPU_PERIPHERAL_DMM, L3_PERIPHERAL_DMM,
+ SZ_1M, 0, 0, "IPU_PERIPHERAL_DMM",
+ },
+};
+
+#endif /* _RSC_TABLE_IPU_H_ */
index 8b68f145eaf53027131f516649049127be5925e7..fe3bce839177459539835d48599b7af705a9bb70 100644 (file)
struct rpmsg_ns_msg {
char name[RPMSG_NAME_SIZE]; /* name of service including terminal '\0' */
-#ifdef OMAP5
+#ifdef RPMSG_NS_2_0
char desc[RPMSG_NAME_SIZE]; /* description of service including '\0' */
#endif
u32 addr; /* address of the service */
};
static void
-#ifdef OMAP5
+#ifdef RPMSG_NS_2_0
sendMessage(Char * name, Char *desc, UInt32 port, enum rpmsg_ns_flags flags)
#else
sendMessage(Char * name, UInt32 port, enum rpmsg_ns_flags flags)
strncpy(nsMsg.name, name, (RPMSG_NAME_SIZE - 1));
nsMsg.name[RPMSG_NAME_SIZE-1] = '\0';
-#ifdef OMAP5
+#ifdef RPMSG_NS_2_0
strncpy(nsMsg.desc, desc, (RPMSG_NAME_SIZE - 1));
nsMsg.desc[RPMSG_NAME_SIZE-1] = '\0';
#endif
}
}
-#ifdef OMAP5
+#ifdef RPMSG_NS_2_0
void NameMap_register(Char * name, Char * desc, UInt32 port)
{
System_printf("registering %s:%s service on %d with HOST\n", name, desc,
index 93d11bc763c89692275a48d6a1fdb4ba2fa845a3..0031bf04a828a5645c5be2e5d33614a4cc690526 100644 (file)
#ifndef _NAMEMAP_H_
#define _NAMEMAP_H_
-#ifdef OMAP5 /* temporarily OMAP5-specific until upstream change ready */
+#ifdef RPMSG_NS_2_0 /* temporarily OMAP5-specific until upstream change ready */
extern void NameMap_register(Char * name, Char * desc, UInt32 value);
extern void NameMap_unregister(Char * name, Char * desc, UInt32 value);
#else
index 978c858377e8ea773f1cf22fd70580ea3898ef6f..e2529d1c34cd94961b89348009680e32a1f26923 100644 (file)
#include <ti/ipc/family/tci6638/VirtQueue.h>
#elif defined(OMAP5)
#include <ti/ipc/family/omap54xx/VirtQueue.h>
+#elif defined(VAYU)
+#include <ti/ipc/family/vayu/VirtQueue.h>
#else
#error unknown processor!
#endif
index 42297bd1348966de9450f59d47ad7e7bd47073b1..60b51289791df904c75c44dbdfee5a7e9e22a570 100644 (file)
copts: myCopts,
defs: "-DTCI6614"
}).addObjects(SRCS);
+
+ Pkg.addLibrary("lib/" + profile + "/" + name + "_vayu", targ, {
+ profile: profile,
+ copts: myCopts,
+ defs: "-DVAYU -DDSP -DRPMSG_NS_2_0"
+ }).addObjects(SRCS);
} else if (targ.isa.match(/^v7M(|4)$/)) {
Pkg.addLibrary("lib/" + profile + "/" + name + "_omap5_smp", targ, {
profile: profile,
copts: myCopts,
- defs: "-DOMAP5 -DSMP"
+ defs: "-DOMAP5 -DSMP -DRPMSG_NS_2_0"
+ }).addObjects(SRCS);
+
+ Pkg.addLibrary("lib/" + profile + "/" + name + "_vayu_smp", targ, {
+ profile: profile,
+ copts: myCopts,
+ defs: "-DVAYU -DSMP -DRPMSG_NS_2_0"
}).addObjects(SRCS);
} else if (targ.isa == "64T") {
Pkg.addLibrary("lib/" + profile + "/" + name + "_omap5", targ, {
profile: profile,
copts: myCopts,
- defs: "-DOMAP5 -DDSP"
+ defs: "-DOMAP5 -DDSP -DRPMSG_NS_2_0"
}).addObjects(SRCS);
} else {
continue;
index b28b4bacafb3c3f57dfbf63e6627a4f88d5db78f..077266078ebe85dd140c69bf2c3e6d758952bae6 100644 (file)
xdc.useModule('ti.ipc.family.tci6638.VirtQueue');
break;
+ case "Vayu": /* Vayu */
+ xdc.loadPackage('ti.ipc.family.vayu');
+ break;
+
default:
throw new Error("Unspported device: " + device);
break;
platform = "tci6638";
break;
+ case "Vayu":
+ platform = "vayu";
+ break;
+
default:
throw ("Unspported device: " + device);
break;
index 96d02900ae2a77b3543f8f20fbed1c2414634626..749f8ca77c7850a2584569f6478133714b2f579f 100644 (file)
// print("building for target " + targ.name + " ...");
- /* currently only build for OMAPL138, Keystone II, and OMAP5*/
+ /* currently only build for OMAPL138, Keystone II, OMAP5, and Vayu*/
if (!((targ.isa == "674") || (targ.isa == "66") ||
(targ.isa.match(/v7M(|4)/)) || (targ.isa == "64T"))) {
continue;
for (var j = 0; j < targ.platforms.length; j++) {
var platform = targ.platforms[j];
- /* currently only build for OMAPL138, Keystone II, and OMAP5*/
+ /* currently only build for OMAPL138, Keystone II, OMAP5, and Vayu*/
if (!((platform.match(/^ti\.platforms\.evm6614\:DSP/)) ||
(platform.match(/^ti\.platforms\.simKepler/)) ||
(platform.match(/^ti.platforms.evmTCI6638K2K/)) ||
(platform.match(/^ti\.platform\.omap54xx/)) ||
+ (platform.match(/^ti\.platform\.vayu/)) ||
(platform.match(/\.platforms\.evmOMAPL138/)))) {
continue;
}
if (targ.isa.match(/^v7M(|4)$/)) {
Pkg.addExecutable(name + "/ping_rpmsg", targ, platform, {
cfgScript: "ping_rpmsg",
- defs: " -DOMAP5"
+ defs: " -DRPMSG_NS_2_0"
+ }).addObjects(["ping_rpmsg.c"]);
+ } else if (targ.isa == "64T") {
+ Pkg.addExecutable(name + "/ping_rpmsg", targ, platform, {
+ cfgScript: "ping_rpmsg",
+ defs: " -DRPMSG_NS_2_0"
+ }).addObjects(["ping_rpmsg.c"]);
+ } else if (targ.isa == "66" &&
+ platform.match(/^ti\.platform\.vayu/)) {
+ Pkg.addExecutable(name + "/ping_rpmsg", targ, platform, {
+ cfgScript: "ping_rpmsg",
+ defs: " -DRPMSG_NS_2_0"
}).addObjects(["ping_rpmsg.c"]);
} else {
Pkg.addExecutable(name + "/ping_rpmsg", targ, platform, {
if (platform.match(/^ti\.platform\.omap54xx\.ipu/)) {
Pkg.addExecutable(name + "/test_omx_ipu_omap5", targ, platform, {
cfgScript: "test_omx_ipu_omap5",
- defs: "-D IPU -D OMAP5xxx -DOMAP5"
+ defs: "-D IPU -D OMAP5xxx -DRPMSG_NS_2_0"
}).addObjects(["test_omx.c","ping_tasks.c","rpc_task.c",
"MxServer.c"]);
}
if (platform.match(/^ti\.platform\.omap54xx\.dsp/)) {
Pkg.addExecutable(name + "/test_omx_dsp_omap5", targ, platform, {
cfgScript: "test_omx_dsp_omap5",
- defs: "-D DSP -D OMAP5xxx"
- }).addObjects(["test_omx.c","ping_tasks.c","rpc_task",
+ defs: "-D DSP -D OMAP5xxx -DRPMSG_NS_2_0"
+ }).addObjects(["test_omx.c","ping_tasks.c","rpc_task.c",
+ "MxServer.c"]);
+ }
+
+ if (platform.match(/^ti\.platform\.vayu\.ipu2/)) {
+ Pkg.addExecutable(name + "/test_omx_ipu2_vayu", targ, platform, {
+ cfgScript: "test_omx_ipu_vayu",
+ defs: "-D IPU -D VAYU -DRPMSG_NS_2_0"
+ }).addObjects(["test_omx.c","ping_tasks.c","rpc_task.c",
+ "MxServer.c"]);
+ }
+
+ if (platform.match(/^ti\.platform\.vayu\.dsp1/)) {
+ Pkg.addExecutable(name + "/test_omx_dsp1_vayu", targ, platform, {
+ cfgScript: "test_omx_dsp_vayu",
+ defs: "-D DSP -D VAYU -DRPMSG_NS_2_0"
+ }).addObjects(["test_omx.c","ping_tasks.c","rpc_task.c",
"MxServer.c"]);
}
}
index 0d002f47bcb1319fe6b330af4fc995c9398d6d55..935f1deb8e78a39979118dcd425b6f94c2d88f2c 100644 (file)
}
/* Announce we are here: */
-#ifdef OMAP5
+#ifdef RPMSG_NS_2_0
NameMap_register("rpmsg-proto", "rpmsg-proto", arg0);
#else
NameMap_register("rpmsg-proto", arg0);
index 60c4872fef292b3206e09f6be5900dbf0fc1fddb..f8428764c25f7b7f085484ade169732c314d2968 100644 (file)
xdc.includeFile("ti/configs/omap54xx/IpuAmmu.cfg");
}
/* This will match for omap5 dsp only: */
-/*else if (Program.platformName.match(/^ti\.platform\.omap54xx\.dsp/)) {*/
-else if (Program.platformName.match(/dsp/)) {
+else if (Program.platformName.match(/^ti\.platform\.omap54xx\.dsp/)) {
var Task = xdc.useModule('ti.sysbios.knl.Task');
var params = new Task.Params;
params.instance.name = "ping";
xdc.includeFile("ti/configs/omap54xx/Dsp.cfg");
xdc.includeFile("ti/configs/omap54xx/DspAmmu.cfg");
}
+else if (Program.platformName.match(/^ti\.platform\.vayu\.ipu2/)) {
+ var Task = xdc.useModule('ti.sysbios.knl.Task');
+ var params = new Task.Params;
+ params.instance.name = "ping";
+ params.arg0= 51;
+ Program.global.tsk1 = Task.create('&pingTaskFxn', params);
+ Task.deleteTerminatedTasks = true;
+
+ /* This calls RPMessage_init() once before BIOS_start(): */
+ xdc.loadPackage('ti.ipc.ipcmgr');
+ var BIOS = xdc.useModule('ti.sysbios.BIOS');
+ BIOS.addUserStartupFunction('&IpcMgr_rpmsgStartup');
+
+ xdc.loadCapsule("ti/configs/vayu/IpcCommon.cfg.xs");
+ xdc.includeFile("ti/configs/vayu/Ipu2Smp.cfg");
+ xdc.includeFile("ti/configs/vayu/IpuAmmu.cfg");
+}
+else if (Program.platformName.match(/^ti\.platform\.vayu\.dsp1/)) {
+ var Task = xdc.useModule('ti.sysbios.knl.Task');
+ var params = new Task.Params;
+ params.instance.name = "ping";
+ params.arg0= 51;
+ Program.global.tsk1 = Task.create('&pingTaskFxn', params);
+ Task.deleteTerminatedTasks = true;
+
+ /* This calls RPMessage_init() once before BIOS_start(): */
+ xdc.loadPackage('ti.ipc.ipcmgr');
+ var BIOS = xdc.useModule('ti.sysbios.BIOS');
+ BIOS.addUserStartupFunction('&IpcMgr_rpmsgStartup');
+
+ xdc.includeFile("ti/configs/vayu/Dsp1.cfg");
+}
else {
xdc.loadCapsule("ping_rpmsg_common.cfg.xs");
}
index 845560aef85c8754d96f920d3cd16adc5b45d6be..c84ac96c92ff1013f9357f086bc8c72fa728a639 100644 (file)
/* Create the messageQ for receiving (and get our endpoint for sending). */
handle = RPMessage_create(arg0, NULL, NULL, &myEndpoint);
-#ifdef OMAP5
+#ifdef RPMSG_NS_2_0
NameMap_register("rpmsg-client-sample", "sample-desc", arg0);
#else
NameMap_register("rpmsg-client-sample", arg0);
index fef624b37c4a616a547fb22e13b238d52307355a..30ef065dec4daef7cdfd24222965269e2c021905 100644 (file)
xdc.includeFile("ti/configs/omap54xx/Dsp.cfg");
xdc.includeFile("ti/configs/omap54xx/DspAmmu.cfg");
}
+else if (Program.platformName.match(/^ti\.platform\.vayu\.ipu2/)) {
+ /* This initializes the MessageQ Transport RPMSG stack: */
+ xdc.loadPackage('ti.ipc.ipcmgr');
+ var BIOS = xdc.useModule('ti.sysbios.BIOS');
+ BIOS.addUserStartupFunction('&IpcMgr_ipcStartup');
+
+ var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
+ var params = new HeapBuf.Params;
+ params.align = 8;
+ params.blockSize = 512;
+ params.numBlocks = 256;
+ var msgHeap = HeapBuf.create(params);
+
+ var MessageQ = xdc.useModule('ti.sdo.ipc.MessageQ');
+ MessageQ.registerHeapMeta(msgHeap, 0);
+
+ var Diags = xdc.useModule('xdc.runtime.Diags');
+ Diags.setMaskMeta("ti.ipc.transports.TransportRpmsg",
+ Diags.INFO|Diags.USER1|Diags.STATUS, Diags.ALWAYS_ON);
+ Diags.setMaskMeta("ti.ipc.namesrv.NameServerRemoteRpmsg", Diags.INFO,
+ Diags.ALWAYS_ON);
+
+ var VirtioSetup = xdc.useModule('ti.ipc.transports.TransportRpmsgSetup');
+ VirtioSetup.common$.diags_INFO = Diags.ALWAYS_ON;
+
+ xdc.loadCapsule("ti/configs/vayu/IpcCommon.cfg.xs");
+ xdc.includeFile("ti/configs/vayu/Ipu2Smp.cfg");
+ xdc.includeFile("ti/configs/vayu/IpuAmmu.cfg");
+}
+else if (Program.platformName.match(/^ti\.platform\.vayu\.dsp1/)) {
+ /* This initializes the MessageQ Transport RPMSG stack: */
+ xdc.loadPackage('ti.ipc.ipcmgr');
+ var BIOS = xdc.useModule('ti.sysbios.BIOS');
+ BIOS.addUserStartupFunction('&IpcMgr_ipcStartup');
+
+ var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
+ var params = new HeapBuf.Params;
+ params.align = 8;
+ params.blockSize = 512;
+ params.numBlocks = 256;
+ var msgHeap = HeapBuf.create(params);
+
+ var MessageQ = xdc.useModule('ti.sdo.ipc.MessageQ');
+ MessageQ.registerHeapMeta(msgHeap, 0);
+
+ var Diags = xdc.useModule('xdc.runtime.Diags');
+ Diags.setMaskMeta("ti.ipc.transports.TransportRpmsg",
+ Diags.INFO|Diags.USER1|Diags.STATUS, Diags.ALWAYS_ON);
+ Diags.setMaskMeta("ti.ipc.namesrv.NameServerRemoteRpmsg", Diags.INFO,
+ Diags.ALWAYS_ON);
+
+ var VirtioSetup = xdc.useModule('ti.ipc.transports.TransportRpmsgSetup');
+ VirtioSetup.common$.diags_INFO = Diags.ALWAYS_ON;
+
+ xdc.includeFile("ti/configs/vayu/Dsp1.cfg");
+}
else {
xdc.loadCapsule("messageq_common.cfg.xs");
}
diff --git a/packages/ti/ipc/tests/test_omx_dsp_vayu.cfg b/packages/ti/ipc/tests/test_omx_dsp_vayu.cfg
--- /dev/null
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* This calls MessageQCopy_init() once before BIOS_start(): */
+xdc.loadPackage('ti.ipc.ipcmgr');
+var BIOS = xdc.useModule('ti.sysbios.BIOS');
+BIOS.addUserStartupFunction('&IpcMgr_rpmsgStartup');
+BIOS.addUserStartupFunction('®ister_MxServer');
+
+var Task = xdc.useModule('ti.sysbios.knl.Task');
+Task.defaultStackSize = 0x2000;
+
+xdc.loadPackage('ti.srvmgr');
+xdc.useModule('ti.srvmgr.omx.OmxSrvMgr');
+xdc.loadPackage('ti.srvmgr.omaprpc');
+
+/* ti.grcm Configuration */
+var rcmSettings = xdc.useModule('ti.grcm.Settings');
+rcmSettings.ipc = rcmSettings.IpcSupport_ti_sdo_ipc;
+xdc.useModule('ti.grcm.RcmServer');
+
+xdc.includeFile("ti/configs/vayu/Dsp1.cfg");
+
+var Task = xdc.useModule('ti.sysbios.knl.Task');
+Task.defaultStackSize = 12 * 0x400;
+
+xdc.loadPackage('ti.ipc.mm');
diff --git a/packages/ti/ipc/tests/test_omx_ipu_vayu.cfg b/packages/ti/ipc/tests/test_omx_ipu_vayu.cfg
--- /dev/null
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* This calls RPMessage_init() once before BIOS_start(): */
+xdc.loadPackage('ti.ipc.ipcmgr');
+var BIOS = xdc.useModule('ti.sysbios.BIOS');
+BIOS.addUserStartupFunction('&IpcMgr_rpmsgStartup');
+BIOS.addUserStartupFunction('®ister_MxServer');
+
+var Task = xdc.useModule('ti.sysbios.knl.Task');
+Task.defaultStackSize = 0x2000;
+
+xdc.loadPackage('ti.srvmgr');
+xdc.useModule('ti.srvmgr.omx.OmxSrvMgr');
+xdc.loadPackage('ti.srvmgr.omaprpc');
+
+/* ti.grcm Configuration */
+var rcmSettings = xdc.useModule('ti.grcm.Settings');
+rcmSettings.ipc = rcmSettings.IpcSupport_ti_sdo_ipc;
+xdc.useModule('ti.grcm.RcmServer');
+
+xdc.loadCapsule("ti/configs/vayu/IpcCommon.cfg.xs");
+xdc.loadCapsule("ti/configs/vayu/Ipu2Smp.cfg");
+xdc.loadCapsule("ti/configs/vayu/IpuAmmu.cfg");
+
+var Task = xdc.useModule('ti.sysbios.knl.Task');
+Task.defaultStackSize = 12 * 0x400;
+
+xdc.loadPackage('ti.ipc.mm');
diff --git a/packages/ti/ipc/transports/TransportRpmsg.c b/packages/ti/ipc/transports/TransportRpmsg.c
index 154d7d112794ff65413af8d7338dec6a80c5abd3..d863b1a51944c9afe739f76677d4c81292af4f31 100644 (file)
obj->remoteProcId = remoteProcId;
/* Announce our "MessageQ" service to the HOST: */
-#ifdef OMAP5
+#ifdef RPMSG_NS_2_0
NameMap_register(RPMSG_SOCKET_NAME, RPMSG_SOCKET_NAME, RPMSG_MESSAGEQ_PORT);
#else
NameMap_register(RPMSG_SOCKET_NAME, RPMSG_MESSAGEQ_PORT);
Log_print0(Diags_ENTRY, "--> "FXNN);
/* Announce our "MessageQ" service is going away: */
-#ifdef OMAP5
+#ifdef RPMSG_NS_2_0
NameMap_unregister(RPMSG_SOCKET_NAME, RPMSG_SOCKET_NAME,
RPMSG_MESSAGEQ_PORT);
#else
index e6157e5c7d6074a0457bf664b39b54a9c677a437..5ef88452cb26d6562b52241f191eb2804769980f 100644 (file)
/* for now, build 'special' lib compatible with OMAP5 HLOS */
Pkg.addLibrary("lib/" + profile + "/" + Pkg.name + "_omap5", targ, {
profile: profile,
- copts: myCopts + " -DOMAP5"
+ copts: myCopts + " -DRPMSG_NS_2_0"
+ }).addObjects(SRCS);
+
+ /* for now, build 'special' lib compatible with VAYU HLOS */
+ Pkg.addLibrary("lib/" + profile + "/" + Pkg.name + "_vayu", targ, {
+ profile: profile,
+ copts: myCopts + " -DRPMSG_NS_2_0"
+ }).addObjects(SRCS);
+ }
+
+ if (targ.isa == "C64T") {
+ /* for now, build 'special' lib compatible with OMAP5 HLOS */
+ Pkg.addLibrary("lib/" + profile + "/" + Pkg.name + "_omap5", targ, {
+ profile: profile,
+ copts: myCopts + " -DRPMSG_NS_2_0"
}).addObjects(SRCS);
}
+
+ if (targ.isa == "66") {
+ /* for now, build 'special' lib compatible with VAYU HLOS */
+ Pkg.addLibrary("lib/" + profile + "/" + Pkg.name + "_vayu", targ, {
+ profile: profile,
+ copts: myCopts + " -DRPMSG_NS_2_0"
+ }).addObjects(SRCS);
+ }
+
}
}
diff --git a/packages/ti/platform/vayu/dsp1/Platform.xdc b/packages/ti/platform/vayu/dsp1/Platform.xdc
--- /dev/null
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*!
+ * File generated by platform wizard.
+ *
+ */
+
+metaonly module Platform inherits xdc.platform.IPlatform {
+
+ config ti.platforms.generic.Platform.Instance plat =
+ ti.platforms.generic.Platform.create("plat", {
+ clockRate: 1000,
+ catalogName: "ti.catalog.c6000",
+ deviceName: "Vayu",
+ externalMemoryMap: [
+ ["EXT_CODE", {name: "EXT_CODE", base: 0x20000000, len: 0x00100000, space: "code", access: "RWX"}],
+ ["EXT_DATA", {name: "EXT_DATA", base: 0x90000000, len: 0x00100000, space: "data", access: "RW"}],
+ ["EXT_HEAP", {name: "EXT_HEAP", base: 0x90100000, len: 0x00300000, space: "data", access: "RW"}],
+ ["TRACE_BUF", {name: "TRACE_BUF", base: 0x9F000000, len: 0x00060000, space: "data", access: "RW"}],
+ ["EXC_DATA", {name: "EXC_DATA", base: 0x9F060000, len: 0x00010000, space: "data", access: "RW"}],
+ ["PM_DATA", {name: "PM_DATA", base: 0x9F070000, len: 0x00020000, space: "data", access: "RWX"}],
+ ],
+ });
+
+instance :
+
+ override config string codeMemory = "EXT_CODE";
+ override config string dataMemory = "EXT_DATA";
+ override config string stackMemory = "EXT_DATA";
+}
diff --git a/packages/ti/platform/vayu/dsp1/Platform.xs b/packages/ti/platform/vayu/dsp1/Platform.xs
--- /dev/null
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*!
+ * File generated by platform wizard.
+ *
+ */
+
+function getCpuDataSheet(cpuId)
+{
+ return this.$module.plat.getCpuDataSheet(cpuId);
+}
+
+function getCreateArgs()
+{
+ return this.$module.plat.getCreateArgs();
+}
+
+function getExeContext(prog)
+{
+ return this.$module.plat.getExeContext(prog);
+}
+
+function getExecCmd(prog)
+{
+ return this.$module.plat.getExecCmd(prog);
+}
+
+function getLinkTemplate(prog)
+{
+ return this.$module.plat.getLinkTemplate(prog);
+}
diff --git a/packages/ti/platform/vayu/dsp1/package.bld b/packages/ti/platform/vayu/dsp1/package.bld
--- /dev/null
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*!
+ * File generated by platform wizard.
+ *
+ */
+
+Pkg.attrs.exportAll = true;
diff --git a/packages/ti/platform/vayu/dsp1/package.xdc b/packages/ti/platform/vayu/dsp1/package.xdc
--- /dev/null
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*!
+ * File generated by platform wizard.
+ *
+ */
+
+package ti.platform.vayu.dsp1 {
+ module Platform;
+}
diff --git a/packages/ti/platform/vayu/ipu2/Platform.xdc b/packages/ti/platform/vayu/ipu2/Platform.xdc
--- /dev/null
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*!
+ * File generated by platform wizard.
+ *
+ */
+
+metaonly module Platform inherits xdc.platform.IPlatform {
+
+ config ti.platforms.generic.Platform.Instance plat =
+ ti.platforms.generic.Platform.create("plat", {
+ clockRate: 266.0,
+ catalogName: "ti.catalog.arm.cortexm4",
+ deviceName: "Vayu",
+ externalMemoryMap: [
+ ["EXT_CODE", {name: "EXT_CODE", base: 0x00004000, len: 0x005FC000, space: "code", access: "RWX"}],
+ ["EXT_DATA", {name: "EXT_DATA", base: 0x80000000, len: 0x00600000, space: "data", access: "RW"}],
+ ["EXT_HEAP", {name: "EXT_HEAP", base: 0x80600000, len: 0x09600000, space: "data", access: "RW"}],
+ ["TRACE_BUF", {name: "TRACE_BUF", base: 0x9F000000, len: 0x00060000, space: "data", access: "RW"}],
+ ["EXC_DATA", {name: "EXC_DATA", base: 0x9F060000, len: 0x00010000, space: "data", access: "RW"}],
+ ["PM_DATA", {name: "PM_DATA", base: 0x9F070000, len: 0x00020000, space: "data", access: "RWX"}],
+ ],
+ });
+
+instance :
+
+ override config string codeMemory = "EXT_CODE";
+ override config string dataMemory = "EXT_DATA";
+ override config string stackMemory = "EXT_DATA";
+
+}
diff --git a/packages/ti/platform/vayu/ipu2/Platform.xs b/packages/ti/platform/vayu/ipu2/Platform.xs
--- /dev/null
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*!
+ * File generated by platform wizard.
+ *
+ */
+
+function getCpuDataSheet(cpuId)
+{
+ return this.$module.plat.getCpuDataSheet(cpuId);
+}
+
+function getCreateArgs()
+{
+ return this.$module.plat.getCreateArgs();
+}
+
+function getExeContext(prog)
+{
+ return this.$module.plat.getExeContext(prog);
+}
+
+function getExecCmd(prog)
+{
+ return this.$module.plat.getExecCmd(prog);
+}
+
+function getLinkTemplate(prog)
+{
+ return this.$module.plat.getLinkTemplate(prog);
+}
diff --git a/packages/ti/platform/vayu/ipu2/package.bld b/packages/ti/platform/vayu/ipu2/package.bld
--- /dev/null
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*!
+ * File generated by platform wizard.
+ *
+ */
+
+Pkg.attrs.exportAll = true;
diff --git a/packages/ti/platform/vayu/ipu2/package.xdc b/packages/ti/platform/vayu/ipu2/package.xdc
--- /dev/null
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2012-2013, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*!
+ * File generated by platform wizard.
+ *
+ */
+
+package ti.platform.vayu.ipu2 {
+ module Platform;
+}
index 136d474aa3282c567b9f0e7a92fafbf44ef3b59b..2bab1eca26e6983a221a8200af1d20c5ad2b71f8 100644 (file)
UInt32 remote;
Int status;
UInt16 len;
- UInt8 msg[512]; /* maximum rpmsg size is probably smaller, but we need to
- * be cautious */
- OmapRpc_MsgHeader *hdr = (OmapRpc_MsgHeader *)&msg[0];
+ Char * msg = NULL;
+ OmapRpc_MsgHeader *hdr = NULL;
+
+ msg = Memory_alloc(NULL, 512, 0, NULL); /* maximum rpmsg size is probably
+ * smaller, but we need to
+ * be cautious */
+ if (msg == NULL) {
+ System_printf("OMAPRPC: Failed to allocate msg!\n");
+ return;
+ }
+
+ hdr = (OmapRpc_MsgHeader *)&msg[0];
if (obj == NULL) {
System_printf("OMAPRPC: Failed to start task as arguments are NULL!\n");
System_printf("OMAPRPC: destroying channel on port: %d\n", obj->port);
NameMap_unregister("rpmsg-rpc", obj->channelName, obj->port);
+ if (msg != NULL) {
+ Memory_free(NULL, msg, 512);
+ }
/* @TODO delete any outstanding ServiceMgr instances if no disconnect
* was issued? */
index 15aaa5b3285bbbe5e5935217adde86e18aa34301..29eb7376488fe31298e02dc866dbc3203e58e45d 100644 (file)
if (targ.isa.match(/^v7M(|4)$/)) {
Pkg.addLibrary("lib/" + profile + "/" + Pkg.name + "_smp", targ, {
profile: profile,
- defs: " -DOMAP5 -DSMP"
+ defs: " -DRPMSG_NS_2_0 -DSMP"
}).addObjects(SRCS);
} else if (targ.isa == "64T") {
Pkg.addLibrary("lib/" + profile + "/" + Pkg.name, targ, {
profile: profile,
- defs: " -DOMAP5"
+ defs: " -DRPMSG_NS_2_0"
+ }).addObjects(SRCS);
+ } else if (targ.isa == "66") {
+ Pkg.addLibrary("lib/" + profile + "/" + Pkg.name, targ, {
+ profile: profile,
+ defs: " -DRPMSG_NS_2_0"
}).addObjects(SRCS);
} else {
/* skip it - no non-OMAP5 targets are supported */
index d8f84e729a1d41b9d140a1471726afb1b360e53d..7bc0f06b13540bcae51742bb61fb39a72e0b2834 100644 (file)
if (MultiProc_self() == MultiProc_getId("CORE1")) {
NameMap_register("rpmsg-omx", "rpmsg-omx1", OMX_MGR_PORT);
}
- if (MultiProc_self() == MultiProc_getId("DSP")) {
+ if (MultiProc_self() == MultiProc_getId("DSP") ||
+ MultiProc_self() == MultiProc_getId("DSP1")) {
NameMap_register("rpmsg-omx", "rpmsg-omx2", OMX_MGR_PORT);
}
#endif
index 216a10b56b73e0ac3602eba38c03b83c93beeefb..eb87580a511c20413ce245fd1ee66295c1c871e1 100644 (file)
if (targ.isa.match(/^v7M(|4)$/)) {
Pkg.addLibrary("lib/" + profile + "/" + Pkg.name + "_smp", targ, {
profile: profile,
- defs: " -DOMAP5 -DSMP"
+ defs: " -DRPMSG_NS_2_0 -DSMP"
}).addObjects(SRCS);
} else if (targ.isa == "64T") {
Pkg.addLibrary("lib/" + profile + "/" + Pkg.name, targ, {
profile: profile,
- defs: " -DOMAP5"
+ defs: " -DRPMSG_NS_2_0"
+ }).addObjects(SRCS);
+ } else if (targ.isa == "66") {
+ Pkg.addLibrary("lib/" + profile + "/" + Pkg.name, targ, {
+ profile: profile,
+ defs: " -DRPMSG_NS_2_0"
}).addObjects(SRCS);
} else {
/* skip it - no non-OMAP5 targets are supported */