From: Sam Nelson Date: Fri, 18 Oct 2019 00:46:54 +0000 (-0500) Subject: Remoteproc: DRA7xx: Adjust entries to fix carveout allocation failures X-Git-Tag: 3.50.04.08~2 X-Git-Url: https://git.ti.com/gitweb?p=ipc%2Fipcdev.git;a=commitdiff_plain;h=23a7eefaf8e2fb2f1511bbdc8267a71e02c8ad10;hp=5a8aa2cf67ae01bc55bf8c55aad845ca6ad42784 Remoteproc: DRA7xx: Adjust entries to fix carveout allocation failures If the linux device tree uses DMA pools for carving out memory for the slave cores, the DMA pools uses the next power of 2 page order fitting the requested size (eg: 6 MB gets attempted to be allocated using 8 MB and at 8 MB alignments), and this may result in allocation failures if the overall DMA pool size does not have enough room to support the different RSC_CARVEOUT aligned size. This adjustment of the entries are updated carefully to make sure the allocation does not fail due to this alignment. The 1 MB IPC_DATA carveout entry is placed immediately after the vdev resource so that the image carveouts are always aligned on an even 2 MB boundary. Signed-off-by: Sam Nelson Signed-off-by: Suman Anna --- diff --git a/packages/ti/ipc/remoteproc/rsc_table_vayu_dsp.h b/packages/ti/ipc/remoteproc/rsc_table_vayu_dsp.h index 7c757cc..770b4c5 100644 --- a/packages/ti/ipc/remoteproc/rsc_table_vayu_dsp.h +++ b/packages/ti/ipc/remoteproc/rsc_table_vayu_dsp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2014, Texas Instruments Incorporated + * Copyright (c) 2012-2019, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -76,7 +76,8 @@ #define DSP_MEM_TEXT 0x95000000 #define DSP_MEM_DATA 0x95100000 -#define DSP_MEM_HEAP 0x95200000 +#define DSP_MEM_HEAP0 0x95200000 +#define DSP_MEM_HEAP1 0x95300000 #define DSP_MEM_IPC_DATA 0x9F000000 #define DSP_MEM_IPC_VRING 0xA0000000 @@ -85,16 +86,26 @@ #define DSP_MEM_VRING_BUFS0 0xA0040000 #define DSP_MEM_VRING_BUFS1 0xA0080000 +/* + * NOTE: + * To avoid issues with allocation failures with Linux carveout regions, need + * to use the RSC_CARVEOUT entries with power of 2 page order sizes and aligned + * on the same page order. + * The size and the alignment order of entries in the resource table plays a + * part in avoiding gaps in allocation + */ #define DSP_MEM_IPC_VRING_SIZE SZ_1M #define DSP_MEM_IPC_DATA_SIZE SZ_1M #define DSP_MEM_TEXT_SIZE SZ_1M #define DSP_MEM_DATA_SIZE SZ_1M -#define DSP_MEM_HEAP_SIZE (SZ_1M * 3) +#define DSP_MEM_HEAP0_SIZE (SZ_1M * 2) +#define DSP_MEM_HEAP1_SIZE (SZ_1M * 1) /* - * Assign fixed RAM addresses to facilitate a fixed MMU table. + * The following values need to match Linux side device tree reserved + * memory region start address for specific processor core. + * The addresses are used to create mmu entry for IPC vrings and buffers */ -/* See CMA BASE addresses in Linux side: arch/arm/mach-omap2/remoteproc.c */ #if defined (VAYU_DSP_1) #define PHYS_MEM_IPC_VRING 0x99000000 #elif defined (VAYU_DSP_2) @@ -111,16 +122,21 @@ /* flip up bits whose indices represent features we support */ #define RPMSG_DSP_C0_FEATURES 1 +#define NUM_RSC_ENTRIES 17 + struct my_resource_table { struct resource_table base; - UInt32 offset[16]; /* Should match 'num' in actual definition */ + UInt32 offset[NUM_RSC_ENTRIES]; /* Should match 'num' in actual definition */ /* rpmsg vdev entry */ struct fw_rsc_vdev rpmsg_vdev; struct fw_rsc_vdev_vring rpmsg_vring0; struct fw_rsc_vdev_vring rpmsg_vring1; + /* ipcdata carveout entry */ + struct fw_rsc_carveout ipcdata_cout; + /* text carveout entry */ struct fw_rsc_carveout text_cout; @@ -128,10 +144,10 @@ struct my_resource_table { struct fw_rsc_carveout data_cout; /* heap carveout entry */ - struct fw_rsc_carveout heap_cout; + struct fw_rsc_carveout heap0_cout; - /* ipcdata carveout entry */ - struct fw_rsc_carveout ipcdata_cout; + /* heap carveout entry */ + struct fw_rsc_carveout heap1_cout; /* trace entry */ struct fw_rsc_trace trace; @@ -174,15 +190,16 @@ struct my_resource_table { struct my_resource_table ti_ipc_remoteproc_ResourceTable = { 1, /* we're the first version that implements this */ - 16, /* number of entries in the table */ + NUM_RSC_ENTRIES, /* number of entries in the table */ 0, 0, /* reserved, must be zero */ /* offsets to entries */ { offsetof(struct my_resource_table, rpmsg_vdev), + offsetof(struct my_resource_table, ipcdata_cout), offsetof(struct my_resource_table, text_cout), offsetof(struct my_resource_table, data_cout), - offsetof(struct my_resource_table, heap_cout), - offsetof(struct my_resource_table, ipcdata_cout), + offsetof(struct my_resource_table, heap0_cout), + offsetof(struct my_resource_table, heap1_cout), offsetof(struct my_resource_table, trace), offsetof(struct my_resource_table, devmem0), offsetof(struct my_resource_table, devmem1), @@ -206,6 +223,12 @@ struct my_resource_table ti_ipc_remoteproc_ResourceTable = { { DSP_MEM_RPMSG_VRING0, 4096, DSP_RPMSG_VQ0_SIZE, 1, 0 }, { DSP_MEM_RPMSG_VRING1, 4096, DSP_RPMSG_VQ1_SIZE, 2, 0 }, + { + TYPE_CARVEOUT, + DSP_MEM_IPC_DATA, 0, + DSP_MEM_IPC_DATA_SIZE, 0, 0, "DSP_MEM_IPC_DATA", + }, + { TYPE_CARVEOUT, DSP_MEM_TEXT, 0, @@ -220,14 +243,14 @@ struct my_resource_table ti_ipc_remoteproc_ResourceTable = { { TYPE_CARVEOUT, - DSP_MEM_HEAP, 0, - DSP_MEM_HEAP_SIZE, 0, 0, "DSP_MEM_HEAP", + DSP_MEM_HEAP0, 0, + DSP_MEM_HEAP0_SIZE, 0, 0, "DSP_MEM_HEAP0", }, { TYPE_CARVEOUT, - DSP_MEM_IPC_DATA, 0, - DSP_MEM_IPC_DATA_SIZE, 0, 0, "DSP_MEM_IPC_DATA", + DSP_MEM_HEAP1, 0, + DSP_MEM_HEAP1_SIZE, 0, 0, "DSP_MEM_HEAP1", }, { diff --git a/packages/ti/ipc/remoteproc/rsc_table_vayu_ipu.h b/packages/ti/ipc/remoteproc/rsc_table_vayu_ipu.h index 193bfa7..34068af 100644 --- a/packages/ti/ipc/remoteproc/rsc_table_vayu_ipu.h +++ b/packages/ti/ipc/remoteproc/rsc_table_vayu_ipu.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2014, Texas Instruments Incorporated + * Copyright (c) 2012-2019, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -80,9 +80,22 @@ #define L3_TILER_MODE_3 0x78000000 #define IPU_TILER_MODE_3 0xB8000000 - +#if defined(VAYU_IPU_1) #define IPU_MEM_TEXT 0x0 -#define IPU_MEM_DATA 0x80000000 +#elif defined(VAYU_IPU_2) +#define IPU_MEM_TEXT0 0x0 +#define IPU_MEM_TEXT1 0x0200000 +#endif + +#if defined(VAYU_IPU_1) +#define IPU_MEM_DATA0 0x80000000 +#define IPU_MEM_DATA1 0x80100000 +#elif defined(VAYU_IPU_2) +#define IPU_MEM_DATA0 0x80000000 +#define IPU_MEM_DATA1 0x80800000 +#define IPU_MEM_DATA2 0x81800000 +#define IPU_MEM_DATA3 0x82800000 +#endif #define IPU_MEM_IPC_DATA 0x9F000000 #define IPU_MEM_IPC_VRING 0x60000000 @@ -97,20 +110,28 @@ #if defined(VAYU_IPU_1) #define IPU_MEM_TEXT_SIZE (SZ_1M) #elif defined(VAYU_IPU_2) -#define IPU_MEM_TEXT_SIZE (SZ_1M * 6) +#define IPU_MEM_TEXT0_SIZE (SZ_1M * 2) +#define IPU_MEM_TEXT1_SIZE (SZ_1M * 4) #endif #if defined(VAYU_IPU_1) -#define IPU_MEM_DATA_SIZE (SZ_1M * 5) +#define IPU_MEM_DATA0_SIZE (SZ_1M * 1) +#define IPU_MEM_DATA1_SIZE (SZ_1M * 4) #elif defined(VAYU_IPU_2) -#define IPU_MEM_DATA_SIZE (SZ_1M * 48) +#define IPU_MEM_DATA0_SIZE (SZ_1M * 8) +#define IPU_MEM_DATA1_SIZE (SZ_1M * 16) +#define IPU_MEM_DATA2_SIZE (SZ_1M * 16) +#define IPU_MEM_DATA3_SIZE (SZ_1M * 8) #endif /* - * Assign fixed RAM addresses to facilitate a fixed MMU table. - * PHYS_MEM_IPC_VRING & PHYS_MEM_IPC_DATA MUST be together. + * NOTE: + * To avoid issues with allocation failures with Linux carveout regions, need + * to use the RSC_CARVEOUT entries with power of 2 page order sizes and aligned + * on the same page order. + * The size and the alignment order of entries in the resource table plays a + * part in avoiding gaps in allocation */ -/* See CMA BASE addresses in Linux side: arch/arm/mach-omap2/remoteproc.c */ #if defined(VAYU_IPU_1) #define PHYS_MEM_IPC_VRING 0x9D000000 #elif defined (VAYU_IPU_2) @@ -127,25 +148,40 @@ /* flip up bits whose indices represent features we support */ #define RPMSG_IPU_C0_FEATURES 1 +#if defined(VAYU_IPU_1) +#define NUM_RSC_ENTRIES 18 +#elif defined (VAYU_IPU_2) +#define NUM_RSC_ENTRIES 21 +#endif + struct my_resource_table { struct resource_table base; - UInt32 offset[17]; /* Should match 'num' in actual definition */ + UInt32 offset[NUM_RSC_ENTRIES]; /* Should match 'num' in actual definition */ /* rpmsg vdev entry */ struct fw_rsc_vdev rpmsg_vdev; struct fw_rsc_vdev_vring rpmsg_vring0; struct fw_rsc_vdev_vring rpmsg_vring1; - /* text carveout entry */ - struct fw_rsc_carveout text_cout; - - /* data carveout entry */ - struct fw_rsc_carveout data_cout; - /* ipcdata carveout entry */ struct fw_rsc_carveout ipcdata_cout; + /* text carveout entry */ +#if defined(VAYU_IPU_1) + struct fw_rsc_carveout text_cout; +#elif defined (VAYU_IPU_2) + struct fw_rsc_carveout text0_cout; + struct fw_rsc_carveout text1_cout; +#endif + /* data carveout entries */ + struct fw_rsc_carveout data0_cout; + struct fw_rsc_carveout data1_cout; +#if defined(VAYU_IPU_2) + struct fw_rsc_carveout data2_cout; + struct fw_rsc_carveout data3_cout; +#endif + /* trace entry */ struct fw_rsc_trace trace; @@ -193,14 +229,24 @@ struct my_resource_table { struct my_resource_table ti_ipc_remoteproc_ResourceTable = { 1, /* we're the first version that implements this */ - 17, /* number of entries in the table */ + NUM_RSC_ENTRIES, /* number of entries in the table */ 0, 0, /* reserved, must be zero */ /* offsets to entries */ { offsetof(struct my_resource_table, rpmsg_vdev), - offsetof(struct my_resource_table, text_cout), - offsetof(struct my_resource_table, data_cout), offsetof(struct my_resource_table, ipcdata_cout), +#if defined(VAYU_IPU_1) + offsetof(struct my_resource_table, text_cout), +#elif defined (VAYU_IPU_2) + offsetof(struct my_resource_table, text0_cout), + offsetof(struct my_resource_table, text1_cout), +#endif + offsetof(struct my_resource_table, data0_cout), + offsetof(struct my_resource_table, data1_cout), +#if defined(VAYU_IPU_2) + offsetof(struct my_resource_table, data2_cout), + offsetof(struct my_resource_table, data3_cout), +#endif offsetof(struct my_resource_table, trace), offsetof(struct my_resource_table, devmem0), offsetof(struct my_resource_table, devmem1), @@ -226,24 +272,58 @@ struct my_resource_table ti_ipc_remoteproc_ResourceTable = { { IPU_MEM_RPMSG_VRING0, 4096, IPU_RPMSG_VQ0_SIZE, 1, 0 }, { IPU_MEM_RPMSG_VRING1, 4096, IPU_RPMSG_VQ1_SIZE, 2, 0 }, + { + TYPE_CARVEOUT, + IPU_MEM_IPC_DATA, 0, + IPU_MEM_IPC_DATA_SIZE, 0, 0, "IPU_MEM_IPC_DATA", + }, + +#if defined(VAYU_IPU_1) { TYPE_CARVEOUT, IPU_MEM_TEXT, 0, IPU_MEM_TEXT_SIZE, 0, 0, "IPU_MEM_TEXT", }, +#elif defined (VAYU_IPU_2) + { + TYPE_CARVEOUT, + IPU_MEM_TEXT0, 0, + IPU_MEM_TEXT0_SIZE, 0, 0, "IPU_MEM_TEXT0", + }, { TYPE_CARVEOUT, - IPU_MEM_DATA, 0, - IPU_MEM_DATA_SIZE, 0, 0, "IPU_MEM_DATA", + IPU_MEM_TEXT1, 0, + IPU_MEM_TEXT1_SIZE, 0, 0, "IPU_MEM_TEXT1", }, +#endif { TYPE_CARVEOUT, - IPU_MEM_IPC_DATA, 0, - IPU_MEM_IPC_DATA_SIZE, 0, 0, "IPU_MEM_IPC_DATA", + IPU_MEM_DATA0, 0, + IPU_MEM_DATA0_SIZE, 0, 0, "IPU_MEM_DATA0", + }, + + { + TYPE_CARVEOUT, + IPU_MEM_DATA1, 0, + IPU_MEM_DATA1_SIZE, 0, 0, "IPU_MEM_DATA1", + }, + +#if defined(VAYU_IPU_2) + { + TYPE_CARVEOUT, + IPU_MEM_DATA2, 0, + IPU_MEM_DATA2_SIZE, 0, 0, "IPU_MEM_DATA2", }, + { + TYPE_CARVEOUT, + IPU_MEM_DATA3, 0, + IPU_MEM_DATA3_SIZE, 0, 0, "IPU_MEM_DATA3", + }, +#endif + { TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:sysm3", },