From 902e39c8378ef5d54940bdb64f0fa85bd9bd9faa Mon Sep 17 00:00:00 2001 From: Judah Vang Date: Wed, 17 Apr 2013 16:34:26 -0700 Subject: [PATCH] Update Mailbox usage, Add support for NON-SMP BIOS --- packages/ti/sdo/ipc/family/Settings.xs | 3 +- .../ti/sdo/ipc/family/vayu/InterruptArp32.c | 27 +- .../ti/sdo/ipc/family/vayu/InterruptArp32.xdc | 12 +- .../ti/sdo/ipc/family/vayu/InterruptArp32.xs | 61 +-- .../ti/sdo/ipc/family/vayu/InterruptDsp.c | 95 ++-- .../ti/sdo/ipc/family/vayu/InterruptDsp.xdc | 25 +- .../ti/sdo/ipc/family/vayu/InterruptDsp.xs | 60 +-- .../ti/sdo/ipc/family/vayu/InterruptHost.c | 43 +- .../ti/sdo/ipc/family/vayu/InterruptHost.xdc | 15 +- .../ti/sdo/ipc/family/vayu/InterruptHost.xs | 25 +- .../ti/sdo/ipc/family/vayu/InterruptIpu.c | 453 +++++++++++++++--- .../ti/sdo/ipc/family/vayu/InterruptIpu.xdc | 22 +- .../ti/sdo/ipc/family/vayu/InterruptIpu.xs | 92 ++-- packages/ti/sdo/ipc/family/vayu/TableInit.xs | 346 ++++++++++--- 14 files changed, 972 insertions(+), 307 deletions(-) diff --git a/packages/ti/sdo/ipc/family/Settings.xs b/packages/ti/sdo/ipc/family/Settings.xs index 666a51b..e99e7cc 100644 --- a/packages/ti/sdo/ipc/family/Settings.xs +++ b/packages/ti/sdo/ipc/family/Settings.xs @@ -195,7 +195,8 @@ var procNames = { 'F28M3.*' : ["M3", "C28"], 'LM3.*' : [ "" ], /* single core, any name can be used */ 'Vayu' : ["DSP1", "DSP2", "EVE1", "EVE2", "EVE3", "EVE4", - "IPU1", "IPU2", "HOST"], + "IPU1", "IPU2", "IPU1-0", "IPU1-1", "IPU2-0", + "IPU2-1", "HOST"], }; setDeviceAliases(procNames, deviceAliases); diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptArp32.c b/packages/ti/sdo/ipc/family/vayu/InterruptArp32.c index 5a21efd..6d706d1 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptArp32.c +++ b/packages/ti/sdo/ipc/family/vayu/InterruptArp32.c @@ -87,6 +87,8 @@ #define IPU1_ID 6 #define IPU2_ID 7 #define HOST_ID 8 +#define IPU1_1_ID 9 +#define IPU2_1_ID 10 /* ************************************************************************* @@ -94,7 +96,7 @@ ************************************************************************* */ -/*! +/* * ======== InterruptArp32_intEnable ======== * Enable remote processor interrupt */ @@ -107,7 +109,7 @@ Void InterruptArp32_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) REG32(MAILBOX_IRQENABLE_SET(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); } -/*! +/* * ======== InterruptArp32_intDisable ======== * Disables remote processor interrupt */ @@ -121,7 +123,7 @@ Void InterruptArp32_intDisable(UInt16 remoteProcId, REG32(MAILBOX_IRQENABLE_CLR(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); } -/*! +/* * ======== InterruptArp32_intRegister ======== */ Void InterruptArp32_intRegister(UInt16 remoteProcId, @@ -162,7 +164,8 @@ Void InterruptArp32_intRegister(UInt16 remoteProcId, if ((index == DSP1_ID) || (index == IPU1_ID) || (index == HOST_ID)) { mbxIdx = 0; } - else if ((index == DSP2_ID) || (index == IPU2_ID)) { + else if ((index == DSP2_ID) || (index == IPU2_ID) || + (index == IPU1_1_ID) || (index == IPU2_1_ID)) { mbxIdx = 1; } else if (index < InterruptArp32_NUM_EVES) { @@ -191,7 +194,7 @@ Void InterruptArp32_intRegister(UInt16 remoteProcId, Hwi_restore(key); } -/*! +/* * ======== InterruptArp32_intUnregister ======== */ Void InterruptArp32_intUnregister(UInt16 remoteProcId, @@ -204,10 +207,12 @@ Void InterruptArp32_intUnregister(UInt16 remoteProcId, index = PROCID(remoteProcId); - if ((remoteProcId == DSP1_ID) || (remoteProcId == IPU1_ID) || (remoteProcId == HOST_ID)) { + if ((remoteProcId == DSP1_ID) || (remoteProcId == IPU1_ID) || + (remoteProcId == HOST_ID)) { mbxIdx = 0; } - else if ((remoteProcId == DSP2_ID) || (remoteProcId == IPU2_ID)) { + else if ((remoteProcId == DSP2_ID) || (remoteProcId == IPU2_ID) || + (remoteProcId == IPU1_1_ID) || (remoteProcId == IPU2_1_ID)) { mbxIdx = 1; } else if (remoteProcId < InterruptArp32_NUM_EVES) { @@ -231,7 +236,7 @@ Void InterruptArp32_intUnregister(UInt16 remoteProcId, } -/*! +/* * ======== InterruptArp32_intSend ======== * Send interrupt to the remote processor */ @@ -256,7 +261,7 @@ Void InterruptArp32_intSend(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo, } -/*! +/* * ======== InterruptArp32_intPost ======== * Simulate an interrupt from a remote processor */ @@ -281,7 +286,7 @@ Void InterruptArp32_intPost(UInt16 srcProcId, IInterrupt_IntInfo *intInfo, } -/*! +/* * ======== InterruptArp32_intClear ======== * Clear interrupt */ @@ -308,7 +313,7 @@ UInt InterruptArp32_intClear(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) ************************************************************************* */ -/*! +/* * ======== InterruptArp32_intShmStub ======== */ Void InterruptArp32_intShmStub(UArg arg) diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptArp32.xdc b/packages/ti/sdo/ipc/family/vayu/InterruptArp32.xdc index 98cd892..ed7246d 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptArp32.xdc +++ b/packages/ti/sdo/ipc/family/vayu/InterruptArp32.xdc @@ -44,7 +44,7 @@ import ti.sdo.utils.MultiProc; module InterruptArp32 inherits ti.sdo.ipc.notifyDrivers.IInterrupt { /* Total number of cores on Vayu SoC */ - const UInt8 NUM_CORES = 9; + const UInt8 NUM_CORES = 11; /* Number of Cores in EVE Sub-system */ const UInt8 NUM_EVES = 4; @@ -53,7 +53,7 @@ module InterruptArp32 inherits ti.sdo.ipc.notifyDrivers.IInterrupt const UInt8 NUM_EVE_MBX = 12; /* Number of System Mailboxes */ - const UInt8 NUM_SYS_MBX = 3; + const UInt8 NUM_SYS_MBX = 4; /* Base address for the Mailbox subsystem */ config UInt32 mailboxBaseAddr[NUM_EVE_MBX + NUM_SYS_MBX]; @@ -77,9 +77,11 @@ internal: config UInt eve4ProcId = MultiProc.INVALIDID; config UInt dsp1ProcId = MultiProc.INVALIDID; config UInt dsp2ProcId = MultiProc.INVALIDID; - config UInt ipu1ProcId = MultiProc.INVALIDID; - config UInt ipu2ProcId = MultiProc.INVALIDID; + config UInt ipu1_0ProcId = MultiProc.INVALIDID; + config UInt ipu2_0ProcId = MultiProc.INVALIDID; config UInt hostProcId = MultiProc.INVALIDID; + config UInt ipu1_1ProcId = MultiProc.INVALIDID; + config UInt ipu2_1ProcId = MultiProc.INVALIDID; /*! Function table */ struct FxnTable { @@ -104,6 +106,6 @@ internal: * numPlugged array length equals number of internal mailboxes per * EVE. */ - UInt numPlugged[NUM_EVE_MBX/NUM_EVES]; + UInt16 numPlugged[NUM_EVE_MBX/NUM_EVES]; }; } diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptArp32.xs b/packages/ti/sdo/ipc/family/vayu/InterruptArp32.xs index c0720f4..8716ecb 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptArp32.xs +++ b/packages/ti/sdo/ipc/family/vayu/InterruptArp32.xs @@ -57,44 +57,49 @@ function module$use() TableInit.generateTable(InterruptArp32); /* Initialize mailbox base address table */ - this.mailboxBaseAddr[0] = 0x4008B000; - this.mailboxBaseAddr[1] = 0x4008C000; - this.mailboxBaseAddr[2] = 0x4008D000; - this.mailboxBaseAddr[3] = 0x4008B000; - this.mailboxBaseAddr[4] = 0x4008C000; - this.mailboxBaseAddr[5] = 0x4218D000; - this.mailboxBaseAddr[6] = 0x4008B000; - this.mailboxBaseAddr[7] = 0x4008C000; - this.mailboxBaseAddr[8] = 0x4228D000; - this.mailboxBaseAddr[9] = 0x4008B000; - this.mailboxBaseAddr[10] = 0x4008C000; - this.mailboxBaseAddr[11] = 0x4238D000; - this.mailboxBaseAddr[12] = 0x48844000; - this.mailboxBaseAddr[13] = 0x48842000; - this.mailboxBaseAddr[14] = 0x48840000; + this.mailboxBaseAddr[0] = 0x4008B000; /* EVE1 Internal Mailbox 0 */ + this.mailboxBaseAddr[1] = 0x4008C000; /* EVE1 Internal Mailbox 1 */ + this.mailboxBaseAddr[2] = 0x4208D000; /* EVE1 Internal Mailbox 2 */ + this.mailboxBaseAddr[3] = 0x4008B000; /* EVE2 Internal Mailbox 0 */ + this.mailboxBaseAddr[4] = 0x4008C000; /* EVE2 Internal Mailbox 1 */ + this.mailboxBaseAddr[5] = 0x4218D000; /* EVE2 Internal Mailbox 2 */ + this.mailboxBaseAddr[6] = 0x4008B000; /* EVE3 Internal Mailbox 0 */ + this.mailboxBaseAddr[7] = 0x4008C000; /* EVE3 Internal Mailbox 1 */ + this.mailboxBaseAddr[8] = 0x4228D000; /* EVE3 Internal Mailbox 2 */ + this.mailboxBaseAddr[9] = 0x4008B000; /* EVE4 Internal Mailbox 0 */ + this.mailboxBaseAddr[10] = 0x4008C000; /* EVE4 Internal Mailbox 1 */ + this.mailboxBaseAddr[11] = 0x4238D000; /* EVE4 Internal Mailbox 2 */ + this.mailboxBaseAddr[12] = 0x48840000; /* System Mailbox 5 */ + this.mailboxBaseAddr[13] = 0x48842000; /* System Mailbox 6 */ + this.mailboxBaseAddr[14] = 0x48844000; /* System Mailbox 7 */ + this.mailboxBaseAddr[15] = 0x48846000; /* System Mailbox 8 */ - if (MultiProc.id == this.eve2ProcId) { - this.mailboxBaseAddr[2] = 0x4208D000; + /* each EVE receives its message using the local mailbox address */ + if (MultiProc.id == this.eve1ProcId) { + this.mailboxBaseAddr[2] = 0x4008D000; + } + else if (MultiProc.id == this.eve2ProcId) { this.mailboxBaseAddr[5] = 0x4008D000; } else if (MultiProc.id == this.eve3ProcId) { - this.mailboxBaseAddr[2] = 0x4208D000; this.mailboxBaseAddr[8] = 0x4008D000; } else if (MultiProc.id == this.eve4ProcId) { - this.mailboxBaseAddr[2] = 0x4208D000; this.mailboxBaseAddr[11] = 0x4008D000; } - this.eveInterruptTable[0] = 60; /* EVE1 - Group1/INTC1 */ - this.eveInterruptTable[1] = 60; /* EVE2 - Group1/INTC1 */ - this.eveInterruptTable[2] = 60; /* EVE3 - Group1/INTC1 */ - this.eveInterruptTable[3] = 60; /* EVE4 - Group1/INTC1 */ - this.eveInterruptTable[4] = 29; /* DSP1 - Group0/INTC0 */ - this.eveInterruptTable[5] = 30; /* DSP2 - Group0/INTC0 */ - this.eveInterruptTable[6] = 29; /* IPU1 */ - this.eveInterruptTable[7] = 30; /* IPU2 */ - this.eveInterruptTable[8] = 29; /* HOST */ + /* EVE interrupt mapping. See EVE28 functional specs */ + this.eveInterruptTable[0] = 60; /* EVE1 - Group1/INTC1 */ + this.eveInterruptTable[1] = 60; /* EVE2 - Group1/INTC1 */ + this.eveInterruptTable[2] = 60; /* EVE3 - Group1/INTC1 */ + this.eveInterruptTable[3] = 60; /* EVE4 - Group1/INTC1 */ + this.eveInterruptTable[4] = 29; /* DSP1 - Group0/INTC0 */ + this.eveInterruptTable[5] = 30; /* DSP2 - Group0/INTC0 */ + this.eveInterruptTable[6] = 29; /* IPU1-0 */ + this.eveInterruptTable[7] = 30; /* IPU2-0 */ + this.eveInterruptTable[8] = 29; /* HOST */ + this.eveInterruptTable[9] = 30; /* IPU1-1 */ + this.eveInterruptTable[10] = 30; /* IPU2-1 */ /* * In case of a spec change, follow the process shown below: diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptDsp.c b/packages/ti/sdo/ipc/family/vayu/InterruptDsp.c index 24ce4d3..d1bbaf0 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptDsp.c +++ b/packages/ti/sdo/ipc/family/vayu/InterruptDsp.c @@ -89,7 +89,7 @@ ************************************************************************* */ -/*! +/* * ======== InterruptDsp_Module_startup ======== */ Int InterruptDsp_Module_startup(Int phase) @@ -98,21 +98,63 @@ Int InterruptDsp_Module_startup(Int phase) if (IntXbar_Module_startupDone()) { /* connect mailbox interrupts at startup */ - if (DNUM) { /* DSP1 */ - IntXbar_connect(33, 287); // eve1 mailbox - IntXbar_connect(34, 296); // eve2 mailbox - IntXbar_connect(35, 305); // eve3 mailbox - IntXbar_connect(36, 314); // eve4 mailbox - IntXbar_connect(37, 258); // system mailbox 7 - IntXbar_connect(38, 254); // system mailbox 6 user 1 + if (DNUM == 0) { /* DSP1 */ + IntXbar_connect(24, 284); // eve1 mailbox 0 user 1 + IntXbar_connect(25, 293); // eve2 mailbox 0 user 1 + IntXbar_connect(26, 249); // system mailbox 5 user 0 + + InterruptDsp_module->interruptTable[6] = 57; // IPU1-0 + InterruptDsp_module->interruptTable[9] = 57; // IPU1-1 + + /* plug eve3 and eve4 mbxs only if eve3 and eve4 exists */ + if ((MultiProc_getId("EVE3") != MultiProc_INVALIDID) || + (MultiProc_getId("EVE4") != MultiProc_INVALIDID)) { + IntXbar_connect(27, 302); // eve3 mailbox 0 user 1 + IntXbar_connect(28, 311); // eve4 mailbox 0 user 1 + } + + /* plug mbx7 only if DSP2 or IPU2 exists */ + if ((MultiProc_getId("DSP2") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU2") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU2-0") != MultiProc_INVALIDID)) { + IntXbar_connect(29, 257); // system mailbox 7 user 0 + InterruptDsp_module->interruptTable[7] = 60; // IPU2-0 + } + + /* plug mbx8 only if IPU2-1 exists */ + if (MultiProc_getId("IPU2-1") != MultiProc_INVALIDID) { + IntXbar_connect(30, 261); // system mailbox 8 user 0 + InterruptDsp_module->interruptTable[10] = 61; // IPU2-1 + } } - else { /* DSP0 */ - IntXbar_connect(33, 284); // eve1 mailbox - IntXbar_connect(34, 293); // eve2 mailbox - IntXbar_connect(35, 302); // eve3 mailbox - IntXbar_connect(36, 311); // eve4 mailbox - IntXbar_connect(37, 257); // system mailbox 7 - IntXbar_connect(38, 253); // system mailbox 6 user 0 + else if (DNUM == 1) { /* DSP2 */ + IntXbar_connect(24, 287); // eve1 mailbox 1 user 1 + IntXbar_connect(25, 296); // eve2 mailbox 1 user 1 + IntXbar_connect(26, 253); // system mailbox 6 user 0 + + InterruptDsp_module->interruptTable[7] = 57; // IPU2-0 + InterruptDsp_module->interruptTable[10] = 57; // IPU2-1 + + /* plug eve3 and eve4 mbxs only if eve3 and eve4 exists */ + if ((MultiProc_getId("EVE3") != MultiProc_INVALIDID) || + (MultiProc_getId("EVE4") != MultiProc_INVALIDID)) { + IntXbar_connect(27, 305); // eve3 mailbox 1 user 1 + IntXbar_connect(28, 314); // eve4 mailbox 1 user 1 + } + + /* plug mbx7 only if DSP1 or IPU1 exists */ + if ((MultiProc_getId("DSP1") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU1") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU1-0") != MultiProc_INVALIDID)) { + IntXbar_connect(29, 258); // system mailbox 7 user 1 + InterruptDsp_module->interruptTable[6] = 60; // IPU1-0 + } + + /* plug mbx8 only if IPU1-1 exists */ + if (MultiProc_getId("IPU1-1") != MultiProc_INVALIDID) { + IntXbar_connect(30, 262); // system mailbox 8 user 1 + InterruptDsp_module->interruptTable[9] = 61; // IPU1-1 + } } return (Startup_DONE); } @@ -120,7 +162,7 @@ Int InterruptDsp_Module_startup(Int phase) return (Startup_NOTDONE); } -/*! +/* * ======== InterruptDsp_intEnable ======== * Enable remote processor interrupt */ @@ -136,7 +178,7 @@ Void InterruptDsp_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) REG32(MAILBOX_IRQENABLE_SET_DSP(index))=MAILBOX_REG_VAL(SUBMBX_IDX(index)); } -/*! +/* * ======== InterruptDsp_intDisable ======== * Disables remote processor interrupt */ @@ -152,7 +194,7 @@ Void InterruptDsp_intDisable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) REG32(MAILBOX_IRQENABLE_CLR_DSP(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); } -/*! +/* * ======== InterruptDsp_intRegister ======== */ Void InterruptDsp_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo, @@ -180,17 +222,16 @@ Void InterruptDsp_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo, InterruptDsp_intClear(remoteProcId, intInfo); /* Make sure the interrupt only gets plugged once */ - eventId = InterruptDsp_dspInterruptTable[index]; + eventId = InterruptDsp_module->interruptTable[index]; InterruptDsp_module->numPlugged++; if (InterruptDsp_module->numPlugged == 1) { EventCombiner_dispatchPlug(eventId, (Hwi_FuncPtr)InterruptDsp_intShmStub, eventId, TRUE); - Hwi_Params_init(¶ms); + Hwi_Params_init(¶ms); combinedEventId = eventId / EVENT_GROUP_SIZE; - params.eventId = combinedEventId; params.arg = combinedEventId; params.enableInt = TRUE; @@ -210,7 +251,7 @@ Void InterruptDsp_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo, Hwi_restore(key); } -/*! +/* * ======== InterruptDsp_intUnregister ======== */ Void InterruptDsp_intUnregister(UInt16 remoteProcId, @@ -230,7 +271,7 @@ Void InterruptDsp_intUnregister(UInt16 remoteProcId, InterruptDsp_intDisable(remoteProcId, intInfo); /* Make sure the interrupt only gets plugged once */ - eventId = InterruptDsp_dspInterruptTable[index]; + eventId = InterruptDsp_module->interruptTable[index]; InterruptDsp_module->numPlugged--; @@ -247,7 +288,7 @@ Void InterruptDsp_intUnregister(UInt16 remoteProcId, table->arg = NULL; } -/*! +/* * ======== InterruptDsp_intSend ======== * Send interrupt to the remote processor */ @@ -283,7 +324,7 @@ Void InterruptDsp_intSend(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo, Hwi_restore(key); } -/*! +/* * ======== InterruptDsp_intPost ======== */ Void InterruptDsp_intPost(UInt16 srcProcId, IInterrupt_IntInfo *intInfo, @@ -301,7 +342,7 @@ Void InterruptDsp_intPost(UInt16 srcProcId, IInterrupt_IntInfo *intInfo, Hwi_restore(key); } -/*! +/* * ======== InterruptDsp_intClear ======== * Clear interrupt */ @@ -327,7 +368,7 @@ UInt InterruptDsp_intClear(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) ************************************************************************* */ -/*! +/* * ======== InterruptDsp_intShmStub ======== */ Void InterruptDsp_intShmStub(UArg arg) diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptDsp.xdc b/packages/ti/sdo/ipc/family/vayu/InterruptDsp.xdc index 874c7d6..a52b4f5 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptDsp.xdc +++ b/packages/ti/sdo/ipc/family/vayu/InterruptDsp.xdc @@ -69,7 +69,7 @@ module InterruptDsp inherits ti.sdo.ipc.notifyDrivers.IInterrupt }); /* Total number of cores on Vayu SoC */ - const UInt8 NUM_CORES = 9; + const UInt8 NUM_CORES = 11; /* Number of Cores in EVE Sub-system */ const UInt8 NUM_EVES = 4; @@ -81,32 +81,33 @@ module InterruptDsp inherits ti.sdo.ipc.notifyDrivers.IInterrupt const UInt8 NUM_EVE_MBX = 12; /* Number of System Mailboxes */ - const UInt8 NUM_SYS_MBX = 3; + const UInt8 NUM_SYS_MBX = 4; /* Base address for the Mailbox subsystem */ config UInt32 mailboxBaseAddr[NUM_EVE_MBX + NUM_SYS_MBX]; +internal: + /* * Mailbox table for storing encoded Base Address, mailbox user Id, * and sub-mailbox index. */ config UInt32 mailboxTable[NUM_CORES * NUM_CORES]; - config UInt32 dspInterruptTable[NUM_CORES]; - config UInt32 procIdTable[NUM_CORES]; -internal: - + /*! Statically retrieve procIds to avoid doing this at runtime */ config UInt eve1ProcId = MultiProc.INVALIDID; config UInt eve2ProcId = MultiProc.INVALIDID; config UInt eve3ProcId = MultiProc.INVALIDID; config UInt eve4ProcId = MultiProc.INVALIDID; config UInt dsp1ProcId = MultiProc.INVALIDID; config UInt dsp2ProcId = MultiProc.INVALIDID; - config UInt ipu1ProcId = MultiProc.INVALIDID; - config UInt ipu2ProcId = MultiProc.INVALIDID; + config UInt ipu1_0ProcId = MultiProc.INVALIDID; + config UInt ipu2_0ProcId = MultiProc.INVALIDID; config UInt hostProcId = MultiProc.INVALIDID; + config UInt ipu1_1ProcId = MultiProc.INVALIDID; + config UInt ipu2_1ProcId = MultiProc.INVALIDID; /*! Function table */ struct FxnTable { @@ -122,14 +123,18 @@ internal: struct Module_State { /* - * Create a function table of length 8 (Total number of cores in the + * Create a function table of length (Total number of cores in the * System) for each DSP core. */ FxnTable fxnTable[NUM_CORES]; + /* * Number of numPlugged counters is equal to the number of combined * events used by the mailbox interrupts. */ - UInt numPlugged; /* # of times the interrupt was registered */ + UInt16 numPlugged; /* # of times the interrupt was registered */ + + /* table of interrupt event ids use to communicate with this proc */ + UInt16 interruptTable[NUM_CORES]; }; } diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptDsp.xs b/packages/ti/sdo/ipc/family/vayu/InterruptDsp.xs index fda75f6..fb3166b 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptDsp.xs +++ b/packages/ti/sdo/ipc/family/vayu/InterruptDsp.xs @@ -55,32 +55,22 @@ function module$use() TableInit.generateTable(InterruptDsp); /* Initialize mailbox base address table */ - this.mailboxBaseAddr[0] = 0x4208B000; - this.mailboxBaseAddr[1] = 0x4208C000; - this.mailboxBaseAddr[2] = 0x4208D000; - this.mailboxBaseAddr[3] = 0x4218B000; - this.mailboxBaseAddr[4] = 0x4218C000; - this.mailboxBaseAddr[5] = 0x4218D000; - this.mailboxBaseAddr[6] = 0x4228B000; - this.mailboxBaseAddr[7] = 0x4228C000; - this.mailboxBaseAddr[8] = 0x4228D000; - this.mailboxBaseAddr[9] = 0x4238B000; - this.mailboxBaseAddr[10] = 0x4238C000; - this.mailboxBaseAddr[11] = 0x4238D000; - this.mailboxBaseAddr[12] = 0x48844000; - this.mailboxBaseAddr[13] = 0x48842000; - this.mailboxBaseAddr[14] = 0x48840000; - - /* Initialize Dsp Interrupt Id Table */ - this.dspInterruptTable[0] = 64; /* EVE1 */ - this.dspInterruptTable[1] = 65; /* EVE2 */ - this.dspInterruptTable[2] = 66; /* EVE3 */ - this.dspInterruptTable[3] = 67; /* EVE4 */ - this.dspInterruptTable[4] = 69; /* DSP1 */ - this.dspInterruptTable[5] = 69; /* DSP2 */ - this.dspInterruptTable[6] = 68; /* IPU1 */ - this.dspInterruptTable[7] = 68; /* IPU2 */ - this.dspInterruptTable[8] = 69; /* HOST */ + this.mailboxBaseAddr[0] = 0x4208B000; /* EVE1 Internal Mailbox 0 */ + this.mailboxBaseAddr[1] = 0x4208C000; /* EVE1 Internal Mailbox 1 */ + this.mailboxBaseAddr[2] = 0x4208D000; /* EVE1 Internal Mailbox 2 */ + this.mailboxBaseAddr[3] = 0x4218B000; /* EVE2 Internal Mailbox 0 */ + this.mailboxBaseAddr[4] = 0x4218C000; /* EVE2 Internal Mailbox 1 */ + this.mailboxBaseAddr[5] = 0x4218D000; /* EVE2 Internal Mailbox 2 */ + this.mailboxBaseAddr[6] = 0x4228B000; /* EVE3 Internal Mailbox 0 */ + this.mailboxBaseAddr[7] = 0x4228C000; /* EVE3 Internal Mailbox 1 */ + this.mailboxBaseAddr[8] = 0x4228D000; /* EVE3 Internal Mailbox 2 */ + this.mailboxBaseAddr[9] = 0x4238B000; /* EVE4 Internal Mailbox 0 */ + this.mailboxBaseAddr[10] = 0x4238C000; /* EVE4 Internal Mailbox 1 */ + this.mailboxBaseAddr[11] = 0x4238D000; /* EVE4 Internal Mailbox 2 */ + this.mailboxBaseAddr[12] = 0x48840000; /* System Mailbox 5 */ + this.mailboxBaseAddr[13] = 0x48842000; /* System Mailbox 6 */ + this.mailboxBaseAddr[14] = 0x48844000; /* System Mailbox 7 */ + this.mailboxBaseAddr[15] = 0x48846000; /* System Mailbox 8 */ /* * In case of a spec change, follow the process shown below: @@ -97,11 +87,27 @@ function module$static$init(mod, params) var remoteProcId; var idx; - for (remoteProcId = 0; remoteProcId < InterruptDsp.procIdTable.length; remoteProcId++) { + for (remoteProcId = 0; remoteProcId < InterruptDsp.procIdTable.length; + remoteProcId++) { mod.fxnTable[remoteProcId].func = null; mod.fxnTable[remoteProcId].arg = 0; } + /* Initialize Interrupt Event Ids for communicating with this processor */ + mod.interruptTable[0] = 55; /* EVE1 -> DSP1 or DSP2 */ + mod.interruptTable[1] = 56; /* EVE2 -> DSP1 or DSP2 */ + mod.interruptTable[2] = 58; /* EVE3 -> DSP1 or DSP2 */ + mod.interruptTable[3] = 59; /* EVE4 -> DSP1 or DSP2 */ + mod.interruptTable[4] = 60; /* DSP1 -> DSP2 */ + mod.interruptTable[5] = 60; /* DSP2 -> DSP1 */ + mod.interruptTable[8] = 57; /* HOST -> DSP1 or DSP2 */ + + /* These are not known at config time and is set a runtime */ + mod.interruptTable[6] = 0; /* IPU1 -> DSP1 or DSP2 */ + mod.interruptTable[7] = 0; /* IPU2 -> DSP1 or DSP2 */ + mod.interruptTable[9] = 0; /* IPU1-1 -> DSP1 or DSP2 */ + mod.interruptTable[10] = 0; /* IPU2-1 -> DSP1 or DSP2 */ + /* Intialize numPlugged */ mod.numPlugged = 0; } diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptHost.c b/packages/ti/sdo/ipc/family/vayu/InterruptHost.c index e1fd576..31df689 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptHost.c +++ b/packages/ti/sdo/ipc/family/vayu/InterruptHost.c @@ -87,27 +87,38 @@ ************************************************************************* */ -/*! +/* * ======== InterruptHost_Module_startup ======== */ Int InterruptHost_Module_startup(Int phase) { if (IntXbar_Module_startupDone()) { /* connect mailbox interrupts at startup */ - //M4 Core 0 - IntXbar_connect(42, 286); // eve1 mailbox 0 user 3 - IntXbar_connect(43, 295); // eve2 mailbox 0 user 3 - IntXbar_connect(44, 304); // eve3 mailbox 0 user 3 - IntXbar_connect(45, 313); // eve4 mailbox 0 user 3 - IntXbar_connect(46, 255); // system mailbox 6 user 2 - IntXbar_connect(47, 251); // system mailbox 5 user 2 + IntXbar_connect(127, 286); // eve1 mailbox 0 user 3 + IntXbar_connect(128, 295); // eve2 mailbox 0 user 3 + IntXbar_connect(129, 251); // system mailbox 5 user 2 + + /* plug eve3 and eve4 mbxs only if eve3 and eve4 exists */ + if ((MultiProc_getId("EVE3") != MultiProc_INVALIDID) || + (MultiProc_getId("EVE4") != MultiProc_INVALIDID)) { + IntXbar_connect(130, 304); // eve3 mailbox 0 user 3 + IntXbar_connect(131, 313); // eve4 mailbox 0 user 3 + } + + /* plug mbx6 only if DSP2 or IPU2 exists */ + if ((MultiProc_getId("DSP2") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU2") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU2-0") != MultiProc_INVALIDID)) { + IntXbar_connect(132, 255); // system mailbox 6 user 2 + } + return (Startup_DONE); } return (Startup_NOTDONE); } -/*! +/* * ======== InterruptHost_intEnable ======== * Enable remote processor interrupt */ @@ -124,7 +135,7 @@ Void InterruptHost_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) REG32(MAILBOX_IRQENABLE_SET(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); } -/*! +/* * ======== InterruptHost_intDisable ======== * Disables remote processor interrupt */ @@ -142,7 +153,7 @@ Void InterruptHost_intDisable(UInt16 remoteProcId, REG32(MAILBOX_IRQENABLE_CLR(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); } -/*! +/* * ======== InterruptHost_intRegister ======== */ Void InterruptHost_intRegister(UInt16 remoteProcId, @@ -198,7 +209,7 @@ Void InterruptHost_intRegister(UInt16 remoteProcId, Hwi_restore(key); } -/*! +/* * ======== InterruptHost_intUnregister ======== */ Void InterruptHost_intUnregister(UInt16 remoteProcId, @@ -230,7 +241,7 @@ Void InterruptHost_intUnregister(UInt16 remoteProcId, } -/*! +/* * ======== InterruptHost_intSend ======== * Send interrupt to the remote processor */ @@ -249,7 +260,7 @@ Void InterruptHost_intSend(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo, } -/*! +/* * ======== InterruptHost_intPost ======== * Simulate an interrupt from a remote processor */ @@ -268,7 +279,7 @@ Void InterruptHost_intPost(UInt16 srcProcId, IInterrupt_IntInfo *intInfo, } -/*! +/* * ======== InterruptHost_intClear ======== * Clear interrupt */ @@ -290,7 +301,7 @@ UInt InterruptHost_intClear(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) ************************************************************************* */ -/*! +/* * ======== InterruptHost_intShmMbxStub ======== */ Void InterruptHost_intShmStub(UArg arg) diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptHost.xdc b/packages/ti/sdo/ipc/family/vayu/InterruptHost.xdc index 00793b6..6e67389 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptHost.xdc +++ b/packages/ti/sdo/ipc/family/vayu/InterruptHost.xdc @@ -46,7 +46,7 @@ import ti.sdo.utils.MultiProc; module InterruptHost inherits ti.sdo.ipc.notifyDrivers.IInterrupt { /* Total number of cores on Vayu SoC */ - const UInt8 NUM_CORES = 9; + const UInt8 NUM_CORES = 11; /* Number of Cores in EVE Sub-system */ const UInt8 NUM_EVES = 4; @@ -61,7 +61,7 @@ module InterruptHost inherits ti.sdo.ipc.notifyDrivers.IInterrupt const UInt8 NUM_EVE_MBX = 12; /* Number of System Mailboxes */ - const UInt8 NUM_SYS_MBX = 3; + const UInt8 NUM_SYS_MBX = 4; /* Base address for the Mailbox subsystem */ config UInt32 mailboxBaseAddr[NUM_EVE_MBX + NUM_SYS_MBX]; @@ -72,7 +72,7 @@ module InterruptHost inherits ti.sdo.ipc.notifyDrivers.IInterrupt */ config UInt32 mailboxTable[NUM_CORES * NUM_CORES]; - config UInt32 hostInterruptTable[NUM_CORES - 1]; + config UInt32 hostInterruptTable[NUM_CORES]; config UInt32 procIdTable[NUM_CORES]; internal: @@ -84,9 +84,11 @@ internal: config UInt eve4ProcId = MultiProc.INVALIDID; config UInt dsp1ProcId = MultiProc.INVALIDID; config UInt dsp2ProcId = MultiProc.INVALIDID; - config UInt ipu1ProcId = MultiProc.INVALIDID; - config UInt ipu2ProcId = MultiProc.INVALIDID; + config UInt ipu1_0ProcId = MultiProc.INVALIDID; + config UInt ipu2_0ProcId = MultiProc.INVALIDID; config UInt hostProcId = MultiProc.INVALIDID; + config UInt ipu1_1ProcId = MultiProc.INVALIDID; + config UInt ipu2_1ProcId = MultiProc.INVALIDID; /*! Function table */ struct FxnTable { @@ -106,7 +108,8 @@ internal: * in the System). */ FxnTable fxnTable[NUM_CORES]; + /* # of times interrupt registered */ - UInt numPlugged[NUM_EVE_MBX + NUM_SYS_MBX]; + UInt16 numPlugged[NUM_EVE_MBX + NUM_SYS_MBX]; }; } diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptHost.xs b/packages/ti/sdo/ipc/family/vayu/InterruptHost.xs index e28d10e..babec2b 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptHost.xs +++ b/packages/ti/sdo/ipc/family/vayu/InterruptHost.xs @@ -71,18 +71,23 @@ function module$use() this.mailboxBaseAddr[9] = 0x4238B000; /* EVE4 Internal Mailbox 0 */ this.mailboxBaseAddr[10] = 0x4238C000; /* EVE4 Internal Mailbox 1 */ this.mailboxBaseAddr[11] = 0x4238D000; /* EVE4 Internal Mailbox 2 */ - this.mailboxBaseAddr[12] = 0x48844000; /* System Mailbox 7 */ + this.mailboxBaseAddr[12] = 0x48840000; /* System Mailbox 5 */ this.mailboxBaseAddr[13] = 0x48842000; /* System Mailbox 6 */ - this.mailboxBaseAddr[14] = 0x48840000; /* System Mailbox 5 */ + this.mailboxBaseAddr[14] = 0x48844000; /* System Mailbox 7 */ + this.mailboxBaseAddr[15] = 0x48846000; /* System Mailbox 8 */ - this.hostInterruptTable[0] = 79; /* EVE1 */ - this.hostInterruptTable[1] = 80; /* EVE2 */ - this.hostInterruptTable[2] = 81; /* EVE3 */ - this.hostInterruptTable[3] = 82; /* EVE4 */ - this.hostInterruptTable[4] = 83; /* DSP1 */ - this.hostInterruptTable[5] = 83; /* DSP2 */ - this.hostInterruptTable[6] = 84; /* IPU1 */ - this.hostInterruptTable[7] = 84; /* IPU2 */ + /* These are obtained by looking at MPU IRQ + 32 */ + this.hostInterruptTable[0] = 134 + 32; /* EVE1 */ + this.hostInterruptTable[1] = 135 + 32; /* EVE2 */ + this.hostInterruptTable[2] = 137 + 32; /* EVE3 */ + this.hostInterruptTable[3] = 138 + 32; /* EVE4 */ + this.hostInterruptTable[4] = 136 + 32; /* DSP1 */ + this.hostInterruptTable[5] = 139 + 32; /* DSP2 */ + this.hostInterruptTable[6] = 136 + 32; /* IPU1-0 */ + this.hostInterruptTable[7] = 139 + 32; /* IPU2-0 */ + this.hostInterruptTable[8] = 0; /* HOST */ + this.hostInterruptTable[9] = 136 + 32; /* IPU1-1 */ + this.hostInterruptTable[10] = 139 + 32; /* IPU2-1 */ /* * In case of a spec change, follow the process shown below: diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptIpu.c b/packages/ti/sdo/ipc/family/vayu/InterruptIpu.c index ad8b6d2..1a2c77a 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptIpu.c +++ b/packages/ti/sdo/ipc/family/vayu/InterruptIpu.c @@ -39,6 +39,7 @@ #include #include +#include #include #include #include @@ -52,6 +53,15 @@ #define REG16(A) (*(volatile UInt16 *) (A)) #define REG32(A) (*(volatile UInt32 *) (A)) +/* + * Ducati control register that maintains inter-core interrupt bits. + * + * Using separate CORE0 and CORE1 values to do 16-bit reads/writes + * because we do not want to overwrite the other cores value. + */ +#define INTERRUPT_CORE0 (InterruptIpu_ducatiCtrlBaseAddr) +#define INTERRUPT_CORE1 (InterruptIpu_ducatiCtrlBaseAddr + 2) + #define PROCID(IDX) (InterruptIpu_procIdTable[(IDX)]) #define MBX_TABLE_IDX(SRC, DST) ((PROCID(SRC) * InterruptIpu_NUM_CORES) + \ PROCID(DST)) @@ -82,7 +92,7 @@ #define MAILBOX_EOI_REG(IDX) (InterruptIpu_mailboxBaseAddr[ \ MBX_BASEADDR_IDX(IDX)] + 0x140) -#define PID0_ADDRESS 0xE00FFFE0 +#define WUGENIPU 19 /* ************************************************************************* @@ -90,7 +100,7 @@ ************************************************************************* */ -/*! +/* * ======== InterruptIpu_Module_startup ======== */ Int InterruptIpu_Module_startup(Int phase) @@ -98,22 +108,118 @@ Int InterruptIpu_Module_startup(Int phase) if (IntXbar_Module_startupDone()) { /* connect mailbox interrupts at startup */ if (Core_ipuId == 1) { - /* IPU1 */ - IntXbar_connect(42, 285); // eve1 mailbox - IntXbar_connect(43, 294); // eve2 mailbox - IntXbar_connect(44, 303); // eve3 mailbox - IntXbar_connect(45, 312); // eve4 mailbox - IntXbar_connect(46, 259); // system mailbox 7 - IntXbar_connect(47, 249); // system mailbox 5 user 0 + if ((BIOS_smpEnabled) || (Core_getId() == 0)) { + /* IPU1-0 */ + IntXbar_connect(42, 285); // eve1 mailbox 0 user 2 + IntXbar_connect(43, 294); // eve2 mailbox 0 user 2 + IntXbar_connect(44, 250); // system mailbox 5 user 1 + InterruptIpu_module->interruptTable[4] = 66; // DSP1 + InterruptIpu_module->interruptTable[8] = 66; // HOST + InterruptIpu_module->interruptTable[9] = 19; // IPU1-1 + + /* plug eve3 and eve4 mbxs only if eve3 and eve4 exists */ + if ((MultiProc_getId("EVE3") != MultiProc_INVALIDID) || + (MultiProc_getId("EVE4") != MultiProc_INVALIDID)) { + IntXbar_connect(45, 303); // eve3 mailbox 0 user 2 + IntXbar_connect(46, 312); // eve4 mailbox 0 user 2 + } + + /* plug mbx7 only if DSP2 or IPU2 exists */ + if ((MultiProc_getId("DSP2") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU2") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU2-0") != MultiProc_INVALIDID)) { + IntXbar_connect(47, 259); // system mailbox 7 user 2 + InterruptIpu_module->interruptTable[5] = 69; // DSP2 + InterruptIpu_module->interruptTable[7] = 69; // IPU2-0 + } + + /* plug mbx8 only if IPU2-1 exists */ + if (MultiProc_getId("IPU2-1") != MultiProc_INVALIDID) { + IntXbar_connect(48, 263); // system mailbox 8 user 2 + InterruptIpu_module->interruptTable[10] = 70; // IPU2-1 + } + } + else { /* IPU1-1 */ + IntXbar_connect(49, 289); // eve1 mailbox 1 user 3 + IntXbar_connect(50, 298); // eve2 mailbox 1 user 3 + IntXbar_connect(51, 252); // system mailbox 5 user 3 + InterruptIpu_module->interruptTable[4] = 73; // DSP1 + InterruptIpu_module->interruptTable[8] = 73; // HOST + InterruptIpu_module->interruptTable[6] = 19; // IPU1-0 + + /* plug eve3 and eve4 mbxs only if eve3 and eve4 exists */ + if ((MultiProc_getId("EVE3") != MultiProc_INVALIDID) || + (MultiProc_getId("EVE4") != MultiProc_INVALIDID)) { + IntXbar_connect(52, 307); // eve3 mailbox 1 user 3 + IntXbar_connect(53, 316); // eve4 mailbox 1 user 3 + } + + /* plug mbx8 only if DSP2 or IPU2 exists */ + if ((MultiProc_getId("DSP2") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU2") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU2-0") != MultiProc_INVALIDID)) { + IntXbar_connect(54, 263); // system mailbox 8 user 2 + InterruptIpu_module->interruptTable[5] = 76; // DSP2 + InterruptIpu_module->interruptTable[7] = 76; // IPU2-0 + } + } } else { - /* IPU2 */ - IntXbar_connect(42, 288); // eve1 mailbox 1 user 2 - IntXbar_connect(43, 297); // eve2 mailbox 1 user 2 - IntXbar_connect(44, 306); // eve3 mailbox 1 user 2 - IntXbar_connect(45, 315); // eve4 mailbox 1 user 2 - IntXbar_connect(46, 260); // system mailbox 7 user 3 - IntXbar_connect(47, 250); // system mailbox 5 user 1 + if ((BIOS_smpEnabled) || (Core_getId() == 0)) { + /* IPU2-0 */ + IntXbar_connect(42, 288); // eve1 mailbox 1 user 2 + IntXbar_connect(43, 297); // eve2 mailbox 1 user 2 + IntXbar_connect(44, 254); // system mailbox 6 user 1 + InterruptIpu_module->interruptTable[5] = 66; // DSP2 + InterruptIpu_module->interruptTable[8] = 66; // HOST + InterruptIpu_module->interruptTable[10] = 19; // IPU2-1 + + /* plug eve3 and eve4 mbxs only if eve3 and eve4 exists */ + if ((MultiProc_getId("EVE3") != MultiProc_INVALIDID) || + (MultiProc_getId("EVE4") != MultiProc_INVALIDID)) { + IntXbar_connect(45, 306); // eve3 mailbox 1 user 2 + IntXbar_connect(46, 315); // eve4 mailbox 1 user 2 + } + + /* plug mbx7 only if DSP1 or IPU1 exists */ + if ((MultiProc_getId("DSP1") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU1") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU1-0") != MultiProc_INVALIDID)) { + IntXbar_connect(47, 260); // system mailbox 7 user 3 + InterruptIpu_module->interruptTable[4] = 69; // DSP1 + InterruptIpu_module->interruptTable[6] = 69; // IPU1-0 + } + + /* plug mbx8 only if IPU1-1 exists */ + if (MultiProc_getId("IPU1-1") != MultiProc_INVALIDID) { + IntXbar_connect(48, 264); // system mailbox 8 user 3 + InterruptIpu_module->interruptTable[9] = 70; // IPU1-1 + } + } + else { /* IPU2-1 */ + IntXbar_connect(49, 289); // eve1 mailbox 1 user 3 + IntXbar_connect(50, 298); // eve2 mailbox 1 user 3 + IntXbar_connect(51, 256); // system mailbox 6 user 3 + InterruptIpu_module->interruptTable[5] = 73; // DSP2 + InterruptIpu_module->interruptTable[8] = 73; // HOST + InterruptIpu_module->interruptTable[7] = 19; // IPU2-0 + + /* plug eve3 and eve4 mbxs only if eve3 and eve4 exists */ + if ((MultiProc_getId("EVE3") != MultiProc_INVALIDID) || + (MultiProc_getId("EVE4") != MultiProc_INVALIDID)) { + IntXbar_connect(52, 307); // eve3 mailbox 1 user 3 + IntXbar_connect(53, 316); // eve4 mailbox 1 user 3 + } + + /* plug mbx8 only if DSP2 or IPU2 exists */ + if ((MultiProc_getId("DSP1") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU1") != MultiProc_INVALIDID) || + (MultiProc_getId("IPU1-0") != MultiProc_INVALIDID)) { + IntXbar_connect(54, 264); // system mailbox 8 user 3 + InterruptIpu_module->interruptTable[4] = 76; // DSP1 + InterruptIpu_module->interruptTable[6] = 76; // IPU1-0 + } + } } return (Startup_DONE); @@ -122,7 +228,7 @@ Int InterruptIpu_Module_startup(Int phase) return (Startup_NOTDONE); } -/*! +/* * ======== InterruptIpu_intEnable ======== * Enable remote processor interrupt */ @@ -131,6 +237,20 @@ Void InterruptIpu_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) UInt16 index; index = MBX_TABLE_IDX(remoteProcId, MultiProc_self()); + + if (Core_ipuId == 1) { + if ((remoteProcId == InterruptIpu_ipu1_0ProcId) || + (remoteProcId == InterruptIpu_ipu1_1ProcId)) { + Hwi_enableInterrupt(WUGENIPU); + } + } + else { + if ((remoteProcId == InterruptIpu_ipu2_0ProcId) || + (remoteProcId == InterruptIpu_ipu2_1ProcId)) { + Hwi_enableInterrupt(WUGENIPU); + } + } + /* * If the remote processor communicates via mailboxes, we should enable * the Mailbox IRQ instead of enabling the Hwi because multiple mailboxes @@ -139,7 +259,7 @@ Void InterruptIpu_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) REG32(MAILBOX_IRQENABLE_SET(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); } -/*! +/* * ======== InterruptIpu_intDisable ======== * Disables remote processor interrupt */ @@ -148,6 +268,19 @@ Void InterruptIpu_intDisable(UInt16 remoteProcId, { UInt16 index; + if (Core_ipuId == 1) { + if ((remoteProcId == InterruptIpu_ipu1_0ProcId) || + (remoteProcId == InterruptIpu_ipu1_1ProcId)) { + Hwi_disableInterrupt(WUGENIPU); + } + } + else { + if ((remoteProcId == InterruptIpu_ipu2_0ProcId) || + (remoteProcId == InterruptIpu_ipu2_1ProcId)) { + Hwi_disableInterrupt(WUGENIPU); + } + } + index = MBX_TABLE_IDX(remoteProcId, MultiProc_self()); /* * If the remote processor communicates via mailboxes, we should disable @@ -157,7 +290,7 @@ Void InterruptIpu_intDisable(UInt16 remoteProcId, REG32(MAILBOX_IRQENABLE_CLR(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); } -/*! +/* * ======== InterruptIpu_intRegister ======== */ Void InterruptIpu_intRegister(UInt16 remoteProcId, @@ -173,16 +306,11 @@ Void InterruptIpu_intRegister(UInt16 remoteProcId, Assert_isTrue(remoteProcId < ti_sdo_utils_MultiProc_numProcessors, ti_sdo_ipc_Ipc_A_internal); - /* Assert that our MultiProc id is set correctly */ - Assert_isTrue((InterruptIpu_ipu1ProcId == MultiProc_self() || - InterruptIpu_ipu2ProcId == MultiProc_self()), - ti_sdo_ipc_Ipc_A_internal); - mbxIdx = MBX_BASEADDR_IDX(MBX_TABLE_IDX(remoteProcId, MultiProc_self())); index = PROCID(remoteProcId); - intInfo->localIntId = InterruptIpu_IpuInterruptTable[index]; + intInfo->localIntId = InterruptIpu_module->interruptTable[index]; /* Disable global interrupts */ key = Hwi_disable(); @@ -196,16 +324,49 @@ Void InterruptIpu_intRegister(UInt16 remoteProcId, Hwi_Params_init(&hwiAttrs); hwiAttrs.maskSetting = Hwi_MaskingOption_LOWER; - /* Make sure the interrupt only gets plugged once */ - InterruptIpu_module->numPlugged[mbxIdx]++; - if (InterruptIpu_module->numPlugged[mbxIdx] == 1) { - Hwi_create(intInfo->localIntId, - (Hwi_FuncPtr)InterruptIpu_intShmMbxStub, - &hwiAttrs, - NULL); - - /* Interrupt_intEnable won't enable the Hwi */ - Hwi_enableInterrupt(intInfo->localIntId); + if (Core_ipuId == 1) { + if ((remoteProcId == InterruptIpu_ipu1_0ProcId) || + (remoteProcId == InterruptIpu_ipu1_1ProcId)) { + Hwi_create(intInfo->localIntId, + (Hwi_FuncPtr)InterruptIpu_intShmDucatiStub, + &hwiAttrs, + NULL); + } + else { + /* Make sure the interrupt only gets plugged once */ + InterruptIpu_module->numPlugged[mbxIdx]++; + if (InterruptIpu_module->numPlugged[mbxIdx] == 1) { + Hwi_create(intInfo->localIntId, + (Hwi_FuncPtr)InterruptIpu_intShmMbxStub, + &hwiAttrs, + NULL); + + /* Interrupt_intEnable won't enable the Hwi */ + Hwi_enableInterrupt(intInfo->localIntId); + } + } + } + else { + if ((remoteProcId == InterruptIpu_ipu2_0ProcId) || + (remoteProcId == InterruptIpu_ipu2_1ProcId)) { + Hwi_create(intInfo->localIntId, + (Hwi_FuncPtr)InterruptIpu_intShmDucatiStub, + &hwiAttrs, + NULL); + } + else { + /* Make sure the interrupt only gets plugged once */ + InterruptIpu_module->numPlugged[mbxIdx]++; + if (InterruptIpu_module->numPlugged[mbxIdx] == 1) { + Hwi_create(intInfo->localIntId, + (Hwi_FuncPtr)InterruptIpu_intShmMbxStub, + &hwiAttrs, + NULL); + + /* Interrupt_intEnable won't enable the Hwi */ + Hwi_enableInterrupt(intInfo->localIntId); + } + } } InterruptIpu_intEnable(remoteProcId, intInfo); @@ -214,7 +375,7 @@ Void InterruptIpu_intRegister(UInt16 remoteProcId, Hwi_restore(key); } -/*! +/* * ======== InterruptIpu_intUnregister ======== */ Void InterruptIpu_intUnregister(UInt16 remoteProcId, @@ -232,11 +393,35 @@ Void InterruptIpu_intUnregister(UInt16 remoteProcId, /* Disable the mailbox interrupt source */ InterruptIpu_intDisable(remoteProcId, intInfo); - /* Disable the interrupt itself */ - InterruptIpu_module->numPlugged[mbxIdx]--; - if (InterruptIpu_module->numPlugged[mbxIdx] == 0) { - hwiHandle = Hwi_getHandle(intInfo->localIntId); - Hwi_delete(&hwiHandle); + if (Core_ipuId == 1) { + if ((remoteProcId == InterruptIpu_ipu1_0ProcId) || + (remoteProcId == InterruptIpu_ipu1_1ProcId)) { + hwiHandle = Hwi_getHandle(WUGENIPU); + Hwi_delete(&hwiHandle); + } + else { + /* Disable the interrupt itself */ + InterruptIpu_module->numPlugged[mbxIdx]--; + if (InterruptIpu_module->numPlugged[mbxIdx] == 0) { + hwiHandle = Hwi_getHandle(intInfo->localIntId); + Hwi_delete(&hwiHandle); + } + } + } + else { + if ((remoteProcId == InterruptIpu_ipu2_0ProcId) || + (remoteProcId == InterruptIpu_ipu2_1ProcId)) { + hwiHandle = Hwi_getHandle(WUGENIPU); + Hwi_delete(&hwiHandle); + } + else { + /* Disable the interrupt itself */ + InterruptIpu_module->numPlugged[mbxIdx]--; + if (InterruptIpu_module->numPlugged[mbxIdx] == 0) { + hwiHandle = Hwi_getHandle(intInfo->localIntId); + Hwi_delete(&hwiHandle); + } + } } /* Clear the FxnTable entry for the remote processor */ @@ -246,7 +431,7 @@ Void InterruptIpu_intUnregister(UInt16 remoteProcId, } -/*! +/* * ======== InterruptIpu_intSend ======== * Send interrupt to the remote processor */ @@ -256,16 +441,52 @@ Void InterruptIpu_intSend(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo, UInt key; UInt16 index; - index = MBX_TABLE_IDX(MultiProc_self(), remoteProcId); - key = Hwi_disable(); - if (REG32(MAILBOX_STATUS(index)) == 0) { - REG32(MAILBOX_MESSAGE(index)) = arg; + if (Core_ipuId == 1) { + if ((remoteProcId == InterruptIpu_ipu1_0ProcId) || + (remoteProcId == InterruptIpu_ipu1_1ProcId)) { + if (!(BIOS_smpEnabled) && (Core_getId() == 1)) { + /* CORE1 to CORE0 */ + REG16(INTERRUPT_CORE0) |= 0x1; + } + else { + /* CORE0 to CORE1 */ + REG16(INTERRUPT_CORE1) |= 0x1; + } + } + else { + index = MBX_TABLE_IDX(MultiProc_self(), remoteProcId); + key = Hwi_disable(); + if (REG32(MAILBOX_STATUS(index)) == 0) { + REG32(MAILBOX_MESSAGE(index)) = arg; + } + Hwi_restore(key); + } + } + else { + if ((remoteProcId == InterruptIpu_ipu2_0ProcId) || + (remoteProcId == InterruptIpu_ipu2_1ProcId)) { + if (!(BIOS_smpEnabled) && (Core_getId() == 1)) { + /* CORE1 to CORE0 */ + REG16(INTERRUPT_CORE0) |= 0x1; + } + else { + /* CORE0 to CORE1 */ + REG16(INTERRUPT_CORE1) |= 0x1; + } + } + else { + index = MBX_TABLE_IDX(MultiProc_self(), remoteProcId); + key = Hwi_disable(); + if (REG32(MAILBOX_STATUS(index)) == 0) { + REG32(MAILBOX_MESSAGE(index)) = arg; + } + Hwi_restore(key); + } } - Hwi_restore(key); } -/*! +/* * ======== InterruptIpu_intPost ======== * Simulate an interrupt from a remote processor */ @@ -275,16 +496,51 @@ Void InterruptIpu_intPost(UInt16 srcProcId, IInterrupt_IntInfo *intInfo, UInt key; UInt16 index; - index = MBX_TABLE_IDX(srcProcId, MultiProc_self()); - key = Hwi_disable(); - if (REG32(MAILBOX_STATUS(index)) == 0) { - REG32(MAILBOX_MESSAGE(index)) = arg; + if (Core_ipuId == 1) { + if ((srcProcId == InterruptIpu_ipu1_0ProcId) || + (srcProcId == InterruptIpu_ipu1_1ProcId)) { + if (!(BIOS_smpEnabled) && (Core_getId() == 1)) { + /* CORE0 to CORE1 */ + REG16(INTERRUPT_CORE1) |= 0x1; + } + else { + /* CORE1 to CORE0 */ + REG16(INTERRUPT_CORE0) |= 0x1; + } + } + else { + index = MBX_TABLE_IDX(srcProcId, MultiProc_self()); + key = Hwi_disable(); + if (REG32(MAILBOX_STATUS(index)) == 0) { + REG32(MAILBOX_MESSAGE(index)) = arg; + } + Hwi_restore(key); + } + } + else { + if ((srcProcId == InterruptIpu_ipu2_0ProcId) || + (srcProcId == InterruptIpu_ipu2_1ProcId)) { + if (!(BIOS_smpEnabled) && (Core_getId() == 1)) { + /* CORE0 to CORE1 */ + REG16(INTERRUPT_CORE1) |= 0x1; + } + else { + /* CORE1 to CORE0 */ + REG16(INTERRUPT_CORE0) |= 0x1; + } + } + else { + index = MBX_TABLE_IDX(srcProcId, MultiProc_self()); + key = Hwi_disable(); + if (REG32(MAILBOX_STATUS(index)) == 0) { + REG32(MAILBOX_MESSAGE(index)) = arg; + } + Hwi_restore(key); + } } - Hwi_restore(key); } - -/*! +/* * ======== InterruptIpu_intClear ======== * Clear interrupt */ @@ -293,9 +549,58 @@ UInt InterruptIpu_intClear(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) UInt arg; UInt16 index; - index = MBX_TABLE_IDX(remoteProcId, MultiProc_self()); - arg = REG32(MAILBOX_MESSAGE(index)); - REG32(MAILBOX_IRQSTATUS_CLR(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index)); + if (Core_ipuId == 1) { + if ((remoteProcId == InterruptIpu_ipu1_0ProcId) || + (remoteProcId == InterruptIpu_ipu1_1ProcId)) { + arg = REG32(InterruptIpu_ducatiCtrlBaseAddr); + + /* Look at BIOS's ducati Core id */ + if ((BIOS_smpEnabled) || (Core_getId() == 0)) { + if ((REG16(INTERRUPT_CORE0) & 0x1) == 0x1) { + /* CORE1 to CORE0 */ + REG16(INTERRUPT_CORE0) &= ~(0x1); + } + } + else { + if ((REG16(INTERRUPT_CORE1) & 0x1) == 0x1) { + /* CORE0 to CORE1 */ + REG16(INTERRUPT_CORE1) &= ~(0x1); + } + } + } + else { + index = MBX_TABLE_IDX(remoteProcId, MultiProc_self()); + arg = REG32(MAILBOX_MESSAGE(index)); + REG32(MAILBOX_IRQSTATUS_CLR(index)) = + MAILBOX_REG_VAL(SUBMBX_IDX(index)); + } + } + else { + if ((remoteProcId == InterruptIpu_ipu2_0ProcId) || + (remoteProcId == InterruptIpu_ipu2_1ProcId)) { + arg = REG32(InterruptIpu_ducatiCtrlBaseAddr); + + /* Look at BIOS's ducati Core id */ + if ((BIOS_smpEnabled) || (Core_getId() == 0)) { + if ((REG16(INTERRUPT_CORE0) & 0x1) == 0x1) { + /* CORE1 to CORE0 */ + REG16(INTERRUPT_CORE0) &= ~(0x1); + } + } + else { + if ((REG16(INTERRUPT_CORE1) & 0x1) == 0x1) { + /* CORE0 to CORE1 */ + REG16(INTERRUPT_CORE1) &= ~(0x1); + } + } + } + else { + index = MBX_TABLE_IDX(remoteProcId, MultiProc_self()); + arg = REG32(MAILBOX_MESSAGE(index)); + REG32(MAILBOX_IRQSTATUS_CLR(index)) = + MAILBOX_REG_VAL(SUBMBX_IDX(index)); + } + } return (arg); } @@ -306,7 +611,37 @@ UInt InterruptIpu_intClear(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) ************************************************************************* */ -/*! + /* + * ======== InterruptIpu_intShmDucatiStub ======== + */ +Void InterruptIpu_intShmDucatiStub(UArg arg) +{ + UInt16 index; + InterruptIpu_FxnTable *table; + + if (Core_ipuId == 1) { + if ((BIOS_smpEnabled) || (Core_getId() == 0)) { + index = 9; + } + else { + index = 6; + } + } + else { + if ((BIOS_smpEnabled) || (Core_getId() == 0)) { + index = 10; + } + else { + index = 7; + } + } + + table = &(InterruptIpu_module->fxnTable[index]); + (table->func)(table->arg); +} + + +/* * ======== InterruptIpu_intShmMbxStub ======== */ Void InterruptIpu_intShmMbxStub(UArg arg) diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptIpu.xdc b/packages/ti/sdo/ipc/family/vayu/InterruptIpu.xdc index 4628823..a3eda0f 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptIpu.xdc +++ b/packages/ti/sdo/ipc/family/vayu/InterruptIpu.xdc @@ -46,7 +46,7 @@ import ti.sdo.utils.MultiProc; module InterruptIpu inherits ti.sdo.ipc.notifyDrivers.IInterrupt { /* Total number of cores on Vayu SoC */ - const UInt8 NUM_CORES = 9; + const UInt8 NUM_CORES = 11; /* Number of Cores in EVE Sub-system */ const UInt8 NUM_EVES = 4; @@ -58,7 +58,7 @@ module InterruptIpu inherits ti.sdo.ipc.notifyDrivers.IInterrupt const UInt8 NUM_EVE_MBX = 12; /* Number of System Mailboxes */ - const UInt8 NUM_SYS_MBX = 3; + const UInt8 NUM_SYS_MBX = 4; /* Base address for the Mailbox subsystem */ config UInt32 mailboxBaseAddr[NUM_EVE_MBX + NUM_SYS_MBX]; @@ -72,8 +72,6 @@ module InterruptIpu inherits ti.sdo.ipc.notifyDrivers.IInterrupt /* Base address for the Ducati CTRL register */ config UInt32 ducatiCtrlBaseAddr = 0x40001000; - config UInt32 IpuInterruptTable[NUM_CORES]; - config UInt32 procIdTable[NUM_CORES]; internal: @@ -85,9 +83,11 @@ internal: config UInt eve4ProcId = MultiProc.INVALIDID; config UInt dsp1ProcId = MultiProc.INVALIDID; config UInt dsp2ProcId = MultiProc.INVALIDID; - config UInt ipu1ProcId = MultiProc.INVALIDID; - config UInt ipu2ProcId = MultiProc.INVALIDID; + config UInt ipu1_0ProcId = MultiProc.INVALIDID; + config UInt ipu2_0ProcId = MultiProc.INVALIDID; config UInt hostProcId = MultiProc.INVALIDID; + config UInt ipu1_1ProcId = MultiProc.INVALIDID; + config UInt ipu2_1ProcId = MultiProc.INVALIDID; /*! Function table */ struct FxnTable { @@ -95,6 +95,9 @@ internal: UArg arg; } + /*! Stub to be plugged for inter-ducati interrupts */ + Void intShmDucatiStub(UArg arg); + /*! Stub to be plugged for intra-ducati interrupts */ Void intShmMbxStub(UArg arg); @@ -104,6 +107,11 @@ internal: * System) for each M4 core. */ FxnTable fxnTable[NUM_CORES]; - UInt numPlugged[NUM_EVE_MBX + NUM_SYS_MBX]; /* # of times interrupt registered */ + + /* # of times interrupt registered */ + UInt16 numPlugged[NUM_EVE_MBX + NUM_SYS_MBX]; + + /* table of interrupt event ids use to communicate with this proc */ + UInt16 interruptTable[NUM_CORES]; }; } diff --git a/packages/ti/sdo/ipc/family/vayu/InterruptIpu.xs b/packages/ti/sdo/ipc/family/vayu/InterruptIpu.xs index 124639a..612f0d2 100644 --- a/packages/ti/sdo/ipc/family/vayu/InterruptIpu.xs +++ b/packages/ti/sdo/ipc/family/vayu/InterruptIpu.xs @@ -34,8 +34,9 @@ * */ -var Hwi = null; -var Core = null; +var BIOS = null; +var Hwi = null; +var Core = null; var Ipu = null; /* @@ -43,12 +44,13 @@ var Ipu = null; */ function module$use() { - Hwi = xdc.useModule("ti.sysbios.family.arm.m3.Hwi"); - Core = xdc.useModule("ti.sysbios.family.arm.ducati.Core"); - Ipc = xdc.useModule("ti.sdo.ipc.Ipc"); - Ipu = xdc.useModule("ti.sdo.ipc.family.vayu.InterruptIpu"); - Xbar = xdc.useModule("ti.sysbios.hal.vayu.IntXbar"); - TableInit = xdc.useModule("ti.sdo.ipc.family.vayu.TableInit"); + BIOS = xdc.useModule("ti.sysbios.BIOS"); + Hwi = xdc.useModule("ti.sysbios.family.arm.m3.Hwi"); + Core = xdc.useModule("ti.sysbios.family.arm.ducati.Core"); + Ipc = xdc.useModule("ti.sdo.ipc.Ipc"); + Ipu = xdc.useModule("ti.sdo.ipc.family.vayu.InterruptIpu"); + Xbar = xdc.useModule("ti.sysbios.hal.vayu.IntXbar"); + TableInit = xdc.useModule("ti.sdo.ipc.family.vayu.TableInit"); /* Initisalize procIdTable */ TableInit.initProcId(Ipu); @@ -57,31 +59,22 @@ function module$use() TableInit.generateTable(Ipu); /* Initialize mailbox base address table */ - this.mailboxBaseAddr[0] = 0x9208B000; - this.mailboxBaseAddr[1] = 0x9208C000; - this.mailboxBaseAddr[2] = 0x9208D000; - this.mailboxBaseAddr[3] = 0x9218B000; - this.mailboxBaseAddr[4] = 0x9218C000; - this.mailboxBaseAddr[5] = 0x9218D000; - this.mailboxBaseAddr[6] = 0x9228B000; - this.mailboxBaseAddr[7] = 0x9228C000; - this.mailboxBaseAddr[8] = 0x9228D000; - this.mailboxBaseAddr[9] = 0x9238B000; - this.mailboxBaseAddr[10] = 0x9238C000; - this.mailboxBaseAddr[11] = 0x9238D000; - this.mailboxBaseAddr[12] = 0x48844000; - this.mailboxBaseAddr[13] = 0x48842000; - this.mailboxBaseAddr[14] = 0x48840000; - - this.IpuInterruptTable[0] = 64; /* EVE1 */ - this.IpuInterruptTable[1] = 65; /* EVE2 */ - this.IpuInterruptTable[2] = 66; /* EVE3 */ - this.IpuInterruptTable[3] = 67; /* EVE4 */ - this.IpuInterruptTable[4] = 68; /* DSP1 */ - this.IpuInterruptTable[5] = 68; /* DSP2 */ - this.IpuInterruptTable[6] = 69; /* Ipu1 */ - this.IpuInterruptTable[7] = 69; /* Ipu2 */ - this.IpuInterruptTable[8] = 69; /* HOST */ + this.mailboxBaseAddr[0] = 0x9208B000; /* EVE1 Internal Mailbox 0 */ + this.mailboxBaseAddr[1] = 0x9208C000; /* EVE1 Internal Mailbox 1 */ + this.mailboxBaseAddr[2] = 0x9208D000; /* EVE1 Internal Mailbox 2 */ + this.mailboxBaseAddr[3] = 0x9218B000; /* EVE2 Internal Mailbox 0 */ + this.mailboxBaseAddr[4] = 0x9218C000; /* EVE2 Internal Mailbox 1 */ + this.mailboxBaseAddr[5] = 0x9218D000; /* EVE2 Internal Mailbox 2 */ + this.mailboxBaseAddr[6] = 0x9228B000; /* EVE3 Internal Mailbox 0 */ + this.mailboxBaseAddr[7] = 0x9228C000; /* EVE3 Internal Mailbox 1 */ + this.mailboxBaseAddr[8] = 0x9228D000; /* EVE3 Internal Mailbox 2 */ + this.mailboxBaseAddr[9] = 0x9238B000; /* EVE4 Internal Mailbox 0 */ + this.mailboxBaseAddr[10] = 0x9238C000; /* EVE4 Internal Mailbox 1 */ + this.mailboxBaseAddr[11] = 0x9238D000; /* EVE4 Internal Mailbox 2 */ + this.mailboxBaseAddr[12] = 0x48840000; /* System Mailbox 5 */ + this.mailboxBaseAddr[13] = 0x48842000; /* System Mailbox 6 */ + this.mailboxBaseAddr[14] = 0x48844000; /* System Mailbox 7 */ + this.mailboxBaseAddr[15] = 0x48846000; /* System Mailbox 8 */ /* * In case of a spec change, follow the process shown below: @@ -110,4 +103,37 @@ function module$static$init(mod, params) for (mbxId = 0; mbxId < Ipu.mailboxBaseAddr.length; mbxId++) { mod.numPlugged[mbxId] = 0; } + + /* Initialize Interrupt Event Ids for communicating with this processor */ + if (Core.id == 0) { + mod.interruptTable[0] = 64; /* EVE1 */ + mod.interruptTable[1] = 65; /* EVE2 */ + mod.interruptTable[2] = 67; /* EVE3 */ + mod.interruptTable[3] = 68; /* EVE4 */ + + /* These are not known at config time and is set a runtime */ + mod.interruptTable[4] = 0; /* DSP1 */ + mod.interruptTable[5] = 0; /* DSP2 */ + mod.interruptTable[6] = 0; /* Ipu1-0 */ + mod.interruptTable[7] = 0; /* Ipu2-0 */ + mod.interruptTable[8] = 0; /* HOST */ + mod.interruptTable[9] = 0; /* Ipu1-1 */ + mod.interruptTable[10] = 0; /* Ipu2-1 */ + } + else { + mod.interruptTable[0] = 71; /* EVE1 */ + mod.interruptTable[1] = 72; /* EVE2 */ + mod.interruptTable[2] = 74; /* EVE3 */ + mod.interruptTable[3] = 75; /* EVE4 */ + + /* These are not known at config time and is set a runtime */ + mod.interruptTable[4] = 0; /* DSP1 */ + mod.interruptTable[5] = 0; /* DSP2 */ + mod.interruptTable[6] = 0; /* Ipu1-0 */ + mod.interruptTable[7] = 0; /* Ipu2-0 */ + mod.interruptTable[8] = 0; /* HOST */ + mod.interruptTable[9] = 0; /* Ipu1-1 */ + mod.interruptTable[10] = 0; /* Ipu2-1 */ + + } } diff --git a/packages/ti/sdo/ipc/family/vayu/TableInit.xs b/packages/ti/sdo/ipc/family/vayu/TableInit.xs index 5f8d308..17f8b74 100644 --- a/packages/ti/sdo/ipc/family/vayu/TableInit.xs +++ b/packages/ti/sdo/ipc/family/vayu/TableInit.xs @@ -46,9 +46,9 @@ * * Virtual Index Assignment: * - * | EVE1 -> 0 | EVE2 -> 1 | EVE3 -> 2 | EVE4 -> 3 | - * | DSP1 -> 4 | DSP2 -> 5 | IPU1 -> 6 | IPU2 -> 7 | - * | HOST -> 8 + * | EVE1 -> 0 | EVE2 -> 1 | EVE3 -> 2 | EVE4 -> 3 | + * | DSP1 -> 4 | DSP2 -> 5 | IPU1-0 -> 6 | IPU2-0 -> 7 | + * | HOST -> 8 | IPU1-1 -> 9 | IPU2-1 -> 10 * */ var eve1VirtId = 0; @@ -57,9 +57,11 @@ var eve3VirtId = 2; var eve4VirtId = 3; var dsp1VirtId = 4; var dsp2VirtId = 5; -var ipu1VirtId = 6; -var ipu2VirtId = 7; +var ipu1_0VirtId = 6; +var ipu2_0VirtId = 7; var hostVirtId = 8; +var ipu1_1VirtId = 9; +var ipu2_1VirtId = 10; /* * Function to initialize coreIds. @@ -68,7 +70,7 @@ function initProcId(InterruptCore) { var MultiProc = xdc.useModule("ti.sdo.utils.MultiProc"); - for (var loopIdx=0 ;loopIdxDSP1/IPU1 */ + if (((i == dsp1VirtId) || (i == ipu1_0VirtId) || + (i == hostVirtId) || (i == ipu1_1VirtId)) && + ((j == dsp1VirtId) || (j == ipu1_0VirtId) || + (j == hostVirtId) || (j == ipu1_1VirtId))) { mbxBaseAddrIdx = ((InterruptCore.NUM_EVES * 3) + SYS_MBX5_OFFSET) << 16; - if (j == ipu1VirtId) { + + /* These combinations does not need mailbox */ + if ((i == j) || + (i == ipu1_0VirtId && j == ipu1_1VirtId) || + (i == ipu1_1VirtId && j == ipu1_0VirtId)) { + continue; + } + + if (j == dsp1VirtId) { mbxUserIdx = 0; - if (i == ipu2VirtId) { - subMbxIdx = 2; + if (i == ipu1_0VirtId) { + subMbxIdx = 3; } else if (i == hostVirtId) { - subMbxIdx = 4; + subMbxIdx = 5; + } + else if (i == ipu1_1VirtId) { + subMbxIdx = 8; } } - else if (j == ipu2VirtId) { + else if (j == ipu1_0VirtId) { mbxUserIdx = 1 << 8; - if (i == ipu1VirtId) { + if (i == dsp1VirtId) { subMbxIdx = 0; } else if (i == hostVirtId) { - subMbxIdx = 5; + subMbxIdx = 6; } } - else { + else if (j == hostVirtId) { mbxUserIdx = 2 << 8; - if (i == ipu1VirtId) { + if (i == dsp1VirtId) { subMbxIdx = 1; } - else if (i == ipu2VirtId) { - subMbxIdx = 3; + else if (i == ipu1_0VirtId) { + subMbxIdx = 4; + } + else if (i == ipu1_1VirtId) { + subMbxIdx = 9; + } + } + else if (j == ipu1_1VirtId) { + mbxUserIdx = 3 << 8; + if (i == dsp1VirtId) { + subMbxIdx = 2; + } + else if (i == hostVirtId) { + subMbxIdx = 7; } } @@ -257,79 +318,230 @@ function generateTable(InterruptCore) } /* System Mailbox 6 */ - /* For communication between HOST and DSP1/2 and inter DSP */ - if (((i == dsp1VirtId) || (i == dsp2VirtId) || (i == hostVirtId)) && - ((j == dsp1VirtId) || (j == dsp2VirtId) || (j == hostVirtId))) { + /* For communication between HOST<->DSP2/IPU2 */ + if (((i == dsp2VirtId) || (i == ipu2_0VirtId) || + (i == hostVirtId) || (i == ipu2_1VirtId)) && + ((j == dsp2VirtId) || (j == ipu2_0VirtId) || + (j == hostVirtId) || (j ==ipu2_1VirtId))) { mbxBaseAddrIdx = ((InterruptCore.NUM_EVES * 3) + SYS_MBX6_OFFSET) << 16; - if (j == dsp1VirtId) { + /* These combinations does not need mailbox */ + if ((i == j) || + (i == ipu2_0VirtId && j == ipu2_1VirtId) || + (i == ipu2_1VirtId && j == ipu2_0VirtId)) { + continue; + } + + if (j == dsp2VirtId) { mbxUserIdx = 0; + if (i == ipu2_0VirtId) { + subMbxIdx = 3; + } + else if (i == hostVirtId) { + subMbxIdx = 5; + } + else if (i == ipu2_1VirtId) { + subMbxIdx = 8; + } + } + else if (j == ipu2_0VirtId) { + mbxUserIdx = 1 << 8; if (i == dsp2VirtId) { - subMbxIdx = 2; + subMbxIdx = 0; } else if (i == hostVirtId) { + subMbxIdx = 6; + } + } + else if (j == hostVirtId) { + mbxUserIdx = 2 << 8; + if (i == dsp2VirtId) { + subMbxIdx = 1; + } + else if (i == ipu2_0VirtId) { subMbxIdx = 4; } + else if (i == ipu2_1VirtId) { + subMbxIdx = 9; + } + } + else if (j == ipu2_1VirtId) { + mbxUserIdx = 3 << 8; + if (i == dsp2VirtId) { + subMbxIdx = 2; + } + else if (i == hostVirtId) { + subMbxIdx = 7; + } + } + + tableEntry = mbxBaseAddrIdx | mbxUserIdx | subMbxIdx; + InterruptCore.mailboxTable[i*InterruptCore.NUM_CORES + j] = tableEntry; + continue; + } + + /* + * System Mailbox 7 + * This is for communication between DSP1/IPU1_0<->DSP2/IPU2-0 + * but not DSP1<->IPU1-0 or DSP<->IPU2-0. Those communication + * lines have already been established above. + */ + if (((i == dsp1VirtId) || (i == dsp2VirtId) || + (i == ipu1_0VirtId) || (i == ipu2_0VirtId)) && + ((j == dsp1VirtId) || (j == dsp2VirtId) || + (j == ipu1_0VirtId) || (j == ipu2_0VirtId))) { + + mbxBaseAddrIdx = ((InterruptCore.NUM_EVES * 3) + + SYS_MBX7_OFFSET) << 16; + + /* DSP1/IPU1 and DSP2/IPU2 already established previously */ + if (i == j) { + continue; + } + if ((i == dsp1VirtId && j == ipu1_0VirtId) || + (i == dsp2VirtId && j == ipu2_0VirtId)) { + continue; + } + + if (j == dsp1VirtId) { + mbxUserIdx = 0; + if (i == dsp2VirtId) { + subMbxIdx = 2; + } + else if (i == ipu2_0VirtId) { + subMbxIdx = 6; + } } else if (j == dsp2VirtId) { mbxUserIdx = 1 << 8; if (i == dsp1VirtId) { subMbxIdx = 0; } - else if (i == hostVirtId) { - subMbxIdx = 5; + else if (i == ipu1_0VirtId) { + subMbxIdx = 4; } } - else { + else if (j == ipu1_0VirtId) { mbxUserIdx = 2 << 8; + if (i == dsp2VirtId) { + subMbxIdx = 3; + } + else if (i == ipu2_0VirtId) { + subMbxIdx = 7; + } + } + else if (j == ipu2_0VirtId) { + mbxUserIdx = 3 << 8; if (i == dsp1VirtId) { subMbxIdx = 1; } - else if (i == dsp2VirtId) { - subMbxIdx = 3; + else if (i == ipu1_0VirtId) { + subMbxIdx = 5; } } tableEntry = mbxBaseAddrIdx | mbxUserIdx | subMbxIdx; InterruptCore.mailboxTable[i*InterruptCore.NUM_CORES + j] = tableEntry; - continue; } - /* System Mailbox 7 */ - /* For communication between DSP1/2 and IPU1/2 */ - /* Not to be used for Inter DSP or Inter IPU communication */ - if (((i >= dsp1VirtId) && (i <= ipu2VirtId)) && - ((j >= dsp1VirtId) && (j <= ipu2VirtId))) { + /* + * System Mailbox 8 + * This only required only if one of the IPU is running + * NON-SMP BIOS. This is for the second core of + * IPU1-1<->DSP2/IPU2 or second core of IPU2-1<->DSP1/IPU1. + */ + if (((i == dsp1VirtId) || (i == dsp2VirtId) || + (i == ipu1_0VirtId) || (i == ipu1_1VirtId) || + (i == ipu2_0VirtId) || (i == ipu2_1VirtId)) && + ((j == dsp1VirtId) || (j == dsp2VirtId) || + (j == ipu1_0VirtId) || (j == ipu1_1VirtId) || + (j == ipu2_0VirtId) || (j == ipu2_1VirtId))) { mbxBaseAddrIdx = ((InterruptCore.NUM_EVES * 3) + - SYS_MBX7_OFFSET) << 16; - mbxUserIdx = (j - InterruptCore.NUM_EVES) << 8; + SYS_MBX8_OFFSET) << 16; - /* skip all ther inter IPU and DSP communication */ + //print("i= " + i + " j= " + j); + + /* Don't set any previously established lines */ if (i == j) { continue; } - if ((i == ipu1VirtId && j == ipu2VirtId) || - (i == ipu2VirtId && j == ipu1VirtId)) { + + if ((i == dsp1VirtId) && (j != ipu2_1VirtId)) { continue; } - if ((i == dsp1VirtId && j == dsp2VirtId) || - (i == dsp2VirtId && j == dsp1VirtId)) { + + if ((i == dsp2VirtId) && (j != ipu1_1VirtId)) { continue; } - if (i == dsp1VirtId) { - subMbxIdx = j - 6; /* j = ipu1 or ipu2 */ + if ((i == ipu1_0VirtId) && (j != ipu2_1VirtId)) { + continue; } - else if (i == dsp2VirtId) { - subMbxIdx = j - 4; /* j = ipu1 or ipu2 */ + + if ((i == ipu1_1VirtId) && + ((j != dsp2VirtId) && (j != ipu2_0VirtId))) { + continue; } - else if (i == ipu1VirtId) { - subMbxIdx = j; /* j = dsp1 or dsp2 */ + + if ((i == ipu2_0VirtId) && (j != ipu1_1VirtId)) { + continue; } - else if (i == ipu2VirtId) { - subMbxIdx = j + 2; /* j = dsp1 or dsp2 */ + + if ((i == ipu2_1VirtId) && + ((j != dsp1VirtId) && (j != ipu1_0VirtId))) { + continue; + } + + /* Set new communication lines */ + if (j == dsp1VirtId) { + /* only required when IPU2 is NON-SMP BIOS */ + mbxUserIdx = 0; + if (i == ipu2_1VirtId) { + subMbxIdx = 2; + } + } + else if (j == dsp2VirtId) { + /* only required when IPU1 is NON-SMP BIOS */ + mbxUserIdx = 1 << 8; + if (i == ipu1_1VirtId) { + subMbxIdx = 1; + } + } + else if (j == ipu1_0VirtId) { + /* only required when IPU2 is NON-SMP BIOS */ + mbxUserIdx = 2 << 8; + if (i == ipu2_1VirtId) { + subMbxIdx = 3; + } + } + else if (j == ipu1_1VirtId) { + /* only required when IPU1 is NON-SMP BIOS */ + mbxUserIdx = 2 << 8; + if (i == dsp2VirtId) { + subMbxIdx = 0; + } + else if (i == ipu2_0VirtId) { + subMbxIdx = 3; + } + } + else if (j == ipu2_0VirtId) { + /* only required when IPU1 is NON-SMP BIOS */ + mbxUserIdx = 3 << 8; + if (i == ipu1_1VirtId) { + subMbxIdx = 2; + } + } + else if (j == ipu2_1VirtId) { + /* only required when IPU2 is NON-SMP BIOS */ + mbxUserIdx = 3 << 8; + if (i == dsp1VirtId) { + subMbxIdx = 0; + } + else if (i == ipu1_0VirtId) { + subMbxIdx = 1; + } } tableEntry = mbxBaseAddrIdx | mbxUserIdx | subMbxIdx; -- 2.39.2