author | Nikhil Devshatwar <nikhil.nd@ti.com> | |
Wed, 10 Jun 2020 16:53:10 +0000 (22:23 +0530) | ||
committer | Dave Gerlach <d-gerlach@ti.com> | |
Fri, 19 Jun 2020 20:44:23 +0000 (15:44 -0500) | ||
commit | c0d6e6ebc85d9e7e4e02a7e6364cadf31c6fad0d | |
tree | 1ef89d01545aaf24983964b7f184c2c1de72612f | tree | snapshot (tar.xz tar.gz zip) |
parent | d9a550b91ec95d06a80f2ccc6dd829815ba35d88 | commit | diff |
soc: j721e: board-cfg: Set MSMC cache size to 0
For j721e, most of the usecases required MSMC memory
to be used as SRAM instead of the cache.
Set the msmc_cache_size = 0 for j721e core board config.
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
For j721e, most of the usecases required MSMC memory
to be used as SRAM instead of the cache.
Set the msmc_cache_size = 0 for j721e core board config.
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
soc/j721e/evm/board-cfg.c | diff | blob | history |