k3-image-gen/k3-image-gen.git
3 weeks agoMakefile: Update firmware for all devices to v2021.01a master 07.03.00.003 07.03.00.004 07.03.00.005
Praneeth Bajjuri [Wed, 17 Mar 2021 21:09:58 +0000 (16:09 -0500)]
Makefile: Update firmware for all devices to v2021.01a

Update the commit hash for linux-firmware to pick up

* sysfw upgrade to v2020.01a for all platforms.
commit 5f4b0da944b4 ("ti-sysfw: Update System Firmwares to v2020.01a")

* associated dm upgrades for j7200 and j721e
* 07.03.00.21
commit 306e8b92bcce ("ti-dm: Update firmware to 07.03.00.21")

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 weeks agoMakefile: Update firmware for all devices to v2021.01 07.03.00.001 07.03.00.002
Dave Gerlach [Tue, 23 Feb 2021 22:56:02 +0000 (16:56 -0600)]
Makefile: Update firmware for all devices to v2021.01

Update the commit hash for linux-firmware to pick up

* sysfw upgrade to v2020.01 for all platforms.
commit ada0cc1bf918 ("ti-sysfw: Update System Firmwares to v2020.01")

* associated dm upgrades:
  * j7200 - 07.03.00.10
  * j721e - 07.03.00.12
commit b7e5d159fd4a ("ti-dm: Update firmware to 07.02.00.1x")

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
8 weeks agoMakefile: Append RM and PM board cfgs to TIFS in combined img boot flow
Vignesh Raghavendra [Wed, 10 Feb 2021 12:24:26 +0000 (17:54 +0530)]
Makefile: Append RM and PM board cfgs to TIFS in combined img boot flow

TIFS needs RM board config to be sent in order to validate UDMA firewall
configuration requests from DM. This means PM cfg also to be present.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2 months agoMakefile: Update firmware for all devices to v2020.12a 07.02.00.004 07.03.00.000
Praneeth Bajjuri [Thu, 21 Jan 2021 00:45:03 +0000 (00:45 +0000)]
Makefile: Update firmware for all devices to v2020.12a

Update the commit hash for linux-firmware to pick up

* sysfw upgrade to v2020.12a for am65x, j721e, j7200.
commit 5e620449329d ("ti-sysfw: Update System Firmwares to v2020.12a")

* associated dm upgrade for j721e and j7200 to 07.02.00.10
commit b66ee9ae020c ("ti-dm: Update firmware to 07.02.00.10")

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Tested-by: Dave Gerlach <d-gerlach@ti.com>
2 months agoMakefile: Update firmware for all devices to v2020.12 07.02.00.003
Praneeth Bajjuri [Thu, 14 Jan 2021 23:19:53 +0000 (23:19 +0000)]
Makefile: Update firmware for all devices to v2020.12

Update the commit hash for linux-firmware to pick up

* sysfw upgrade to v2020.12 for am65x, j721e, j7200.
commit 1c17cc11cc79 ("ti-sysfw: Update System Firmwares to v2020.12")

* associated dm upgrade for j721e and j7200 to 07.02.00.05
commit 183b487f02ce ("ti-dm: Update firmware to 07.02.00.05")

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Praneeth Bajjuri <praneeth@ti.com>
3 months agoMakefile: Update am64x firmware to v2020.12 07.02.00.002
Praneeth Bajjuri [Thu, 7 Jan 2021 00:10:27 +0000 (00:10 +0000)]
Makefile: Update am64x firmware to v2020.12

Update the commit hash to pick up the am64x v2020.12 from
the linux-firmware repo.

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
3 months agosoc: am64x: Add data to enable combined boot flow
Dave Gerlach [Wed, 16 Dec 2020 01:31:35 +0000 (01:31 +0000)]
soc: am64x: Add data to enable combined boot flow

Add the required variables and build steps to allow ROM combined boot
image to be generated if SBL variable is provided during build.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
3 months agobuild: Introduce COMBINED_TIFS_BRDCFG build variable for split boardcfg
Dave Gerlach [Wed, 16 Dec 2020 01:31:34 +0000 (01:31 +0000)]
build: Introduce COMBINED_TIFS_BRDCFG build variable for split boardcfg

J7200 supports using a split firmware where TIFS firmware runs on the
DMSC and DM firmware runs on an R5, and each are able to receive their
own boardcfg loaded from the tiboot3.bin image.

Currently COMBINED_SYSFW_BRDCFG can represent both a full set of
boardcfg for platforms using a single DMSC firmware or only the TIFS
boardcfg when using split firmware. To make this less confusing,
introduce a COMBINED_TIFS_BRDCFG build variable to be used only for TIFS
BOARDCFG when using split firmware so that COMBINED_SYSFW_BRDCFG always
represents a complete set of boardcfg.

This allows SoCs to build bootable binaries supporting ROM combined boot
images with both splt TIFS/DM firmware or complete DMSC firmware.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
3 months agoscripts: gen_x509_combined_cert: Make DM boardcfg optional
Dave Gerlach [Wed, 16 Dec 2020 01:31:33 +0000 (01:31 +0000)]
scripts: gen_x509_combined_cert: Make DM boardcfg optional

Upon introduction of support for using DM firmware and providing DM
boardcfg through tiboot3.bin, support for providing ALL boardcfg as
part of one common boardcfg binary was lost. Modify the
gen_x509_combined_cert script so that the DM boardcfg can provided
optionally.

This allows all boardcfgs to be provided as part of a single binary to
look more like the traditional combined boot flow on platforms that do
not support a separate DM firmware.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
3 months agoMakefile: Update commit hash to pick up AM64 binary 07.02.00.001
Dan Murphy [Thu, 17 Dec 2020 12:54:45 +0000 (06:54 -0600)]
Makefile: Update commit hash to pick up AM64 binary

Update the commit hash to pick up the AM64 binary version w2020.23 from
the linux-firmware repo.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
3 months agoscripts: sysfw_boardcfg_validator: Add substitution for am65x to am6
Dave Gerlach [Wed, 16 Dec 2020 23:49:33 +0000 (17:49 -0600)]
scripts: sysfw_boardcfg_validator: Add substitution for am65x to am6

The sysfw_boardcfg_validator refers to am65x as am6 internally for
legacy reasons so add a check to use 'am6' as the SoC name in the script
when 'am65x' is passed.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
3 months agosoc: am64x: Introduce support for evm
Dave Gerlach [Tue, 29 Sep 2020 04:57:05 +0000 (04:57 +0000)]
soc: am64x: Introduce support for evm

Add support for AM64x SoCs. Base the baseport, PM, and security boardcfg
off of other platforms and use generated RM config provided by the
sysconfig tool.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
3 months agoscripts: sysfw_boardcfg_*: Update scripts and rules to latest
Dave Gerlach [Tue, 29 Sep 2020 04:57:04 +0000 (04:57 +0000)]
scripts: sysfw_boardcfg_*: Update scripts and rules to latest

Update to the latest boardcfg validator script and rules
corresponding to System Firmware v2020.08b

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
5 months agoHACK: soc: j721e: Adjust MCU NAVSSS UDMA channel allocation 07.01.00.006
Nikhil Devshatwar [Thu, 29 Oct 2020 22:12:10 +0000 (03:42 +0530)]
HACK: soc: j721e: Adjust MCU NAVSSS UDMA channel allocation

MCU R5 is facing hang when using channel no 5 and corresponding rings.
The transfer finishes, but the TR responce is not generated, ring
occupancy does not change.

Somehow, MCU R5 is having trouble to use channel no 5. UDMA works fine with
channel no 6 onwards.

As a workaround, increase the channel allocation for A72 and adjust
the allocation for all other cores.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
5 months agoMakefile: Introduce SCIFS variable to account for SYSFW name variations 07.01.00.005
Suman Anna [Wed, 28 Oct 2020 22:13:24 +0000 (22:13 +0000)]
Makefile: Introduce SCIFS variable to account for SYSFW name variations

The System Firmware functionality on K3 J721E and J7200 SoCs has been
reduced to only cater to the foundational security pieces starting from
SYSFW 2020.08, and the binaries have been renamed accordingly.

Introduce a Makefile variable SCIFS to account for these changes.

Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
5 months agosoc: j7200: Update block copy allocation for UDMA channels
Nikhil Devshatwar [Mon, 19 Oct 2020 15:41:08 +0000 (21:11 +0530)]
soc: j7200: Update block copy allocation for UDMA channels

To use UDMA channels for block copy, the Tx and Rx channel number
has to be the same. When UDMA channels are allocated with just a
single range, sometimes it is not possible to allocate the ranges
such that the channels can be used for block copy usecase.

Fix this by allocating the channels in two ranges, first range for
block copy and second range for other usage. When there are no
channels for block copy, an entry with 0 count is added. This
is to maintain consistency when querying SYSFW about the
ranges allocated for a host.

Also adjust the MCU NAVSS INTA/INTR allocation after
the HSM re architecture

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
5 months agosoc: j721e: Update block copy allocation for UDMA channels
Nikhil Devshatwar [Mon, 19 Oct 2020 15:41:07 +0000 (21:11 +0530)]
soc: j721e: Update block copy allocation for UDMA channels

To use UDMA channels for block copy, the Tx and Rx channel number
has to be the same. When UDMA channels are allocated with just a
single range, sometimes it is not possible to allocate the ranges
such that the channels can be used for block copy usecase.

Fix this by allocating the channels in two ranges, first range for
block copy and second range for other usage. When there are no
channels for block copy, an entry with 0 count is added. This
is to maintain consistency when querying SYSFW about the
ranges allocated for a host.

Also adjust the MCU NAVSS interrupt router allocation after
the HSM re architecture

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
5 months agoscripts: Update board configuration validation files from v2020.08-RC3
Nikhil Devshatwar [Mon, 19 Oct 2020 15:41:06 +0000 (21:11 +0530)]
scripts: Update board configuration validation files from v2020.08-RC3

Update the board config validation script and rules json
from v2020.08-RC3

This allows to pass more number of entries in the RM board config
updates the resource constraints for MCU NAVSS

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
5 months agoMakefile: Update firmware binaries to v2020.08-RC3 07.01.00.004
Dave Gerlach [Fri, 16 Oct 2020 22:29:37 +0000 (22:29 +0000)]
Makefile: Update firmware binaries to v2020.08-RC3

Update the Makefile to automatically fetch and build the v2020.08-RC3
version of the sysfw binaries for all supported SoCs from
ti-linux-firmware.

Note that this is the first version that will only support split
firmware architecture for j721e and j7200, so firmware with SciServer
enabled must be used with both SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Suman Anna <s-anna@ti.com>
5 months agoscripts: gen_x509_combined_cert: modify to support multiple boardcfg images
Dave Gerlach [Tue, 13 Oct 2020 08:41:24 +0000 (08:41 +0000)]
scripts: gen_x509_combined_cert: modify to support multiple boardcfg images

With the new bootflows being introduced, it is possible for boards to
have multiple boardcfg images provided. Modify the
gen_x509_combined_cert script to accept two different boardcfg binaries
and load them to the defined addresses.

This mandates that all platforms using combined bootflow will use the
split boardcfg images.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
5 months agoscripts: sysfw_boardcfg_blob_creator: Take any combination of boardcfgs
Dave Gerlach [Tue, 13 Oct 2020 08:41:23 +0000 (08:41 +0000)]
scripts: sysfw_boardcfg_blob_creator: Take any combination of boardcfgs

With the new bootflows being introduced, it is possible for different
combinations of boardcfgs to be needed in different blobs. To account
for this, allow any combination of boardcfgs to be specified for the
sysfw_boardcfg_blob_creator script and generate binaries as needed.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
5 months agosec-cfg: Add secure_handover_config section
Dave Gerlach [Thu, 24 Sep 2020 22:37:03 +0000 (22:37 +0000)]
sec-cfg: Add secure_handover_config section

Update the common.h headers to add new defines from
SYSFW 2020.08.

Starting from SYSFW v2020.08, a secure_handover_config section
is mandatory in the security config. Otherwise the boot fails
on all SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
5 months agoMakefile: Set LOADADDR in each SOC Makefile
Dave Gerlach [Tue, 29 Sep 2020 04:16:39 +0000 (04:16 +0000)]
Makefile: Set LOADADDR in each SOC Makefile

Each SOC has its own Makefile and some SOCs may have a need for a
different load address, so define the LOADADDR variable in the SOC
specific Makefile.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
6 months agosoc: j7200: rm-cfg: Allocate one HC channel pair for A72 07.01.00.003
Vignesh Raghavendra [Thu, 17 Sep 2020 07:07:30 +0000 (12:37 +0530)]
soc: j7200: rm-cfg: Allocate one HC channel pair for A72

Allocate 1 HC channel pair each in MAIN UDMA and MCU UDMA for A72 so as
to enable Linux/U-Boot to demonstrate max performance with HyperFlash
and OSPI.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
6 months agosoc: j721e: Reallocate extended channels for R5 07.01.00.002
Nikhil Devshatwar [Fri, 11 Sep 2020 17:35:43 +0000 (23:05 +0530)]
soc: j721e: Reallocate extended channels for R5

Allocate 2 DRU channels for each of Main R5_0 core0/1
Allocate all the DMPAC channels (last 32) for Main R5 core1

RM config auto generated from the k3-resource-partitioning tool

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
7 months agoMakefile: Update firmware binaries to v2020.07-RC3 07.01.00.001
Dave Gerlach [Tue, 1 Sep 2020 12:07:24 +0000 (07:07 -0500)]
Makefile: Update firmware binaries to v2020.07-RC3

Update the Makefile to automatically fetch and build the
v2020.07-RC3 version of the sysfw binaries for all supported
K3 SoCs from the ti-linux-firmware repo.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Praneeth Bajjuri <praneeth@ti.com>
7 months agosoc: j7200: Update RM board config with latest data
Nikhil Devshatwar [Tue, 18 Aug 2020 16:01:11 +0000 (21:31 +0530)]
soc: j7200: Update RM board config with latest data

* Increase resource allocation for meeting RTOS use cases
* Add block copy channel allocation

Auto generated from k3-resource-partitioning tool commit ID
8e058012d5bcc457ae1f9212425d0d0ccd534752

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
7 months agosoc: j721e: Update RM board config after SYSFW 2020.07
Nikhil Devshatwar [Tue, 18 Aug 2020 16:01:10 +0000 (21:31 +0530)]
soc: j721e: Update RM board config after SYSFW 2020.07

* Move to new resource subtype names for proxy, ring accelerator
and interrupt routers
* Adjust VINTs and global event allocation after HSM re architecture

Auto generated from k3-resource-partitioning tool commit ID
8e058012d5bcc457ae1f9212425d0d0ccd534752

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
7 months agoinclude: j721e: j7200: Update headers from SYSFW 2020.07-RC2
Nikhil Devshatwar [Tue, 18 Aug 2020 16:01:09 +0000 (21:31 +0530)]
include: j721e: j7200: Update headers from SYSFW 2020.07-RC2

Update header files from System firmware 2020.07.
This includes many renames for the device macros.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
7 months agosec-cfg: Add secure_debug_config section
Suman Anna [Mon, 10 Aug 2020 20:07:14 +0000 (15:07 -0500)]
sec-cfg: Add secure_debug_config section

Update the common.h headers to add new defines from
SYSFW 2020.07-rc1.

Starting from SYSFW v2020.07-rc1, a secure_debug_config section
is mandatory in the security config. Otherwise the boot fails
on all SoCs.

Fix this by adding a section for secure_debug_config with
appropriate parameters configured on all on AM65x, AM65x SR2.0,
J721E and J7200 SoCs.

Signed-off-by: Suman Anna <s-anna@ti.com>
7 months agosoc: Introduce SoC specific Makefiles
Lokesh Vutla [Tue, 11 Aug 2020 21:33:08 +0000 (16:33 -0500)]
soc: Introduce SoC specific Makefiles

Now that SoCs have different boot image targets, introduce SOC specific
Makefiles to represent boot targets. Below are boot targets:
- AM65x: sysfw.itb
- AM65x SR2: sysfw.itb
- J721E: sysfw.itb
- J7200: tiboot3.bin, sysfw.itb

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 months agoscripts: gen_x509_combined_cert: Introduce script for generating combined boot image
Lokesh Vutla [Tue, 11 Aug 2020 21:33:07 +0000 (16:33 -0500)]
scripts: gen_x509_combined_cert: Introduce script for generating combined boot image

New Combined ROM image format consists of the following images:
- R5 SBL
- SYSFW image
- SYSFW data

Introduce script for creating this combined ROM image format

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 months agoscripts: sysfw_boardcfg_blob_creator: Add support for combining board configurations...
Anand Balagopalakrishnan [Tue, 11 Aug 2020 21:33:06 +0000 (16:33 -0500)]
scripts: sysfw_boardcfg_blob_creator: Add support for combining board configurations files

The sysfw data in the new Combined ROM image format should be a single
file containing all the four board configurations. Add support for
combining all the four board configurations.

Signed-off-by: Anand Balagopalakrishnan <anandb@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 months agoscripts: Update board configuration validation files for J7200
Lokesh Vutla [Tue, 11 Aug 2020 21:33:05 +0000 (16:33 -0500)]
scripts: Update board configuration validation files for J7200

Add the SoC data for J7200 SoCs to the sysfw_boardcfg_rules file,
and update the the validator script to include the checking for
J7200 SoCs.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
7 months agosoc: j7200: rm-cfg: Auto generate from host-tools
Nikhil Devshatwar [Tue, 11 Aug 2020 21:33:04 +0000 (16:33 -0500)]
soc: j7200: rm-cfg: Auto generate from host-tools

Auto generated from the host-tools with:
Commit ID: 1f48ea8844cff145d6b12fee3d8a0b19e0602a66

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 months agosoc: j7200: Add sysfw board config data
Lokesh Vutla [Tue, 11 Aug 2020 21:33:03 +0000 (16:33 -0500)]
soc: j7200: Add sysfw board config data

Add the following board configurations specific to j7200 SoC:
- board-cfg
- pm-cfg
- rm-cfg
- sec-cfg

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
7 months agoinclude: j7200: Add sysfw board config data definitions
Lokesh Vutla [Tue, 11 Aug 2020 21:33:02 +0000 (16:33 -0500)]
include: j7200: Add sysfw board config data definitions

Add the following board config data definitions for j7200:
- Devices
- hosts
- RM assignment types

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
7 months agoscripts: sysfw_boardcfg_validator: Update to validate resasg entries
Lokesh Vutla [Tue, 11 Aug 2020 21:33:01 +0000 (16:33 -0500)]
scripts: sysfw_boardcfg_validator: Update to validate resasg entries

Update the sysfw_boardcfg_validator to the latest version to validate
the number of resasg entries using the 'max_resource_entries' constraint.
The sysfw_boardcfg_rules file is also updated to add the constraint
value for each of the existing AM65x, AM65x SR2.0 and J721E SoCs.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[s-anna@ti.com: refactor patch]
Signed-off-by: Suman Anna <s-anna@ti.com>
7 months agoam65x,am65x_sr2: Fix Main NavSS Rings for UDMAP HC Rx channels
Suman Anna [Tue, 11 Aug 2020 21:33:00 +0000 (16:33 -0500)]
am65x,am65x_sr2: Fix Main NavSS Rings for UDMAP HC Rx channels

The number of Main NavSS rings reserved by DMSC for High capacity Rx
channels is off by one. Update the board configuration validation
script and fix the RM cfg resource entries for the same on both AM65x
and AM65x SR2.0 SoCs.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 months agoMakefile: Update firmware binaries to v2020.07-RC2
Suman Anna [Fri, 14 Aug 2020 17:00:23 +0000 (12:00 -0500)]
Makefile: Update firmware binaries to v2020.07-RC2

Update the Makefile to automatically fetch and build the
v2020.07-RC2 version of the sysfw binaries for all supported
K3 SoCs from the ti-linux-firmware repo.

This commit also supports fetching in the binaries for
J7200 SoCs.

Signed-off-by: Suman Anna <s-anna@ti.com>
8 months agosoc: j721e: rm-cfg: Reassign GPIO interrupt routers
Nikhil Devshatwar [Fri, 31 Jul 2020 23:58:00 +0000 (23:58 +0000)]
soc: j721e: rm-cfg: Reassign GPIO interrupt routers

Linux GPIO driver requests all the bank interrupts at the time
of probe itself. J721e needs minimum of 11 interrupts for the
Main GPIO instances and minimum of 6 interrups for the WKUP
GPIO instances.

Reassign the allocation to increase the counts for A72 hosts
while removing them from unused C7X and R5 cores.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Tested-by: Suman Anna <s-anna@ti.com>
8 months agosoc: j721e: rm-cfg: Auto generate from the K3 Resource Partitioning tool
Nikhil Devshatwar [Fri, 31 Jul 2020 23:57:59 +0000 (23:57 +0000)]
soc: j721e: rm-cfg: Auto generate from the K3 Resource Partitioning tool

Update the board config using the K3 Resource Partitioning tool
* Add the host_cfg_entries section which allows to define
  capabilities for each host
* Updates to comments for readability
* Create separate entries for extended channels for HWA and DRU
* Remove the HOST_ID_ALL entries for virt_id ranges
* Remove the interrupt allocation for slots which are not connected
* Remove the 2nd range of C6X NAVSS interrupts

The K3 Resource Partitioning tool does not support allocating
same resource split across multiple ranges currently.
Drop the 2nd range of NAVSS interrupt router for C6X for now

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Tested-by: Suman Anna <s-anna@ti.com>
9 months agosoc: j721e: board-cfg: Set MSMC cache size to 0
Nikhil Devshatwar [Wed, 10 Jun 2020 16:53:10 +0000 (22:23 +0530)]
soc: j721e: board-cfg: Set MSMC cache size to 0

For j721e, most of the usecases required MSMC memory
to be used as SRAM instead of the cache.

Set the msmc_cache_size = 0 for j721e core board config.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
10 months agoMakefile: Update firmware binaries to v2020.04a 07.00.00.004 07.00.00.005
Praneeth Bajjuri [Thu, 28 May 2020 14:27:47 +0000 (09:27 -0500)]
Makefile: Update firmware binaries to v2020.04a

Update the Makefile to automatically fetch and build the v2020.04a
version of the sysfw binaries for all supported SoCs from
ti-linux-firmware.

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
10 months agoj721e: rm-cfg: Switch back to non-secure host for C7x resources
Suman Anna [Thu, 14 May 2020 23:01:09 +0000 (18:01 -0500)]
j721e: rm-cfg: Switch back to non-secure host for C7x resources

The C7x core comes up in secure mode by default, and all the resources
reserved for C7x are currently using the secure context id HOST_ID_C7X_0.
The latest SYS/BIOS 6.82.00.16 adds the support for properly switching
the C7x applications to non-secure mode, so switch back all the
resources to use the non-secure context id HOST_ID_C7X_1.

All the application firmwares are expected to perform the necessary
steps to switch from secure to non-secure context from now on.

Signed-off-by: Suman Anna <s-anna@ti.com>
11 months agoj721e: rm-cfg: Reassign resources for Main R5FSS0 07.00.00.002 07.00.00.003 ti2020.01.00
Nikhil Devshatwar [Wed, 6 May 2020 20:38:35 +0000 (15:38 -0500)]
j721e: rm-cfg: Reassign resources for Main R5FSS0

Auto generated from https://git.ti.com/cgit/glsdk/host-tools

Ethernet firmware and PSDKRA will be merged into single image
running on Main R5FSS0 core0 leaving the core1 unused for customer.

To accomodate this, update the resource partitioning to combine
the resources and adjust few to be left free for Main R5FSS0 core1.

Also add non secure proxy allocation for both MCU and Main, the
C7x resources are also switched to using the secure context.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
11 months agoscripts: Update boardconfig rules for 2020.04 release
Nikhil Devshatwar [Wed, 6 May 2020 20:38:34 +0000 (15:38 -0500)]
scripts: Update boardconfig rules for 2020.04 release

Update the boarconfig rules from latest 2020.04 release
This fixes validation errors with virtid resources

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
11 months agoj721e: rm-cfg: Switch to secure context for C7X resources
Suman Anna [Tue, 5 May 2020 16:25:12 +0000 (11:25 -0500)]
j721e: rm-cfg: Switch to secure context for C7X resources

The C7x core comes up in secure mode by default, and all the current
firmwares continue to run in this context until the necessary support
is added to SYS/BIOS to switch the context. All the C7x RM resources
are currently assigned using the non-secure context id HOST_ID_C7X_1.
Switch these to the secure context id HOST_ID_C7X_0 to match the
usage in PDK and current RTOS firmwares.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
11 months agoj721e: rm-cfg: Assign unallocated Main NavSS IR GIC_SPI lines to C71x
Suman Anna [Mon, 4 May 2020 21:08:44 +0000 (16:08 -0500)]
j721e: rm-cfg: Assign unallocated Main NavSS IR GIC_SPI lines to C71x

The Main NavSS IR has 192 output lines routed to both the GIC and CLEC
within the Compute Cluster. The first 10 and the last 4 interrupts are
reserved for System Firmware, while the remaining are split up between
the HOST_ID_A72_2, HOST_ID_A72_3 and HOST_ID_C7X_1 contexts. The Main
NavSS IR output lines [174:187] are currently not allocated to any
context, so assign these to the C71x non-secure context.

Signed-off-by: Suman Anna <s-anna@ti.com>
11 months agoj721e: rm-cfg: Add NavSS IR resources for R5Fs and C66x DSPs
Suman Anna [Mon, 4 May 2020 21:08:43 +0000 (16:08 -0500)]
j721e: rm-cfg: Add NavSS IR resources for R5Fs and C66x DSPs

The ABI 3.0 resource updates haven't added any Main NavSS IR
output lines for the MCU and MAIN domain R5Fs, and the MAIN
domain C66x remote processors. Add the corresponding resource
entries to restore the IPC functionality with these cores.

Following is the main summary of resource partitioning:
 - The 8 interrupts from Main NavSS IR towards MCU domain are
   split equally between the MCU R5F0 and MCU R5F1.
 - The first 4 interrupts from each group of 32 interrupts from
   Main NavSS IR towards a MAIN R5F core are reserved for System
   Firmware, so the remaining 28 interrupts are added for the
   corresponding non-secure R5F host contexts.
 - The 32 interrupts from Main NavSS IR towards each of the C66x
   DSP cores are split into two sets of 24 interrupts and 8
   interrupts, with the first 4 interrupts from the latter set
   reserved for System Firmware. Add the remaining interrupts
   from each set to each of the corresponding C66x non-secure
   contexts.

Signed-off-by: Suman Anna <s-anna@ti.com>
11 months agoam65x,am65x_sr2: Fix MAIN2MCU interrupt routers for both R5F cores
Suman Anna [Mon, 4 May 2020 21:08:42 +0000 (16:08 -0500)]
am65x,am65x_sr2: Fix MAIN2MCU interrupt routers for both R5F cores

Each of the MCU R5F cores are represented by different HOST_IDs, and
the ABI 3.0 RM changes have reassigned all the MAIN2MCU interrupt router
outputs back to only the MCU R5F Core0. This breaks the IPC use-cases
when the MCU R5FSS cluster is configured for Split-mode.

Partition both the MAIN2MCU_LVL and MAIN2MCU_PLS Interrupt Router
outputs equally between the non-secure contexts of both the MCU
R5F cores.

Signed-off-by: Suman Anna <s-anna@ti.com>
11 months agoam65x,am65x_sr2: rm-cfg: Fix Main NavSS IR outputs after ABI 3.0
Suman Anna [Mon, 4 May 2020 21:08:41 +0000 (16:08 -0500)]
am65x,am65x_sr2: rm-cfg: Fix Main NavSS IR outputs after ABI 3.0

The Main NavSS IR on AM65x SoCs has a total of 152 output interrupt
lines, out of which the first 16 are reserved for System Firmware.
The ABI 3.0 resource updates have assigned all the remaining IR
output lines to the A53 host context HOST_ID_A53_2, which is wrong.
The Main NavSS IR also supports some interrupt lines for the MCU
R5F cores (connected through MAIN2MCU LVL IR) and for each of the
3 ICSSG subsystems.

Fix up the Main NavSS IR outputs properly by adding resources for
each of the processor subsystems. The output lines [120:127] are
split equally for each of the MCU R5F cores (to support Split-mode),
leaving only 104 usable interrupts for the A53 core. The output
lines [128:151] are associated with the ICSSG subsystems.

Signed-off-by: Suman Anna <s-anna@ti.com>
11 months agoMakefile: Update firmware binaries to v2020.04
Praneeth Bajjuri [Mon, 4 May 2020 20:56:27 +0000 (20:56 +0000)]
Makefile: Update firmware binaries to v2020.04

Update the Makefile to automatically fetch and build the v2020.04
version of the sysfw binaries for all supported SoCs from
ti-linux-firmware.

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Tested-by: Suman Anna <s-anna@ti.com>
11 months agosec-cfg: Add sa2ul_config section
Dave Gerlach [Fri, 1 May 2020 00:27:07 +0000 (00:27 +0000)]
sec-cfg: Add sa2ul_config section

Update the common.h headers to add new defines from SYSFW 2020.04.

Starting from SYSFW v2020.04, an sa2ul_config section is mandatory in
the security config. Otherwise the boot fails.

Fix this by adding a section for sa2ul_config with all parameters
configured to 0.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
11 months agoMakefile: Update firmware binaries to v2020.03
Dave Gerlach [Thu, 23 Apr 2020 21:54:05 +0000 (21:54 +0000)]
Makefile: Update firmware binaries to v2020.03

Update the Makefile to automatically fetch and build the v2020.03
version of the sysfw binaries for all supported SoCs from
ti-linux-firmware.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Praneeth Bajjuri <praneeth@ti.com>
Tested-by: Suman Anna <s-anna@ti.com>
11 months agosec-cfg: Add dkek_config section
Dave Gerlach [Wed, 22 Apr 2020 21:03:49 +0000 (21:03 +0000)]
sec-cfg: Add dkek_config section

Update the common.h headers to add new defines from SYSFW 2020.03.

Starting from SYSFW v2020.03, a dkek_config section is mandatory in
the security config. Otherwise the boot fails.

Fix this by adding a section for dkek_config with HOST_ID_ALL in
allowed_hosts and allow_dkek_export_tisci set.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Tested-by: Suman Anna <s-anna@ti.com>
11 months agoam65x_sr2: Update to ABI 3.0 resource types
Dave Gerlach [Fri, 3 Apr 2020 03:01:21 +0000 (22:01 -0500)]
am65x_sr2: Update to ABI 3.0 resource types

Update the AM65x SR2 RM board configuration to use ABI 3.0 resource type
definitions.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
12 months agoMakefile: Update firmware binaries to v2020.02
Dave Gerlach [Fri, 3 Apr 2020 15:20:57 +0000 (10:20 -0500)]
Makefile: Update firmware binaries to v2020.02

Update the Makefile to automatically fetch and build the v2020.02
version of the sysfw binaries for all supported SoCs from
ti-linux-firmware.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
12 months agoj721e: Update to ABI 3.0 resource types
Nikhil Devshatwar [Tue, 24 Mar 2020 13:22:01 +0000 (18:52 +0530)]
j721e: Update to ABI 3.0 resource types

Update the J721E RM board configuration to use ABI 3.0 resource type
definitions.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
12 months agoam65x: Update to ABI 3.0 resource types
Lokesh Vutla [Tue, 24 Mar 2020 13:22:00 +0000 (18:52 +0530)]
am65x: Update to ABI 3.0 resource types

Update the AM65x RM board configuration to use ABI 3.0 resource type
definitions.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
12 months agoscripts: sysfw_boardcfg_rules.json: Update resource types
Justin Sobota [Tue, 24 Mar 2020 13:21:59 +0000 (18:51 +0530)]
scripts: sysfw_boardcfg_rules.json: Update resource types

Update the resource types by deleting old
IRQ host types and adding the new IR output
types.

The AM65x SR 1.0 types are also updated to
match AM65x SR 2.0

Also add minor fixes in scripts/sysfw_boardcfg_validator.py

Signed-off-by: Justin Sobota <jsobota@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
12 months agosoc: am65x_sr2: Introduce support for evm
Dave Gerlach [Wed, 25 Mar 2020 03:44:30 +0000 (22:44 -0500)]
soc: am65x_sr2: Introduce support for evm

Add support for AM65x SR2 SoCs which have slightly different board
configuration requirements than AM65x and also require a specific
firmware image.

Also update the SYSFW_GIT_HASH to point to the latest ti-linux-firmware
repo which contains v2019.12b SR2 binary.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
13 months agoscripts: Board configuration validation script ti2020.00 ti2020.00-rc3 ti2020.00-rc4
Justin Sobota [Wed, 26 Feb 2020 06:31:43 +0000 (12:01 +0530)]
scripts: Board configuration validation script

Adds a new script which finds the SYSFW
board configurations within a provided binary
and validates the boardcfg binary data based
on rules defined within the
sysfw_boardcfg_rules.json file.  Boardcfg
data can also be sorted based on the sort
order defined within the rules file.

Use this validation script to validate all board
configuration files.

Signed-off-by: Justin Sobota <jsobota@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
13 months agolinux-firmware: Update am65x/j721e sysfw to v2019.12b
Suman Anna [Wed, 19 Feb 2020 17:10:29 +0000 (11:10 -0600)]
linux-firmware: Update am65x/j721e sysfw to v2019.12b

Update the Makefile to automatically fetch and build the v2019.12b
version of the sysfw binaries for both AM65x and J721E SoCs.

Reviewed-by: Denys Dmytriyenko <denys@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
13 months agoMakefile: Update the default cross compiler
Lokesh Vutla [Tue, 25 Feb 2020 09:25:45 +0000 (14:55 +0530)]
Makefile: Update the default cross compiler

Starting arm gcc 9.2 the cross compiler prefix is
arm-none-linux-gnueabihf-. Reflect the same in Makefile.

Reviewed-by: Denys Dmytriyenko <denys@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
13 months agoMakefile: Include sysfw.itb as a build target
Lokesh Vutla [Tue, 25 Feb 2020 08:46:56 +0000 (14:16 +0530)]
Makefile: Include sysfw.itb as a build target

Reviewed-by: Denys Dmytriyenko <denys@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
14 months agorm-cfg: j721e: Partition generic IR resource across core0/core1 ti2019.06 ti2019.06-rc5 ti2020-rc1 ti2020.00-rc1
Nikhil Devshatwar [Thu, 23 Jan 2020 19:31:39 +0000 (01:01 +0530)]
rm-cfg: j721e: Partition generic IR resource across core0/core1

Main NAVSS interrupt router for MCU R5 subsystem is shared between
both CPU cores.

However, SYSFW models them to core specific devices where it
appears that the interrupt router is dedicated for each core.

MCU NAVSS IR is dedicated per MCU core but main NAVSS IR is not.
Due to this, drivers calling GET_RANGE gets the same range on
both cores, causing conflict in the interrupt partitioning.

Fix this by partitioning the shared interrupt pool between
MCU R5 core0 and core1.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
14 months agolinux-firmware: Update am65x/j721e sysfw to v2019.12 ti2019.06-rc4
Dan Murphy [Tue, 21 Jan 2020 00:47:22 +0000 (18:47 -0600)]
linux-firmware: Update am65x/j721e sysfw to v2019.12

Update the Makefile to automatically fetch and build the v2019.12
version of the sysfw binaries for both AM65x and J721E SoCs.

Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
14 months agoHACK: soc: j721e: Do not cross max limit for RM entries
Nikhil Devshatwar [Mon, 20 Jan 2020 18:51:16 +0000 (00:21 +0530)]
HACK: soc: j721e: Do not cross max limit for RM entries

Maximum number of entries supported in RM board config is
currently limited to 276 (2 * RESASG_UTYPE_CNT)

Any board config with more entries than this count will be
rejected and causes boot failure.

This needs to be fixed by increasing the max limit in SYSFW.
In the absence of this bugfix, restrict the number of entries
by folding all of R5, C6x, C7x host_id entries into single entry.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
14 months agosoc: j721e: Partition nonsecure proxy and ring monitors
Nikhil Devshatwar [Mon, 20 Jan 2020 18:51:15 +0000 (00:21 +0530)]
soc: j721e: Partition nonsecure proxy and ring monitors

Define the resources for non secure proxy and ring monitor
allocation across different hosts.
Update the total count of resources.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
14 months agoj721e: am65x: sec-cfg: Add otp_config section
Nikhil Devshatwar [Mon, 20 Jan 2020 18:51:14 +0000 (00:21 +0530)]
j721e: am65x: sec-cfg: Add otp_config section

Update the common.h headers to add new defines from SYSFW 2019.12.

Starting from SYSFW v2019.12, an otp_config section is mandatory in
the security config. Otherwise the boot fails.

Fix this by adding a section for opt_config with no other host
having permission to OTP array.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
14 months agoinclude: j721e: am65x: Add new types and subtypes from SYSFW 2019.12
Nikhil Devshatwar [Mon, 20 Jan 2020 18:51:13 +0000 (00:21 +0530)]
include: j721e: am65x: Add new types and subtypes from SYSFW 2019.12

Add new types and subtypes for non secure proxies and ring monitors
supported in the SYSFW 2019.12 headers.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
15 months agolinux-firmware: Update am65x/j721e sysfw to v2019.10a ti2019.06-rc3
Dan Murphy [Thu, 2 Jan 2020 18:27:28 +0000 (12:27 -0600)]
linux-firmware: Update am65x/j721e sysfw to v2019.10a

Update the Makefile to automatically fetch and build the v2019.10a
version of the sysfw binaries for both AM65x and J721E SoCs.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Andreas Dannenberg <dannenberg@ti.com>
Acked-by: Suman Anna <s-anna@ti.com>
16 months agolinux-firmware: Update am65x/j721e sysfw to v2019.10 ti2019.06-rc1 ti2019.06-rc2
Dan Murphy [Tue, 26 Nov 2019 14:24:01 +0000 (08:24 -0600)]
linux-firmware: Update am65x/j721e sysfw to v2019.10

Update the Makefile to automatically fetch and build the v2019.10
version of the sysfw binaries for both AM65x and J721E SoCs.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
17 months agobuild: Sign board configuration data on HS ti2019.05 ti2019.05-rc2 ti2019.05-rc3 ti2019.05-rc4
Andrew F. Davis [Mon, 30 Sep 2019 15:47:02 +0000 (11:47 -0400)]
build: Sign board configuration data on HS

Starting with SYSFW v2019.09 it will be required for board config
binaries to be signed to ensure trust through authentication.
Add this signing step here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
17 months agolinux-firmware: Update am65x/j721e sysfw to v2019.09 ti2019.05-rc1
Denys Dmytriyenko [Thu, 31 Oct 2019 20:39:57 +0000 (16:39 -0400)]
linux-firmware: Update am65x/j721e sysfw to v2019.09

Update the Makefile to automatically fetch and build the v2019.09
version of the sysfw binaries for both AM65x and J721E SoCs.

Signed-off-by: Denys Dmytriyenko <denys@ti.com>
19 months agolinux-firmware: Update am65x/j721e sysfw to v2019.08 ti2019.04 ti2019.04-rc1 ti2019.04-rc2 ti2019.04-rc3 ti2019.04-rc4 ti2019.04-rc5
Dan Murphy [Wed, 11 Sep 2019 14:59:42 +0000 (09:59 -0500)]
linux-firmware: Update am65x/j721e sysfw to v2019.08

Update the Makefile to automatically fetch and build the v2019.08
version of the sysfw binaries for both AM65x and J721E SoCs.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
19 months agolinux-firmware: Update am65x/j721e sysfw to v2019.07a
Dan Murphy [Tue, 3 Sep 2019 17:54:27 +0000 (12:54 -0500)]
linux-firmware: Update am65x/j721e sysfw to v2019.07a

Update the Makefile to automatically fetch and build the v2019.07a
version of the sysfw binaries for both AM65x and J721E SoCs.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
19 months agoam65x: Correct R5F core 1 Host ID
Sam Nelson [Thu, 29 Aug 2019 13:28:00 +0000 (09:28 -0400)]
am65x: Correct R5F core 1 Host ID

HOST_ID_R5_1 is to be used only with secure context.
HOST_ID_R5_2 is the right Host Id to use for R5F core 1

Fixes: 54933d505c4d ("rm-cfg: Partition interrupt resources between R5F contexts")
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Acked-by: Suman Anna <s-anna@ti.com>
19 months agobuild: Add support for enabling sysfw traces
Lokesh Vutla [Wed, 28 Aug 2019 08:59:46 +0000 (14:29 +0530)]
build: Add support for enabling sysfw traces

Sysfw provides a provision for enabling sysfw traces while booting.
This has to be enabled in board-cfg. In order to ease debug, enable
the sysfw trace support with the help of a build option. Use the
option to enable it:

$ make ENABLE_TRACE=1

Reported-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
20 months agoHACK: j721e: rm-cfg: Use HOST_ALL for ethernet firmware flows ti2019.03 ti2019.03-rc2 ti2019.03-rc3 ti2019.03-rc4
Nikhil Devshatwar [Fri, 9 Aug 2019 09:18:42 +0000 (14:48 +0530)]
HACK: j721e: rm-cfg: Use HOST_ALL for ethernet firmware flows

Ethernet firmware acts as server for providing networking functionality
to other clients. It allocates few flows from its pool for the client
and then retuns the same to the client.

Client does not own the resource it is borrowing from server and
currently SYSFW lacks any APIs to allow shared ownership of this
resource dyanmically.

In absence of such an API, mark the ethernet firmware flows are HOST_ALL
so that clients can call FLOW_CONFIG with the borrowed flow.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
20 months agoj721e: rm-cfg: Partition GPIO interrupt router
Nikhil Devshatwar [Fri, 9 Aug 2019 09:17:00 +0000 (14:47 +0530)]
j721e: rm-cfg: Partition GPIO interrupt router

Currently the Main GPIO interrupt router is only assigned to A72_2.
Partition the IR lines such that few lines are assigned to
A72_3 for usage from another Virtual machine.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
20 months agolinux-firmware: Update am65x/j721e sysfw to v2019.07 ti2019.03-rc1
Andreas Dannenberg [Tue, 6 Aug 2019 20:58:34 +0000 (15:58 -0500)]
linux-firmware: Update am65x/j721e sysfw to v2019.07

Update the Makefile to automatically fetch and build the v2019.07
version of the sysfw binaries for both AM65x and J721E SoCs.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
20 months agoam65x: rm-cfg: Add resources for secure context of MCU R5
Vignesh Raghavendra [Wed, 31 Jul 2019 08:02:05 +0000 (13:32 +0530)]
am65x: rm-cfg: Add resources for secure context of MCU R5

ROM boots up MCU R5 in secure context and R5 SPL continues to run in the
same context. In order for R5 SPL to use DMA (e.g: with OSPI) add MCU
NAVSS resources with MCU R5 secure host ID that is used by R5 SPL.

Resources allocated are same as those allocated for A53.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
20 months agoj721e: rm-cfg: Add resources for secure context of MCU R5
Vignesh Raghavendra [Fri, 19 Jul 2019 12:51:26 +0000 (18:21 +0530)]
j721e: rm-cfg: Add resources for secure context of MCU R5

ROM boots up MCU R5 in secure context and R5 SPL continues to run in the
same context. In order for R5 SPL to use DMA (e.g: with OSPI) add MCU
NAVSS resources with MCU R5 secure host ID that is used by R5 SPL.

Resources allocated are same as those allocated for non secure context.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
21 months agoj721e: board-cfg: Drop MSMC cache size from 4MB to 3MB ti2019.02 ti2019.02-rc4
Andreas Dannenberg [Thu, 11 Jul 2019 18:59:09 +0000 (13:59 -0500)]
j721e: board-cfg: Drop MSMC cache size from 4MB to 3MB

Reduce the amount of MSMC memory allocated by System Firmware for the
main compute cluster's L3 cache from 4MB to 3MB.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Sunita Nadampalli <sunitan@ti.com>
Acked-by: Carlos Hernandez <ceh@ti.com>
21 months agolinux-firmware: Update am65x/j721e sysfw to v2019.06a ti2019.02-rc3
Dan Murphy [Tue, 9 Jul 2019 20:24:07 +0000 (15:24 -0500)]
linux-firmware: Update am65x/j721e sysfw to v2019.06a

Update the Makefile to automatically fetch and build the v2019.06a
version of the sysfw binaries for both AM65x and J721E SoCs.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
21 months agoj721e: rm-cfg: Start MAIN_0_R5_2 Tx and Rx at same level
Nikhil Devshatwar [Thu, 4 Jul 2019 08:48:54 +0000 (14:18 +0530)]
j721e: rm-cfg: Start MAIN_0_R5_2 Tx and Rx at same level

Channel allocation for MAIN_0_R5_2 is done such that
Main NAV UDMA Tx and Rx channels start with different offsets.

This cannot be used for block copy carveout since the Tx and Rx channels
are not overlapping at start or end of the range.

Fix this by allocating more channels to MAIN_0_R5_0 so that the
MAIN_0_R5_2 channel ranges start at same value.

Autogen table takes care of the corresponding ring allocations as well.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
21 months agoj721e: rm-cfg: Updated 2019.02 RM config
Nikhil Devshatwar [Mon, 1 Jul 2019 08:44:40 +0000 (14:14 +0530)]
j721e: rm-cfg: Updated 2019.02 RM config

This is auto generated RM config file to describe the
resource partitioning for 2019.02 use cases.

* Assign few channels/rings for A72_3 to be used by VMs
* Assign extended channels for DRU/VPAC/DMPAC
* Adjust resources for Main R5_0_1 for ethernet firmware
* Reduce resources for R5_1_* cores since nothing is running there
* Update the resource entry count

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
21 months agolinux-firmware: Update am65x/j721e sysfw to v2019.06 ti2019.02-rc2
Suman Anna [Thu, 27 Jun 2019 00:27:48 +0000 (19:27 -0500)]
linux-firmware: Update am65x/j721e sysfw to v2019.06

Update the Makefile to automatically fetch and build the v2019.06
version of the sysfw binaries for both AM65x and J721E SoCs.

Signed-off-by: Suman Anna <s-anna@ti.com>
22 months agoMakefile: Fix HS builds by removing version reporting dependency ti2019.02-rc1
Andrew F. Davis [Tue, 11 Jun 2019 14:43:42 +0000 (10:43 -0400)]
Makefile: Fix HS builds by removing version reporting dependency

The rule for making the HS sysfw.bin file concatenates all its
dependencies, the rule for 'sysfw_version' is a phony target and does
not produce a file. Drop this dependency for HS.

While we are here lets do the same for non-HS builds. Phony targets
force the rebuilding of any rule that depends on them, this can
cause Make to perform more build steps than are actually needed.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Tested-by: Denys Dmytriyenko <denys@ti.com>
22 months agolinux-firmware: Update am65x/j721e sysfw to v2019.05
Andreas Dannenberg [Mon, 10 Jun 2019 16:57:31 +0000 (11:57 -0500)]
linux-firmware: Update am65x/j721e sysfw to v2019.05

Update the sysfw to v2019.05 from v2019.04a. Doing so also adds support
for the K3 family J721E SoCs which are now being represented with a
dedicated firmware image in the 'ti-linux-firmware' repository.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
22 months agoreadme: Update TI firmware Git repository branch name
Andreas Dannenberg [Fri, 7 Jun 2019 20:44:06 +0000 (15:44 -0500)]
readme: Update TI firmware Git repository branch name

The official TI firmware Git repository branch name to download
firmware files from including but not limited to System Firmware is
'ti-linux-firmware'. Update the readme document to reflect the same.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
22 months agoIntroduce initial J721E EVM support
Andreas Dannenberg [Wed, 5 Jun 2019 20:00:05 +0000 (15:00 -0500)]
Introduce initial J721E EVM support

Add the consolidated configuration files that were arrived at during
J721E silicon wakeup. Note that SYSFW debug trace both to memory as well
as to the UART is disabled in alignment with the production configuration
used on AM65x. If debug trace output is desired during development refer
to the SYSFW release documentation (referenced in the included README.md
file) discussion related to 'trace_dst_enables' and 'trace_src_enables'.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Nikhil Devshatwar <nikhil.nd@ti.com>
22 months agoinclude: Add J721E specific headers corresponding to SYSFW
Andreas Dannenberg [Wed, 5 Jun 2019 19:58:09 +0000 (14:58 -0500)]
include: Add J721E specific headers corresponding to SYSFW

Introduce initial J721E specific headers

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
22 months agogen_its.sh: Add SIG version and build info into the generated itb
Nishanth Menon [Sat, 18 May 2019 12:19:29 +0000 (07:19 -0500)]
gen_its.sh: Add SIG version and build info into the generated itb

Introduce the version of System Firmware Image Generator (SIG) as well
as the SOC variant and used CONFIG back into the generated image tree
blob so we can track those important aspects after deployment.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
22 months agoMakefile: Allow for builds for multiple SoCs
Andreas Dannenberg [Fri, 7 Jun 2019 19:21:08 +0000 (14:21 -0500)]
Makefile: Allow for builds for multiple SoCs

Allow for multiple SoCs to be built and object file names per SoC.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
22 months agocommon.h: Move to be inside include folder
Nishanth Menon [Sat, 18 May 2019 12:19:34 +0000 (07:19 -0500)]
common.h: Move to be inside include folder

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
22 months agocommon.h: Drop all AM65x specific header definitions
Nishanth Menon [Sat, 18 May 2019 12:19:32 +0000 (07:19 -0500)]
common.h: Drop all AM65x specific header definitions

Drop all the AM65x specific header definitions

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
22 months agocommon.h: Make board config data structure names generic
Nishanth Menon [Sat, 18 May 2019 12:19:31 +0000 (07:19 -0500)]
common.h: Make board config data structure names generic

Rename board config data structures for better alignment as well as
to be SoC independent. While at it drop the exporting of those data
structures that was inherited from a previous project which is no
longer necessary.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>