1 /*
2 * K3 SoC detection and helper apis
3 *
4 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
5 * Lokesh Vutla <lokeshvutla@ti.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the
17 * distribution.
18 *
19 * Neither the name of Texas Instruments Incorporated nor the names of
20 * its contributors may be used to endorse or promote products derived
21 * from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
26 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
27 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
29 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
36 #include <socinfo.h>
37 #include <mmio.h>
38 #include <string.h>
39 #include <sec_proxy.h>
40 #include <soc/am65x/am65x_host_info.h>
41 #include <soc/am65x/am65x_sec_proxy_info.h>
42 #include <soc/am65x/am65x_processors_info.h>
43 #include <soc/am65x/am65x_devices_info.h>
44 #include <soc/am65x/am65x_clocks_info.h>
45 #include <soc/am65x/am65x_rm_info.h>
46 #include <soc/am65x_sr2/am65x_sr2_host_info.h>
47 #include <soc/am65x_sr2/am65x_sr2_sec_proxy_info.h>
48 #include <soc/am65x_sr2/am65x_sr2_processors_info.h>
49 #include <soc/am65x_sr2/am65x_sr2_devices_info.h>
50 #include <soc/am65x_sr2/am65x_sr2_clocks_info.h>
51 #include <soc/am65x_sr2/am65x_sr2_rm_info.h>
52 #include <soc/j721e/j721e_host_info.h>
53 #include <soc/j721e/j721e_sec_proxy_info.h>
54 #include <soc/j721e/j721e_processors_info.h>
55 #include <soc/j721e/j721e_devices_info.h>
56 #include <soc/j721e/j721e_clocks_info.h>
57 #include <soc/j721e/j721e_rm_info.h>
58 #include <soc/j7200/j7200_host_info.h>
59 #include <soc/j7200/j7200_sec_proxy_info.h>
60 #include <soc/j7200/j7200_processors_info.h>
61 #include <soc/j7200/j7200_devices_info.h>
62 #include <soc/j7200/j7200_clocks_info.h>
63 #include <soc/j7200/j7200_rm_info.h>
64 #include <soc/am64x/am64x_host_info.h>
65 #include <soc/am64x/am64x_sec_proxy_info.h>
66 #include <soc/am64x/am64x_processors_info.h>
67 #include <soc/am64x/am64x_devices_info.h>
68 #include <soc/am64x/am64x_clocks_info.h>
69 #include <soc/am64x/am64x_rm_info.h>
70 #include <soc/am62x/am62x_devices_info.h>
71 #include <soc/am62x/am62x_clocks_info.h>
72 #include <soc/am62x/am62x_host_info.h>
73 #include <soc/am62x/am62x_processors_info.h>
74 #include <soc/am62x/am62x_rm_info.h>
75 #include <soc/am62x/am62x_sec_proxy_info.h>
77 /* Assuming these addresses and definitions stay common across K3 devices */
78 #define CTRLMMR_WKUP_JTAG_DEVICE_ID 0x43000018
79 #define DEVICE_ID_FAMILY_SHIFT 26
80 #define DEVICE_ID_FAMILY_MASK (0x3f << 26)
81 #define DEVICE_ID_BASE_SHIFT 11
82 #define DEVICE_ID_BASE_MASK (0x1fff << 11)
83 #define DEVICE_ID_SPEED_SHIFT 6
84 #define DEVICE_ID_SPEED_MASK (0x1f << 6)
85 #define DEVICE_ID_TEMP_SHIFT 3
86 #define DEVICE_ID_TEMP_MASK (0x7 << 3)
88 #define CTRLMMR_WKUP_JTAG_ID 0x43000014
89 #define JTAG_ID_VARIANT_SHIFT 28
90 #define JTAG_ID_VARIANT_MASK (0xf << 28)
91 #define JTAG_ID_PARTNO_SHIFT 12
92 #define JTAG_ID_PARTNO_MASK (0xffff << 12)
94 #define CTRLMMR_WKUP_DIE_ID0 0x43000020
95 #define CTRLMMR_WKUP_DIE_ID1 0x43000024
96 #define CTRLMMR_WKUP_DIE_ID2 0x43000028
97 #define CTRLMMR_WKUP_DIE_ID3 0x4300002c
98 #define CTRLMMR_WKUP_DEVSTAT 0x43000030
99 #define CTRLMMR_WKUP_BOOTCFG 0x43000034
101 struct k3conf_soc_info soc_info;
103 static const char soc_revision[REV_PG_MAX + 1][SOC_REVISION_MAX_LENGTH] = {
104 [REV_SR1_0] = "1.0",
105 [REV_SR2_0] = "2.0",
106 [REV_PG_MAX] = "NULL"
107 };
109 static void am654_init(void)
110 {
111 struct ti_sci_info *sci_info = &soc_info.sci_info;
113 sci_info->host_info = am65x_host_info;
114 sci_info->num_hosts = AM65X_MAX_HOST_IDS;
115 sci_info->sp_info[MAIN_SEC_PROXY] = am65x_main_sp_info;
116 sci_info->num_sp_threads[MAIN_SEC_PROXY] = AM65X_MAIN_SEC_PROXY_THREADS;
117 sci_info->sp_info[MCU_SEC_PROXY] = am65x_mcu_sp_info;
118 sci_info->num_sp_threads[MCU_SEC_PROXY] = AM65X_MCU_SEC_PROXY_THREADS;
119 sci_info->processors_info = am65x_processors_info;
120 sci_info->num_processors = AM65X_MAX_PROCESSORS_IDS;
121 sci_info->devices_info = am65x_devices_info;
122 sci_info->num_devices = AM65X_MAX_DEVICES;
123 sci_info->clocks_info = am65x_clocks_info;
124 sci_info->num_clocks = AM65X_MAX_CLOCKS;
125 sci_info->rm_info = am65x_rm_info;
126 sci_info->num_res = AM65X_MAX_RES;
127 soc_info.host_id = DEFAULT_HOST_ID;
128 soc_info.sec_proxy = &k3_generic_sec_proxy_base;
129 }
131 static void am654_sr2_init(void)
132 {
133 struct ti_sci_info *sci_info = &soc_info.sci_info;
135 sci_info->host_info = am65x_sr2_host_info;
136 sci_info->num_hosts = AM65X_SR2_MAX_HOST_IDS;
137 sci_info->sp_info[MAIN_SEC_PROXY] = am65x_sr2_main_sp_info;
138 sci_info->num_sp_threads[MAIN_SEC_PROXY] = AM65X_SR2_MAIN_SEC_PROXY_THREADS;
139 sci_info->sp_info[MCU_SEC_PROXY] = am65x_sr2_mcu_sp_info;
140 sci_info->num_sp_threads[MCU_SEC_PROXY] = AM65X_SR2_MCU_SEC_PROXY_THREADS;
141 sci_info->processors_info = am65x_sr2_processors_info;
142 sci_info->num_processors = AM65X_SR2_MAX_PROCESSORS_IDS;
143 sci_info->devices_info = am65x_sr2_devices_info;
144 sci_info->num_devices = AM65X_SR2_MAX_DEVICES;
145 sci_info->clocks_info = am65x_sr2_clocks_info;
146 sci_info->num_clocks = AM65X_SR2_MAX_CLOCKS;
147 sci_info->rm_info = am65x_sr2_rm_info;
148 sci_info->num_res = AM65X_SR2_MAX_RES;
149 soc_info.host_id = DEFAULT_HOST_ID;
150 soc_info.sec_proxy = &k3_generic_sec_proxy_base;
151 }
153 static void j721e_init(void)
154 {
155 struct ti_sci_info *sci_info = &soc_info.sci_info;
157 sci_info->host_info = j721e_host_info;
158 sci_info->num_hosts = J721E_MAX_HOST_IDS;
159 sci_info->sp_info[MAIN_SEC_PROXY] = j721e_main_sp_info;
160 sci_info->num_sp_threads[MAIN_SEC_PROXY] = J721E_MAIN_SEC_PROXY_THREADS;
161 sci_info->sp_info[MCU_SEC_PROXY] = j721e_mcu_sp_info;
162 sci_info->num_sp_threads[MCU_SEC_PROXY] = J721E_MCU_SEC_PROXY_THREADS;
163 sci_info->processors_info = j721e_processors_info;
164 sci_info->num_processors = J721E_MAX_PROCESSORS_IDS;
165 sci_info->devices_info = j721e_devices_info;
166 sci_info->num_devices = J721E_MAX_DEVICES;
167 sci_info->clocks_info = j721e_clocks_info;
168 sci_info->num_clocks = J721E_MAX_CLOCKS;
169 sci_info->rm_info = j721e_rm_info;
170 sci_info->num_res = J721E_MAX_RES;
171 soc_info.host_id = DEFAULT_HOST_ID;
172 soc_info.sec_proxy = &k3_generic_sec_proxy_base;
173 }
175 static void j7200_init(void)
176 {
177 struct ti_sci_info *sci_info = &soc_info.sci_info;
179 sci_info->host_info = j7200_host_info;
180 sci_info->num_hosts = J7200_MAX_HOST_IDS;
181 sci_info->sp_info[MAIN_SEC_PROXY] = j7200_main_sp_info;
182 sci_info->num_sp_threads[MAIN_SEC_PROXY] = J7200_MAIN_SEC_PROXY_THREADS;
183 sci_info->sp_info[MCU_SEC_PROXY] = j7200_mcu_sp_info;
184 sci_info->num_sp_threads[MCU_SEC_PROXY] = J7200_MCU_SEC_PROXY_THREADS;
185 sci_info->processors_info = j7200_processors_info;
186 sci_info->num_processors = J7200_MAX_PROCESSORS_IDS;
187 sci_info->devices_info = j7200_devices_info;
188 sci_info->num_devices = J7200_MAX_DEVICES;
189 sci_info->clocks_info = j7200_clocks_info;
190 sci_info->num_clocks = J7200_MAX_CLOCKS;
191 sci_info->rm_info = j7200_rm_info;
192 sci_info->num_res = J7200_MAX_RES;
193 soc_info.host_id = DEFAULT_HOST_ID;
194 soc_info.sec_proxy = &k3_generic_sec_proxy_base;
195 }
197 static void am64x_init(void)
198 {
199 struct ti_sci_info *sci_info = &soc_info.sci_info;
201 sci_info->host_info = am64x_host_info;
202 sci_info->num_hosts = AM64X_MAX_HOST_IDS;
203 sci_info->sp_info[MAIN_SEC_PROXY] = am64x_main_sp_info;
204 sci_info->num_sp_threads[MAIN_SEC_PROXY] = AM64X_MAIN_SEC_PROXY_THREADS;
205 sci_info->sp_info[MCU_SEC_PROXY] = NULL;
206 sci_info->num_sp_threads[MCU_SEC_PROXY] = 0;
207 sci_info->processors_info = am64x_processors_info;
208 sci_info->num_processors = AM64X_MAX_PROCESSORS_IDS;
209 sci_info->devices_info = am64x_devices_info;
210 sci_info->num_devices = AM64X_MAX_DEVICES;
211 sci_info->clocks_info = am64x_clocks_info;
212 sci_info->num_clocks = AM64X_MAX_CLOCKS;
213 sci_info->rm_info = am64x_rm_info;
214 sci_info->num_res = AM64X_MAX_RES;
215 soc_info.host_id = 13;
216 soc_info.sec_proxy = &k3_lite_sec_proxy_base;
217 }
219 static void am62x_init(void)
220 {
221 struct ti_sci_info *sci_info = &soc_info.sci_info;
223 sci_info->sp_info[MAIN_SEC_PROXY] = am62x_main_sp_info;
224 sci_info->num_sp_threads[MAIN_SEC_PROXY] = AM62X_MAIN_SEC_PROXY_THREADS;
225 sci_info->sp_info[MCU_SEC_PROXY] = NULL;
226 sci_info->num_sp_threads[MCU_SEC_PROXY] = 0;
227 sci_info->rm_info = am62x_rm_info;
228 sci_info->num_res = AM62X_MAX_RES;
229 sci_info->processors_info = am62x_processors_info;
230 sci_info->num_processors = AM62X_MAX_PROCESSORS_IDS;
231 sci_info->host_info = am62x_host_info;
232 sci_info->num_hosts = AM62X_MAX_HOST_IDS;
233 sci_info->devices_info = am62x_devices_info;
234 sci_info->num_devices = AM62X_MAX_DEVICES;
235 sci_info->clocks_info = am62x_clocks_info;
236 sci_info->num_clocks = AM62X_MAX_CLOCKS;
237 soc_info.host_id = 13;
238 soc_info.sec_proxy = &k3_lite_sec_proxy_base;
239 }
241 int soc_init(uint32_t host_id)
242 {
243 char *name;
245 memset(&soc_info, 0, sizeof(soc_info));
247 soc_info.soc = (mmio_read_32(CTRLMMR_WKUP_JTAG_ID) &
248 JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT;
249 soc_info.rev = (mmio_read_32(CTRLMMR_WKUP_JTAG_ID) &
250 JTAG_ID_VARIANT_MASK) >> JTAG_ID_VARIANT_SHIFT;
252 switch (soc_info.soc) {
253 case AM65X:
254 name = "AM65x";
255 break;
256 case J721E:
257 name = "J721E";
258 break;
259 case J7200:
260 name = "J7200";
261 break;
262 case AM64X:
263 name = "AM64x";
264 break;
265 case AM62X:
266 name = "AM62X";
267 break;
268 default:
269 fprintf(stderr, "Unknown Silicon %d\n", soc_info.soc);
270 return -1;
271 };
273 if (soc_info.rev > REV_PG_MAX) {
274 fprintf(stderr, "Unknown Silicon revision %d for SoC %s\n",
275 soc_info.rev, name);
276 return -1;
277 }
279 strncpy(soc_info.soc_full_name, "", sizeof(soc_info.soc_full_name));
280 strcat(soc_info.soc_full_name, name);
281 strcat(soc_info.soc_full_name, " SR");
282 strcat(soc_info.soc_full_name, soc_revision[soc_info.rev]);
284 if (soc_info.soc == AM65X && soc_info.rev == REV_SR1_0)
285 am654_init();
286 else if (soc_info.soc == AM65X && soc_info.rev == REV_SR2_0)
287 am654_sr2_init();
288 else if (soc_info.soc == J721E)
289 j721e_init();
290 else if (soc_info.soc == J7200)
291 j7200_init();
292 else if (soc_info.soc == AM64X)
293 am64x_init();
294 else if (soc_info.soc == AM62X)
295 am62x_init();
297 if (host_id != INVALID_HOST_ID)
298 soc_info.host_id = host_id;
300 /* ToDo: Add error if sec_proxy_init/sci_init is failed */
301 if(!k3_sec_proxy_init())
302 if (!ti_sci_init())
303 soc_info.ti_sci_enabled = 1;
305 return 0;
306 }
308 int soc_is_j721e(void)
309 {
310 return soc_info.soc == J721E;
311 }
313 int soc_is_am654(void)
314 {
315 return soc_info.soc == AM65X;
316 }