1 /*
2 * K3 SoC detection and helper apis
3 *
4 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
5 * Lokesh Vutla <lokeshvutla@ti.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the
17 * distribution.
18 *
19 * Neither the name of Texas Instruments Incorporated nor the names of
20 * its contributors may be used to endorse or promote products derived
21 * from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
26 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
27 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
29 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
36 #include <socinfo.h>
37 #include <mmio.h>
38 #include <string.h>
39 #include <sec_proxy.h>
40 #include <soc/am65x/am65x_host_info.h>
41 #include <soc/am65x/am65x_sec_proxy_info.h>
42 #include <soc/am65x/am65x_processors_info.h>
43 #include <soc/am65x/am65x_devices_info.h>
44 #include <soc/am65x/am65x_clocks_info.h>
45 #include <soc/am65x/am65x_rm_info.h>
46 #include <soc/am65x_sr2/am65x_sr2_host_info.h>
47 #include <soc/am65x_sr2/am65x_sr2_sec_proxy_info.h>
48 #include <soc/am65x_sr2/am65x_sr2_processors_info.h>
49 #include <soc/am65x_sr2/am65x_sr2_devices_info.h>
50 #include <soc/am65x_sr2/am65x_sr2_clocks_info.h>
51 #include <soc/am65x_sr2/am65x_sr2_rm_info.h>
52 #include <soc/j721e/j721e_host_info.h>
53 #include <soc/j721e/j721e_sec_proxy_info.h>
54 #include <soc/j721e/j721e_processors_info.h>
55 #include <soc/j721e/j721e_devices_info.h>
56 #include <soc/j721e/j721e_clocks_info.h>
57 #include <soc/j721e/j721e_rm_info.h>
58 #include <soc/j7200/j7200_host_info.h>
59 #include <soc/j7200/j7200_sec_proxy_info.h>
60 #include <soc/j7200/j7200_processors_info.h>
61 #include <soc/j7200/j7200_devices_info.h>
62 #include <soc/j7200/j7200_clocks_info.h>
63 #include <soc/j7200/j7200_rm_info.h>
64 #include <soc/am64x/am64x_host_info.h>
66 /* Assuming these addresses and definitions stay common across K3 devices */
67 #define CTRLMMR_WKUP_JTAG_DEVICE_ID 0x43000018
68 #define DEVICE_ID_FAMILY_SHIFT 26
69 #define DEVICE_ID_FAMILY_MASK (0x3f << 26)
70 #define DEVICE_ID_BASE_SHIFT 11
71 #define DEVICE_ID_BASE_MASK (0x1fff << 11)
72 #define DEVICE_ID_SPEED_SHIFT 6
73 #define DEVICE_ID_SPEED_MASK (0x1f << 6)
74 #define DEVICE_ID_TEMP_SHIFT 3
75 #define DEVICE_ID_TEMP_MASK (0x7 << 3)
77 #define CTRLMMR_WKUP_JTAG_ID 0x43000014
78 #define JTAG_ID_VARIANT_SHIFT 28
79 #define JTAG_ID_VARIANT_MASK (0xf << 28)
80 #define JTAG_ID_PARTNO_SHIFT 12
81 #define JTAG_ID_PARTNO_MASK (0xffff << 12)
83 #define CTRLMMR_WKUP_DIE_ID0 0x43000020
84 #define CTRLMMR_WKUP_DIE_ID1 0x43000024
85 #define CTRLMMR_WKUP_DIE_ID2 0x43000028
86 #define CTRLMMR_WKUP_DIE_ID3 0x4300002c
87 #define CTRLMMR_WKUP_DEVSTAT 0x43000030
88 #define CTRLMMR_WKUP_BOOTCFG 0x43000034
90 struct k3conf_soc_info soc_info;
92 static const char soc_revision[REV_PG_MAX + 1][SOC_REVISION_MAX_LENGTH] = {
93 [REV_SR1_0] = "1.0",
94 [REV_SR2_0] = "2.0",
95 [REV_PG_MAX] = "NULL"
96 };
98 static void am654_init(void)
99 {
100 struct ti_sci_info *sci_info = &soc_info.sci_info;
102 sci_info->host_info = am65x_host_info;
103 sci_info->num_hosts = AM65X_MAX_HOST_IDS;
104 sci_info->sp_info[MAIN_SEC_PROXY] = am65x_main_sp_info;
105 sci_info->num_sp_threads[MAIN_SEC_PROXY] = AM65X_MAIN_SEC_PROXY_THREADS;
106 sci_info->sp_info[MCU_SEC_PROXY] = am65x_mcu_sp_info;
107 sci_info->num_sp_threads[MCU_SEC_PROXY] = AM65X_MCU_SEC_PROXY_THREADS;
108 sci_info->processors_info = am65x_processors_info;
109 sci_info->num_processors = AM65X_MAX_PROCESSORS_IDS;
110 sci_info->devices_info = am65x_devices_info;
111 sci_info->num_devices = AM65X_MAX_DEVICES;
112 sci_info->clocks_info = am65x_clocks_info;
113 sci_info->num_clocks = AM65X_MAX_CLOCKS;
114 sci_info->rm_info = am65x_rm_info;
115 sci_info->num_res = AM65X_MAX_RES;
116 soc_info.host_id = DEFAULT_HOST_ID;
117 soc_info.sec_proxy = &k3_generic_sec_proxy_base;
118 }
120 static void am654_sr2_init(void)
121 {
122 struct ti_sci_info *sci_info = &soc_info.sci_info;
124 sci_info->host_info = am65x_sr2_host_info;
125 sci_info->num_hosts = AM65X_SR2_MAX_HOST_IDS;
126 sci_info->sp_info[MAIN_SEC_PROXY] = am65x_sr2_main_sp_info;
127 sci_info->num_sp_threads[MAIN_SEC_PROXY] = AM65X_SR2_MAIN_SEC_PROXY_THREADS;
128 sci_info->sp_info[MCU_SEC_PROXY] = am65x_sr2_mcu_sp_info;
129 sci_info->num_sp_threads[MCU_SEC_PROXY] = AM65X_SR2_MCU_SEC_PROXY_THREADS;
130 sci_info->processors_info = am65x_sr2_processors_info;
131 sci_info->num_processors = AM65X_SR2_MAX_PROCESSORS_IDS;
132 sci_info->devices_info = am65x_sr2_devices_info;
133 sci_info->num_devices = AM65X_SR2_MAX_DEVICES;
134 sci_info->clocks_info = am65x_sr2_clocks_info;
135 sci_info->num_clocks = AM65X_SR2_MAX_CLOCKS;
136 sci_info->rm_info = am65x_sr2_rm_info;
137 sci_info->num_res = AM65X_SR2_MAX_RES;
138 soc_info.host_id = DEFAULT_HOST_ID;
139 soc_info.sec_proxy = &k3_generic_sec_proxy_base;
140 }
142 static void j721e_init(void)
143 {
144 struct ti_sci_info *sci_info = &soc_info.sci_info;
146 sci_info->host_info = j721e_host_info;
147 sci_info->num_hosts = J721E_MAX_HOST_IDS;
148 sci_info->sp_info[MAIN_SEC_PROXY] = j721e_main_sp_info;
149 sci_info->num_sp_threads[MAIN_SEC_PROXY] = J721E_MAIN_SEC_PROXY_THREADS;
150 sci_info->sp_info[MCU_SEC_PROXY] = j721e_mcu_sp_info;
151 sci_info->num_sp_threads[MCU_SEC_PROXY] = J721E_MCU_SEC_PROXY_THREADS;
152 sci_info->processors_info = j721e_processors_info;
153 sci_info->num_processors = J721E_MAX_PROCESSORS_IDS;
154 sci_info->devices_info = j721e_devices_info;
155 sci_info->num_devices = J721E_MAX_DEVICES;
156 sci_info->clocks_info = j721e_clocks_info;
157 sci_info->num_clocks = J721E_MAX_CLOCKS;
158 sci_info->rm_info = j721e_rm_info;
159 sci_info->num_res = J721E_MAX_RES;
160 soc_info.host_id = DEFAULT_HOST_ID;
161 soc_info.sec_proxy = &k3_generic_sec_proxy_base;
162 }
164 static void j7200_init(void)
165 {
166 struct ti_sci_info *sci_info = &soc_info.sci_info;
168 sci_info->host_info = j7200_host_info;
169 sci_info->num_hosts = J7200_MAX_HOST_IDS;
170 sci_info->sp_info[MAIN_SEC_PROXY] = j7200_main_sp_info;
171 sci_info->num_sp_threads[MAIN_SEC_PROXY] = J7200_MAIN_SEC_PROXY_THREADS;
172 sci_info->sp_info[MCU_SEC_PROXY] = j7200_mcu_sp_info;
173 sci_info->num_sp_threads[MCU_SEC_PROXY] = J7200_MCU_SEC_PROXY_THREADS;
174 sci_info->processors_info = j7200_processors_info;
175 sci_info->num_processors = J7200_MAX_PROCESSORS_IDS;
176 sci_info->devices_info = j7200_devices_info;
177 sci_info->num_devices = J7200_MAX_DEVICES;
178 sci_info->clocks_info = j7200_clocks_info;
179 sci_info->num_clocks = J7200_MAX_CLOCKS;
180 sci_info->rm_info = j7200_rm_info;
181 sci_info->num_res = J7200_MAX_RES;
182 soc_info.host_id = DEFAULT_HOST_ID;
183 soc_info.sec_proxy = &k3_generic_sec_proxy_base;
184 }
186 static void am64x_init(void)
187 {
188 struct ti_sci_info *sci_info = &soc_info.sci_info;
190 sci_info->host_info = am64x_host_info;
191 sci_info->num_hosts = AM64X_MAX_HOST_IDS;
192 soc_info.host_id = 13;
193 soc_info.sec_proxy = &k3_lite_sec_proxy_base;
194 }
196 int soc_init(uint32_t host_id)
197 {
198 char *name;
200 memset(&soc_info, 0, sizeof(soc_info));
202 soc_info.soc = (mmio_read_32(CTRLMMR_WKUP_JTAG_ID) &
203 JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT;
204 soc_info.rev = (mmio_read_32(CTRLMMR_WKUP_JTAG_ID) &
205 JTAG_ID_VARIANT_MASK) >> JTAG_ID_VARIANT_SHIFT;
207 switch (soc_info.soc) {
208 case AM65X:
209 name = "AM65x";
210 break;
211 case J721E:
212 name = "J721E";
213 break;
214 case J7200:
215 name = "J7200";
216 break;
217 case AM64X:
218 name = "AM64x";
219 break;
220 default:
221 fprintf(stderr, "Unknown Silicon %d\n", soc_info.soc);
222 return -1;
223 };
225 if (soc_info.rev > REV_PG_MAX) {
226 fprintf(stderr, "Unknown Silicon revision %d for SoC %s\n",
227 soc_info.rev, name);
228 return -1;
229 }
231 strncpy(soc_info.soc_full_name, "", sizeof(soc_info.soc_full_name));
232 strcat(soc_info.soc_full_name, name);
233 strcat(soc_info.soc_full_name, " SR");
234 strcat(soc_info.soc_full_name, soc_revision[soc_info.rev]);
236 if (soc_info.soc == AM65X && soc_info.rev == REV_SR1_0)
237 am654_init();
238 else if (soc_info.soc == AM65X && soc_info.rev == REV_SR2_0)
239 am654_sr2_init();
240 else if (soc_info.soc == J721E)
241 j721e_init();
242 else if (soc_info.soc == J7200)
243 j7200_init();
244 else if (soc_info.soc == AM64X)
245 am64x_init();
247 if (host_id != INVALID_HOST_ID)
248 soc_info.host_id = host_id;
250 /* ToDo: Add error if sec_proxy_init/sci_init is failed */
251 if(!k3_sec_proxy_init())
252 if (!ti_sci_init())
253 soc_info.ti_sci_enabled = 1;
255 return 0;
256 }
258 int soc_is_j721e(void)
259 {
260 return soc_info.soc == J721E;
261 }
263 int soc_is_am654(void)
264 {
265 return soc_info.soc == AM65X;
266 }