Bump up version to 0.2
[k3conf/k3conf.git] / soc / am64x / am64x_devices_info.c
1 /*
2  * AM64X Devices Info
3  *
4  * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
5  *
6  *  Redistribution and use in source and binary forms, with or without
7  *  modification, are permitted provided that the following conditions
8  *  are met:
9  *
10  *    Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  *
13  *    Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the
16  *    distribution.
17  *
18  *    Neither the name of Texas Instruments Incorporated nor the names of
19  *    its contributors may be used to endorse or promote products derived
20  *    from this software without specific prior written permission.
21  *
22  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
35 #include <tisci.h>
36 #include <socinfo.h>
38 struct ti_sci_devices_info am64x_devices_info[] = {
39         [0] = {0, "AM64X_DEV_ADC0"},
40         [1] = {1, "AM64X_DEV_CMP_EVENT_INTROUTER0"},
41         [2] = {2, "AM64X_DEV_DBGSUSPENDROUTER0"},
42         [3] = {3, "AM64X_DEV_MAIN_GPIOMUX_INTROUTER0"},
43         [4] = {5, "AM64X_DEV_MCU_MCU_GPIOMUX_INTROUTER0"},
44         [5] = {6, "AM64X_DEV_TIMESYNC_EVENT_INTROUTER0"},
45         [6] = {7, "AM64X_DEV_MCU_M4FSS0"},
46         [7] = {9, "AM64X_DEV_MCU_M4FSS0_CORE0"},
47         [8] = {13, "AM64X_DEV_CPSW0"},
48         [9] = {14, "AM64X_DEV_CPT2_AGGR0"},
49         [10] = {15, "AM64X_DEV_STM0"},
50         [11] = {16, "AM64X_DEV_DCC0"},
51         [12] = {17, "AM64X_DEV_DCC1"},
52         [13] = {18, "AM64X_DEV_DCC2"},
53         [14] = {19, "AM64X_DEV_DCC3"},
54         [15] = {20, "AM64X_DEV_DCC4"},
55         [16] = {21, "AM64X_DEV_DCC5"},
56         [17] = {22, "AM64X_DEV_DMSC0"},
57         [18] = {23, "AM64X_DEV_MCU_DCC0"},
58         [19] = {24, "AM64X_DEV_DEBUGSS_WRAP0"},
59         [20] = {25, "AM64X_DEV_DMASS0"},
60         [21] = {26, "AM64X_DEV_DMASS0_BCDMA_0"},
61         [22] = {27, "AM64X_DEV_DMASS0_CBASS_0"},
62         [23] = {28, "AM64X_DEV_DMASS0_INTAGGR_0"},
63         [24] = {29, "AM64X_DEV_DMASS0_IPCSS_0"},
64         [25] = {30, "AM64X_DEV_DMASS0_PKTDMA_0"},
65         [26] = {31, "AM64X_DEV_DMASS0_PSILCFG_0"},
66         [27] = {32, "AM64X_DEV_DMASS0_PSILSS_0"},
67         [28] = {33, "AM64X_DEV_DMASS0_RINGACC_0"},
68         [29] = {35, "AM64X_DEV_MCU_TIMER0"},
69         [30] = {36, "AM64X_DEV_TIMER0"},
70         [31] = {37, "AM64X_DEV_TIMER1"},
71         [32] = {38, "AM64X_DEV_TIMER2"},
72         [33] = {39, "AM64X_DEV_TIMER3"},
73         [34] = {40, "AM64X_DEV_TIMER4"},
74         [35] = {41, "AM64X_DEV_TIMER5"},
75         [36] = {42, "AM64X_DEV_TIMER6"},
76         [37] = {43, "AM64X_DEV_TIMER7"},
77         [38] = {44, "AM64X_DEV_TIMER8"},
78         [39] = {45, "AM64X_DEV_TIMER9"},
79         [40] = {46, "AM64X_DEV_TIMER10"},
80         [41] = {47, "AM64X_DEV_TIMER11"},
81         [42] = {48, "AM64X_DEV_MCU_TIMER1"},
82         [43] = {49, "AM64X_DEV_MCU_TIMER2"},
83         [44] = {50, "AM64X_DEV_MCU_TIMER3"},
84         [45] = {51, "AM64X_DEV_ECAP0"},
85         [46] = {52, "AM64X_DEV_ECAP1"},
86         [47] = {53, "AM64X_DEV_ECAP2"},
87         [48] = {54, "AM64X_DEV_ELM0"},
88         [49] = {55, "AM64X_DEV_EMIF_DATA_0_VD"},
89         [50] = {57, "AM64X_DEV_MMCSD0"},
90         [51] = {58, "AM64X_DEV_MMCSD1"},
91         [52] = {59, "AM64X_DEV_EQEP0"},
92         [53] = {60, "AM64X_DEV_EQEP1"},
93         [54] = {61, "AM64X_DEV_GTC0"},
94         [55] = {62, "AM64X_DEV_EQEP2"},
95         [56] = {63, "AM64X_DEV_ESM0"},
96         [57] = {64, "AM64X_DEV_MCU_ESM0"},
97         [58] = {65, "AM64X_DEV_FSIRX0"},
98         [59] = {66, "AM64X_DEV_FSIRX1"},
99         [60] = {67, "AM64X_DEV_FSIRX2"},
100         [61] = {68, "AM64X_DEV_FSIRX3"},
101         [62] = {69, "AM64X_DEV_FSIRX4"},
102         [63] = {70, "AM64X_DEV_FSIRX5"},
103         [64] = {71, "AM64X_DEV_FSITX0"},
104         [65] = {72, "AM64X_DEV_FSITX1"},
105         [66] = {73, "AM64X_DEV_FSS0"},
106         [67] = {74, "AM64X_DEV_FSS0_FSAS_0"},
107         [68] = {75, "AM64X_DEV_FSS0_OSPI_0"},
108         [69] = {76, "AM64X_DEV_GICSS0"},
109         [70] = {77, "AM64X_DEV_GPIO0"},
110         [71] = {78, "AM64X_DEV_GPIO1"},
111         [72] = {79, "AM64X_DEV_MCU_GPIO0"},
112         [73] = {80, "AM64X_DEV_GPMC0"},
113         [74] = {81, "AM64X_DEV_PRU_ICSSG0"},
114         [75] = {82, "AM64X_DEV_PRU_ICSSG1"},
115         [76] = {83, "AM64X_DEV_LED0"},
116         [77] = {84, "AM64X_DEV_CPTS0"},
117         [78] = {85, "AM64X_DEV_DDPA0"},
118         [79] = {86, "AM64X_DEV_EPWM0"},
119         [80] = {87, "AM64X_DEV_EPWM1"},
120         [81] = {88, "AM64X_DEV_EPWM2"},
121         [82] = {89, "AM64X_DEV_EPWM3"},
122         [83] = {90, "AM64X_DEV_EPWM4"},
123         [84] = {91, "AM64X_DEV_EPWM5"},
124         [85] = {92, "AM64X_DEV_EPWM6"},
125         [86] = {93, "AM64X_DEV_EPWM7"},
126         [87] = {94, "AM64X_DEV_EPWM8"},
127         [88] = {95, "AM64X_DEV_VTM0"},
128         [89] = {96, "AM64X_DEV_MAILBOX0"},
129         [90] = {97, "AM64X_DEV_MAIN2MCU_VD"},
130         [91] = {98, "AM64X_DEV_MCAN0"},
131         [92] = {99, "AM64X_DEV_MCAN1"},
132         [93] = {100, "AM64X_DEV_MCU_MCRC64_0"},
133         [94] = {101, "AM64X_DEV_MCU2MAIN_VD"},
134         [95] = {102, "AM64X_DEV_I2C0"},
135         [96] = {103, "AM64X_DEV_I2C1"},
136         [97] = {104, "AM64X_DEV_I2C2"},
137         [98] = {105, "AM64X_DEV_I2C3"},
138         [99] = {106, "AM64X_DEV_MCU_I2C0"},
139         [100] = {107, "AM64X_DEV_MCU_I2C1"},
140         [101] = {108, "AM64X_DEV_MSRAM_256K0"},
141         [102] = {109, "AM64X_DEV_MSRAM_256K1"},
142         [103] = {110, "AM64X_DEV_MSRAM_256K2"},
143         [104] = {111, "AM64X_DEV_MSRAM_256K3"},
144         [105] = {112, "AM64X_DEV_MSRAM_256K4"},
145         [106] = {113, "AM64X_DEV_MSRAM_256K5"},
146         [107] = {114, "AM64X_DEV_PCIE0"},
147         [108] = {115, "AM64X_DEV_POSTDIV1_16FFT1"},
148         [109] = {116, "AM64X_DEV_POSTDIV4_16FF0"},
149         [110] = {117, "AM64X_DEV_POSTDIV4_16FF2"},
150         [111] = {118, "AM64X_DEV_PSRAMECC0"},
151         [112] = {119, "AM64X_DEV_R5FSS0"},
152         [113] = {120, "AM64X_DEV_R5FSS1"},
153         [114] = {121, "AM64X_DEV_R5FSS0_CORE0"},
154         [115] = {122, "AM64X_DEV_R5FSS0_CORE1"},
155         [116] = {123, "AM64X_DEV_R5FSS1_CORE0"},
156         [117] = {124, "AM64X_DEV_R5FSS1_CORE1"},
157         [118] = {125, "AM64X_DEV_RTI0"},
158         [119] = {126, "AM64X_DEV_RTI1"},
159         [120] = {127, "AM64X_DEV_RTI8"},
160         [121] = {128, "AM64X_DEV_RTI9"},
161         [122] = {130, "AM64X_DEV_RTI10"},
162         [123] = {131, "AM64X_DEV_RTI11"},
163         [124] = {132, "AM64X_DEV_MCU_RTI0"},
164         [125] = {133, "AM64X_DEV_SA2_UL0"},
165         [126] = {134, "AM64X_DEV_COMPUTE_CLUSTER0"},
166         [127] = {135, "AM64X_DEV_A53SS0_CORE_0"},
167         [128] = {136, "AM64X_DEV_A53SS0_CORE_1"},
168         [129] = {137, "AM64X_DEV_A53SS0"},
169         [130] = {138, "AM64X_DEV_DDR16SS0"},
170         [131] = {139, "AM64X_DEV_PSC0"},
171         [132] = {140, "AM64X_DEV_MCU_PSC0"},
172         [133] = {141, "AM64X_DEV_MCSPI0"},
173         [134] = {142, "AM64X_DEV_MCSPI1"},
174         [135] = {143, "AM64X_DEV_MCSPI2"},
175         [136] = {144, "AM64X_DEV_MCSPI3"},
176         [137] = {145, "AM64X_DEV_MCSPI4"},
177         [138] = {146, "AM64X_DEV_UART0"},
178         [139] = {147, "AM64X_DEV_MCU_MCSPI0"},
179         [140] = {148, "AM64X_DEV_MCU_MCSPI1"},
180         [141] = {149, "AM64X_DEV_MCU_UART0"},
181         [142] = {150, "AM64X_DEV_SPINLOCK0"},
182         [143] = {151, "AM64X_DEV_TIMERMGR0"},
183         [144] = {152, "AM64X_DEV_UART1"},
184         [145] = {153, "AM64X_DEV_UART2"},
185         [146] = {154, "AM64X_DEV_UART3"},
186         [147] = {155, "AM64X_DEV_UART4"},
187         [148] = {156, "AM64X_DEV_UART5"},
188         [149] = {157, "AM64X_DEV_BOARD0"},
189         [150] = {158, "AM64X_DEV_UART6"},
190         [151] = {160, "AM64X_DEV_MCU_UART1"},
191         [152] = {161, "AM64X_DEV_USB0"},
192         [153] = {162, "AM64X_DEV_SERDES_10G0"},
193         [154] = {163, "AM64X_DEV_PBIST0"},
194         [155] = {164, "AM64X_DEV_PBIST1"},
195         [156] = {165, "AM64X_DEV_PBIST2"},
196         [157] = {166, "AM64X_DEV_PBIST3"},
197         [158] = {167, "AM64X_DEV_COMPUTE_CLUSTER0_PBIST_0"},
198 };