soc: j7200: Update sysfw data corresponding to v2020.08b
[k3conf/k3conf.git] / soc / j7200 / j7200_sec_proxy_info.c
1 /*
2  * J7200 Sec Proxy Info
3  *
4  * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
5  *
6  *  Redistribution and use in source and binary forms, with or without
7  *  modification, are permitted provided that the following conditions
8  *  are met:
9  *
10  *    Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  *
13  *    Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the
16  *    distribution.
17  *
18  *    Neither the name of Texas Instruments Incorporated nor the names of
19  *    its contributors may be used to endorse or promote products derived
20  *    from this software without specific prior written permission.
21  *
22  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
35 #include <tisci.h>
36 #include <socinfo.h>
38 struct ti_sci_sec_proxy_info j7200_main_sp_info[] = {
39         [0] = {148, "read", 9, "DM", "nonsec_high_priority_rx"},
40         [1] = {147, "read", 36, "DM", "nonsec_low_priority_rx"},
41         [2] = {146, "read", 9, "DM", "nonsec_notify_resp_rx"},
42         [3] = {145, "write", 2, "DM", "nonsec_A72_2_notify_tx"},
43         [4] = {144, "write", 22, "DM", "nonsec_A72_2_response_tx"},
44         [5] = {143, "write", 2, "DM", "nonsec_A72_3_notify_tx"},
45         [6] = {142, "write", 7, "DM", "nonsec_A72_3_response_tx"},
46         [7] = {141, "write", 2, "DM", "nonsec_A72_4_notify_tx"},
47         [8] = {140, "write", 7, "DM", "nonsec_A72_4_response_tx"},
48         [9] = {139, "write", 2, "DM", "nonsec_MAIN_0_R5_0_notify_tx"},
49         [10] = {138, "write", 7, "DM", "nonsec_MAIN_0_R5_0_response_tx"},
50         [11] = {137, "write", 1, "DM", "nonsec_MAIN_0_R5_2_notify_tx"},
51         [12] = {136, "write", 2, "DM", "nonsec_MAIN_0_R5_2_response_tx"},
52         [13] = {0, "read", 2, "A72_0", "notify"},
53         [14] = {1, "read", 30, "A72_0", "response"},
54         [15] = {2, "write", 10, "A72_0", "high_priority"},
55         [16] = {3, "write", 20, "A72_0", "low_priority"},
56         [17] = {4, "write", 2, "A72_0", "notify_resp"},
57         [18] = {5, "read", 2, "A72_1", "notify"},
58         [19] = {6, "read", 30, "A72_1", "response"},
59         [20] = {7, "write", 10, "A72_1", "high_priority"},
60         [21] = {8, "write", 20, "A72_1", "low_priority"},
61         [22] = {9, "write", 2, "A72_1", "notify_resp"},
62         [23] = {10, "read", 2, "A72_2", "notify"},
63         [24] = {11, "read", 22, "A72_2", "response"},
64         [25] = {12, "write", 2, "A72_2", "high_priority"},
65         [26] = {13, "write", 20, "A72_2", "low_priority"},
66         [27] = {14, "write", 2, "A72_2", "notify_resp"},
67         [28] = {15, "read", 2, "A72_3", "notify"},
68         [29] = {16, "read", 7, "A72_3", "response"},
69         [30] = {17, "write", 2, "A72_3", "high_priority"},
70         [31] = {18, "write", 5, "A72_3", "low_priority"},
71         [32] = {19, "write", 2, "A72_3", "notify_resp"},
72         [33] = {20, "read", 2, "A72_4", "notify"},
73         [34] = {21, "read", 7, "A72_4", "response"},
74         [35] = {22, "write", 2, "A72_4", "high_priority"},
75         [36] = {23, "write", 5, "A72_4", "low_priority"},
76         [37] = {24, "write", 2, "A72_4", "notify_resp"},
77         [38] = {25, "read", 2, "MAIN_0_R5_0", "notify"},
78         [39] = {26, "read", 7, "MAIN_0_R5_0", "response"},
79         [40] = {27, "write", 2, "MAIN_0_R5_0", "high_priority"},
80         [41] = {28, "write", 5, "MAIN_0_R5_0", "low_priority"},
81         [42] = {29, "write", 2, "MAIN_0_R5_0", "notify_resp"},
82         [43] = {30, "read", 2, "MAIN_0_R5_1", "notify"},
83         [44] = {31, "read", 7, "MAIN_0_R5_1", "response"},
84         [45] = {32, "write", 2, "MAIN_0_R5_1", "high_priority"},
85         [46] = {33, "write", 5, "MAIN_0_R5_1", "low_priority"},
86         [47] = {34, "write", 2, "MAIN_0_R5_1", "notify_resp"},
87         [48] = {35, "read", 1, "MAIN_0_R5_2", "notify"},
88         [49] = {36, "read", 2, "MAIN_0_R5_2", "response"},
89         [50] = {37, "write", 1, "MAIN_0_R5_2", "high_priority"},
90         [51] = {38, "write", 1, "MAIN_0_R5_2", "low_priority"},
91         [52] = {39, "write", 1, "MAIN_0_R5_2", "notify_resp"},
92         [53] = {40, "read", 1, "MAIN_0_R5_3", "notify"},
93         [54] = {41, "read", 2, "MAIN_0_R5_3", "response"},
94         [55] = {42, "write", 1, "MAIN_0_R5_3", "high_priority"},
95         [56] = {43, "write", 1, "MAIN_0_R5_3", "low_priority"},
96         [57] = {44, "write", 1, "MAIN_0_R5_3", "notify_resp"},
97 };
99 struct ti_sci_sec_proxy_info j7200_mcu_sp_info[] = {
100         [0] = {80, "read", 13, "DM", "nonsec_high_priority_rx"},
101         [1] = {79, "read", 13, "DM", "nonsec_low_priority_rx"},
102         [2] = {78, "read", 5, "DM", "nonsec_notify_resp_rx"},
103         [3] = {77, "write", 2, "DM", "nonsec_MCU_0_R5_0_notify_tx"},
104         [4] = {76, "write", 20, "DM", "nonsec_MCU_0_R5_0_response_tx"},
105         [5] = {75, "write", 1, "DM", "nonsec_MCU_0_R5_2_notify_tx"},
106         [6] = {74, "write", 2, "DM", "nonsec_MCU_0_R5_2_response_tx"},
107         [7] = {73, "write", 2, "DM", "nonsec_DMSC2DM_notify_tx"},
108         [8] = {72, "write", 4, "DM", "nonsec_DMSC2DM_response_tx"},
109         [9] = {0, "read", 2, "MCU_0_R5_0", "notify"},
110         [10] = {1, "read", 20, "MCU_0_R5_0", "response"},
111         [11] = {2, "write", 10, "MCU_0_R5_0", "high_priority"},
112         [12] = {3, "write", 10, "MCU_0_R5_0", "low_priority"},
113         [13] = {4, "write", 2, "MCU_0_R5_0", "notify_resp"},
114         [14] = {5, "read", 2, "MCU_0_R5_1", "notify"},
115         [15] = {6, "read", 20, "MCU_0_R5_1", "response"},
116         [16] = {7, "write", 10, "MCU_0_R5_1", "high_priority"},
117         [17] = {8, "write", 10, "MCU_0_R5_1", "low_priority"},
118         [18] = {9, "write", 2, "MCU_0_R5_1", "notify_resp"},
119         [19] = {10, "read", 1, "MCU_0_R5_2", "notify"},
120         [20] = {11, "read", 2, "MCU_0_R5_2", "response"},
121         [21] = {12, "write", 1, "MCU_0_R5_2", "high_priority"},
122         [22] = {13, "write", 1, "MCU_0_R5_2", "low_priority"},
123         [23] = {14, "write", 1, "MCU_0_R5_2", "notify_resp"},
124         [24] = {15, "read", 1, "MCU_0_R5_3", "notify"},
125         [25] = {16, "read", 2, "MCU_0_R5_3", "response"},
126         [26] = {17, "write", 1, "MCU_0_R5_3", "high_priority"},
127         [27] = {18, "write", 1, "MCU_0_R5_3", "low_priority"},
128         [28] = {19, "write", 1, "MCU_0_R5_3", "notify_resp"},
129         [29] = {20, "read", 2, "DM2DMSC", "notify"},
130         [30] = {21, "read", 4, "DM2DMSC", "response"},
131         [31] = {22, "write", 2, "DM2DMSC", "high_priority"},
132         [32] = {23, "write", 2, "DM2DMSC", "low_priority"},
133         [33] = {24, "write", 2, "DM2DMSC", "notify_resp"},
134         [34] = {25, "read", 2, "DMSC2DM", "notify"},
135         [35] = {26, "read", 4, "DMSC2DM", "response"},
136         [36] = {27, "write", 2, "DMSC2DM", "high_priority"},
137         [37] = {28, "write", 2, "DMSC2DM", "low_priority"},
138         [38] = {29, "write", 2, "DMSC2DM", "notify_resp"},
139 };