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[k3conf/k3conf.git] / soc / j721e / j721e_devices_info.c
1 /*
2  * J721E Devices Info
3  *
4  * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
5  *
6  *  Redistribution and use in source and binary forms, with or without
7  *  modification, are permitted provided that the following conditions
8  *  are met:
9  *
10  *    Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  *
13  *    Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the
16  *    distribution.
17  *
18  *    Neither the name of Texas Instruments Incorporated nor the names of
19  *    its contributors may be used to endorse or promote products derived
20  *    from this software without specific prior written permission.
21  *
22  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
35 #include <tisci.h>
36 #include <socinfo.h>
38 struct ti_sci_devices_info j721e_devices_info[] = {
39         [0] = {0, "J721E_DEV_MCU_ADC0"},
40         [1] = {1, "J721E_DEV_MCU_ADC1"},
41         [2] = {2, "J721E_DEV_ATL0"},
42         [3] = {3, "J721E_DEV_COMPUTE_CLUSTER_J7ES_TB_VDC_MAIN_0"},
43         [4] = {4, "J721E_DEV_A72SS0"},
44         [5] = {5, "J721E_DEV_COMPUTE_CLUSTER0_CFG_WRAP"},
45         [6] = {6, "J721E_DEV_COMPUTE_CLUSTER0_CLEC"},
46         [7] = {7, "J721E_DEV_COMPUTE_CLUSTER0_CORE_CORE"},
47         [8] = {8, "J721E_DEV_COMPUTE_CLUSTER0_DDR32SS_EMIF0_EW"},
48         [9] = {9, "J721E_DEV_COMPUTE_CLUSTER0_DEBUG_WRAP"},
49         [10] = {10, "J721E_DEV_COMPUTE_CLUSTER0_DIVH2_DIVH0"},
50         [11] = {11, "J721E_DEV_COMPUTE_CLUSTER0_DIVP_TFT0"},
51         [12] = {12, "J721E_DEV_COMPUTE_CLUSTER0_DMSC_WRAP"},
52         [13] = {13, "J721E_DEV_COMPUTE_CLUSTER0_EN_MSMC_DOMAIN"},
53         [14] = {14, "J721E_DEV_COMPUTE_CLUSTER0_GIC500SS"},
54         [15] = {15, "J721E_DEV_C71SS0"},
55         [16] = {16, "J721E_DEV_C71SS0_MMA"},
56         [17] = {17, "J721E_DEV_COMPUTE_CLUSTER0_PBIST_WRAP"},
57         [18] = {18, "J721E_DEV_MCU_CPSW0"},
58         [19] = {19, "J721E_DEV_CPSW0"},
59         [20] = {20, "J721E_DEV_CPT2_AGGR0"},
60         [21] = {21, "J721E_DEV_CPT2_AGGR1"},
61         [22] = {22, "J721E_DEV_DMSC_WKUP_0"},
62         [23] = {23, "J721E_DEV_CPT2_AGGR2"},
63         [24] = {24, "J721E_DEV_MCU_CPT2_AGGR0"},
64         [25] = {25, "J721E_DEV_CSI_PSILSS0"},
65         [26] = {26, "J721E_DEV_CSI_RX_IF0"},
66         [27] = {27, "J721E_DEV_CSI_RX_IF1"},
67         [28] = {28, "J721E_DEV_CSI_TX_IF0"},
68         [29] = {29, "J721E_DEV_STM0"},
69         [30] = {30, "J721E_DEV_DCC0"},
70         [31] = {31, "J721E_DEV_DCC1"},
71         [32] = {32, "J721E_DEV_DCC2"},
72         [33] = {33, "J721E_DEV_DCC3"},
73         [34] = {34, "J721E_DEV_DCC4"},
74         [35] = {35, "J721E_DEV_MCU_TIMER0"},
75         [36] = {36, "J721E_DEV_DCC5"},
76         [37] = {37, "J721E_DEV_DCC6"},
77         [38] = {38, "J721E_DEV_DCC7"},
78         [39] = {39, "J721E_DEV_DCC8"},
79         [40] = {40, "J721E_DEV_DCC9"},
80         [41] = {41, "J721E_DEV_DCC10"},
81         [42] = {42, "J721E_DEV_DCC11"},
82         [43] = {43, "J721E_DEV_DCC12"},
83         [44] = {44, "J721E_DEV_MCU_DCC0"},
84         [45] = {45, "J721E_DEV_MCU_DCC1"},
85         [46] = {46, "J721E_DEV_MCU_DCC2"},
86         [47] = {47, "J721E_DEV_DDR0"},
87         [48] = {48, "J721E_DEV_DMPAC_TOP_MAIN_0"},
88         [49] = {49, "J721E_DEV_TIMER0"},
89         [50] = {50, "J721E_DEV_TIMER1"},
90         [51] = {51, "J721E_DEV_TIMER2"},
91         [52] = {52, "J721E_DEV_TIMER3"},
92         [53] = {53, "J721E_DEV_TIMER4"},
93         [54] = {54, "J721E_DEV_TIMER5"},
94         [55] = {55, "J721E_DEV_TIMER6"},
95         [56] = {57, "J721E_DEV_TIMER7"},
96         [57] = {58, "J721E_DEV_TIMER8"},
97         [58] = {59, "J721E_DEV_TIMER9"},
98         [59] = {60, "J721E_DEV_TIMER10"},
99         [60] = {61, "J721E_DEV_GTC0"},
100         [61] = {62, "J721E_DEV_TIMER11"},
101         [62] = {63, "J721E_DEV_TIMER12"},
102         [63] = {64, "J721E_DEV_TIMER13"},
103         [64] = {65, "J721E_DEV_TIMER14"},
104         [65] = {66, "J721E_DEV_TIMER15"},
105         [66] = {67, "J721E_DEV_TIMER16"},
106         [67] = {68, "J721E_DEV_TIMER17"},
107         [68] = {69, "J721E_DEV_TIMER18"},
108         [69] = {70, "J721E_DEV_TIMER19"},
109         [70] = {71, "J721E_DEV_MCU_TIMER1"},
110         [71] = {72, "J721E_DEV_MCU_TIMER2"},
111         [72] = {73, "J721E_DEV_MCU_TIMER3"},
112         [73] = {74, "J721E_DEV_MCU_TIMER4"},
113         [74] = {75, "J721E_DEV_MCU_TIMER5"},
114         [75] = {76, "J721E_DEV_MCU_TIMER6"},
115         [76] = {77, "J721E_DEV_MCU_TIMER7"},
116         [77] = {78, "J721E_DEV_MCU_TIMER8"},
117         [78] = {79, "J721E_DEV_MCU_TIMER9"},
118         [79] = {80, "J721E_DEV_ECAP0"},
119         [80] = {81, "J721E_DEV_ECAP1"},
120         [81] = {82, "J721E_DEV_ECAP2"},
121         [82] = {83, "J721E_DEV_EHRPWM0"},
122         [83] = {84, "J721E_DEV_EHRPWM1"},
123         [84] = {85, "J721E_DEV_EHRPWM2"},
124         [85] = {86, "J721E_DEV_EHRPWM3"},
125         [86] = {87, "J721E_DEV_EHRPWM4"},
126         [87] = {88, "J721E_DEV_EHRPWM5"},
127         [88] = {89, "J721E_DEV_ELM0"},
128         [89] = {90, "J721E_DEV_EMIF_DATA_0_VD"},
129         [90] = {91, "J721E_DEV_MMCSD0"},
130         [91] = {92, "J721E_DEV_MMCSD1"},
131         [92] = {93, "J721E_DEV_MMCSD2"},
132         [93] = {94, "J721E_DEV_EQEP0"},
133         [94] = {95, "J721E_DEV_EQEP1"},
134         [95] = {96, "J721E_DEV_EQEP2"},
135         [96] = {97, "J721E_DEV_ESM0"},
136         [97] = {98, "J721E_DEV_MCU_ESM0"},
137         [98] = {99, "J721E_DEV_WKUP_ESM0"},
138         [99] = {100, "J721E_DEV_FSS_MCU_0"},
139         [100] = {101, "J721E_DEV_MCU_FSS0_FSAS_0"},
140         [101] = {102, "J721E_DEV_MCU_FSS0_HYPERBUS1P0_0"},
141         [102] = {103, "J721E_DEV_MCU_FSS0_OSPI_0"},
142         [103] = {104, "J721E_DEV_MCU_FSS0_OSPI_1"},
143         [104] = {105, "J721E_DEV_GPIO0"},
144         [105] = {106, "J721E_DEV_GPIO1"},
145         [106] = {107, "J721E_DEV_GPIO2"},
146         [107] = {108, "J721E_DEV_GPIO3"},
147         [108] = {109, "J721E_DEV_GPIO4"},
148         [109] = {110, "J721E_DEV_GPIO5"},
149         [110] = {111, "J721E_DEV_GPIO6"},
150         [111] = {112, "J721E_DEV_GPIO7"},
151         [112] = {113, "J721E_DEV_WKUP_GPIO0"},
152         [113] = {114, "J721E_DEV_WKUP_GPIO1"},
153         [114] = {115, "J721E_DEV_GPMC0"},
154         [115] = {116, "J721E_DEV_I3C0"},
155         [116] = {117, "J721E_DEV_MCU_I3C0"},
156         [117] = {118, "J721E_DEV_MCU_I3C1"},
157         [118] = {119, "J721E_DEV_PRU_ICSSG0"},
158         [119] = {120, "J721E_DEV_PRU_ICSSG1"},
159         [120] = {121, "J721E_DEV_C66SS0_INTROUTER0"},
160         [121] = {122, "J721E_DEV_C66SS1_INTROUTER0"},
161         [122] = {123, "J721E_DEV_CMPEVENT_INTRTR0"},
162         [123] = {124, "J721E_DEV_J7_LASCAR_GPU_WRAP_MAIN_0"},
163         [124] = {125, "J721E_DEV_GPU0_GPU_0"},
164         [125] = {126, "J721E_DEV_GPU0_GPUCORE_0"},
165         [126] = {127, "J721E_DEV_LED0"},
166         [127] = {128, "J721E_DEV_MAIN2MCU_LVL_INTRTR0"},
167         [128] = {130, "J721E_DEV_MAIN2MCU_PLS_INTRTR0"},
168         [129] = {131, "J721E_DEV_GPIOMUX_INTRTR0"},
169         [130] = {132, "J721E_DEV_WKUP_PORZ_SYNC0"},
170         [131] = {133, "J721E_DEV_PSC0"},
171         [132] = {134, "J721E_DEV_R5FSS0_INTROUTER0"},
172         [133] = {135, "J721E_DEV_R5FSS1_INTROUTER0"},
173         [134] = {136, "J721E_DEV_TIMESYNC_INTRTR0"},
174         [135] = {137, "J721E_DEV_WKUP_GPIOMUX_INTRTR0"},
175         [136] = {138, "J721E_DEV_WKUP_PSC0"},
176         [137] = {139, "J721E_DEV_AASRC0"},
177         [138] = {140, "J721E_DEV_K3_C66_COREPAC_MAIN_0"},
178         [139] = {141, "J721E_DEV_K3_C66_COREPAC_MAIN_1"},
179         [140] = {142, "J721E_DEV_C66SS0_CORE0"},
180         [141] = {143, "J721E_DEV_C66SS1_CORE0"},
181         [142] = {144, "J721E_DEV_DECODER0"},
182         [143] = {145, "J721E_DEV_WKUP_DDPA0"},
183         [144] = {146, "J721E_DEV_UART0"},
184         [145] = {147, "J721E_DEV_DPHY_RX0"},
185         [146] = {148, "J721E_DEV_DPHY_RX1"},
186         [147] = {149, "J721E_DEV_MCU_UART0"},
187         [148] = {150, "J721E_DEV_DSS_DSI0"},
188         [149] = {151, "J721E_DEV_DSS_EDP0"},
189         [150] = {152, "J721E_DEV_DSS0"},
190         [151] = {153, "J721E_DEV_ENCODER0"},
191         [152] = {154, "J721E_DEV_WKUP_VTM0"},
192         [153] = {155, "J721E_DEV_MAIN2WKUPMCU_VD"},
193         [154] = {156, "J721E_DEV_MCAN0"},
194         [155] = {157, "J721E_DEV_BOARD0"},
195         [156] = {158, "J721E_DEV_MCAN1"},
196         [157] = {160, "J721E_DEV_MCAN2"},
197         [158] = {161, "J721E_DEV_MCAN3"},
198         [159] = {162, "J721E_DEV_MCAN4"},
199         [160] = {163, "J721E_DEV_MCAN5"},
200         [161] = {164, "J721E_DEV_MCAN6"},
201         [162] = {165, "J721E_DEV_MCAN7"},
202         [163] = {166, "J721E_DEV_MCAN8"},
203         [164] = {167, "J721E_DEV_MCAN9"},
204         [165] = {168, "J721E_DEV_MCAN10"},
205         [166] = {169, "J721E_DEV_MCAN11"},
206         [167] = {170, "J721E_DEV_MCAN12"},
207         [168] = {171, "J721E_DEV_MCAN13"},
208         [169] = {172, "J721E_DEV_MCU_MCAN0"},
209         [170] = {173, "J721E_DEV_MCU_MCAN1"},
210         [171] = {174, "J721E_DEV_MCASP0"},
211         [172] = {175, "J721E_DEV_MCASP1"},
212         [173] = {176, "J721E_DEV_MCASP2"},
213         [174] = {177, "J721E_DEV_MCASP3"},
214         [175] = {178, "J721E_DEV_MCASP4"},
215         [176] = {179, "J721E_DEV_MCASP5"},
216         [177] = {180, "J721E_DEV_MCASP6"},
217         [178] = {181, "J721E_DEV_MCASP7"},
218         [179] = {182, "J721E_DEV_MCASP8"},
219         [180] = {183, "J721E_DEV_MCASP9"},
220         [181] = {184, "J721E_DEV_MCASP10"},
221         [182] = {185, "J721E_DEV_MCASP11"},
222         [183] = {186, "J721E_DEV_MLB0"},
223         [184] = {187, "J721E_DEV_I2C0"},
224         [185] = {188, "J721E_DEV_I2C1"},
225         [186] = {189, "J721E_DEV_I2C2"},
226         [187] = {190, "J721E_DEV_I2C3"},
227         [188] = {191, "J721E_DEV_I2C4"},
228         [189] = {192, "J721E_DEV_I2C5"},
229         [190] = {193, "J721E_DEV_I2C6"},
230         [191] = {194, "J721E_DEV_MCU_I2C0"},
231         [192] = {195, "J721E_DEV_MCU_I2C1"},
232         [193] = {197, "J721E_DEV_WKUP_I2C0"},
233         [194] = {199, "J721E_DEV_NAVSS512L_MAIN_0"},
234         [195] = {201, "J721E_DEV_NAVSS0_CPTS_0"},
235         [196] = {202, "J721E_DEV_A72SS0_CORE0"},
236         [197] = {203, "J721E_DEV_A72SS0_CORE1"},
237         [198] = {206, "J721E_DEV_NAVSS0_DTI_0"},
238         [199] = {207, "J721E_DEV_NAVSS0_MODSS_INTAGGR_0"},
239         [200] = {208, "J721E_DEV_NAVSS0_MODSS_INTAGGR_1"},
240         [201] = {209, "J721E_DEV_NAVSS0_UDMASS_INTAGGR_0"},
241         [202] = {210, "J721E_DEV_NAVSS0_PROXY_0"},
242         [203] = {211, "J721E_DEV_NAVSS0_RINGACC_0"},
243         [204] = {212, "J721E_DEV_NAVSS0_UDMAP_0"},
244         [205] = {213, "J721E_DEV_NAVSS0_INTR_ROUTER_0"},
245         [206] = {214, "J721E_DEV_NAVSS0_MAILBOX_0"},
246         [207] = {215, "J721E_DEV_NAVSS0_MAILBOX_1"},
247         [208] = {216, "J721E_DEV_NAVSS0_MAILBOX_2"},
248         [209] = {217, "J721E_DEV_NAVSS0_MAILBOX_3"},
249         [210] = {218, "J721E_DEV_NAVSS0_MAILBOX_4"},
250         [211] = {219, "J721E_DEV_NAVSS0_MAILBOX_5"},
251         [212] = {220, "J721E_DEV_NAVSS0_MAILBOX_6"},
252         [213] = {221, "J721E_DEV_NAVSS0_MAILBOX_7"},
253         [214] = {222, "J721E_DEV_NAVSS0_MAILBOX_8"},
254         [215] = {223, "J721E_DEV_NAVSS0_MAILBOX_9"},
255         [216] = {224, "J721E_DEV_NAVSS0_MAILBOX_10"},
256         [217] = {225, "J721E_DEV_NAVSS0_MAILBOX_11"},
257         [218] = {226, "J721E_DEV_NAVSS0_SPINLOCK_0"},
258         [219] = {227, "J721E_DEV_NAVSS0_MCRC_0"},
259         [220] = {228, "J721E_DEV_NAVSS0_TBU_0"},
260         [221] = {229, "J721E_DEV_NAVSS0_TCU_0"},
261         [222] = {230, "J721E_DEV_NAVSS0_TIMERMGR_0"},
262         [223] = {231, "J721E_DEV_NAVSS0_TIMERMGR_1"},
263         [224] = {232, "J721E_DEV_NAVSS_MCU_J7_MCU_0"},
264         [225] = {233, "J721E_DEV_MCU_NAVSS0_INTAGGR_0"},
265         [226] = {234, "J721E_DEV_MCU_NAVSS0_PROXY_0"},
266         [227] = {235, "J721E_DEV_MCU_NAVSS0_RINGACC_0"},
267         [228] = {236, "J721E_DEV_MCU_NAVSS0_UDMAP_0"},
268         [229] = {237, "J721E_DEV_MCU_NAVSS0_INTR_ROUTER_0"},
269         [230] = {238, "J721E_DEV_MCU_NAVSS0_MCRC_0"},
270         [231] = {239, "J721E_DEV_PCIE0"},
271         [232] = {240, "J721E_DEV_PCIE1"},
272         [233] = {241, "J721E_DEV_PCIE2"},
273         [234] = {242, "J721E_DEV_PCIE3"},
274         [235] = {243, "J721E_DEV_PULSAR_SL_MAIN_0"},
275         [236] = {244, "J721E_DEV_PULSAR_SL_MAIN_1"},
276         [237] = {245, "J721E_DEV_R5FSS0_CORE0"},
277         [238] = {246, "J721E_DEV_R5FSS0_CORE1"},
278         [239] = {247, "J721E_DEV_R5FSS1_CORE0"},
279         [240] = {248, "J721E_DEV_R5FSS1_CORE1"},
280         [241] = {249, "J721E_DEV_PULSAR_SL_MCU_0"},
281         [242] = {250, "J721E_DEV_MCU_R5FSS0_CORE0"},
282         [243] = {251, "J721E_DEV_MCU_R5FSS0_CORE1"},
283         [244] = {252, "J721E_DEV_RTI0"},
284         [245] = {253, "J721E_DEV_RTI1"},
285         [246] = {254, "J721E_DEV_RTI24"},
286         [247] = {255, "J721E_DEV_RTI25"},
287         [248] = {256, "J721E_DEV_RTI16"},
288         [249] = {257, "J721E_DEV_RTI15"},
289         [250] = {258, "J721E_DEV_RTI28"},
290         [251] = {259, "J721E_DEV_RTI29"},
291         [252] = {260, "J721E_DEV_RTI30"},
292         [253] = {261, "J721E_DEV_RTI31"},
293         [254] = {262, "J721E_DEV_MCU_RTI0"},
294         [255] = {263, "J721E_DEV_MCU_RTI1"},
295         [256] = {264, "J721E_DEV_SA2_UL0"},
296         [257] = {265, "J721E_DEV_MCU_SA2_UL0"},
297         [258] = {266, "J721E_DEV_MCSPI0"},
298         [259] = {267, "J721E_DEV_MCSPI1"},
299         [260] = {268, "J721E_DEV_MCSPI2"},
300         [261] = {269, "J721E_DEV_MCSPI3"},
301         [262] = {270, "J721E_DEV_MCSPI4"},
302         [263] = {271, "J721E_DEV_MCSPI5"},
303         [264] = {272, "J721E_DEV_MCSPI6"},
304         [265] = {273, "J721E_DEV_MCSPI7"},
305         [266] = {274, "J721E_DEV_MCU_MCSPI0"},
306         [267] = {275, "J721E_DEV_MCU_MCSPI1"},
307         [268] = {276, "J721E_DEV_MCU_MCSPI2"},
308         [269] = {277, "J721E_DEV_UFS0"},
309         [270] = {278, "J721E_DEV_UART1"},
310         [271] = {279, "J721E_DEV_UART2"},
311         [272] = {280, "J721E_DEV_UART3"},
312         [273] = {281, "J721E_DEV_UART4"},
313         [274] = {282, "J721E_DEV_UART5"},
314         [275] = {283, "J721E_DEV_UART6"},
315         [276] = {284, "J721E_DEV_UART7"},
316         [277] = {285, "J721E_DEV_UART8"},
317         [278] = {286, "J721E_DEV_UART9"},
318         [279] = {287, "J721E_DEV_WKUP_UART0"},
319         [280] = {288, "J721E_DEV_USB0"},
320         [281] = {289, "J721E_DEV_USB1"},
321         [282] = {290, "J721E_DEV_VPAC_TOP_MAIN_0"},
322         [283] = {291, "J721E_DEV_VPFE0"},
323         [284] = {292, "J721E_DEV_SERDES_16G0"},
324         [285] = {293, "J721E_DEV_SERDES_16G1"},
325         [286] = {294, "J721E_DEV_SERDES_16G2"},
326         [287] = {295, "J721E_DEV_SERDES_16G3"},
327         [288] = {296, "J721E_DEV_DPHY_TX0"},
328         [289] = {297, "J721E_DEV_SERDES_10G0"},
329         [290] = {298, "J721E_DEV_WKUPMCU2MAIN_VD"},
330         [291] = {299, "J721E_DEV_NAVSS0_MODSS"},
331         [292] = {300, "J721E_DEV_NAVSS0_UDMASS"},
332         [293] = {301, "J721E_DEV_NAVSS0_VIRTSS"},
333         [294] = {302, "J721E_DEV_MCU_NAVSS0_MODSS"},
334         [295] = {303, "J721E_DEV_MCU_NAVSS0_UDMASS"},
335         [296] = {304, "J721E_DEV_DEBUGSS_WRAP0"},
336         [297] = {305, "J721E_DEV_DMPAC0_SDE_0"},
337         [298] = {306, "J721E_DEV_GPU0_DFT_PBIST_0"},
338         [299] = {307, "J721E_DEV_C66SS0_PBIST0"},
339         [300] = {308, "J721E_DEV_C66SS1_PBIST0"},
340         [301] = {309, "J721E_DEV_PBIST0"},
341         [302] = {310, "J721E_DEV_PBIST1"},
342         [303] = {311, "J721E_DEV_PBIST2"},
343         [304] = {312, "J721E_DEV_PBIST3"},
344         [305] = {313, "J721E_DEV_PBIST4"},
345         [306] = {314, "J721E_DEV_PBIST5"},
346         [307] = {315, "J721E_DEV_PBIST6"},
347         [308] = {316, "J721E_DEV_PBIST7"},
348         [309] = {317, "J721E_DEV_PBIST9"},
349         [310] = {318, "J721E_DEV_PBIST10"},
350         [311] = {319, "J721E_DEV_MCU_PBIST0"},
351         [312] = {320, "J721E_DEV_MCU_PBIST1"},
352         [313] = {321, "J721E_DEV_C71X_0_PBIST_VD"},
353 };