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[k3conf/k3conf.git] / soc / j721e / j721e_sec_proxy_info.c
1 /*
2  * SoC Sec Proxy Info
3  *
4  * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  *  Redistribution and use in source and binary forms, with or without
7  *  modification, are permitted provided that the following conditions
8  *  are met:
9  *
10  *    Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  *
13  *    Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the
16  *    distribution.
17  *
18  *    Neither the name of Texas Instruments Incorporated nor the names of
19  *    its contributors may be used to endorse or promote products derived
20  *    from this software without specific prior written permission.
21  *
22  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
35 #include <tisci.h>
36 #include <socinfo.h>
38 struct ti_sci_sec_proxy_info j721e_main_sp_info[] = {
39          [0] = {0, "read", 2, "A72_0", "notify"},
40          [1] = {1, "read", 30, "A72_0", "response"},
41          [2] = {2, "write", 10, "A72_0", "high_priority"},
42          [3] = {3, "write", 20, "A72_0", "low_priority"},
43          [4] = {4, "write", 2, "A72_0", "notify_resp"},
44          [5] = {5, "read", 2, "A72_1", "notify"},
45          [6] = {6, "read", 30, "A72_1", "response"},
46          [7] = {7, "write", 10, "A72_1", "high_priority"},
47          [8] = {8, "write", 20, "A72_1", "low_priority"},
48          [9] = {9, "write", 2, "A72_1", "notify_resp"},
49          [10] = {10, "read", 2, "A72_2", "notify"},
50          [11] = {11, "read", 22, "A72_2", "response"},
51          [12] = {12, "write", 2, "A72_2", "high_priority"},
52          [13] = {13, "write", 20, "A72_2", "low_priority"},
53          [14] = {14, "write", 2, "A72_2", "notify_resp"},
54          [15] = {15, "read", 2, "A72_3", "notify"},
55          [16] = {16, "read", 7, "A72_3", "response"},
56          [17] = {17, "write", 2, "A72_3", "high_priority"},
57          [18] = {18, "write", 5, "A72_3", "low_priority"},
58          [19] = {19, "write", 2, "A72_3", "notify_resp"},
59          [20] = {20, "read", 2, "A72_4", "notify"},
60          [21] = {21, "read", 7, "A72_4", "response"},
61          [22] = {22, "write", 2, "A72_4", "high_priority"},
62          [23] = {23, "write", 5, "A72_4", "low_priority"},
63          [24] = {24, "write", 2, "A72_4", "notify_resp"},
64          [25] = {25, "read", 2, "C7X_0", "notify"},
65          [26] = {26, "read", 7, "C7X_0", "response"},
66          [27] = {27, "write", 2, "C7X_0", "high_priority"},
67          [28] = {28, "write", 5, "C7X_0", "low_priority"},
68          [29] = {29, "write", 2, "C7X_0", "notify_resp"},
69          [30] = {30, "read", 2, "C7X_1", "notify"},
70          [31] = {31, "read", 7, "C7X_1", "response"},
71          [32] = {32, "write", 2, "C7X_1", "high_priority"},
72          [33] = {33, "write", 5, "C7X_1", "low_priority"},
73          [34] = {34, "write", 2, "C7X_1", "notify_resp"},
74          [35] = {35, "read", 2, "C6X_0_0", "notify"},
75          [36] = {36, "read", 7, "C6X_0_0", "response"},
76          [37] = {37, "write", 2, "C6X_0_0", "high_priority"},
77          [38] = {38, "write", 5, "C6X_0_0", "low_priority"},
78          [39] = {39, "write", 2, "C6X_0_0", "notify_resp"},
79          [40] = {40, "read", 2, "C6X_0_1", "notify"},
80          [41] = {41, "read", 7, "C6X_0_1", "response"},
81          [42] = {42, "write", 2, "C6X_0_1", "high_priority"},
82          [43] = {43, "write", 5, "C6X_0_1", "low_priority"},
83          [44] = {44, "write", 2, "C6X_0_1", "notify_resp"},
84          [45] = {45, "read", 2, "C6X_1_0", "notify"},
85          [46] = {46, "read", 7, "C6X_1_0", "response"},
86          [47] = {47, "write", 2, "C6X_1_0", "high_priority"},
87          [48] = {48, "write", 5, "C6X_1_0", "low_priority"},
88          [49] = {49, "write", 2, "C6X_1_0", "notify_resp"},
89          [50] = {50, "read", 2, "C6X_1_1", "notify"},
90          [51] = {51, "read", 7, "C6X_1_1", "response"},
91          [52] = {52, "write", 2, "C6X_1_1", "high_priority"},
92          [53] = {53, "write", 5, "C6X_1_1", "low_priority"},
93          [54] = {54, "write", 2, "C6X_1_1", "notify_resp"},
94          [55] = {55, "read", 2, "GPU_0", "notify"},
95          [56] = {56, "read", 7, "GPU_0", "response"},
96          [57] = {57, "write", 2, "GPU_0", "high_priority"},
97          [58] = {58, "write", 5, "GPU_0", "low_priority"},
98          [59] = {59, "write", 2, "GPU_0", "notify_resp"},
99          [60] = {60, "read", 2, "MAIN_0_R5_0", "notify"},
100          [61] = {61, "read", 7, "MAIN_0_R5_0", "response"},
101          [62] = {62, "write", 2, "MAIN_0_R5_0", "high_priority"},
102          [63] = {63, "write", 5, "MAIN_0_R5_0", "low_priority"},
103          [64] = {64, "write", 2, "MAIN_0_R5_0", "notify_resp"},
104          [65] = {65, "read", 2, "MAIN_0_R5_1", "notify"},
105          [66] = {66, "read", 7, "MAIN_0_R5_1", "response"},
106          [67] = {67, "write", 2, "MAIN_0_R5_1", "high_priority"},
107          [68] = {68, "write", 5, "MAIN_0_R5_1", "low_priority"},
108          [69] = {69, "write", 2, "MAIN_0_R5_1", "notify_resp"},
109          [70] = {70, "read", 1, "MAIN_0_R5_2", "notify"},
110          [71] = {71, "read", 2, "MAIN_0_R5_2", "response"},
111          [72] = {72, "write", 1, "MAIN_0_R5_2", "high_priority"},
112          [73] = {73, "write", 1, "MAIN_0_R5_2", "low_priority"},
113          [74] = {74, "write", 1, "MAIN_0_R5_2", "notify_resp"},
114          [75] = {75, "read", 1, "MAIN_0_R5_3", "notify"},
115          [76] = {76, "read", 2, "MAIN_0_R5_3", "response"},
116          [77] = {77, "write", 1, "MAIN_0_R5_3", "high_priority"},
117          [78] = {78, "write", 1, "MAIN_0_R5_3", "low_priority"},
118          [79] = {79, "write", 1, "MAIN_0_R5_3", "notify_resp"},
119          [80] = {80, "read", 2, "MAIN_1_R5_0", "notify"},
120          [81] = {81, "read", 7, "MAIN_1_R5_0", "response"},
121          [82] = {82, "write", 2, "MAIN_1_R5_0", "high_priority"},
122          [83] = {83, "write", 5, "MAIN_1_R5_0", "low_priority"},
123          [84] = {84, "write", 2, "MAIN_1_R5_0", "notify_resp"},
124          [85] = {85, "read", 2, "MAIN_1_R5_1", "notify"},
125          [86] = {86, "read", 7, "MAIN_1_R5_1", "response"},
126          [87] = {87, "write", 2, "MAIN_1_R5_1", "high_priority"},
127          [88] = {88, "write", 5, "MAIN_1_R5_1", "low_priority"},
128          [89] = {89, "write", 2, "MAIN_1_R5_1", "notify_resp"},
129          [90] = {90, "read", 1, "MAIN_1_R5_2", "notify"},
130          [91] = {91, "read", 2, "MAIN_1_R5_2", "response"},
131          [92] = {92, "write", 1, "MAIN_1_R5_2", "high_priority"},
132          [93] = {93, "write", 1, "MAIN_1_R5_2", "low_priority"},
133          [94] = {94, "write", 1, "MAIN_1_R5_2", "notify_resp"},
134          [95] = {95, "read", 1, "MAIN_1_R5_3", "notify"},
135          [96] = {96, "read", 2, "MAIN_1_R5_3", "response"},
136          [97] = {97, "write", 1, "MAIN_1_R5_3", "high_priority"},
137          [98] = {98, "write", 1, "MAIN_1_R5_3", "low_priority"},
138          [99] = {99, "write", 1, "MAIN_1_R5_3", "notify_resp"},
139          [100] = {100, "read", 2, "ICSSG_0", "notify"},
140          [101] = {101, "read", 7, "ICSSG_0", "response"},
141          [102] = {102, "write", 2, "ICSSG_0", "high_priority"},
142          [103] = {103, "write", 5, "ICSSG_0", "low_priority"},
143          [104] = {104, "write", 2, "ICSSG_0", "notify_resp"},
144 };
146 struct ti_sci_sec_proxy_info j721e_mcu_sp_info[] = {
147          [0] = {0, "read", 2, "MCU_0_R5_0", "notify"},
148          [1] = {1, "read", 7, "MCU_0_R5_0", "response"},
149          [2] = {2, "write", 2, "MCU_0_R5_0", "high_priority"},
150          [3] = {3, "write", 5, "MCU_0_R5_0", "low_priority"},
151          [4] = {4, "write", 2, "MCU_0_R5_0", "notify_resp"},
152          [5] = {5, "read", 2, "MCU_0_R5_1", "notify"},
153          [6] = {6, "read", 7, "MCU_0_R5_1", "response"},
154          [7] = {7, "write", 2, "MCU_0_R5_1", "high_priority"},
155          [8] = {8, "write", 5, "MCU_0_R5_1", "low_priority"},
156          [9] = {9, "write", 2, "MCU_0_R5_1", "notify_resp"},
157          [10] = {10, "read", 1, "MCU_0_R5_2", "notify"},
158          [11] = {11, "read", 2, "MCU_0_R5_2", "response"},
159          [12] = {12, "write", 1, "MCU_0_R5_2", "high_priority"},
160          [13] = {13, "write", 1, "MCU_0_R5_2", "low_priority"},
161          [14] = {14, "write", 1, "MCU_0_R5_2", "notify_resp"},
162          [15] = {15, "read", 1, "MCU_0_R5_3", "notify"},
163          [16] = {16, "read", 2, "MCU_0_R5_3", "response"},
164          [17] = {17, "write", 1, "MCU_0_R5_3", "high_priority"},
165          [18] = {18, "write", 1, "MCU_0_R5_3", "low_priority"},
166          [19] = {19, "write", 1, "MCU_0_R5_3", "notify_resp"},
167 };