soc: j721e: Fix C66x input clock ids
authorSuman Anna <s-anna@ti.com>
Wed, 11 Nov 2020 16:08:34 +0000 (10:08 -0600)
committerLokesh Vutla <lokeshvutla@ti.com>
Thu, 12 Nov 2020 07:43:43 +0000 (13:13 +0530)
commit1ff0c4f429e8e33d22b52ec002d9b97bbca6bf0b
tree37055aa58b93f062c9f75d7095fec4476e8b58f7
parent5a14c86ed30c7c2cf449896f17f46308545d10b8
soc: j721e: Fix C66x input clock ids

The C66x processor frequencies are incorrectly printed as 0 due to
wrong clock ids used in the processors info. The data is using a
debug clock -GEM_TRC_CLK, but should be using the proper input clock
- GEM_CLKIN_CLK. Update the clock ids for both the C66x devices to
fix this. This new clock id is fixed/added from SYSFW 2020.05 onwards.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
soc/j721e/j721e_processors_info.c