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raw | patch | inline | side by side (parent: 2434dcb)
raw | patch | inline | side by side (parent: 2434dcb)
author | Bryan Brattlof <bb@ti.com> | |
Wed, 20 Apr 2022 19:09:02 +0000 (14:09 -0500) | ||
committer | Bryan Brattlof <bb@ti.com> | |
Wed, 18 May 2022 22:24:19 +0000 (17:24 -0500) |
The resource type IDs represents the resource ranges that are assignable
to the J721S2's processing entities.
Provide the board configuration resource assignment type IDs that are
permitted in the J721S2.
Signed-off-by: Bryan Brattlof <bb@ti.com>
to the J721S2's processing entities.
Provide the board configuration resource assignment type IDs that are
permitted in the J721S2.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Makefile | patch | blob | history | |
common/socinfo.c | patch | blob | history | |
soc/j721s2/j721s2_rm_info.c | [new file with mode: 0644] | patch | blob |
soc/j721s2/j721s2_rm_info.h | [new file with mode: 0644] | patch | blob |
diff --git a/Makefile b/Makefile
index 3b972ac67696d48dea39f30e9062b9887a1bb41c..31bcef6b4e50132ec826d67b287666a70e57b8d5 100644 (file)
--- a/Makefile
+++ b/Makefile
soc/j721s2/j721s2_devices_info.c \
soc/j721s2/j721s2_clocks_info.c \
soc/j721s2/j721s2_host_info.c \
- soc/j721s2/j721s2_processors_info.c
+ soc/j721s2/j721s2_processors_info.c \
+ soc/j721s2/j721s2_rm_info.c
COMMONOBJECTS= $(COMMONSOURCES:.c=.o)
AM65XOBJECTS= $(AM65XSOURCES:.c=.o)
diff --git a/common/socinfo.c b/common/socinfo.c
index 7a3247b3e85066695c73416a06e61fc30813fdab..38f10557a5de280211c51eb758351e7943b01f3c 100644 (file)
--- a/common/socinfo.c
+++ b/common/socinfo.c
#include <soc/j721s2/j721s2_clocks_info.h>
#include <soc/j721s2/j721s2_host_info.h>
#include <soc/j721s2/j721s2_processors_info.h>
+#include <soc/j721s2/j721s2_rm_info.h>
/* Assuming these addresses and definitions stay common across K3 devices */
#define CTRLMMR_WKUP_JTAG_DEVICE_ID 0x43000018
{
struct ti_sci_info *sci_info = &soc_info.sci_info;
+ sci_info->rm_info = j721s2_rm_info;
+ sci_info->num_res = J721S2_MAX_RES;
sci_info->host_info = j721s2_host_info;
sci_info->num_hosts = J721S2_MAX_HOST_IDS;
sci_info->clocks_info = j721s2_clocks_info;
diff --git a/soc/j721s2/j721s2_rm_info.c b/soc/j721s2/j721s2_rm_info.c
--- /dev/null
@@ -0,0 +1,135 @@
+/*
+ * J721S2 RM Info
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <tisci.h>
+#include <socinfo.h>
+
+struct ti_sci_rm_info j721s2_rm_info[] = {
+ [0] = {0x1E40, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [1] = {0x1E80, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [2] = {0x1F00, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [3] = {0x1F40, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [4] = {0x2500, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [5] = {0x2580, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [6] = {0x3842, "RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER"},
+ [7] = {0x3843, "RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG"},
+ [8] = {0x384E, "RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN"},
+ [9] = {0x384F, "RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN"},
+ [10] = {0x3861, "RESASG_SUBTYPE_BCDMA_SPLIT_TR_RX_CHAN"},
+ [11] = {0x3862, "RESASG_SUBTYPE_BCDMA_SPLIT_TR_TX_CHAN"},
+ [12] = {0x38C0, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [13] = {0x3F8A, "RESASG_SUBTYPE_IA_VINT"},
+ [14] = {0x3F8D, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
+ [15] = {0x3FCA, "RESASG_SUBTYPE_IA_VINT"},
+ [16] = {0x3FCD, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
+ [17] = {0x4000, "RESASG_SUBTYPE_PROXY_PROXIES"},
+ [18] = {0x40C0, "RESASG_SUBTYPE_RA_ERROR_OES"},
+ [19] = {0x40C1, "RESASG_SUBTYPE_RA_GP"},
+ [20] = {0x40C2, "RESASG_SUBTYPE_RA_UDMAP_RX"},
+ [21] = {0x40C3, "RESASG_SUBTYPE_RA_UDMAP_TX"},
+ [22] = {0x40C4, "RESASG_SUBTYPE_RA_UDMAP_TX_EXT"},
+ [23] = {0x40C5, "RESASG_SUBTYPE_RA_UDMAP_RX_H"},
+ [24] = {0x40C6, "RESASG_SUBTYPE_RA_UDMAP_RX_UH"},
+ [25] = {0x40C7, "RESASG_SUBTYPE_RA_UDMAP_TX_H"},
+ [26] = {0x40C8, "RESASG_SUBTYPE_RA_UDMAP_TX_UH"},
+ [27] = {0x40CA, "RESASG_SUBTYPE_RA_VIRTID"},
+ [28] = {0x40CB, "RESASG_SUBTYPE_RA_MONITORS"},
+ [29] = {0x41C0, "RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON"},
+ [30] = {0x41C1, "RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES"},
+ [31] = {0x41C2, "RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER"},
+ [32] = {0x41C3, "RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG"},
+ [33] = {0x41CA, "RESASG_SUBTYPE_UDMAP_RX_CHAN"},
+ [34] = {0x41CB, "RESASG_SUBTYPE_UDMAP_RX_HCHAN"},
+ [35] = {0x41CC, "RESASG_SUBTYPE_UDMAP_RX_UHCHAN"},
+ [36] = {0x41CD, "RESASG_SUBTYPE_UDMAP_TX_CHAN"},
+ [37] = {0x41CE, "RESASG_SUBTYPE_UDMAP_TX_ECHAN"},
+ [38] = {0x41CF, "RESASG_SUBTYPE_UDMAP_TX_HCHAN"},
+ [39] = {0x41D0, "RESASG_SUBTYPE_UDMAP_TX_UHCHAN"},
+ [40] = {0x424A, "RESASG_SUBTYPE_IA_VINT"},
+ [41] = {0x424D, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
+ [42] = {0x424F, "RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_ERROR_OES"},
+ [43] = {0x4250, "RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_DATA_COMPLETION_OES"},
+ [44] = {0x4251, "RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_RING_COMPLETION_OES"},
+ [45] = {0x4252, "RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_ERROR_OES"},
+ [46] = {0x4253, "RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_DATA_COMPLETION_OES"},
+ [47] = {0x4254, "RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_RING_COMPLETION_OES"},
+ [48] = {0x4300, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [49] = {0x43C0, "RESASG_SUBTYPE_PROXY_PROXIES"},
+ [50] = {0x4400, "RESASG_SUBTYPE_RA_ERROR_OES"},
+ [51] = {0x4401, "RESASG_SUBTYPE_RA_GP"},
+ [52] = {0x4402, "RESASG_SUBTYPE_RA_UDMAP_RX"},
+ [53] = {0x4403, "RESASG_SUBTYPE_RA_UDMAP_TX"},
+ [54] = {0x4405, "RESASG_SUBTYPE_RA_UDMAP_RX_H"},
+ [55] = {0x4407, "RESASG_SUBTYPE_RA_UDMAP_TX_H"},
+ [56] = {0x440A, "RESASG_SUBTYPE_RA_VIRTID"},
+ [57] = {0x440B, "RESASG_SUBTYPE_RA_MONITORS"},
+ [58] = {0x4440, "RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON"},
+ [59] = {0x4441, "RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES"},
+ [60] = {0x4442, "RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER"},
+ [61] = {0x4443, "RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG"},
+ [62] = {0x444A, "RESASG_SUBTYPE_UDMAP_RX_CHAN"},
+ [63] = {0x444B, "RESASG_SUBTYPE_UDMAP_RX_HCHAN"},
+ [64] = {0x444D, "RESASG_SUBTYPE_UDMAP_TX_CHAN"},
+ [65] = {0x444F, "RESASG_SUBTYPE_UDMAP_TX_HCHAN"},
+ [66] = {0x44CA, "RESASG_SUBTYPE_IA_VINT"},
+ [67] = {0x44CD, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
+ [68] = {0x4B0A, "RESASG_SUBTYPE_IA_VINT"},
+ [69] = {0x4B0D, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
+ [70] = {0x4B15, "RESASG_SUBTYPE_IA_TIMERMGR_EVT_OES"},
+ [71] = {0x4B16, "RESASG_SUBTYPE_IA_PKTDMA_TX_CHAN_ERROR_OES"},
+ [72] = {0x4B17, "RESASG_SUBTYPE_IA_PKTDMA_TX_FLOW_COMPLETION_OES"},
+ [73] = {0x4B18, "RESASG_SUBTYPE_IA_PKTDMA_RX_CHAN_ERROR_OES"},
+ [74] = {0x4B19, "RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_COMPLETION_OES"},
+ [75] = {0x4B1A, "RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_STARVATION_OES"},
+ [76] = {0x4B1B, "RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_FIREWALL_OES"},
+ [77] = {0x4B43, "RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG"},
+ [78] = {0x4B52, "RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_0_CHAN"},
+ [79] = {0x4B53, "RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_1_CHAN"},
+ [80] = {0x4B58, "RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_0_CHAN"},
+ [81] = {0x4B59, "RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_1_CHAN"},
+ [82] = {0x4B5A, "RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_2_CHAN"},
+ [83] = {0x4B5B, "RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_3_CHAN"},
+ [84] = {0x4B65, "RESASG_SUBTYPE_PKTDMA_SAUL_TX_0_CHAN"},
+ [85] = {0x4B66, "RESASG_SUBTYPE_PKTDMA_SAUL_TX_1_CHAN"},
+ [86] = {0x4B6D, "RESASG_SUBTYPE_PKTDMA_SAUL_RX_0_CHAN"},
+ [87] = {0x4B6E, "RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_0_CHAN"},
+ [88] = {0x4B6F, "RESASG_SUBTYPE_PKTDMA_SAUL_RX_1_CHAN"},
+ [89] = {0x4B70, "RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_1_CHAN"},
+ [90] = {0x4B71, "RESASG_SUBTYPE_PKTDMA_SAUL_RX_2_CHAN"},
+ [91] = {0x4B72, "RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_2_CHAN"},
+ [92] = {0x4B73, "RESASG_SUBTYPE_PKTDMA_SAUL_RX_3_CHAN"},
+ [93] = {0x4B74, "RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_3_CHAN"},
+ [94] = {0x4B80, "RESASG_SUBTYPE_RA_ERROR_OES"},
+ [95] = {0x4B8A, "RESASG_SUBTYPE_RA_VIRTID"},
+};
diff --git a/soc/j721s2/j721s2_rm_info.h b/soc/j721s2/j721s2_rm_info.h
--- /dev/null
@@ -0,0 +1,42 @@
+/*
+ * J721S2 RM Info
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __J721S2_RM_INFO_H
+#define __J721S2_RM_INFO_H
+
+#define J721S2_MAX_RES 96
+
+extern struct ti_sci_rm_info j721s2_rm_info[];
+
+#endif /* __J721S2_RM_INFO_H */