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raw | patch | inline | side by side (parent: c36a520)
author | Bryan Brattlof <bb@ti.com> | |
Wed, 20 Apr 2022 16:53:52 +0000 (11:53 -0500) | ||
committer | Bryan Brattlof <bb@ti.com> | |
Wed, 18 May 2022 22:24:19 +0000 (17:24 -0500) |
The Processor IDs (not to be confused with Host IDs) represent the
actual physical processors in the J721S2.
Provide the processor and host IDs available for the J721S2
Signed-off-by: Bryan Brattlof <bb@ti.com>
actual physical processors in the J721S2.
Provide the processor and host IDs available for the J721S2
Signed-off-by: Bryan Brattlof <bb@ti.com>
Makefile | patch | blob | history | |
common/socinfo.c | patch | blob | history | |
soc/j721s2/j721s2_processors_info.c | [new file with mode: 0644] | patch | blob |
soc/j721s2/j721s2_processors_info.h | [new file with mode: 0644] | patch | blob |
diff --git a/Makefile b/Makefile
index 3d70c4be39291102b7dfd5b9353915758627c55a..3b972ac67696d48dea39f30e9062b9887a1bb41c 100644 (file)
--- a/Makefile
+++ b/Makefile
J721S2SOURCES =\
soc/j721s2/j721s2_devices_info.c \
soc/j721s2/j721s2_clocks_info.c \
- soc/j721s2/j721s2_host_info.c
+ soc/j721s2/j721s2_host_info.c \
+ soc/j721s2/j721s2_processors_info.c
COMMONOBJECTS= $(COMMONSOURCES:.c=.o)
AM65XOBJECTS= $(AM65XSOURCES:.c=.o)
diff --git a/common/socinfo.c b/common/socinfo.c
index 4bdd5699eeae8a989f9470a9e1360eade791f1b4..7a3247b3e85066695c73416a06e61fc30813fdab 100644 (file)
--- a/common/socinfo.c
+++ b/common/socinfo.c
#include <soc/j721s2/j721s2_devices_info.h>
#include <soc/j721s2/j721s2_clocks_info.h>
#include <soc/j721s2/j721s2_host_info.h>
+#include <soc/j721s2/j721s2_processors_info.h>
/* Assuming these addresses and definitions stay common across K3 devices */
#define CTRLMMR_WKUP_JTAG_DEVICE_ID 0x43000018
diff --git a/soc/j721s2/j721s2_processors_info.c b/soc/j721s2/j721s2_processors_info.c
--- /dev/null
@@ -0,0 +1,49 @@
+/*
+ * J721S2 Processor Info
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <tisci.h>
+#include <socinfo.h>
+
+struct ti_sci_processors_info j721s2_processors_info[] = {
+ [0] = {202, 0, 0x20, "A72SS0_CORE0"},
+ [1] = {203, 0, 0x21, "A72SS0_CORE1"},
+ [2] = {8, 0, 0x30, "COMPUTE_CLUSTER0_C71SS0_0"},
+ [3] = {11, 0, 0x31, "COMPUTE_CLUSTER0_C71SS1_0"},
+ [4] = {284, 0, 0x01, "MCU_R5FSS0_CORE0"},
+ [5] = {285, 0, 0x02, "MCU_R5FSS0_CORE1"},
+ [6] = {279, 0, 0x06, "R5FSS0_CORE0"},
+ [7] = {280, 0, 0x07, "R5FSS0_CORE1"},
+ [8] = {281, 0, 0x08, "R5FSS1_CORE0"},
+ [9] = {282, 0, 0x09, "R5FSS1_CORE1"},
+};
diff --git a/soc/j721s2/j721s2_processors_info.h b/soc/j721s2/j721s2_processors_info.h
--- /dev/null
@@ -0,0 +1,41 @@
+/*
+ * J721S2 Processor Info
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __J721S2_PROCESSOR_INFO_H
+#define __J721S2_PROCESSOR_INFO_H
+
+#define J721S2_MAX_PROCESSORS_IDS 10
+extern struct ti_sci_processors_info j721s2_processors_info[];
+
+#endif /* __J721S2_PROCESSOR_INFO_H */