soc: j7200: Add processors info

Add TISCI Processors information for J7200 devices.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

diff --git a/Makefile b/Makefile
index 0e33a2acabd084b2068d9f8ccaa3562511332b5e..4df21f9d90606465ac374fae46b98fcb8a600552 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -92,7 +92,8 @@ J721ESOURCES =\
              soc/j721e/j721e_devices_info.c \
              soc/j721e/j721e_clocks_info.c \
              soc/j7200/j7200_host_info.c \
-             soc/j7200/j7200_sec_proxy_info.c
+             soc/j7200/j7200_sec_proxy_info.c \
+             soc/j7200/j7200_processors_info.c
 
 
 COMMONOBJECTS= $(COMMONSOURCES:.c=.o)

diff --git a/common/socinfo.c b/common/socinfo.c
index 921b78957d5261167db41293e3695ed6f920b31a..a736ae6a52484c2ea43a14346f2be26695125395 100644 (file)
--- a/common/socinfo.c
+++ b/common/socinfo.c
@@ -54,6 +54,7 @@
 #include <soc/j721e/j721e_clocks_info.h>
 #include <soc/j7200/j7200_host_info.h>
 #include <soc/j7200/j7200_sec_proxy_info.h>
+#include <soc/j7200/j7200_processors_info.h>
 
 /* Assuming these addresses and definitions stay common across K3 devices */
 #define CTRLMMR_WKUP_JTAG_DEVICE_ID    0x43000018
@@ -151,6 +152,8 @@ static void j7200_init(void)
        sci_info->num_sp_threads[MAIN_SEC_PROXY] = J7200_MAIN_SEC_PROXY_THREADS;
        sci_info->sp_info[MCU_SEC_PROXY] = j7200_mcu_sp_info;
        sci_info->num_sp_threads[MCU_SEC_PROXY] = J7200_MCU_SEC_PROXY_THREADS;
+       sci_info->processors_info = j7200_processors_info;
+       sci_info->num_processors = J7200_MAX_PROCESSORS_IDS;
 }
 
 int soc_init(uint32_t host_id)

diff --git a/soc/j7200/j7200_processors_info.c b/soc/j7200/j7200_processors_info.c
new file mode 100644 (file)
index 0000000..7adb313
--- /dev/null
+++ b/soc/j7200/j7200_processors_info.c
@@ -0,0 +1,45 @@
+/*
+ * J7200 Processor Info
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <tisci.h>
+#include <socinfo.h>
+
+struct ti_sci_processors_info j7200_processors_info[] = {
+       [0] = {202, 2, 0x20, "A72SS0_CORE0"},
+       [1] = {203, 0, 0x21, "A72SS0_CORE1"},
+       [2] = {250, 0, 0x01, "MCU_R5FSS0_CORE0"},
+       [3] = {251, 0, 0x02, "MCU_R5FSS0_CORE1"},
+       [4] = {245, 0, 0x06, "R5FSS0_CORE0"},
+       [5] = {246, 0, 0x07, "R5FSS0_CORE1"},
+};

diff --git a/soc/j7200/j7200_processors_info.h b/soc/j7200/j7200_processors_info.h
new file mode 100644 (file)
index 0000000..6fa970a
--- /dev/null
+++ b/soc/j7200/j7200_processors_info.h
@@ -0,0 +1,41 @@
+/*
+ * J7200 Processor Info
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __J7200_PROCESSOR_INFO_H
+#define __J7200_PROCESSOR_INFO_H
+
+#define J7200_MAX_PROCESSORS_IDS       6
+extern struct ti_sci_processors_info j7200_processors_info[];
+
+#endif /* __J7200_PROCESSOR_INFO_H */
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