soc: am64x: Add processors info

Add TISCI Processors info for AM64x devices. Data based on sysfw
v2020.08b. Also assign this data to sci_info based on SoC detection.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

diff --git a/Makefile b/Makefile
index a77e4d4598587d4063733b6c000b6ca58132019f..411ad6034f124896b4f7bf90f79496ff0affad67 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -105,6 +105,7 @@ J721ESOURCES =\
 AM64XSOURCES =\
              soc/am64x/am64x_host_info.c \
              soc/am64x/am64x_sec_proxy_info.c \
+             soc/am64x/am64x_processors_info.c \
 
 COMMONOBJECTS= $(COMMONSOURCES:.c=.o)
 AM65XOBJECTS=  $(AM65XSOURCES:.c=.o)

diff --git a/common/socinfo.c b/common/socinfo.c
index e2069e892eea7ad91136dd27febc529e0779fb26..4fab6d5bce57c043f5f9dc6f0c26ccf6bdc9669c 100644 (file)
--- a/common/socinfo.c
+++ b/common/socinfo.c
@@ -63,6 +63,7 @@
 #include <soc/j7200/j7200_rm_info.h>
 #include <soc/am64x/am64x_host_info.h>
 #include <soc/am64x/am64x_sec_proxy_info.h>
+#include <soc/am64x/am64x_processors_info.h>
 
 /* Assuming these addresses and definitions stay common across K3 devices */
 #define CTRLMMR_WKUP_JTAG_DEVICE_ID    0x43000018
@@ -194,6 +195,8 @@ static void am64x_init(void)
        sci_info->num_sp_threads[MAIN_SEC_PROXY] = AM64X_MAIN_SEC_PROXY_THREADS;
        sci_info->sp_info[MCU_SEC_PROXY] = NULL;
        sci_info->num_sp_threads[MCU_SEC_PROXY] = 0;
+       sci_info->processors_info = am64x_processors_info;
+       sci_info->num_processors = AM64X_MAX_PROCESSORS_IDS;
        soc_info.host_id = 13;
        soc_info.sec_proxy = &k3_lite_sec_proxy_base;
 }

diff --git a/soc/am64x/am64x_processors_info.c b/soc/am64x/am64x_processors_info.c
new file mode 100644 (file)
index 0000000..9c0d5f4
--- /dev/null
+++ b/soc/am64x/am64x_processors_info.c
@@ -0,0 +1,46 @@
+/*
+ * AM64X Processor Info
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <tisci.h>
+#include <socinfo.h>
+
+struct ti_sci_processors_info am64x_processors_info[] = {
+       [0] = {135, 0, 0x20, "A53SS0_CORE_0"},
+       [1] = {136, 0, 0x21, "A53SS0_CORE_1"},
+       [2] = {9, 0, 0x18, "MCU_M4FSS0_CORE0"},
+       [3] = {121, 0, 0x01, "R5FSS0_CORE0"},
+       [4] = {122, 0, 0x02, "R5FSS0_CORE1"},
+       [5] = {123, 0, 0x06, "R5FSS1_CORE0"},
+       [6] = {124, 0, 0x07, "R5FSS1_CORE1"},
+};

diff --git a/soc/am64x/am64x_processors_info.h b/soc/am64x/am64x_processors_info.h
new file mode 100644 (file)
index 0000000..af9d3ad
--- /dev/null
+++ b/soc/am64x/am64x_processors_info.h
@@ -0,0 +1,41 @@
+/*
+ * AM64X Processor Info
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __AM64X_PROCESSOR_INFO_H
+#define __AM64X_PROCESSOR_INFO_H
+
+#define AM64X_MAX_PROCESSORS_IDS       7
+extern struct ti_sci_processors_info am64x_processors_info[];
+
+#endif /* __AM64X_PROCESSOR_INFO_H */
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