soc: am65x: Update sysfw data corresponding to v2020.08b
authorLokesh Vutla <lokeshvutla@ti.com>
Wed, 11 Nov 2020 15:09:24 +0000 (20:39 +0530)
committerLokesh Vutla <lokeshvutla@ti.com>
Thu, 12 Nov 2020 07:39:14 +0000 (13:09 +0530)
Update the sysfw data that corresponds to v2020.08b. Also fix the TI
link in Copyright headers

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
soc/am65x/am65x_processors_info.c
soc/am65x/am65x_sec_proxy_info.c

index d0fd226c2ec5534f825d673e81ae75a08e8d31e7..b9caab3eaaf650892ce27a709b84dbe71402b4db 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * SoC Host Info
+ * AM65X Processor Info
  *
  * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
  *
index e20cd7a3093aa3bbf2c6717d8e127472e6ad96b3..5663834182a2f78aa7442b5e98157b8ae054f58c 100644 (file)
@@ -105,14 +105,14 @@ struct ti_sci_sec_proxy_info am65x_main_sp_info[] = {
 
 struct ti_sci_sec_proxy_info am65x_mcu_sp_info[] = {
        [0] = {0, "read", 2, "R5_0", "notify"},
-       [1] = {1, "read", 7, "R5_0", "response"},
-       [2] = {2, "write", 2, "R5_0", "high_priority"},
-       [3] = {3, "write", 5, "R5_0", "low_priority"},
+       [1] = {1, "read", 20, "R5_0", "response"},
+       [2] = {2, "write", 10, "R5_0", "high_priority"},
+       [3] = {3, "write", 10, "R5_0", "low_priority"},
        [4] = {4, "write", 2, "R5_0", "notify_resp"},
        [5] = {5, "read", 2, "R5_1", "notify"},
-       [6] = {6, "read", 7, "R5_1", "response"},
-       [7] = {7, "write", 2, "R5_1", "high_priority"},
-       [8] = {8, "write", 5, "R5_1", "low_priority"},
+       [6] = {6, "read", 20, "R5_1", "response"},
+       [7] = {7, "write", 10, "R5_1", "high_priority"},
+       [8] = {8, "write", 10, "R5_1", "low_priority"},
        [9] = {9, "write", 2, "R5_1", "notify_resp"},
        [10] = {10, "read", 1, "R5_2", "notify"},
        [11] = {11, "read", 2, "R5_2", "response"},