soc: am65x: Add host id information

Host Id information of AM65x devices.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

diff --git a/Makefile b/Makefile
index 6171a127c2d9261161995e14741d761018c2521e..00849a6070fe7f7ce5b75dc53637a389d4c5e618 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -66,11 +66,15 @@ COMMONSOURCES=\
                common/tisci/tisci_device.c \
                common/tisci/tisci_clock.c
 
+AM65XSOURCES =\
+             soc/am65x/am65x_host_info.c
+
 COMMONOBJECTS= $(COMMONSOURCES:.c=.o)
+AM65XOBJECTS=  $(AM65XSOURCES:.c=.o)
 
-ALLSOURCES=    $(COMMONSOURCES)
+ALLSOURCES=    $(COMMONSOURCES) $(AM65XSOURCES)
 
-ALLOBJECTS=    $(COMMONOBJECTS)
+ALLOBJECTS=    $(COMMONOBJECTS) $(AM65XOBJECTS)
 
 #
 # Pretty print

diff --git a/common/socinfo.c b/common/socinfo.c
index 3a23b5a601b34816eeabab659a89767f052e9ba2..a7bd37945269a9f9969d4f7b96f601d1ca340ed3 100644 (file)
--- a/common/socinfo.c
+++ b/common/socinfo.c
@@ -37,6 +37,7 @@
 #include <mmio.h>
 #include <string.h>
 #include <sec_proxy.h>
+#include <soc/am65x/am65x_host_info.h>
 
 /* Assuming these addresses and definitions stay common across K3 devices */
 #define CTRLMMR_WKUP_JTAG_DEVICE_ID    0x43000018
@@ -76,6 +77,14 @@ static const char soc_revision[REV_PG_MAX + 1][SOC_REVISION_MAX_LENGTH] = {
        [REV_PG_MAX] = "NULL"
 };
 
+static void am654_init(void)
+{
+       struct ti_sci_info *sci_info = &soc_info.sci_info;
+
+       sci_info->host_info = am65x_host_info;
+       sci_info->num_hosts = AM65X_MAX_HOST_IDS;
+}
+
 int soc_init(void)
 {
        memset(&soc_info, 0, sizeof(soc_info));
@@ -102,6 +111,9 @@ int soc_init(void)
 
        soc_info.host_id = DEFAULT_HOST_ID;
 
+       if (soc_info.soc == AM654)
+               am654_init();
+
        /* ToDo: Add error if sec_proxy_init/sci_init is failed */
        if(!k3_sec_proxy_init())
                if (!ti_sci_init())

diff --git a/include/soc/am65x/am65x_host_info.h b/include/soc/am65x/am65x_host_info.h
new file mode 100644 (file)
index 0000000..e3ff9a7
--- /dev/null
+++ b/include/soc/am65x/am65x_host_info.h
@@ -0,0 +1,63 @@
+/*
+ * SoC Host Info
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __AM65X_HOST_INFO
+#define __AM65X_HOST_INFO
+
+#include <stdio.h>
+#include <stdint.h>
+
+#define AM65X_HOST_ID_DMSC   0
+#define AM65X_HOST_ID_R5_0   3
+#define AM65X_HOST_ID_R5_1   4
+#define AM65X_HOST_ID_R5_2   5
+#define AM65X_HOST_ID_R5_3   6
+#define AM65X_HOST_ID_A53_0   10
+#define AM65X_HOST_ID_A53_1   11
+#define AM65X_HOST_ID_A53_2   12
+#define AM65X_HOST_ID_A53_3   13
+#define AM65X_HOST_ID_A53_4   14
+#define AM65X_HOST_ID_A53_5   15
+#define AM65X_HOST_ID_A53_6   16
+#define AM65X_HOST_ID_A53_7   17
+#define AM65X_HOST_ID_GPU_0   30
+#define AM65X_HOST_ID_GPU_1   31
+#define AM65X_HOST_ID_ICSSG_0   50
+#define AM65X_HOST_ID_ICSSG_1   51
+#define AM65X_HOST_ID_ICSSG_2   52
+
+#define AM65X_MAX_HOST_IDS     18
+
+extern struct ti_sci_host_info am65x_host_info[];
+#endif
\ No newline at end of file

diff --git a/include/tisci.h b/include/tisci.h
index 71fca60d4fd3d56118d577448808591a85145fc6..344525bdd8b2d5d7fbff0a7f1cc07ecfdf1ea8e1 100644 (file)
--- a/include/tisci.h
+++ b/include/tisci.h
@@ -45,9 +45,18 @@ struct ti_sci_version_info {
        char firmware_description[32];
 };
 
+struct ti_sci_host_info {
+       uint32_t host_id;
+       char host_name[15];
+       char security_status[15];
+       char description[50];
+};
+
 struct ti_sci_info {
        uint8_t host_id;
        struct ti_sci_version_info version;
+       struct ti_sci_host_info *host_info;
+       uint32_t num_hosts;
 };
 
 #define MAX_DEVICE_STATE_LENGTH                25

diff --git a/soc/am65x/am65x_host_info.c b/soc/am65x/am65x_host_info.c
new file mode 100644 (file)
index 0000000..47684d2
--- /dev/null
+++ b/soc/am65x/am65x_host_info.c
@@ -0,0 +1,57 @@
+/*
+ * SoC Host Info
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <tisci.h>
+#include <socinfo.h>
+
+struct ti_sci_host_info am65x_host_info[] = {
+       [0] = {0, "DMSC", "Secure", "Device Management and Security Control"},
+       [1] = {3, "R5_0", "Non Secure", "Cortex R5 Context 0 on MCU island"},
+       [2] = {4, "R5_1", "Secure", "Cortex R5 Context 1 on MCU island(Boot)"},
+       [3] = {5, "R5_2", "Non Secure", "Cortex R5 Context 2 on MCU island"},
+       [4] = {6, "R5_3", "Secure", "Cortex R5 Context 3 on MCU island"},
+       [5] = {10, "A53_0", "Secure", "Cortex A53 context 0 on Main island"},
+       [6] = {11, "A53_1", "Secure", "Cortex A53 context 1 on Main island"},
+       [7] = {12, "A53_2", "Non Secure", "Cortex A53 context 2 on Main island"},
+       [8] = {13, "A53_3", "Non Secure", "Cortex A53 context 3 on Main island"},
+       [9] = {14, "A53_4", "Non Secure", "Cortex A53 context 4 on Main island"},
+       [10] = {15, "A53_5", "Non Secure", "Cortex A53 context 5 on Main island"},
+       [11] = {16, "A53_6", "Non Secure", "Cortex A53 context 6 on Main island"},
+       [12] = {17, "A53_7", "Non Secure", "Cortex A53 context 7 on Main island"},
+       [13] = {30, "GPU_0", "Non Secure", "SGX544 Context 0 on Main island"},
+       [14] = {31, "GPU_1", "Non Secure", "SGX544 Context 1 on Main island"},
+       [15] = {50, "ICSSG_0", "Non Secure", "ICSS Context 0 on Main island"},
+       [16] = {51, "ICSSG_1", "Non Secure", "ICSS Context 1 on Main island"},
+       [17] = {52, "ICSSG_2", "Non Secure", "ICSS Context 2 on Main island"},
+};
\ No newline at end of file