soc: j7200: Add sec proxy info
authorLokesh Vutla <lokeshvutla@ti.com>
Fri, 10 Jul 2020 04:47:00 +0000 (10:17 +0530)
committerLokesh Vutla <lokeshvutla@ti.com>
Mon, 28 Sep 2020 09:46:13 +0000 (15:16 +0530)
Add TISCI Secure proxy info for J7200 devices.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Makefile
common/socinfo.c
soc/j7200/j7200_sec_proxy_info.c [new file with mode: 0644]
soc/j7200/j7200_sec_proxy_info.h [new file with mode: 0644]

index 5ea905e5dcb53412d57ad0becf33783ca83845c7..0e33a2acabd084b2068d9f8ccaa3562511332b5e 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -91,7 +91,8 @@ J721ESOURCES =\
              soc/j721e/j721e_processors_info.c \
              soc/j721e/j721e_devices_info.c \
              soc/j721e/j721e_clocks_info.c \
-             soc/j7200/j7200_host_info.c
+             soc/j7200/j7200_host_info.c \
+             soc/j7200/j7200_sec_proxy_info.c
 
 
 COMMONOBJECTS= $(COMMONSOURCES:.c=.o)
index 77dfeeb8171531b4017189f2f13f5f6a3494e0fe..921b78957d5261167db41293e3695ed6f920b31a 100644 (file)
@@ -53,6 +53,7 @@
 #include <soc/j721e/j721e_devices_info.h>
 #include <soc/j721e/j721e_clocks_info.h>
 #include <soc/j7200/j7200_host_info.h>
+#include <soc/j7200/j7200_sec_proxy_info.h>
 
 /* Assuming these addresses and definitions stay common across K3 devices */
 #define CTRLMMR_WKUP_JTAG_DEVICE_ID    0x43000018
@@ -146,6 +147,10 @@ static void j7200_init(void)
 
        sci_info->host_info = j7200_host_info;
        sci_info->num_hosts = J7200_MAX_HOST_IDS;
+       sci_info->sp_info[MAIN_SEC_PROXY] = j7200_main_sp_info;
+       sci_info->num_sp_threads[MAIN_SEC_PROXY] = J7200_MAIN_SEC_PROXY_THREADS;
+       sci_info->sp_info[MCU_SEC_PROXY] = j7200_mcu_sp_info;
+       sci_info->num_sp_threads[MCU_SEC_PROXY] = J7200_MCU_SEC_PROXY_THREADS;
 }
 
 int soc_init(uint32_t host_id)
diff --git a/soc/j7200/j7200_sec_proxy_info.c b/soc/j7200/j7200_sec_proxy_info.c
new file mode 100644 (file)
index 0000000..67c7238
--- /dev/null
@@ -0,0 +1,107 @@
+/*
+ * J7200 Sec Proxy Info
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <tisci.h>
+#include <socinfo.h>
+
+struct ti_sci_sec_proxy_info j7200_main_sp_info[] = {
+       [0] = {0, "read", 2, "A72_0", "notify"},
+       [1] = {1, "read", 30, "A72_0", "response"},
+       [2] = {2, "write", 10, "A72_0", "high_priority"},
+       [3] = {3, "write", 20, "A72_0", "low_priority"},
+       [4] = {4, "write", 2, "A72_0", "notify_resp"},
+       [5] = {5, "read", 2, "A72_1", "notify"},
+       [6] = {6, "read", 30, "A72_1", "response"},
+       [7] = {7, "write", 10, "A72_1", "high_priority"},
+       [8] = {8, "write", 20, "A72_1", "low_priority"},
+       [9] = {9, "write", 2, "A72_1", "notify_resp"},
+       [10] = {10, "read", 2, "A72_2", "notify"},
+       [11] = {11, "read", 22, "A72_2", "response"},
+       [12] = {12, "write", 2, "A72_2", "high_priority"},
+       [13] = {13, "write", 20, "A72_2", "low_priority"},
+       [14] = {14, "write", 2, "A72_2", "notify_resp"},
+       [15] = {15, "read", 2, "A72_3", "notify"},
+       [16] = {16, "read", 7, "A72_3", "response"},
+       [17] = {17, "write", 2, "A72_3", "high_priority"},
+       [18] = {18, "write", 5, "A72_3", "low_priority"},
+       [19] = {19, "write", 2, "A72_3", "notify_resp"},
+       [20] = {20, "read", 2, "A72_4", "notify"},
+       [21] = {21, "read", 7, "A72_4", "response"},
+       [22] = {22, "write", 2, "A72_4", "high_priority"},
+       [23] = {23, "write", 5, "A72_4", "low_priority"},
+       [24] = {24, "write", 2, "A72_4", "notify_resp"},
+       [25] = {25, "read", 2, "MAIN_0_R5_0", "notify"},
+       [26] = {26, "read", 7, "MAIN_0_R5_0", "response"},
+       [27] = {27, "write", 2, "MAIN_0_R5_0", "high_priority"},
+       [28] = {28, "write", 5, "MAIN_0_R5_0", "low_priority"},
+       [29] = {29, "write", 2, "MAIN_0_R5_0", "notify_resp"},
+       [30] = {30, "read", 2, "MAIN_0_R5_1", "notify"},
+       [31] = {31, "read", 7, "MAIN_0_R5_1", "response"},
+       [32] = {32, "write", 2, "MAIN_0_R5_1", "high_priority"},
+       [33] = {33, "write", 5, "MAIN_0_R5_1", "low_priority"},
+       [34] = {34, "write", 2, "MAIN_0_R5_1", "notify_resp"},
+       [35] = {35, "read", 1, "MAIN_0_R5_2", "notify"},
+       [36] = {36, "read", 2, "MAIN_0_R5_2", "response"},
+       [37] = {37, "write", 1, "MAIN_0_R5_2", "high_priority"},
+       [38] = {38, "write", 1, "MAIN_0_R5_2", "low_priority"},
+       [39] = {39, "write", 1, "MAIN_0_R5_2", "notify_resp"},
+       [40] = {40, "read", 1, "MAIN_0_R5_3", "notify"},
+       [41] = {41, "read", 2, "MAIN_0_R5_3", "response"},
+       [42] = {42, "write", 1, "MAIN_0_R5_3", "high_priority"},
+       [43] = {43, "write", 1, "MAIN_0_R5_3", "low_priority"},
+       [44] = {44, "write", 1, "MAIN_0_R5_3", "notify_resp"},
+};
+
+struct ti_sci_sec_proxy_info j7200_mcu_sp_info[] = {
+       [0] = {0, "read", 2, "MCU_0_R5_0", "notify"},
+       [1] = {1, "read", 20, "MCU_0_R5_0", "response"},
+       [2] = {2, "write", 10, "MCU_0_R5_0", "high_priority"},
+       [3] = {3, "write", 10, "MCU_0_R5_0", "low_priority"},
+       [4] = {4, "write", 2, "MCU_0_R5_0", "notify_resp"},
+       [5] = {5, "read", 2, "MCU_0_R5_1", "notify"},
+       [6] = {6, "read", 20, "MCU_0_R5_1", "response"},
+       [7] = {7, "write", 10, "MCU_0_R5_1", "high_priority"},
+       [8] = {8, "write", 10, "MCU_0_R5_1", "low_priority"},
+       [9] = {9, "write", 2, "MCU_0_R5_1", "notify_resp"},
+       [10] = {10, "read", 1, "MCU_0_R5_2", "notify"},
+       [11] = {11, "read", 2, "MCU_0_R5_2", "response"},
+       [12] = {12, "write", 1, "MCU_0_R5_2", "high_priority"},
+       [13] = {13, "write", 1, "MCU_0_R5_2", "low_priority"},
+       [14] = {14, "write", 1, "MCU_0_R5_2", "notify_resp"},
+       [15] = {15, "read", 1, "MCU_0_R5_3", "notify"},
+       [16] = {16, "read", 2, "MCU_0_R5_3", "response"},
+       [17] = {17, "write", 1, "MCU_0_R5_3", "high_priority"},
+       [18] = {18, "write", 1, "MCU_0_R5_3", "low_priority"},
+       [19] = {19, "write", 1, "MCU_0_R5_3", "notify_resp"},
+};
diff --git a/soc/j7200/j7200_sec_proxy_info.h b/soc/j7200/j7200_sec_proxy_info.h
new file mode 100644 (file)
index 0000000..f909bc8
--- /dev/null
@@ -0,0 +1,44 @@
+/*
+ * J7200 Sec Proxy Info
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __J7200_SEC_PROXY_INFO_H
+#define __J7200_SEC_PROXY_INFO_H
+
+#define J7200_MAIN_SEC_PROXY_THREADS   45
+#define J7200_MCU_SEC_PROXY_THREADS    20
+
+extern struct ti_sci_sec_proxy_info j7200_main_sp_info[];
+extern struct ti_sci_sec_proxy_info j7200_mcu_sp_info[];
+
+#endif /* __J7200_SEC_PROXY_INFO_H */
\ No newline at end of file