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author | Nikhil Devshatwar <nikhil.nd@ti.com> | |
Wed, 4 Nov 2020 07:08:34 +0000 (12:38 +0530) | ||
committer | Lokesh Vutla <lokeshvutla@ti.com> | |
Wed, 4 Nov 2020 09:44:38 +0000 (15:14 +0530) |
Add Resource management unique types for J721E
Generated from SYSFW 2020.08
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Generated from SYSFW 2020.08
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Makefile | patch | blob | history | |
common/socinfo.c | patch | blob | history | |
soc/j721e/j721e_rm_info.c | [new file with mode: 0644] | patch | blob |
soc/j721e/j721e_rm_info.h | [new file with mode: 0644] | patch | blob |
diff --git a/Makefile b/Makefile
index 59050aa4a42a8512c193e04060a3b9279396b9c4..0d389848ff56c4e2a8bfde09f3e9b6e60f75d75b 100644 (file)
--- a/Makefile
+++ b/Makefile
soc/j721e/j721e_processors_info.c \
soc/j721e/j721e_devices_info.c \
soc/j721e/j721e_clocks_info.c \
+ soc/j721e/j721e_rm_info.c \
soc/j7200/j7200_host_info.c \
soc/j7200/j7200_sec_proxy_info.c \
soc/j7200/j7200_processors_info.c \
diff --git a/common/socinfo.c b/common/socinfo.c
index 8bdfe20b8ef436226198218c2e5ed19fdecc81e2..9eca228ecf83fb63d5c5b014879e9d46b2301a3f 100644 (file)
--- a/common/socinfo.c
+++ b/common/socinfo.c
#include <soc/j721e/j721e_processors_info.h>
#include <soc/j721e/j721e_devices_info.h>
#include <soc/j721e/j721e_clocks_info.h>
+#include <soc/j721e/j721e_rm_info.h>
#include <soc/j7200/j7200_host_info.h>
#include <soc/j7200/j7200_sec_proxy_info.h>
#include <soc/j7200/j7200_processors_info.h>
sci_info->num_devices = J721E_MAX_DEVICES;
sci_info->clocks_info = j721e_clocks_info;
sci_info->num_clocks = J721E_MAX_CLOCKS;
+ sci_info->rm_info = j721e_rm_info;
+ sci_info->num_res = J721E_MAX_RES;
}
static void j7200_init(void)
diff --git a/soc/j721e/j721e_rm_info.c b/soc/j721e/j721e_rm_info.c
--- /dev/null
@@ -0,0 +1,99 @@
+/*
+ * J721E RM Info
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <tisci.h>
+#include <socinfo.h>
+
+struct ti_sci_rm_info j721e_rm_info[] = {
+ [0] = {0x1E40, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [1] = {0x1E80, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [2] = {0x1EC0, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [3] = {0x2000, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [4] = {0x2080, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [5] = {0x20C0, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [6] = {0x2180, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [7] = {0x21C0, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [8] = {0x2200, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [9] = {0x2240, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [10] = {0x33CA, "RESASG_SUBTYPE_IA_VINT"},
+ [11] = {0x33CD, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
+ [12] = {0x340A, "RESASG_SUBTYPE_IA_VINT"},
+ [13] = {0x340D, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
+ [14] = {0x344A, "RESASG_SUBTYPE_IA_VINT"},
+ [15] = {0x344D, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
+ [16] = {0x3480, "RESASG_SUBTYPE_PROXY_PROXIES"},
+ [17] = {0x34C0, "RESASG_SUBTYPE_RA_ERROR_OES"},
+ [18] = {0x34C1, "RESASG_SUBTYPE_RA_GP"},
+ [19] = {0x34C2, "RESASG_SUBTYPE_RA_UDMAP_RX"},
+ [20] = {0x34C3, "RESASG_SUBTYPE_RA_UDMAP_TX"},
+ [21] = {0x34C4, "RESASG_SUBTYPE_RA_UDMAP_TX_EXT"},
+ [22] = {0x34C5, "RESASG_SUBTYPE_RA_UDMAP_RX_H"},
+ [23] = {0x34C6, "RESASG_SUBTYPE_RA_UDMAP_RX_UH"},
+ [24] = {0x34C7, "RESASG_SUBTYPE_RA_UDMAP_TX_H"},
+ [25] = {0x34C8, "RESASG_SUBTYPE_RA_UDMAP_TX_UH"},
+ [26] = {0x34CA, "RESASG_SUBTYPE_RA_VIRTID"},
+ [27] = {0x34CB, "RESASG_SUBTYPE_RA_MONITORS"},
+ [28] = {0x3500, "RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON"},
+ [29] = {0x3501, "RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES"},
+ [30] = {0x3502, "RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER"},
+ [31] = {0x3503, "RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG"},
+ [32] = {0x350A, "RESASG_SUBTYPE_UDMAP_RX_CHAN"},
+ [33] = {0x350B, "RESASG_SUBTYPE_UDMAP_RX_HCHAN"},
+ [34] = {0x350C, "RESASG_SUBTYPE_UDMAP_RX_UHCHAN"},
+ [35] = {0x350D, "RESASG_SUBTYPE_UDMAP_TX_CHAN"},
+ [36] = {0x350E, "RESASG_SUBTYPE_UDMAP_TX_ECHAN"},
+ [37] = {0x350F, "RESASG_SUBTYPE_UDMAP_TX_HCHAN"},
+ [38] = {0x3510, "RESASG_SUBTYPE_UDMAP_TX_UHCHAN"},
+ [39] = {0x3540, "RESASG_SUBTYPE_IR_OUTPUT"},
+ [40] = {0x3A4A, "RESASG_SUBTYPE_IA_VINT"},
+ [41] = {0x3A4D, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
+ [42] = {0x3A80, "RESASG_SUBTYPE_PROXY_PROXIES"},
+ [43] = {0x3AC0, "RESASG_SUBTYPE_RA_ERROR_OES"},
+ [44] = {0x3AC1, "RESASG_SUBTYPE_RA_GP"},
+ [45] = {0x3AC2, "RESASG_SUBTYPE_RA_UDMAP_RX"},
+ [46] = {0x3AC3, "RESASG_SUBTYPE_RA_UDMAP_TX"},
+ [47] = {0x3AC5, "RESASG_SUBTYPE_RA_UDMAP_RX_H"},
+ [48] = {0x3AC7, "RESASG_SUBTYPE_RA_UDMAP_TX_H"},
+ [49] = {0x3ACA, "RESASG_SUBTYPE_RA_VIRTID"},
+ [50] = {0x3ACB, "RESASG_SUBTYPE_RA_MONITORS"},
+ [51] = {0x3B00, "RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON"},
+ [52] = {0x3B01, "RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES"},
+ [53] = {0x3B02, "RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER"},
+ [54] = {0x3B03, "RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG"},
+ [55] = {0x3B0A, "RESASG_SUBTYPE_UDMAP_RX_CHAN"},
+ [56] = {0x3B0B, "RESASG_SUBTYPE_UDMAP_RX_HCHAN"},
+ [57] = {0x3B0D, "RESASG_SUBTYPE_UDMAP_TX_CHAN"},
+ [58] = {0x3B0F, "RESASG_SUBTYPE_UDMAP_TX_HCHAN"},
+ [59] = {0x3B40, "RESASG_SUBTYPE_IR_OUTPUT"},
+};
diff --git a/soc/j721e/j721e_rm_info.h b/soc/j721e/j721e_rm_info.h
--- /dev/null
@@ -0,0 +1,42 @@
+/*
+ * J721E RM Info
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __J721E_RM_INFO_H
+#define __J721E_RM_INFO_H
+
+#define J721E_MAX_RES 60
+
+extern struct ti_sci_rm_info j721e_rm_info[];
+
+#endif /* __J721E_RM_INFO_H */
\ No newline at end of file