boot-monitor: using arch_timer frequency that is passed from u-boot

The skern_init() is actually called with four parameters where
arch timer frequency is passed in R3 and dpsc_base in R2.
This patch fixes the bug by adding dpsc_base parameter before freq.

It also used the provided frequency instead of hard-coded value
to set the arch_timer_freq.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>

diff --git a/sec/skern.c b/sec/skern.c
index b246e385e2ff673994308fe3c8f2a9642e5f08e9..575b7a672bc9ebc751c215c2164bfc5c1168c148 100644 (file)
--- a/sec/skern.c
+++ b/sec/skern.c
@@ -178,13 +178,17 @@ void a15_setup_cp15(void)
 }
 
 void *skern_init(unsigned int (*fcn_p()), unsigned int from,
-                               unsigned int freq)
+                               unsigned int dpsc_base, unsigned int freq)
 {
        int i, cpu_id = chip_get_arm_num();
        unsigned int *addr = (unsigned int *)ARM_MAGIC_ADDR_ARM0;
 
-       if (debug)
+       if (debug) {
                skern_puts("Message2 from Secure Mode\n\r");
+               skern_puts("Core freq - 0x");
+               skern_putui(freq);
+               skern_puts("\n\r");
+       }
        /*
         * set up magic address with secondary boot code address
         * if we are entering from boot loader.
@@ -192,7 +196,7 @@ void *skern_init(unsigned int (*fcn_p()), unsigned int from,
        if (from == PRIMARY_ENTRY) {
                skernel_cpu_data.tetris_dpsc_base = DPSC_BASE;
                /* hard code the arch timer frquency now */
-               skernel_cpu_data.arch_timer_freq = 166666666;
+               skernel_cpu_data.arch_timer_freq = freq;
                for (i = 0; i < ARM_CLUSTER_NUM_CPUS; i++) {
                        if (i != cpu_id)
                                addr[i] = SECONDARY_ENTRY_PTR;