keystone-linux/boot-monitor.git
5 years agoboot-monitor: fix build warning using gcc 4.9 tool chain master
Murali Karicheri [Thu, 6 Aug 2015 15:21:39 +0000 (11:21 -0400)]
boot-monitor: fix build warning using gcc 4.9 tool chain

Fix the following build warning when using gcc 4.9 tool chain,

skern.c: In function 'skern_init':
skern.c:285:15: warning: assignment makes integer from pointer without a cast
   addr[i * 2] = (unsigned int *)_skern_123_init;

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
5 years agoboot-monitor: fix makefile to support multiple jobs
Vitaly Andrianov [Tue, 4 Aug 2015 18:31:35 +0000 (14:31 -0400)]
boot-monitor: fix makefile to support multiple jobs

Makefile target "all" lists targets for multiple EVMs, which cannot be
built simultaneously. This doesn't allow to use multiple jobs.
This patch makes the targets built one after another, which fixes the
issue.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
5 years agoboot-monitor: don't set fast-boot for ARM0 core K2_BM_15.07
Vitaly Andrianov [Fri, 5 Jun 2015 12:45:08 +0000 (08:45 -0400)]
boot-monitor: don't set fast-boot for ARM0 core

Setting the fast-boot RBL entry point for ARM0 prevents RBL to perform a
normal boot sequence when kernel issues the reboot command. We need to
leave the CORE_N_BASE_ADDR for ARM0 unmodified to allow it to perform normal
RBL boot.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
5 years agoboot-monitor: fix up makedefs for yocto build
Murali Karicheri [Fri, 15 May 2015 20:29:32 +0000 (16:29 -0400)]
boot-monitor: fix up makedefs for yocto build

Newer versions of yocto build fails with all the hardcoded paths.
Fix this so that build can succeeds.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
5 years agoboot-monitor: add pre-built binary to support pre pg2 devices/evms
Murali Karicheri [Fri, 15 May 2015 14:53:47 +0000 (10:53 -0400)]
boot-monitor: add pre-built binary to support pre pg2 devices/evms

The fast boot support is not available on pre-pg2 k2hk devices and EVMs.
The current boot monitor source available is not backward compatible
with pre-pg2 socs. So to support these h/w, provide a pre-built binary
that can be used by the users. This binary is expected to be present
in the release pre-built binaries and UBI image. To build this binary
either revert the commit "boot-monitor: rework to support secondary
 CPU fast-boot" and build.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
6 years agoboot-monitor: rework to support secondary CPU fast-boot
Vitaly Andrianov [Mon, 9 Mar 2015 16:52:10 +0000 (12:52 -0400)]
boot-monitor: rework to support secondary CPU fast-boot

This commit changes the method of booting secondary ARM cores.
BM doesn't use anymore the same _skern_init function to initialize
all ARM cores. We have simplified _skern_123_init and corresponding
skern_123_init() for that.

When BM is being installed, it store _skern_123_init address at the
core_n_base_addr for each ARM core. When later we power on a slave core
RBL doesn't preform the complete boot, but branches directly to the
_skern_123_init()

_skern_123_init sets the monitor vectors and stack, initializes GIC
registers, and goes to non-secure SVR mode. There it initializes
non-secure SVR stack and branches to the kernel entry point.

This BM supports only fast boot mode only.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
6 years agoboot-monitor: set L2ACTLR.8 bit K2_BM_14.09
Vitaly Andrianov [Fri, 22 Aug 2014 00:16:09 +0000 (20:16 -0400)]
boot-monitor: set L2ACTLR.8 bit

Disables DVM and cache maintenance operation message broadcast

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
6 years agoboot-monitor: add workaround for stream performance degradation K2_BM_14.07
Murali Karicheri [Thu, 17 Jul 2014 16:28:17 +0000 (12:28 -0400)]
boot-monitor: add workaround for stream performance degradation

On Keystone II SOCs, to support IO coherency, the memory
pages have to be marked outer shareable. But this has
undesired effect on the system and there are extra
snoop related writes send on the bus which creates
pressure on the memory pipe and hence the performance.

Since this additional write traffic is for snoop-filter
which MSMC doesn't support, we can suppress those and
get back the performance.

So disables clean/evict from being pushed to external
memory by setting L2ACTLR[.3] = 1.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
6 years agoboot-monitor: clean up images for clean target
Murali Karicheri [Wed, 18 Jun 2014 14:51:44 +0000 (10:51 -0400)]
boot-monitor: clean up images for clean target

Currently make clean doesn't clean the SoC specific images. This
patch rename clean to build_clean and use clean to wipe out all of
images and objects.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
6 years agoboot-monitor: set NSACR.NS_SMP bit K2_BM_14.06
Vitaly Andrianov [Mon, 9 Jun 2014 13:51:12 +0000 (09:51 -0400)]
boot-monitor: set NSACR.NS_SMP bit

SMP Linux kernel sets the ACTRL.SMP bit. We need to set NSACR.NS_SMP bit
to make the ACTRL.SMP writable form non-secure world.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
6 years agoboot-monitor: fix power on and power off sequence
Vitaly Andrianov [Wed, 28 May 2014 18:18:55 +0000 (14:18 -0400)]
boot-monitor: fix power on and power off sequence

Accordingly to PSCI API document the PSCI_CPU_ON just return ALREADY_ON
code for already running CPU. Otherwise it powers it on.

For POWER_OFF another CPU, the CPU just turns the DPSC off for required
CPU, but not wait for completion. If the CPU power off itself and it is not
the CPU 0. It calls WFI instruction, which has to complete the operation.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
6 years agoboot-monitor: add and use PSCI definitions
Vitaly Andrianov [Tue, 27 May 2014 13:18:19 +0000 (09:18 -0400)]
boot-monitor: add and use PSCI definitions

We are converting boot-monitor to support PSCI API. This patch
adds command and error definitions from ARM DEN0022B document.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
6 years agoboot-monitor: disable SMP bit on power on
Vitaly Andrianov [Tue, 27 May 2014 12:11:20 +0000 (08:11 -0400)]
boot-monitor: disable SMP bit on power on

We don't know the SMP bit status of the core after RBL boots it.
It is better to disable it explicitly.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
6 years agoboot-monitor: add support of the PSCI_CPU_OFF API
Vitaly Andrianov [Wed, 14 May 2014 18:47:13 +0000 (14:47 -0400)]
boot-monitor: add support of the PSCI_CPU_OFF API

It adds support of the psci_cpu_off API. This support of powering
a particular core only, but not the entire cluster.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
6 years agoboot-monitor: fix powering down cpu sequence
Vitaly Andrianov [Wed, 14 May 2014 18:43:39 +0000 (14:43 -0400)]
boot-monitor: fix powering down cpu sequence

Accordingly to tetris spec a powering itself core has to power off
itself by turning off ots DPSC, disable caches, flushes L1 data cache.
Only after that it has to disable SMP bit and execute a WFI instruction.

This patch also adds displaying cpi_id to debug output

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
6 years agoboot monitor: add support for k2l and k2e devices.
Hao Zhang [Tue, 7 Jan 2014 21:59:28 +0000 (16:59 -0500)]
boot monitor: add support for k2l and k2e devices.

7 years agoboot-monitor: enable ECC and parity enable bit for L1 and L2 caches on ARM K2_BM_13.11
Murali Karicheri [Thu, 26 Sep 2013 18:18:28 +0000 (14:18 -0400)]
boot-monitor: enable ECC and parity enable bit for L1 and L2 caches on ARM

This is disabled as this is an optional feature. This patch enables this
on ARM for K2

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
7 years agoboot-monitor: fix the clobber list
Murali Karicheri [Thu, 29 Aug 2013 19:20:06 +0000 (15:20 -0400)]
boot-monitor: fix the clobber list

The SMP disable asm instruction needs to add r8 to clobber list

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
7 years agoboot-monitor: fix poweron and poweroff functions
Vitaly Andrianov [Thu, 15 Aug 2013 14:57:04 +0000 (10:57 -0400)]
boot-monitor: fix poweron and poweroff functions

This patch fixes several bugs in the skern_poweron_cpu() and
skern_poweroff_cpu()

1. makes *addr volatile
2. uses correct bits to poll on and off status
3. If the CPU turns off itself, doesn't poll the status
4. Reser SMP bit

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
7 years agoboot-monitor: add changes for errata 799270 and 798870
Murali Karicheri [Thu, 11 Jul 2013 18:50:07 +0000 (14:50 -0400)]
boot-monitor: add changes for errata 799270 and 798870

Also fix up function naming in sync with rest of the file

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
7 years agoboot-monitor: remove soft-float option
Murali Karicheri [Fri, 24 May 2013 19:38:21 +0000 (15:38 -0400)]
boot-monitor: remove soft-float option

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: fix MPU settings to provide user space access
Murali Karicheri [Mon, 6 May 2013 18:21:33 +0000 (14:21 -0400)]
boot-monitor: fix MPU settings to provide user space access

fix an address incrementing bug in the MPU setting code

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: update MPU settings for user mode access
Murali Karicheri [Mon, 18 Mar 2013 17:43:41 +0000 (13:43 -0400)]
boot-monitor: update MPU settings for user mode access

Some more settings for user mode access

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: adding conditional compile for simulator support code
Murali Karicheri [Tue, 16 Apr 2013 21:45:31 +0000 (17:45 -0400)]
boot-monitor: adding conditional compile for simulator support code

This removes the access to simulator workaround memeory access to DDR
space.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: updates for ARM errata 763126
Murali Karicheri [Mon, 15 Apr 2013 16:17:47 +0000 (12:17 -0400)]
boot-monitor: updates for ARM errata 763126

ACTLR bit31 to be set for errata 763126.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: set ACTLR.smp bit
Vitaly Andrianov [Tue, 2 Apr 2013 12:52:13 +0000 (08:52 -0400)]
boot-monitor: set ACTLR.smp bit

SMP bit in ACTLR requires to be set to enables receiving of instruction cache, BTB,
and TLB maintenance operations. This can be done only in Secure PL1 modes. So this
change is done in boot monitor code.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
8 years ago[temp] boot-monitor: add MPU settings to allow user space access to registers
Murali Karicheri [Fri, 22 Feb 2013 15:43:40 +0000 (10:43 -0500)]
[temp] boot-monitor: add MPU settings to allow user space access to registers

This is a temporary solution to allow user space access to BOOTCFG and
PSC registers so that DSPs can be loaded and booted from user space.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: disable debug printouts
Vitaly Andrianov [Wed, 20 Feb 2013 18:45:37 +0000 (13:45 -0500)]
boot-monitor: disable debug printouts

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
8 years agoboot-monitor: using arch_timer frequency that is passed from u-boot
Vitaly Andrianov [Wed, 20 Feb 2013 18:11:48 +0000 (13:11 -0500)]
boot-monitor: using arch_timer frequency that is passed from u-boot

The skern_init() is actually called with four parameters where
arch timer frequency is passed in R3 and dpsc_base in R2.
This patch fixes the bug by adding dpsc_base parameter before freq.

It also used the provided frequency instead of hard-coded value
to set the arch_timer_freq.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
8 years agoboot-monitor: add skern_putbyte() and skern_putui() functions
Vitaly Andrianov [Wed, 20 Feb 2013 18:00:29 +0000 (13:00 -0500)]
boot-monitor: add skern_putbyte() and skern_putui() functions

This patch adds debug functions to print byte and unsigned long values

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
8 years agoboot-monitor: update for configuring A15 for vfp, l2 latency etc
Murali Karicheri [Thu, 31 Jan 2013 20:17:45 +0000 (15:17 -0500)]
boot-monitor: update for configuring A15 for vfp, l2 latency etc

Enable l2 tag latency and enable VFP
Enable group0 for all interrupts in GIC

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: update L2 cache latency values
Murali Karicheri [Mon, 28 Jan 2013 20:48:59 +0000 (15:48 -0500)]
boot-monitor: update L2 cache latency values

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: update License information
Murali Karicheri [Mon, 28 Jan 2013 20:48:03 +0000 (15:48 -0500)]
boot-monitor: update License information

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: add license file
Murali Karicheri [Fri, 18 Jan 2013 22:59:59 +0000 (17:59 -0500)]
boot-monitor: add license file

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: set arch timer frequency register
Murali Karicheri [Fri, 18 Jan 2013 22:32:31 +0000 (17:32 -0500)]
boot-monitor: set arch timer frequency register

8 years agoboot-monitor: Documentation added
Murali Karicheri [Fri, 11 Jan 2013 17:01:07 +0000 (12:01 -0500)]
boot-monitor: Documentation added

Initial version of the readme.txt added

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: add top level build infrastructure
Murali Karicheri [Fri, 11 Jan 2013 16:57:15 +0000 (11:57 -0500)]
boot-monitor: add top level build infrastructure

This patch adds a top level infrastructure to build boot monitor
code. The build generates a config.h that configures the boot monitor
software.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: non-sec: add non secure init code
Murali Karicheri [Fri, 11 Jan 2013 16:54:44 +0000 (11:54 -0500)]
boot-monitor: non-sec: add non secure init code

This patch adds non secure init code that initialize the primary and
secondary boot monitor. On primary CPU, this is called from u-boot
that then calls the RBL API (smc #0) to execute skern_init() as a
privileged function call. As part of the primary init() call, the
secondary core entry point function gets updated at Rom Boot loader
(RBL) ARM magic address location. When secondary core is powered ON,
RBL gets executed and finally enters the secondary core entry point
function in boot monitor.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
8 years agoboot-monitor: sec: add monitor code and power on/off smc calls
Murali Karicheri [Fri, 11 Jan 2013 16:02:37 +0000 (11:02 -0500)]
boot-monitor: sec: add monitor code and power on/off smc calls

This patch implements boot monitor secure part.

boot monitor secure part is implemented in assembly(skernel.S) and C code
(skern.c). The assmembly code has the monitor vectors and provides a
init() function to do the following:-
    - Replace RBL monitor code with boot monitor code including the
      the vectors.
    - switches from RBL monitor stack to boot monitor stack
    - Calls skern_init() to initialize the secondary core entry point
      to boot monitor core.
monitor vector function direct smc calls to C code to execute following monitor
services:-
     - Power ON/OFF secondary CPUs
Also implements a debug function to put debug traces to UART port

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Cyril Chemparathy <cyril@ti.com>