TransportQmss: Added K2E support to DSP endpoint of heterogeneous processor test

Signed-off-by: Justin Sobota <jsobota@ti.com>

diff --git a/c66/qmss/package.xdc b/c66/qmss/package.xdc
index 93d74e121baddd203700cc727b3b856ed01b76c6..f11e6d2c457b49f3b88102d9737926209e7421f7 100644 (file)
--- a/c66/qmss/package.xdc
+++ b/c66/qmss/package.xdc
@@ -9,6 +9,6 @@
  * Copyright (C) 2011-2015, Texas Instruments, Inc.
  *****************************************************************************/
 
-package ti.transport.ipc.c66.qmss [2,0,0,00] {
+package ti.transport.ipc.c66.qmss [2,0,0,01] {
     module    TransportQmss;
 }

diff --git a/c66/qmss/test/k2e/c66/bios/dsp_ep.cfg b/c66/qmss/test/k2e/c66/bios/dsp_ep.cfg
new file mode 100644 (file)
index 0000000..4a19a85
--- /dev/null
+++ b/c66/qmss/test/k2e/c66/bios/dsp_ep.cfg
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2015, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * *  Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * *  Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * *  Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+print("Program.cpu.deviceName = " + Program.cpu.deviceName);
+print("Program.platformName = " + Program.platformName);
+
+var Task      = xdc.useModule('ti.sysbios.knl.Task');
+var Idle      = xdc.useModule('ti.sysbios.knl.Idle');
+Idle.addFunc('&VirtQueue_cacheWb');
+var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
+var System    = xdc.useModule('xdc.runtime.System');
+var SysMin = xdc.useModule('xdc.runtime.SysMin');
+System.SupportProxy = SysMin;
+var BIOS = xdc.useModule('ti.sysbios.BIOS');
+BIOS.heapSize = 0xA000;
+/* BIOS.libType = BIOS.LibType_Debug; */ /* Uncomment to debug step BIOS and
+                                            IPC code from CCS */
+var CpIntc    = xdc.useModule('ti.sysbios.family.c66.tci66xx.CpIntc');
+
+/* Load and use the CSL, CPPI, QMSS, and RM packages */
+var devType = "k2e"
+var Csl = xdc.useModule('ti.csl.Settings');
+Csl.deviceType = devType;
+var Cppi = xdc.loadPackage('ti.drv.cppi'); 
+var Qmss = xdc.loadPackage('ti.drv.qmss');
+var Rm   = xdc.loadPackage('ti.drv.rm');
+
+Program.sectMap[".qmss"] = new Program.SectionSpec();
+Program.sectMap[".qmss"] = "MSMCSRAM";
+
+Program.sectMap[".cppi"] = new Program.SectionSpec();
+Program.sectMap[".cppi"] = "MSMCSRAM";
+
+Program.sectMap[".desc"] = new Program.SectionSpec();
+Program.sectMap[".desc"] = "MSMCSRAM";
+
+Program.sectMap[".sync"] = new Program.SectionSpec();
+Program.sectMap[".sync"] = "MSMCSRAM";
+
+Program.sectMap[".text"] = new Program.SectionSpec();
+Program.sectMap[".text"] = "MSMCSRAM";
+
+Program.sectMap[".cinit"] = new Program.SectionSpec();
+Program.sectMap[".cinit"] = "MSMCSRAM";
+
+Program.sectMap[".const"] = new Program.SectionSpec();
+Program.sectMap[".const"] = "MSMCSRAM";
+
+var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
+/* Cluster definitions - Example one cluster.
+ * [Cluster Base ID: 0] - 1 Host + 1 DSPs (Procs) */
+MultiProc.numProcessors = 2;
+MultiProc.numProcsInCluster = 2;
+MultiProc.baseIdOfCluster = 0;
+var procNameList = ["HOST", "CORE0"];
+MultiProc.setConfig(null, procNameList);
+
+var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
+/* Synchronize all processors (this will be done in Ipc_start using
+ * TransportShmNotify transport) */
+Ipc.procSync = Ipc.ProcSync_ALL;
+
+var HeapBufMP   = xdc.useModule('ti.sdo.ipc.heaps.HeapBufMP');
+var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
+SharedRegion.setEntryMeta(0,
+    { base: 0x0C000000,
+      len: 0x00150000,
+      ownerProcId: MultiProc.baseIdOfCluster + 1, /* Needs to be global core ID
+                                                   * of DSP Core 0 */
+      isValid: true,
+      cacheEnable: true,
+      cacheLineSize: 128,  /* Allocated messages aligned to cache line */
+      name: "internal_shared_mem",
+    });
+
+var MessageQ = xdc.useModule('ti.sdo.ipc.MessageQ');
+var TransportQmss = xdc.useModule('ti.transport.ipc.c66.qmss.TransportQmss');
+
+var NotifyCirc = xdc.useModule('ti.sdo.ipc.notifyDrivers.NotifyDriverCirc');
+var Interrupt = xdc.useModule('ti.ipc.family.tci6638.Interrupt');
+NotifyCirc.InterruptProxy = Interrupt;
+
+/* Should be done internally */
+xdc.useModule("ti.ipc.namesrv.NameServerRemoteRpmsg");
+
+var VirtQueue = xdc.useModule('ti.ipc.family.tci6638.VirtQueue');
+
+/*  Notify brings in the ti.sdo.ipc.family.Settings module, which does
+ *  lots of config magic which will need to be UNDONE later, or setup
+ *  earlier, to get the necessary overrides to various IPC module proxies!
+ */
+var Notify = xdc.module('ti.sdo.ipc.Notify');
+var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
+
+/* Note: Must call this to override what's done in Settings.xs ! */
+Notify.SetupProxy = xdc.module('ti.ipc.family.tci6638.NotifyCircSetup');
+
+xdc.loadPackage('ti.ipc.ipcmgr');
+
+var MessageQ  = xdc.useModule('ti.sdo.ipc.MessageQ');
+var VirtioSetup = xdc.useModule('ti.ipc.transports.TransportRpmsgSetup');
+MessageQ.SetupTransportProxy = VirtioSetup;
+
+var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
+var params = new HeapBuf.Params;
+params.align = 8;
+params.blockSize = 512;
+params.numBlocks = 256;
+var msgHeap = HeapBuf.create(params);
+MessageQ.registerHeapMeta(msgHeap, 0);
+
+var TransportRpmsg = xdc.useModule('ti.ipc.transports.TransportRpmsg');
+
+/* This makes the vrings address range 0xa0000000 to 0xa1ffffff uncachable.
+   We assume the rest is to be left cacheable.
+   Per sprugw0b.pdf
+    0184 8280h MAR160 Memory Attribute Register 160 A000 0000h - A0FF FFFFh
+    0184 8284h MAR161 Memory Attribute Register 161 A100 0000h - A1FF FFFFh
+*/
+var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
+/*  Mark external memory used by kernel as uncached so that IPC vring CMA
+ *  region can operate properly when exchanging messages between DSP and ARM.
+ *  Marking entire DDR3 as uncached since the memory used by kernel can 
+ *  change between device revisions.  Need to find better way of doing this. */
+Cache.setMarMeta(0x80000000, 0x7FFFFFFF, 0xC);
+
+Program.global.sysMinBufSize = 0x8000;
+SysMin.bufSize  =  Program.global.sysMinBufSize;
+
+/* Enable Memory Translation module that operates on the Resource Table */
+var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
+/* Make sure RemoteProc's .resource_table doesn't conflict with secure kernel
+ * when on secure board.  Secure kernel is located from
+ * 0x00800000 - 0x00810000 */
+Resource.loadAddr = 0x00810000;
+
+Program.global.DEVICENAME = Program.cpu.deviceName;
+Program.global.PROCNAMES = procNameList.join(",");
+Program.global.BUILDPROFILE = Program.build.profile;

diff --git a/c66/qmss/test/k2e/c66/bios/transportIpcQmssDspEpK2ETestProject.txt b/c66/qmss/test/k2e/c66/bios/transportIpcQmssDspEpK2ETestProject.txt
new file mode 100644 (file)
index 0000000..6ba2b64
--- /dev/null
+++ b/c66/qmss/test/k2e/c66/bios/transportIpcQmssDspEpK2ETestProject.txt
@@ -0,0 +1,8 @@
+-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/device/k2e/src/cppi_device.c"
+-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/device/k2e/src/qmss_device.c"
+-ccs.linkFile "PDK_INSTALL_PATH/ti/transport/ipc/c66/example/common_src/bench_osal.c"
+-ccs.linkFile "PDK_INSTALL_PATH/ti/transport/ipc/c66/qmss/device/k2e/src/TransportQmss_device.c"
+-ccs.linkFile "PDK_INSTALL_PATH/ti/transport/ipc/c66/qmss/test/src/heterogeneous_proc_test/dsp_ep.c"
+-ccs.linkFile "PDK_INSTALL_PATH/ti/transport/ipc/c66/qmss/test/k2e/c66/bios/dsp_ep.cfg"
+-ccs.setCompilerOptions "-mv64+ -g -DDEVICE_K2E --diag_warning=225 -I${PDK_INSTALL_PATH}/ti/drv/cppi -I${PDK_INSTALL_PATH}/ti/drv/qmss" 
+-rtsc.enableRtsc 
\ No newline at end of file

diff --git a/c66/qmss/test/src/heterogeneous_proc_test/dsp_ep.c b/c66/qmss/test/src/heterogeneous_proc_test/dsp_ep.c
index f556293a3480e47fdd10b2bc9c7eec9d4b47734a..dfc78e567d400bc145c00644bda5d7183e32f1aa 100644 (file)
--- a/c66/qmss/test/src/heterogeneous_proc_test/dsp_ep.c
+++ b/c66/qmss/test/src/heterogeneous_proc_test/dsp_ep.c
@@ -87,7 +87,11 @@
 /************************ USER DEFINES ********************/
 
 #define SYSINIT                 0
+#ifdef DEVICE_K2E
+#define NUM_DSP_CORES           1
+#else
 #define NUM_DSP_CORES           2
+#endif
 #define NUM_TEST_ITERATIONS     100
 
 #define HOST_DESC_SIZE_BYTES    128