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raw | patch | inline | side by side (parent: 2907ef9)
raw | patch | inline | side by side (parent: 2907ef9)
author | Justin Sobota <jsobota@ti.com> | |
Sat, 25 Apr 2015 20:00:13 +0000 (16:00 -0400) | ||
committer | Justin Sobota <jsobota@ti.com> | |
Sat, 25 Apr 2015 20:00:13 +0000 (16:00 -0400) |
c66/qmss/TransportQmss.c | patch | blob | history | |
c66/qmss/TransportQmss.xdc | patch | blob | history | |
c66/qmss/example/src/bench_qmss.c | patch | blob | history |
index 38bdd5ba9c0382772262ace5a833b75a7fda91ba..37aa142e7cafcf956967e7e80cf55147769b03c4 100644 (file)
--- a/c66/qmss/TransportQmss.c
+++ b/c66/qmss/TransportQmss.c
/* Find CIC secondary interrupt based on the QPENDQ chosen */
i = 0;
while (hostIntMods[i].sysEvt != (-1)) {
- if (hostIntMods[i].sysEvt == obj->qpendSysEvt) {
+ if (hostIntMods[i].sysEvt == obj->u.qpend.sysEvt) {
hostInt = hostIntMods[i].offset +
(hostIntMods[i].multiplier * DNUM);
break;
}
if (obj->cppiHnd) {
- Cppi_close(obj->cppiHnd);
+ Cppi_closeDecRef(obj->cppiHnd);
}
/* Disable the accumulator channel */
- if (obj->pdsp != (-1)) {
- Qmss_disableAccumulator((Qmss_PdspId)obj->pdsp, obj->accumCh);
+ if (obj->u.accum.pdsp != (-1)) {
+ Qmss_disableAccumulator((Qmss_PdspId)obj->u.accum.pdsp,
+ obj->u.accum.accCh);
}
/* Empty and close all QMSS queues */
Qmss_queueEmpty(obj->rxFreeQ);
Qmss_queueClose(obj->rxFreeQ);
}
- if (obj->rxAccumQ) {
- Qmss_queueClose(obj->rxAccumQ);
+ if (obj->u.accum.rxAccQ) {
+ Qmss_queueClose(obj->u.accum.rxAccQ);
}
- if (obj->rxAccList) {
+ if (obj->u.accum.accList) {
/* Free accumulator list memory */
- Memory_free(0, (UInt32 *)(global_l2_address((UInt32)obj->rxAccList)),
- obj->rxAccListSize);
+ Memory_free(0, (UInt32 *)(global_l2_address(
+ (UInt32)obj->u.accum.accList)), obj->u.accum.accListSize);
}
- if (obj->rxQpendQ) {
- Qmss_queueEmpty(obj->rxQpendQ);
- Qmss_queueClose(obj->rxQpendQ);
+ if (obj->u.qpend.rxQpendQ) {
+ Qmss_queueEmpty(obj->u.qpend.rxQpendQ);
+ Qmss_queueClose(obj->u.qpend.rxQpendQ);
}
}
/* Open QPEND receive queues until a valid queue for the DSP is found */
i = 0;
- while ((obj->rxQpendQ == 0) && (intcRange[i].baseQ != -1)) {
+ while ((obj->u.qpend.rxQpendQ == 0) && (intcRange[i].baseQ != -1)) {
for (j = intcRange[i].baseQ, tmpSecInt = intcRange[i].baseSecInt;
j < (intcRange[i].baseQ + intcRange[i].len);
j++, tmpSecInt++) {
if ((tmpQ != QMSS_RESOURCE_ALLOCATE_USE_DENIED) &&
(isAllocated == 1)) {
- obj->rxQpendQ = tmpQ;
- obj->QpendQCicSecInt = tmpSecInt;
+ obj->u.qpend.rxQpendQ = tmpQ;
+ obj->u.qpend.cicSecInt = tmpSecInt;
break;
} else {
Qmss_queueClose(tmpQ);
i++;
}
- if (obj->rxQpendQ == 0) {
+ if (obj->u.qpend.rxQpendQ == 0) {
retVal = TransportQmss_ERROR_COULD_NOT_FIND_VALID_RX_QPEND_Q;
}
error_ret:
UInt32 hwiKey;
Int retVal = TransportQmss_OK;
+ if ((params->rcvQParams.qType != TransportQmss_queueRcvType_ACCUMULATOR) &&
+ (params->rcvQParams.qType != TransportQmss_queueRcvType_QPEND)) {
+ retVal = TransportQmss_ERROR_INVALID_QUEUE_RCV_TYPE;
+ goto error_cleanup;
+ }
+
/* Initialize object parameters - don't memset to avoid wiping out
* parameters set by RTSC wrapper */
obj->deviceCfgParams = NULL;
obj->txQ = 0;
obj->txFreeQ = 0;
obj->rxFreeQ = 0;
- obj->rxAccumQ = 0;
- obj->rxQpendQ = 0;
- obj->QpendQCicSecInt = 0;
- obj->qpendSysEvt = 0;
obj->maxMTU = 0;
obj->rxMsgQHeapId = 0;
obj->txDescSize = 0;
obj->rxDescSize = 0;
- obj->accumCh = 0;
- obj->rxAccListSize = 0;
- obj->rxAccList = NULL;
- obj->usePing = 1;
obj->cppiHnd = NULL;
obj->txCppiHnd = NULL;
obj->rxCppiHnd = NULL;
obj->rxFlowHnd = NULL;
- obj->pdsp = (-1);
obj->hwiHandle = NULL;
obj->queueRcvConfig = TransportQmss_queueRcvType_INVALID;
+ if (params->rcvQParams.qType == TransportQmss_queueRcvType_ACCUMULATOR) {
+ obj->u.accum.rxAccQ = 0;
+ obj->u.accum.accCh = 0;
+ obj->u.accum.accListSize = 0;
+ obj->u.accum.accList = NULL;
+ obj->u.accum.usePing = 1;
+ obj->u.accum.pdsp = (-1);
+ } else if (params->rcvQParams.qType != TransportQmss_queueRcvType_QPEND) {
+ obj->u.qpend.rxQpendQ = 0;
+ obj->u.qpend.cicSecInt = 0;
+ obj->u.qpend.sysEvt = 0;
+ }
obj->rxIntVectorId = 0;
obj->rmServiceHandle = NULL;
obj->flowCache.total_nodes = 0;
obj->flowCache.node_list = NULL;
obj->transNetId = 0;
- if ((params->queueRcvConfig != TransportQmss_queueRcvType_ACCUMULATOR) &&
- (params->queueRcvConfig != TransportQmss_queueRcvType_QPEND)) {
- retVal = TransportQmss_ERROR_INVALID_QUEUE_RCV_TYPE;
- goto error_cleanup;
- }
-
/* Check if TransportQmss instance has already been created. Only one
* TransportQmss instance can exist per DSP core. Protect from interrupt
* from another task */
Qmss_queueClose(tmpQ);
/* Save the queue receive type */
- obj->queueRcvConfig = params->queueRcvConfig;
+ obj->queueRcvConfig = params->rcvQParams.qType;
/* Save receive MessageQ heap ID and the maxMTU size for use in the ISR */
obj->rxMsgQHeapId = params->rxMsgQHeapId;
obj->maxMTU = params->maxMTU;
if (obj->queueRcvConfig == TransportQmss_queueRcvType_ACCUMULATOR) {
UInt8 *chToEventMap = NULL;
- if (params->qmPdsp >= obj->deviceCfgParams->numQmssPdsps) {
+ if (params->rcvQParams.accum.qmPdsp >=
+ obj->deviceCfgParams->numQmssPdsps) {
retVal = TransportQmss_ERROR_INVALID_QMSS_PDSP;
goto error_cleanup;
}
- obj->pdsp = params->qmPdsp;
+ obj->u.accum.pdsp = params->rcvQParams.accum.qmPdsp;
/* Open the receive queue used by the accumulator - queue type does not
* matter so pass in from application. */
- obj->rxAccumQ = Qmss_queueOpen((Qmss_QueueType) params->rxAccQType,
- QMSS_PARAM_NOT_SPECIFIED,
- (UInt8 *) &isAllocated);
- if (obj->rxAccumQ < 0) {
+ obj->u.accum.rxAccQ = Qmss_queueOpen(
+ (Qmss_QueueType)params->rcvQParams.accum.rxAccQType,
+ QMSS_PARAM_NOT_SPECIFIED, (UInt8 *) &isAllocated);
+ if (obj->u.accum.rxAccQ < 0) {
retVal = TransportQmss_ERROR_COULD_NOT_OPEN_RX_ACCUM_Q;
goto error_cleanup;
}
/* List size: max entries * size of Host descriptor pointer * 2 (for
* ping/pong) */
- obj->rxAccListSize = TRANS_QMSS_MAX_PAGE_ENTRIES *
- sizeof(Cppi_HostDesc *) * 2;
- obj->rxAccList = (UInt32 *)l2_global_address((UInt32)Memory_alloc(0,
- obj->rxAccListSize, 16, eb));
- if (obj->rxAccList == NULL) {
+ obj->u.accum.accListSize = TRANS_QMSS_MAX_PAGE_ENTRIES *
+ sizeof(Cppi_HostDesc *) * 2;
+ obj->u.accum.accList = (UInt32 *)l2_global_address((UInt32)Memory_alloc(
+ 0, obj->u.accum.accListSize, 16, eb));
+ if (obj->u.accum.accList == NULL) {
retVal = TransportQmss_ERROR_ALLOC_OF_ACCUM_LIST_FAILED;
goto error_cleanup;
}
- memset(obj->rxAccList, 0, obj->rxAccListSize);
+ memset(obj->u.accum.accList, 0, obj->u.accum.accListSize);
/* Check accumulator channel validity for the DSP core and the
* specified PDSP */
- if (params->accumCh > obj->deviceCfgParams->numAccumCh) {
+ if (params->rcvQParams.accum.accCh > obj->deviceCfgParams->numAccumCh) {
retVal = TransportQmss_ERROR_INVALID_ACCUMULATOR_CH;
goto error_cleanup;
}
- chToEventMap = obj->deviceCfgParams->pdspToIntdMap[obj->pdsp];
+ chToEventMap = obj->deviceCfgParams->pdspToIntdMap[obj->u.accum.pdsp];
if ((isrEventId = chToEventMap[(DNUM *
- obj->deviceCfgParams->numAccumCh) +
- params->accumCh]) == 0) {
+ obj->deviceCfgParams->numAccumCh) +
+ params->rcvQParams.accum.accCh]) == 0) {
retVal = TransportQmss_ERROR_INVALID_ACCUMULATOR_CH;
goto error_cleanup;
}
memset(&accCfg, 0, sizeof(accCfg));
- accCfg.channel = params->accumCh;
+ accCfg.channel = params->rcvQParams.accum.accCh;
accCfg.command = Qmss_AccCmd_ENABLE_CHANNEL;
accCfg.queueEnMask = 0;
- accCfg.listAddress = (UInt32) obj->rxAccList;
- accCfg.queMgrIndex = QMSS_QUEUE_QID(obj->rxAccumQ);
+ accCfg.listAddress = (UInt32) obj->u.accum.accList;
+ accCfg.queMgrIndex = QMSS_QUEUE_QID(obj->u.accum.rxAccQ);
accCfg.maxPageEntries = TRANS_QMSS_MAX_PAGE_ENTRIES;
- accCfg.timerLoadCount = params->accumTimerCount;
+ accCfg.timerLoadCount = params->rcvQParams.accum.accTimerCnt;
accCfg.interruptPacingMode = Qmss_AccPacingMode_LAST_INTERRUPT;
accCfg.listEntrySize = Qmss_AccEntrySize_REG_D;
accCfg.listCountMode = Qmss_AccCountMode_ENTRY_COUNT;
accCfg.multiQueueMode = Qmss_AccQueueMode_SINGLE_QUEUE;
- if (Qmss_programAccumulator((Qmss_PdspId) obj->pdsp, &accCfg) < 0) {
+ if (Qmss_programAccumulator((Qmss_PdspId) obj->u.accum.pdsp,
+ &accCfg) < 0) {
retVal = TransportQmss_ERROR_COULD_NOT_PROGRAM_ACCUM;
goto error_cleanup;
}
- obj->accumCh = params->accumCh;
+ obj->u.accum.accCh = params->rcvQParams.accum.accCh;
} else if (obj->queueRcvConfig == TransportQmss_queueRcvType_QPEND) {
if ((retVal = transportQmssAllocIntcQ(obj)) != TransportQmss_OK) {
goto error_cleanup;
/* Empty the rx queue in case there are residual desciptors within */
if (obj->queueRcvConfig == TransportQmss_queueRcvType_ACCUMULATOR) {
- Qmss_queueEmpty(obj->rxAccumQ);
+ Qmss_queueEmpty(obj->u.accum.rxAccQ);
} else if (obj->queueRcvConfig == TransportQmss_queueRcvType_QPEND) {
- Qmss_queueEmpty(obj->rxQpendQ);
+ Qmss_queueEmpty(obj->u.qpend.rxQpendQ);
}
/* Configure rx CPPI flow */
memset((void *)&rxFlowCfg, 0, sizeof(rxFlowCfg));
rxFlowCfg.flowIdNum = CPPI_PARAM_NOT_SPECIFIED;
if (obj->queueRcvConfig == TransportQmss_queueRcvType_ACCUMULATOR) {
- queueInfo = Qmss_getQueueNumber(obj->rxAccumQ);
+ queueInfo = Qmss_getQueueNumber(obj->u.accum.rxAccQ);
} else if (obj->queueRcvConfig == TransportQmss_queueRcvType_QPEND) {
- queueInfo = Qmss_getQueueNumber(obj->rxQpendQ);
+ queueInfo = Qmss_getQueueNumber(obj->u.qpend.rxQpendQ);
}
rxFlowCfg.rx_dest_qnum = queueInfo.qNum;
rxFlowCfg.rx_dest_qmgr = queueInfo.qMgr;
/* Find CIC secondary interrupt based on the QPENDQ chosen */
i = 0;
while (hostIntMods[i].sysEvt != (-1)) {
- if (hostIntMods[i].sysEvt == params->systemEvent) {
+ if (hostIntMods[i].sysEvt ==
+ params->rcvQParams.qpend.systemEvent) {
hostInt = hostIntMods[i].offset +
(hostIntMods[i].multiplier * DNUM);
break;
goto error_cleanup;
}
- CpIntc_mapSysIntToHostInt(cpIntId, obj->QpendQCicSecInt, hostInt);
- CpIntc_dispatchPlug(obj->QpendQCicSecInt,
+ CpIntc_mapSysIntToHostInt(cpIntId, obj->u.qpend.cicSecInt, hostInt);
+ CpIntc_dispatchPlug(obj->u.qpend.cicSecInt,
(CpIntc_FuncPtr)TransportQmss_Qpend_isr, (UArg)obj,
1);
CpIntc_enableHostInt(cpIntId, hostInt);
isrEventId = CpIntc_getEventId(hostInt);
- obj->qpendSysEvt = params->systemEvent;
+ obj->u.qpend.sysEvt = params->rcvQParams.qpend.systemEvent;
Hwi_Params_init(&hwiAttrs);
hwiAttrs.arg = hostInt;
UInt32 rxNumBytes;
UInt32 queueId;
- if (obj->usePing) {
- accumList = (UInt32 *)&obj->rxAccList[0];
+ if (obj->u.accum.usePing) {
+ accumList = (UInt32 *)&obj->u.accum.accList[0];
} else {
- accumList = (UInt32 *)&obj->rxAccList[TRANS_QMSS_MAX_PAGE_ENTRIES];
+ accumList = (UInt32 *)&obj->u.accum.accList[TRANS_QMSS_MAX_PAGE_ENTRIES];
}
/* Get number of received descriptors */
}
}
- if (obj->usePing) {
- obj->usePing = 0;
+ if (obj->u.accum.usePing) {
+ obj->u.accum.usePing = 0;
} else {
- obj->usePing = 1;
+ obj->u.accum.usePing = 1;
}
ack_int:
- Qmss_ackInterruptByIntd(obj->deviceCfgParams->pdspToIntd[obj->pdsp],
- obj->accumCh, 1);
- Qmss_setEoiVectorByIntd(obj->deviceCfgParams->pdspToIntd[obj->pdsp],
- Qmss_IntdInterruptType_HIGH, obj->accumCh);
+ Qmss_ackInterruptByIntd(obj->deviceCfgParams->pdspToIntd[obj->u.accum.pdsp],
+ obj->u.accum.accCh, 1);
+ Qmss_setEoiVectorByIntd(obj->deviceCfgParams->pdspToIntd[obj->u.accum.pdsp],
+ Qmss_IntdInterruptType_HIGH, obj->u.accum.accCh);
}
/*
UInt32 queueId;
/* Disable CIC secondary interrupt while in ISR */
- CpIntc_disableSysInt(cpIntId, obj->QpendQCicSecInt);
+ CpIntc_disableSysInt(cpIntId, obj->u.qpend.cicSecInt);
- while (hostDesc = (Cppi_HostDesc *)QMSS_DESC_PTR(Qmss_queuePop(obj->rxQpendQ))) {
+ while (hostDesc = (Cppi_HostDesc *)QMSS_DESC_PTR(Qmss_queuePop(
+ obj->u.qpend.rxQpendQ))) {
/* Invalidate descriptor then extract and invalidate MessageQ msg */
inv((Void *) hostDesc, obj->rxDescSize);
Cppi_getData(Cppi_DescType_HOST, (Cppi_Desc *)hostDesc,
}
/* Clear and reenable the CIC secondary interrupt */
- CpIntc_clearSysInt(cpIntId, obj->QpendQCicSecInt);
- CpIntc_enableSysInt(cpIntId, obj->QpendQCicSecInt);
+ CpIntc_clearSysInt(cpIntId, obj->u.qpend.cicSecInt);
+ CpIntc_enableSysInt(cpIntId, obj->u.qpend.cicSecInt);
}
index 2a35c860f03176517a9dabe5f824e33f8158220e..c58b970ce40fc38769f56f99e4a467884510abfb 100644 (file)
queueRcvType_QPEND
};
+ /*!
+ * Accumulator queue reception specific configuration parameters
+ *
+ * @p(blist)
+ * -rxAccQType -> The QMSS queue type that will be opened and used with the
+ * receive accumulator. The queue type does not matter.
+ * Accumulator GEM events are mapped to the accumulator
+ * channels, not the queue type+value.
+ * -qmPdsp -> QMSS PDSP from which an accumulator channel should be
+ * allocated. The PDSP firmware must be downloaded prior to
+ * creating the TransportQmss instance since the PDSP number
+ * only used to program an accumulator channel.
+ * -accCh -> The accumulator channel used for packet reception. The
+ * GEM event for the accumulator interrupt will be derived
+ * from the provided accumulator channel and the DSP core
+ * number.
+ * -accTimerCnt -> Number of global timer ticks to delay the periodic
+ * accumulator interrupt. A value of zero will cause an
+ * interrupt immediately upon a descriptor being placed in
+ * the accumulator ping/pong buffer.
+ * @p
+ */
+ struct AccumRcvParams {
+ UInt32 rxAccQType;
+ UInt32 qmPdsp;
+ UInt8 accCh;
+ UInt32 accTimerCnt;
+ };
+
+ /*!
+ * QPEND queue reception specific configuration parameters
+ *
+ * @p(blist)
+ * -systemEvent -> The system (GEM) event that is to be tied to a CIC host
+ * interrupt when hooking up the QPEND interrupt. QPEND
+ * queues generate secondary interrupts that are routed
+ * into the CICs. The secondary event is mapped to a host
+ * interrupt which is selected based on the system event
+ * chosen.
+ * @p
+ */
+ struct QpendRcvParams {
+ UInt systemEvent;
+ };
+
+ /*!
+ * Parameters that define the type of receive queue that will be used by
+ * the transport.
+ *
+ * @p(blist)
+ * -qType -> QMSS queue reception configuration. QMSS can be configured
+ * to receive descriptors over different queue types which
+ * offer accumulation, direct interrupt features.
+ * -accum -> Accumulator-specific configuration parameters if the
+ * receive queue is selected to be an accumulator queue
+ * -qpend -> QPEND-specific configuration parameters if the receive
+ queue is selected to be an QPEND queue
+ * @p
+ */
+ struct QueueRcvParams {
+ QueueRcvType qType;
+ AccumRcvParams accum;
+ QpendRcvParams qpend;
+ };
+
instance:
/*!
*/
config UInt32 txDescSize = 0;
- /*!
- * ======== rxAccQType ========
- * The QMSS queue type that will be opened and used with the receive
- * accumulator. The queue type does not matter. Accumulator GEM events
- * are mapped to the accumulator channels, not the queue type+value.
- *
- * This parameter is only applicable if queueRcvConfig is set to
- * TransportQmss_qmssRcvType_ACCUMULATOR
- */
- config UInt32 rxAccQType = 0;
-
/*!
* ======== rxMemRegion ========
* Qmss memory region from which the receive host descriptors will be
config UInt32 maxMTU = 256;
/*!
- * ======== qmPdsp ========
- * QMSS PDSP from which an accumulator channel should be allocated. The
- * PDSP firmware must be downloaded prior to creating the TransportQmss
- * instance since the PDSP number only used to program an accumulator
- * channel.
- *
- * This parameter is only applicable if queueRcvConfig is set to
- * TransportQmss_qmssRcvType_ACCUMULATOR
- */
- config UInt32 qmPdsp = 0;
-
- /*!
- * ======== accumCh ========
- * The accumulator channel used for packet reception. The GEM event
- * for the accumulator interrupt will be derived from the provided
- * accumulator channel and the DSP core number.
- *
- * This parameter is only applicable if queueRcvConfig is set to
- * TransportQmss_qmssRcvType_ACCUMULATOR
- */
- config UInt8 accumCh = 0;
-
- /*!
- * ======== accumTimerCount ========
- * Number of global timer ticks to delay the periodic accumulator
- * interrupt. A value of zero will cause an interrupt immediately upon a
- * descriptor being placed in the accumulator ping/pong buffer.
- *
- * This parameter is only applicable if queueRcvConfig is set to
- * TransportQmss_qmssRcvType_ACCUMULATOR
+ * ======== rcvQParams ========
+ * Parameters that define the type of receive QMSS queue that will be used
+ * by the transport.
*/
- config UInt32 accumTimerCount = 0;
+ config QueueRcvParams rcvQParams = {
+ qType: queueRcvType_INVALID,
+ accum: {rxAccQType: 0,
+ qmPdsp: 0,
+ accCh: 0,
+ accTimerCnt: 0},
+ qpend: {systemEvent: 0}
+ };
/*!
* ======== rmServiceHandle ========
*/
config Void *rmServiceHandle = null;
- /*!
- * ======== queueRcvConfig ========
- * QMSS queue reception configuration. QMSS can be configured to receive
- * descriptors over different queue types which offer accumulation, direct
- * interrupt features.
- */
- config QueueRcvType queueRcvConfig = queueRcvType_INVALID;
-
- /*!
- * ======== systemEvent ========
- * The system (GEM) event that is to be tied to a CIC host interrupt when
- * hooking up the QPEND interrupt. QPEND queues generate secondary
- * interrupts that are routed into the CICs. The secondary event is
- * mapped to a host interrupt which is selected based on the system event
- * chosen.
- *
- * This parameter is only applicable if queueRcvConfig is set to
- * TransportQmss_queueRcvType_QPEND
- */
- config UInt systemEvent = 0;
-
/*!
* ======== rxIntVectorId ========
* Interrupt vector ID to tie to the receive side accumulator operation
UInt instCreated;
}
+ /* Accumulator specific receive configuration state variables */
+ struct Accum_State {
+ Int32 rxAccQ;
+ UInt8 accCh;
+ UInt32 accListSize;
+ UInt32 *accList;
+ Int usePing;
+ Int32 pdsp;
+ }
+
+ /* QPEND specific receive configuration state variables */
+ struct Qpend_State {
+ Int32 rxQpendQ;
+ UInt cicSecInt;
+ UInt sysEvt;
+ }
+
/* Instance State object - Per transport instance (multiple per core if
* multiple connections) */
struct Instance_State {
Int32 txQ;
Int32 txFreeQ;
Int32 rxFreeQ;
- Int32 rxAccumQ;
- Int32 rxQpendQ;
- UInt QpendQCicSecInt;
- UInt qpendSysEvt;
UInt32 maxMTU;
UInt16 rxMsgQHeapId;
UInt32 txDescSize;
UInt32 rxDescSize;
- UInt8 accumCh;
- UInt32 rxAccListSize;
- UInt32 *rxAccList;
- Int usePing;
UInt32 *cppiHnd;
UInt32 *txCppiHnd;
UInt32 *rxCppiHnd;
UInt32 *rxFlowHnd;
- Int32 pdsp;
Void *hwiHandle;
QueueRcvType queueRcvConfig;
+ union {
+ Accum_State accum;
+ Qpend_State qpend;
+ } u;
UInt32 rxIntVectorId;
Void *rmServiceHandle;
FlowCacheList flowCache;
index 6473bb2de3250b8b26eb70bec7ab5bb605b4c5f8..35ab9d68ab9e6c29c4fb21ccd00fe5c3c9e1ad32 100644 (file)
if (cppiResult != CPPI_SOK) {
System_printf("Error Core %d : Deinitializing CPPI error code : %d\n",
coreNum, cppiResult);
-// TEMP return(-1);
+ return(-1);
}
return(0);
if (testIterations & 0x1) {
/* Odd iterations create TransportQmss instance with QPEND receive
* logic */
- transQmssParams.queueRcvConfig = TransportQmss_queueRcvType_QPEND;
+ transQmssParams.rcvQParams.qType = TransportQmss_queueRcvType_QPEND;
/* Choose an arbitrary system event from Table 6-22 System Event
* Mapping in tci6638k2k.pdf. System event can be anything that is not
* already in use and maps to a different CIC host interrupt per DSP */
- transQmssParams.systemEvent = 43;
+ transQmssParams.rcvQParams.qpend.systemEvent = 43;
System_printf("Core %d : "
"Creating QMSS Transport instance with rx QPEND queue\n",
} else {
/* Even iterations create TransportQmss instance with accumulator
* receive logic */
- transQmssParams.rxAccQType = Qmss_QueueType_HIGH_PRIORITY_QUEUE;
- transQmssParams.queueRcvConfig = TransportQmss_queueRcvType_ACCUMULATOR;
+ transQmssParams.rcvQParams.qType = TransportQmss_queueRcvType_ACCUMULATOR;
+ transQmssParams.rcvQParams.accum.rxAccQType = Qmss_QueueType_HIGH_PRIORITY_QUEUE;
/* Use PDSP3 since Linux uses PDSP1. Using the same PDSP as Linux can
* cause a potential PDSP firmware lockup since Linux does not use the
* critical section preventing commands being sent to a PDSP
* simultaneously */
- transQmssParams.qmPdsp = (UInt32)Qmss_PdspId_PDSP3;
+ transQmssParams.rcvQParams.accum.qmPdsp = (UInt32)Qmss_PdspId_PDSP3;
/* Must map to a valid channel for each DSP core. Follow sprugr9f.pdf
* Table 5-9 */
- transQmssParams.accumCh = DNUM;
- transQmssParams.accumTimerCount = 0;
+ transQmssParams.rcvQParams.accum.accCh = DNUM;
+ transQmssParams.rcvQParams.accum.accTimerCnt = 0;
System_printf("Core %d : "
"Creating QMSS Transport instance with rx Accumulator "