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author | Sebastien Tomas <s-tomas@ti.com> | |
Mon, 20 Oct 2014 09:37:00 +0000 (11:37 +0200) | ||
committer | Sebastien Tomas <s-tomas@ti.com> | |
Mon, 20 Oct 2014 09:37:00 +0000 (11:37 +0200) |
AIF_init.h | patch | blob | history | |
docs/aif2lldDocs.chm | patch | blob | history | |
src/AIF_init.c | patch | blob | history |
diff --git a/AIF_init.h b/AIF_init.h
index aec8aaa55b9c834a64f5d94ad51e75376c972435..aceb9bb5beaa80ffcc8b61ec64845fc56ff388b4 100644 (file)
--- a/AIF_init.h
+++ b/AIF_init.h
Uint32 dioNum\r
);\r
\r
+/**\r
+ * @n@b AIF_configureEgrDioEngine\r
+ *\r
+ * @b Description\r
+ * @n This function is used to override the default configuration of a DIO egress engine.\r
+ *\r
+ * @b Arguments\r
+ * @verbatim\r
+ hEgrDioEngine Pointer to the parameters for this egress DIO engine\r
+ dioNum Egress DIO engine number.\r
+ @endverbatim\r
+ *\r
+ * <b> Return Value </b> None\r
+ *\r
+ * <b> Pre Condition </b>\r
+ * @n Call to AIF_initHw().\r
+ *\r
+ * <b> Post Condition </b>\r
+ * @n\r
+ *\r
+ * @b Modifies\r
+ * @n AIF2 configuration structure\r
+ *\r
+ * @b Example\r
+ * @verbatim\r
+ CSL_Aif2AdDioEngine egrDioEngine\r
+ Uint32 dioNum\r
+ AIF_configureEgrDioEngine(&egrDioEngine,dioNum);\r
+ @endverbatim\r
+ *\r
+ */\r
+#ifndef __AIF_INIT_C\r
+extern\r
+#endif\r
+void\r
+AIF_configureEgrDioEngine(\r
+ CSL_Aif2AdDioEngine* hEgrDioEngine,\r
+ Uint32 dioNum\r
+);\r
+\r
+/**\r
+ * @n@b AIF_configureIngrDioEngine\r
+ *\r
+ * @b Description\r
+ * @n This function is used to override the default configuration of a DIO ingress engine.\r
+ *\r
+ * @b Arguments\r
+ * @verbatim\r
+ hIngrDioEngine Pointer to the parameters for this ingress DIO engine\r
+ dioNum Ingress DIO engine number.\r
+ @endverbatim\r
+ *\r
+ * <b> Return Value </b> None\r
+ *\r
+ * <b> Pre Condition </b>\r
+ * @n Call to AIF_initHw().\r
+ *\r
+ * <b> Post Condition </b>\r
+ * @n\r
+ *\r
+ * @b Modifies\r
+ * @n AIF2 configuration structure\r
+ *\r
+ * @b Example\r
+ * @verbatim\r
+ CSL_Aif2AdDioEngine ingrDioEngine\r
+ Uint32 dioNum\r
+ AIF_configureIngrDioEngine(&ingrDioEngine,dioNum);\r
+ @endverbatim\r
+ *\r
+ */\r
+#ifndef __AIF_INIT_C\r
+extern\r
+#endif\r
+void\r
+AIF_configureIngrDioEngine(\r
+ CSL_Aif2AdDioEngine* hIngrDioEngine,\r
+ Uint32 dioNum\r
+);\r
+\r
/**\r
* @n@b AIF_setRadTimerTc\r
*\r
CSL_Aif2FrameCounter *cfg\r
);\r
\r
+/**\r
+ * @n@b AIF_setLinkPiMax\r
+ *\r
+ * @b Description\r
+ * @n This function is used to configure PE frame and symbol terminal counting value to calculate sop and eop of packet for a given group in AIF2LLD configuration structure\r
+ *\r
+ * @b Arguments\r
+ * @verbatim\r
+ link link to configure\r
+ piMax PiMax value to apply to this link\r
+ @endverbatim\r
+ *\r
+ * <b> Return Value </b> None\r
+ *\r
+ * <b> Pre Condition </b>\r
+ * @n Call to AIF_initHw(). AIF2 not started yet.\r
+ *\r
+ * <b> Post Condition </b>\r
+ * @n\r
+ *\r
+ * @b Modifies\r
+ * @n AIF2 configuration structure\r
+ *\r
+ * @b Example\r
+ * @verbatim\r
+ Int32 link;\r
+ Uint32 PiMax;\r
+ AIF_setLinkPiMax(link,PiMax);\r
+ @endverbatim\r
+ *\r
+ */\r
+#ifndef __AIF_INIT_C\r
+extern\r
+#endif\r
+void\r
+AIF_setLinkPiMax (\r
+ Int32 link,\r
+ Uint32 piMax\r
+);\r
+\r
/**\r
* @n@b AIF_setPeFrameMsgTc\r
*\r
Uint16 val\r
);\r
\r
+/**\r
+ * @n@b AIF_setPdChDioOffset\r
+ *\r
+ * @b Description\r
+ * @n This function is used to configure the Pd Dma Channel DIO DMA offset in AIF2LLD configuration structure.\r
+ *\r
+ * @b Arguments\r
+ * @verbatim\r
+ indx AxC index\r
+ val dio offset value for this AxC\r
+ @endverbatim\r
+ *\r
+ * <b> Return Value </b> None\r
+ *\r
+ * <b> Pre Condition </b>\r
+ * @n Call to AIF_initHw(). AIF2 not started yet.\r
+ *\r
+ * <b> Post Condition </b>\r
+ * @n\r
+ *\r
+ * @b Modifies\r
+ * @n AIF2 configuration structure\r
+ *\r
+ * @b Example\r
+ * @verbatim\r
+ AIF_setPdChDioOffset(channelIdx, offset);\r
+ @endverbatim\r
+ *\r
+ */\r
+#ifndef __AIF_INIT_C\r
+extern\r
+#endif\r
+void AIF_setPdChDioOffset (\r
+ Int32 indx,\r
+ Uint8 val\r
+);\r
+\r
/**\r
* @n@b AIF2_getVersion\r
*\r
diff --git a/docs/aif2lldDocs.chm b/docs/aif2lldDocs.chm
index 18e3aa5b816a9b9d85a2b87bc0038d98ff1cd163..f44d31cd8e369388bcb203e7c7eecc9e5deb7f43 100644 (file)
Binary files a/docs/aif2lldDocs.chm and b/docs/aif2lldDocs.chm differ
Binary files a/docs/aif2lldDocs.chm and b/docs/aif2lldDocs.chm differ
diff --git a/src/AIF_init.c b/src/AIF_init.c
index e5de2c82618888a19319b55e7c2b25075da5081b..bd51632835bc9f8f2716bbc3ae5af6fd7455953c 100644 (file)
--- a/src/AIF_init.c
+++ b/src/AIF_init.c
AtEventSetup.bEnableIngrDioEvent[dioNum] = FALSE;\r
}\r
\r
+void\r
+AIF_configureEgrDioEngine(\r
+ CSL_Aif2AdDioEngine* hEgrDioEngine,\r
+ Uint32 dioNum\r
+)\r
+{\r
+uint32_t k;\r
+ AdDioSetup.EgrDioEngineEnable[dioNum] = TRUE;\r
+ AdDioSetup.EgrDioEngine[dioNum].BcnTableSelect = hEgrDioEngine->BcnTableSelect;\r
+ AdDioSetup.EgrDioEngine[dioNum].NumAxC = hEgrDioEngine->NumAxC;\r
+ AdDioSetup.EgrDioEngine[dioNum].DmaNumBlock = hEgrDioEngine->DmaNumBlock;\r
+ AdDioSetup.EgrDioEngine[dioNum].NumQuadWord = hEgrDioEngine->NumQuadWord;\r
+ AdDioSetup.EgrDioEngine[dioNum].bEnEgressRsaFormat = hEgrDioEngine->bEnEgressRsaFormat;\r
+ AdDioSetup.EgrDioEngine[dioNum].DmaBlockAddrStride = hEgrDioEngine->DmaBlockAddrStride;\r
+ AdDioSetup.EgrDioEngine[dioNum].bEnDmaChannel = TRUE; //Enable Dma channel\r
+ AdDioSetup.EgrDioEngine[dioNum].DmaBurstLen = hEgrDioEngine->DmaBurstLen;\r
+ AdDioSetup.EgrDioEngine[dioNum].DmaBaseAddr = hEgrDioEngine->DmaBaseAddr;\r
+ AdDioSetup.EgrDioEngine[dioNum].DmaBurstAddrStride = hEgrDioEngine->DmaBurstAddrStride;\r
+ for (k = 0; k < 64; k++)\r
+ {\r
+ AdDioSetup.EgrDioEngine[dioNum].DBCN[k] = hEgrDioEngine->DBCN[k]; //set egress table DBCN for channel 0\r
+ }\r
+}\r
+\r
+void\r
+AIF_configureIngrDioEngine(\r
+ CSL_Aif2AdDioEngine* hIngrDioEngine,\r
+ Uint32 dioNum\r
+)\r
+{\r
+uint32_t k;\r
+ AdDioSetup.IngrDioEngineEnable[dioNum] = TRUE;\r
+ AdDioSetup.IngrDioEngine[dioNum].BcnTableSelect = hIngrDioEngine->BcnTableSelect;\r
+ AdDioSetup.IngrDioEngine[dioNum].NumAxC = hIngrDioEngine->NumAxC;\r
+ AdDioSetup.IngrDioEngine[dioNum].DmaNumBlock = hIngrDioEngine->DmaNumBlock;\r
+ AdDioSetup.IngrDioEngine[dioNum].NumQuadWord = hIngrDioEngine->NumQuadWord;\r
+ AdDioSetup.IngrDioEngine[dioNum].bEnIngressRsaFormat = hIngrDioEngine->bEnIngressRsaFormat;\r
+ AdDioSetup.IngrDioEngine[dioNum].DmaBlockAddrStride = hIngrDioEngine->DmaBlockAddrStride;\r
+ AdDioSetup.IngrDioEngine[dioNum].bEnDmaChannel = TRUE; //Enable Dma channel\r
+ AdDioSetup.IngrDioEngine[dioNum].DmaBurstLen = hIngrDioEngine->DmaBurstLen;\r
+ AdDioSetup.IngrDioEngine[dioNum].DmaBaseAddr = hIngrDioEngine->DmaBaseAddr;\r
+ AdDioSetup.IngrDioEngine[dioNum].DmaBurstAddrStride = hIngrDioEngine->DmaBurstAddrStride;\r
+ for (k = 0; k < 64; k++)\r
+ {\r
+ AdDioSetup.IngrDioEngine[dioNum].DBCN[k] = hIngrDioEngine->DBCN[k]; //set ingress table DBCN for channel 0\r
+ }\r
+}\r
+\r
void\r
AIF_setRadTimerTc(\r
Uint32 clockNum,\r
RmLinkSetup[link].FrameUnsyncThreshold = FrameUnsyncThreshold;\r
}\r
\r
+void\r
+AIF_setLinkPiMax (\r
+ Int32 link,\r
+ Uint32 piMax\r
+)\r
+{\r
+ AtLinkSetup[link].PiMax = piMax;\r
+}\r
+\r
void AIF_setPeFrameTC (\r
Int32 index,\r
CSL_Aif2FrameCounter *cfg\r
- )\r
+)\r
{\r
PeCommonSetup.PeFrameTC[index].FrameIndexSc = cfg->FrameIndexSc;\r
PeCommonSetup.PeFrameTC[index].FrameIndexTc = cfg->FrameIndexTc; \r
void AIF_setPeFrameMsgTc (\r
Int32 indx,\r
Uint16 val\r
- )\r
+)\r
{\r
PeCommonSetup.PeFrameMsgTc[indx] = val;\r
}\r
\r
+void AIF_setPdChDioOffset (\r
+ Int32 indx,\r
+ Uint8 val\r
+)\r
+{\r
+ PdCommonSetup.PdChConfig1[indx].DioOffset = val;\r
+}\r
+\r
Uint32 AIF2_getVersion (void)\r
{\r
return AIF2_DRV_VERSION_ID;\r