PDK-3658: Added display port dignositc test which verifies,

    - The display port interface on J7 HW platforms.

Signed-off-by: Sriram <x0282556@ti.com>

diff --git a/diag/board_diag_component.mk b/diag/board_diag_component.mk
index 8cd427aca6e234ced541a850c470b4239cab7e43..786f991682c8acc7db62870950e1e6dc36cc3fac 100755 (executable)
--- a/diag/board_diag_component.mk
+++ b/diag/board_diag_component.mk
@@ -213,6 +213,26 @@ export current_monitor_board_diag_$(SOC)_CORELIST
 export current_monitor_board_diag_SBL_APPIMAGEGEN = yes
 board_diag_EXAMPLE_LIST += current_monitor_board_diag
 
+# DISPLAYPORT
+display_port_board_diag_COMP_LIST = display_port_board_diag
+display_port_board_diag_RELPATH = ti/board/diag/display_port/build
+display_port_board_diag_PATH = $(PDK_BOARD_DIAG_COMP_PATH)/display_port/build
+display_port_board_diag_CUSTOM_BINPATH = $(board_diag_LOCAL_BINPATH)
+display_port_board_diag_MAKEFILE = -f makefile
+display_port_board_diag_BOARD_DEPENDENCY = yes
+display_port_board_diag_CORE_DEPENDENCY = yes
+export display_port_board_diag_COMP_LIST
+export display_port_board_diag_BOARD_DEPENDENCY
+export display_port_board_diag_CORE_DEPENDENCY
+export display_port_board_diag_MAKEFILE
+display_port_board_diag_PKG_LIST = display_port_board_diag
+display_port_board_diag_INCLUDE = $(display_port_board_diag_PATH)
+display_port_board_diag_BOARDLIST = $(board_diag_$(SOC)_BOARDLIST)
+display_port_board_diag_$(SOC)_CORELIST = mcu2_0
+export display_port_board_diag_$(SOC)_CORELIST
+export display_port_board_diag_SBL_APPIMAGEGEN = yes
+board_diag_EXAMPLE_LIST += display_port_board_diag
+
 # DSI
 dsi_board_diag_COMP_LIST = dsi_board_diag
 dsi_board_diag_RELPATH = ti/board/diag/dsi/build

diff --git a/diag/display_port/build/makefile b/diag/display_port/build/makefile
new file mode 100755 (executable)
index 0000000..93745bf
--- /dev/null
+++ b/diag/display_port/build/makefile
@@ -0,0 +1,94 @@
+# Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/\r
+#\r
+#\r
+#  Redistribution and use in source and binary forms, with or without\r
+#  modification, are permitted provided that the following conditions\r
+#  are met:\r
+#\r
+#    Redistributions of source code must retain the above copyright\r
+#    notice, this list of conditions and the following disclaimer.\r
+#\r
+#    Redistributions in binary form must reproduce the above copyright\r
+#    notice, this list of conditions and the following disclaimer in the\r
+#    documentation and/or other materials provided with the\r
+#    distribution.\r
+#\r
+#    Neither the name of Texas Instruments Incorporated nor the names of\r
+#    its contributors may be used to endorse or promote products derived\r
+#    from this software without specific prior written permission.\r
+#\r
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+\r
+#\r
+# Macro definitions referenced below\r
+#\r
+\r
+#\r
+# This file is the makefile for building CSL uart app.\r
+#\r
+include $(PDK_INSTALL_PATH)/ti/build/Rules.make\r
+\r
+# Board diag parameters which can be controlled outside this makefile\r
+DIAGNAME ?= display_port\r
+PROFILE ?= release\r
+TESTMODE ?= FUNCTIONAL_TEST\r
+MODENAME ?=\r
+BOARD_DIAG_CFLAGS ?=\r
+APP_NAME ?= $(DIAGNAME)_board_diag\r
+\r
+BUILD_PROFILE_$(CORE) = $(PROFILE)\r
+\r
+BUILD_OS_TYPE = baremetal\r
+LNKFLAGS_LOCAL_mpu1_0  += --entry Entry\r
+EXTERNAL_INTERFACES =\r
+XDC_CFG_FILE_mpu1_0 =\r
+XDC_CFG_FILE_mcu1_0 =\r
+\r
+# Name of the binary if different from the default (APP_NAME)_$(BOARD_$(CORE)_<build_profile>\r
+LOCAL_APP_NAME =  $(DIAGNAME)$(MODENAME)_DiagExample_$(BOARD)_$(CORE)\r
+\r
+SRCDIR = ../src ../../common/$(SOC) ../../../src/$(BOARD)/\r
+INCDIR = ../../../../board ../src ../../../src/$(BOARD)/include ../../../src/$(BOARD)/ ../../common/$(SOC)\r
+\r
+# List all the external components/interfaces, whose interface header files\r
+# need to be included for this component\r
+INCLUDE_EXTERNAL_INTERFACES = pdk\r
+\r
+# List all the components required by the application\r
+COMP_LIST_COMMON = board csl csl_init osal_nonos uart i2c dss fvid2\r
+ifeq ($(SOC), $(filter $(SOC), j721e))\r
+COMP_LIST_COMMON += sciclient\r
+endif\r
+\r
+# Common source files and CFLAGS across all platforms and cores\r
+PACKAGE_SRCS_COMMON = ../src makefile\r
+PACKAGE_SRCS_COMMON += ../../common/$(SOC)\r
+PACKAGE_SRCS_COMMON += ../../board_diag_component.mk\r
+PACKAGE_SRCS_COMMON += ../../create_sd.bat ../../create_sd.sh\r
+\r
+SRCS_COMMON += display_port_test.c\r
+\r
+CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) -DDIAG_$(TESTMODE) $(BOARD_DIAG_CFLAGS)\r
+\r
+# Include common make files\r
+ifeq ($(MAKERULEDIR), )\r
+#Makerule path not defined, define this and assume relative path from ROOTDIR\r
+  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules\r
+  export MAKERULEDIR\r
+endif\r
+include $(MAKERULEDIR)/common.mk\r
+\r
+# OBJs and libraries are built by using rule defined in rules_<target>.mk\r
+#     and need not be explicitly specified here\r
+\r
+# Nothing beyond this point\r

diff --git a/diag/display_port/src/display_port_test.c b/diag/display_port/src/display_port_test.c
new file mode 100755 (executable)
index 0000000..4093158
--- /dev/null
+++ b/diag/display_port/src/display_port_test.c
@@ -0,0 +1,448 @@
+/******************************************************************************\r
+ * Copyright (c) 2019 Texas Instruments Incorporated - http://www.ti.com\r
+ *\r
+ *  Redistribution and use in source and binary forms, with or without\r
+ *  modification, are permitted provided that the following conditions\r
+ *  are met:\r
+ *\r
+ *    Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ *\r
+ *    Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the\r
+ *    distribution.\r
+ *\r
+ *    Neither the name of Texas Instruments Incorporated nor the names of\r
+ *    its contributors may be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ *****************************************************************************/\r
+\r
+/**\r
+ *  \file   display_port_test.c\r
+ *\r
+ *  \brief  displayport diagnostic test file.\r
+ *\r
+ *  Targeted Functionality: Verification of displayport interface.\r
+ *\r
+ *  Operation: This test verifies DisplayPort interface by displaying color bar\r
+ *             on connected DisplayPort monitor.\r
+ *\r
+ *  Supported SoCs: J721E.\r
+ *\r
+ *  Supported Platforms: j721e_evm.\r
+ */\r
+\r
+#include "display_port_test.h"\r
+\r
+/**\r
+ *  \brief    This function de-initializes DSS DP.\r
+ *\r
+ *  \param    displayObj    [IN/OUT]  Display object structure.\r
+ *\r
+ *  \return   int8_t\r
+ *               0 - in case of success\r
+ *              -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_dpDeInitDss(BoardDiag_DpDisplayObj *displayObj)\r
+{\r
+    int32_t ret;\r
+\r
+    ret = Fvid2_control(displayObj->dctrlHandle,\r
+                        IOCTL_DSS_DCTRL_STOP_VP,\r
+                        &displayObj->vpParams,\r
+                        NULL);\r
+    if(ret != FVID2_SOK)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    /* Delete DCTRL handle */\r
+    ret = Fvid2_delete(displayObj->dctrlHandle,\r
+                       NULL);\r
+    if(ret != FVID2_SOK)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    ret = Dss_deInit();\r
+    if(ret != FVID2_SOK)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    ret = Fvid2_deInit(NULL);\r
+    if(ret != FVID2_SOK)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    return 0;\r
+}\r
+\r
+/**\r
+ *  \brief    This function enables internal color bar\r
+ *\r
+ *  \param    displayObj    [IN]      Display object structure.\r
+ *\r
+ *  \return   int8_t\r
+ *               0 - in case of success\r
+ *              -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_dpEnableColorBar(BoardDiag_DpDisplayObj *displayObj)\r
+{\r
+    int32_t ret;\r
+    Dss_DctrlVpParams *vpParams;\r
+    Dss_DctrlOverlayParams *overlayParams;\r
+    Dss_DctrlPathInfo *pathInfo;\r
+\r
+    vpParams      = &displayObj->vpParams;\r
+    overlayParams = &displayObj->overlayParams;\r
+    pathInfo      = &displayObj->dctrlPathInfo;\r
+\r
+    Dss_dctrlOverlayParamsInit(overlayParams);\r
+    Dss_dctrlPathInfoInit(pathInfo);\r
+\r
+    pathInfo->edgeInfo[pathInfo->numEdges].startNode =\r
+                                           BOARD_DIAG_DP_DCTRL_VID_NODE_ID;\r
+\r
+    pathInfo->edgeInfo[pathInfo->numEdges].endNode =\r
+                                           BOARD_DIAG_DP_DCTRL_OVERLAY_NODE_ID;\r
+\r
+    pathInfo->numEdges++;\r
+\r
+    pathInfo->edgeInfo[pathInfo->numEdges].startNode =\r
+                                           BOARD_DIAG_DP_DCTRL_OVERLAY_NODE_ID;\r
+\r
+    pathInfo->edgeInfo[pathInfo->numEdges].endNode =\r
+                                           BOARD_DIAG_DP_DCTRL_VP_NODE_ID;\r
+\r
+    pathInfo->numEdges++;\r
+\r
+    pathInfo->edgeInfo[pathInfo->numEdges].startNode =\r
+                                           BOARD_DIAG_DP_DCTRL_VP_NODE_ID;\r
+\r
+    pathInfo->edgeInfo[pathInfo->numEdges].endNode =\r
+                                           BOARD_DIAG_DP_DCTRL_OUT_NODE_ID;\r
+\r
+    pathInfo->numEdges++;\r
+\r
+    ret = Fvid2_control(displayObj->dctrlHandle,\r
+                        IOCTL_DSS_DCTRL_SET_PATH,\r
+                        pathInfo,\r
+                        NULL);\r
+    if(ret != FVID2_SOK)\r
+    {\r
+        UART_printf("Setting Display path failed\n");\r
+        return -1;\r
+    }\r
+\r
+    ret = Fvid2_control(displayObj->dctrlHandle,\r
+                        IOCTL_DSS_DCTRL_SET_VP_PARAMS,\r
+                        vpParams,\r
+                        NULL);\r
+    if(ret != FVID2_SOK)\r
+    {\r
+        UART_printf("Setting VP param failed\n");\r
+        return -1;\r
+    }\r
+\r
+    overlayParams->overlayId = BOARD_DIAG_DP_OVERLAY_ID;\r
+    overlayParams->colorbarEnable = TRUE;\r
+\r
+    ret = Fvid2_control(displayObj->dctrlHandle,\r
+                        IOCTL_DSS_DCTRL_SET_OVERLAY_PARAMS,\r
+                        overlayParams,\r
+                        NULL);\r
+    if(ret != FVID2_SOK)\r
+    {\r
+        UART_printf("Setting overlay params failed\n");\r
+        return -1;\r
+    }\r
+\r
+    return 0;\r
+}\r
+\r
+/**\r
+ *  \brief    This function configures Display Timing parameters.\r
+ *\r
+ *  \param    displayObj    [IN]      Display object structure.\r
+ *\r
+ *  \return   int8_t\r
+ *               0 - in case of success\r
+ *              -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_dpSetDispConfig(BoardDiag_DpDisplayObj *dispObj)\r
+{\r
+    Dss_DctrlVpParams *vpParams;\r
+    int8_t ret;\r
+\r
+    vpParams = &dispObj->vpParams;\r
+    Dss_dctrlVpParamsInit(vpParams);\r
+\r
+    vpParams->vpId = BOARD_DIAG_DP_VP_ID;\r
+    vpParams->lcdOpTimingCfg.mInfo.standard   = FVID2_STD_1080P_60;\r
+    vpParams->lcdOpTimingCfg.dvoFormat        = FVID2_DV_GENERIC_DISCSYNC;\r
+    vpParams->lcdOpTimingCfg.videoIfWidth     = FVID2_VIFW_36BIT;\r
+\r
+    vpParams->lcdPolarityCfg.actVidPolarity   = FVID2_POL_HIGH;\r
+    vpParams->lcdPolarityCfg.pixelClkPolarity = FVID2_EDGE_POL_FALLING;\r
+    vpParams->lcdPolarityCfg.hsPolarity       = FVID2_POL_HIGH;\r
+    vpParams->lcdPolarityCfg.vsPolarity       = FVID2_POL_HIGH;\r
+\r
+    ret = BoardDiag_dpEnableColorBar(dispObj);\r
+    if(ret != 0)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    return 0;\r
+}\r
+\r
+/**\r
+ *  \brief    This function initializes DSS DP.\r
+ *\r
+ *  \param    displayObj    [IN/OUT]  Display object structure.\r
+ *\r
+ *  \return   int8_t\r
+ *               0 - in case of success\r
+ *              -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_dpInitDss(BoardDiag_DpDisplayObj *displayObj)\r
+{\r
+    int32_t retVal;\r
+    Fvid2_InitPrms initPrms;\r
+\r
+    Fvid2InitPrms_init(&initPrms);\r
+\r
+    retVal = Fvid2_init(&initPrms);\r
+    if(retVal != FVID2_SOK)\r
+    {\r
+        UART_printf("Initializing Fvid2 Failed\n");\r
+        return -1;\r
+    }\r
+\r
+    Dss_initParamsInit(&displayObj->initParams);\r
+\r
+    retVal = Dss_init(&displayObj->initParams);\r
+    if(retVal != FVID2_SOK)\r
+    {\r
+        UART_printf("DSS init failed!\n");\r
+        return -1;\r
+    }\r
+\r
+    /* Create DCTRL handle, used for common driver configuration */\r
+    displayObj->dctrlHandle = Fvid2_create(DSS_DCTRL_DRV_ID,\r
+                                           DSS_DCTRL_INST_0,\r
+                                           NULL,\r
+                                           NULL,\r
+                                           NULL);\r
+    if(displayObj->dctrlHandle == NULL)\r
+    {\r
+        UART_printf("Display Handle Create Failed\n");\r
+        return -1;\r
+    }\r
+\r
+    return 0;\r
+}\r
+\r
+/**\r
+ *  \brief   This function sets DP clock to generate 148.5MHz.\r
+ *\r
+ *  \return   int8_t\r
+ *               0 - in case of success\r
+ *              -1 - in case of failure.\r
+ *\r
+ */\r
+static int8_t BoardDiag_dpConfigDpClk(void)\r
+{\r
+    int32_t status = PM_SUCCESS, regVal;\r
+\r
+    UART_printf("Configuring DP clock...\n");\r
+    status = Sciclient_pmSetModuleState(TISCI_DEV_SERDES_10G0,\r
+                                        TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,\r
+                                        TISCI_MSG_FLAG_AOP,\r
+                                        SCICLIENT_SERVICE_WAIT_FOREVER);\r
+    if(status != PM_SUCCESS)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    status = Sciclient_pmSetModuleState(TISCI_DEV_DSS_EDP0,\r
+                                        TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,\r
+                                        TISCI_MSG_FLAG_AOP,\r
+                                        SCICLIENT_SERVICE_WAIT_FOREVER);\r
+    if(status != PM_SUCCESS)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    status = Sciclient_pmSetModuleClkParent(TISCI_DEV_DSS0,\r
+                                            TISCI_DEV_DSS0_DSS_INST0_DPI_1_IN_2X_CLK,\r
+                                            TISCI_DEV_DSS0_DSS_INST0_DPI_1_IN_2X_CLK_PARENT_DPI0_EXT_CLKSEL_OUT0,\r
+                                            SCICLIENT_SERVICE_WAIT_FOREVER);\r
+    if(status != PM_SUCCESS)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    status = Sciclient_pmSetModuleState(TISCI_DEV_DSS0,\r
+                                        TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,\r
+                                        TISCI_MSG_FLAG_AOP,\r
+                                        SCICLIENT_SERVICE_WAIT_FOREVER);\r
+    if(status != PM_SUCCESS)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    status = Sciclient_pmModuleClkRequest(TISCI_DEV_DSS0,\r
+                                          TISCI_DEV_DSS0_DSS_FUNC_CLK,\r
+                                          TISCI_MSG_VALUE_CLOCK_SW_STATE_REQ,\r
+                                          ADDITIONAL_CLK_STATE_FLAG,\r
+                                          SCICLIENT_SERVICE_WAIT_FOREVER);\r
+    if(status != PM_SUCCESS)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    status = Sciclient_pmSetModuleClkFreq(TISCI_DEV_DSS0,\r
+                                          TISCI_DEV_DSS0_DSS_INST0_DPI_1_IN_2X_CLK,\r
+                                          BOARD_DIAG_DP_DISPLAY_CLOCK,\r
+                                          ADDITIONAL_CLK_STATE_FLAG,\r
+                                          SCICLIENT_SERVICE_WAIT_FOREVER);\r
+    if(status != PM_SUCCESS)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    status = Sciclient_pmModuleClkRequest(TISCI_DEV_DSS0,\r
+                                          TISCI_DEV_DSS0_DSS_INST0_DPI_1_IN_2X_CLK,\r
+                                          TISCI_MSG_VALUE_CLOCK_SW_STATE_REQ,\r
+                                          ADDITIONAL_CLK_STATE_FLAG,\r
+                                          SCICLIENT_SERVICE_WAIT_FOREVER);\r
+    if(status != PM_SUCCESS)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +\r
+                          CSL_MAIN_CTRL_MMR_CFG0_DSS_DISPC0_CLKSEL3);\r
+\r
+    CSL_FINS(regVal,\r
+             MAIN_CTRL_MMR_CFG0_DSS_DISPC0_CLKSEL3_DPI3_PCLK,\r
+             0x5U);\r
+\r
+    CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +\r
+                 CSL_MAIN_CTRL_MMR_CFG0_DSS_DISPC0_CLKSEL3,\r
+                 regVal);\r
+\r
+    return 0;\r
+}\r
+\r
+/**\r
+ *  \brief    This function runs DisplayPort test.\r
+ *\r
+ *  \return   int8_t\r
+ *               0 - in case of success\r
+ *              -1 - in case of failure.\r
+ *\r
+ */\r
+int8_t BoardDiag_DpRunTest(void)\r
+{\r
+    BoardDiag_DpDisplayObj dispObj;\r
+    int8_t ret;\r
+    char userInput;\r
+\r
+    UART_printf("\n***********************************************\n");\r
+    UART_printf  ("*               DISPLAYPORT Test              *\n");\r
+    UART_printf  ("***********************************************\n");\r
+\r
+    UART_printf("\nRunning DisplayPort Test...\n");\r
+\r
+    ret = BoardDiag_dpConfigDpClk();\r
+    if(ret != 0)\r
+    {\r
+        UART_printf("Configuring DP clock failed!\n");\r
+        return -1;\r
+    }\r
+\r
+    ret = BoardDiag_dpInitDss(&dispObj);\r
+    if(ret != 0)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    ret = BoardDiag_dpSetDispConfig(&dispObj);\r
+    if(ret != 0)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    UART_printf("\nIf color bar displayed on the connected DisplayPort monitor,");\r
+    UART_printf("\n\rpress 'y' or press any other key ");\r
+    UART_scanFmt("%c", &userInput);\r
+\r
+    ret = BoardDiag_dpDeInitDss(&dispObj);\r
+    if(ret != 0)\r
+    {\r
+        UART_printf("Failed in DSS de-initializes\n");\r
+        return -1;\r
+    }\r
+\r
+    if((userInput != 'y') && (userInput != 'Y'))\r
+    {\r
+        UART_printf("\nDisplayPort test failed");\r
+        return -1;\r
+    }\r
+\r
+    UART_printf("\nDisplayPort test passed");\r
+    return 0;\r
+}\r
+\r
+/**\r
+ *  \brief   DP Diagnostic test main function\r
+ *\r
+ *  \return  int - DP Diagnostic test status.\r
+ *             0 - in case of success\r
+ *            -1 - in case of failure.\r
+ *\r
+ */\r
+int main(void)\r
+{\r
+    Board_STATUS status;\r
+    Board_initCfg boardCfg;\r
+\r
+#ifdef PDK_RAW_BOOT\r
+    boardCfg = BOARD_INIT_MODULE_CLOCK |\r
+               BOARD_INIT_PINMUX_CONFIG |\r
+               BOARD_INIT_UART_STDIO;\r
+#else\r
+    boardCfg = BOARD_INIT_UART_STDIO;\r
+#endif\r
+\r
+    /* Board Library Init. */\r
+    status = Board_init(boardCfg);\r
+    if(status != BOARD_SOK)\r
+    {\r
+        return -1;\r
+    }\r
+\r
+    return BoardDiag_DpRunTest();\r
+}\r

diff --git a/diag/display_port/src/display_port_test.h b/diag/display_port/src/display_port_test.h
new file mode 100755 (executable)
index 0000000..3528ed3
--- /dev/null
+++ b/diag/display_port/src/display_port_test.h
@@ -0,0 +1,107 @@
+/******************************************************************************\r
+ * Copyright (c) 2019 Texas Instruments Incorporated - http://www.ti.com\r
+ *\r
+ *  Redistribution and use in source and binary forms, with or without\r
+ *  modification, are permitted provided that the following conditions\r
+ *  are met:\r
+ *\r
+ *    Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ *\r
+ *    Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the\r
+ *    distribution.\r
+ *\r
+ *    Neither the name of Texas Instruments Incorporated nor the names of\r
+ *    its contributors may be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ *****************************************************************************/\r
+\r
+/**\r
+ *\r
+ * \file   display_port_test.h\r
+ *\r
+ * \brief  This is the header file for display_port diagnostic test.\r
+ *\r
+ */\r
+\r
+#ifndef _DISPLAY_PORT_TEST_H_\r
+#define _DISPLAY_PORT_TEST_H_\r
+\r
+#include <ti/csl/cslr.h>\r
+#include <ti/csl/arch/csl_arch.h>\r
+#include <ti/csl/soc/cslr_soc_ctrl_mmr.h>\r
+#include <ti/csl/csl_dss.h>\r
+\r
+#include "board.h"\r
+#include "board_cfg.h"\r
+#include "board_internal.h"\r
+\r
+#include <ti/drv/sciclient/sciclient.h>\r
+#include <ti/drv/pm/pmlib.h>\r
+\r
+#include <ti/drv/uart/UART.h>\r
+#include <ti/drv/uart/UART_stdio.h>\r
+\r
+#include <ti/drv/dss/dss.h>\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+#define BOARD_DIAG_DP_VP_ID                      (CSL_DSS_VP_ID_1)\r
+#define BOARD_DIAG_DP_OVERLAY_ID                 (CSL_DSS_OVERLAY_ID_1)\r
+#define BOARD_DIAG_DP_DCTRL_VID_NODE_ID          (DSS_DCTRL_NODE_VID1)\r
+#define BOARD_DIAG_DP_DCTRL_OVERLAY_NODE_ID      (DSS_DCTRL_NODE_OVERLAY1)\r
+#define BOARD_DIAG_DP_DCTRL_VP_NODE_ID           (DSS_DCTRL_NODE_VP1)\r
+#define BOARD_DIAG_DP_DCTRL_OUT_NODE_ID          (DSS_DCTRL_NODE_EDP_DPI0)\r
+\r
+#define BOARD_DIAG_DP_DISPLAY_CLOCK              (148500000ULL)\r
+\r
+#define ADDITIONAL_CLK_STATE_FLAG                (0U)\r
+/**\r
+ * \brief  DisplayPort object structure to display color bar\r
+ */\r
+typedef struct\r
+{\r
+    Fvid2_Handle dctrlHandle;\r
+    /**< DCTRL handle */\r
+    Dss_InitParams initParams;\r
+    /**< DSS Initialization Parameters */\r
+    Dss_DctrlPathInfo dctrlPathInfo;\r
+    /**< DSS Path Information */\r
+    Dss_DctrlVpParams vpParams;\r
+    /**< VP Params */\r
+    Dss_DctrlOverlayParams overlayParams;\r
+    /**< Overlay Params */\r
+} BoardDiag_DpDisplayObj;\r
+\r
+/**\r
+ * \brief   This function executes DisplayPort diagnostic test\r
+ *\r
+ * \return  int8_t\r
+ *             0   - in case of success\r
+ *            -1   - in case of failure\r
+ *\r
+ */\r
+int8_t BoardDiag_DpRunTest(void);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif /* __cplusplus */\r
+\r
+#endif /* _DISPLAY_PORT_TEST_H_ */\r