1 /*******************************************************************************
2 * *
3 * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com/ *
4 * ALL RIGHTS RESERVED *
5 * *
6 ******************************************************************************/
8 /*
9 * ======== platform.xs ========
10 */
12 var Build = xdc.useModule('xdc.bld.BuildEnvironment');
14 var MemSegDefine = xdc.loadCapsule("mem_segment_definition.xs");
16 Build.platformTable["ti.platforms.evmDRA7XX:IPU_1_0"] =
17 {
18 externalMemoryMap: MemSegDefine.getMemSegmentDefinitionIPU_1_0(),
19 codeMemory:"CODE_CORE_IPU1_0",
20 dataMemory:"PRIVATE_DATA_CORE_IPU1_0",
21 stackMemory:"PRIVATE_DATA_CORE_IPU1_0"
22 };
24 Build.platformTable["ti.platforms.evmDRA7XX:IPU_1_1"] =
25 {
26 externalMemoryMap: MemSegDefine.getMemSegmentDefinitionIPU_1_1(),
27 codeMemory:"CODE_CORE_IPU1_1",
28 dataMemory:"PRIVATE_DATA_CORE_IPU1_1",
29 stackMemory:"PRIVATE_DATA_CORE_IPU1_1"
30 };
32 Build.platformTable["ti.platforms.evmDRA7XX:DSP_1"] =
33 {
34 externalMemoryMap: MemSegDefine.getMemSegmentDefinitionDSP_1(),
35 codeMemory:"CODE_CORE_DSP1",
36 dataMemory:"PRIVATE_DATA_CORE_DSP1",
37 stackMemory:"PRIVATE_DATA_CORE_DSP1"
38 };
40 Build.platformTable["ti.platforms.evmDRA7XX:Cortex_A15"] =
41 {
42 externalMemoryMap: MemSegDefine.getMemSegmentDefinitionHOST(),
43 codeMemory:"CODE_CORE_HOST",
44 dataMemory:"PRIVATE_DATA_CORE_HOST",
45 stackMemory:"PRIVATE_DATA_CORE_HOST"
46 };