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19 <h1>EDMA3 Driver Channel Setup<br>
20 <small>
21 [<a class="el" href="group__Edma3DrvMain.html">EDMA3 Driver Interface Definition</a>]</small>
22 </h1><table border="0" cellpadding="0" cellspacing="0">
23 <tr><td></td></tr>
24 <tr><td colspan="2"><br><h2>Defines</h2></td></tr>
25 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g3f215945183f3d9fc88453c259fa4b7e">EDMA3_DRV_DMA_CHANNEL_ANY</a> 1002u</td></tr>
27 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g48cab1397b2fff89e09b9b1e21b499bd">EDMA3_DRV_QDMA_CHANNEL_ANY</a> 1003u</td></tr>
29 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g72dbba10987168632d1994a98e3b497b">EDMA3_DRV_TCC_ANY</a> 1004u</td></tr>
31 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#gc0d22d1bdbb6ee2bd6aa269429486375">EDMA3_DRV_LINK_CHANNEL</a> 1005u</td></tr>
33 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#ged8a176b1257cdc385c940a1a9a84107">EDMA3_DRV_QDMA_CHANNEL_0</a> (EDMA3_MAX_DMA_CH + EDMA3_MAX_PARAM_SETS)</td></tr>
35 <tr><td class="mdescLeft"> </td><td class="mdescRight">QDMA Channel defines They should be used while requesting a specific QDMA channel. <a href="#ged8a176b1257cdc385c940a1a9a84107"></a><br></td></tr>
36 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g926b824823dfc5263108ee41eb6110d0">EDMA3_DRV_QDMA_CHANNEL_1</a> (EDMA3_DRV_QDMA_CHANNEL_0+1u)</td></tr>
38 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g41b662ac932dfcddef137609a2bd3ad4">EDMA3_DRV_QDMA_CHANNEL_2</a> (EDMA3_DRV_QDMA_CHANNEL_0+2u)</td></tr>
40 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#ge97e0af735749d8ab8985dbd738eb578">EDMA3_DRV_QDMA_CHANNEL_3</a> (EDMA3_DRV_QDMA_CHANNEL_0+3u)</td></tr>
42 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g1c11bab1b40c683b59c4801962cc6046">EDMA3_DRV_QDMA_CHANNEL_4</a> (EDMA3_DRV_QDMA_CHANNEL_0+4u)</td></tr>
44 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g7d6c63e3a6da083430afd94578f4bd84">EDMA3_DRV_QDMA_CHANNEL_5</a> (EDMA3_DRV_QDMA_CHANNEL_0+5u)</td></tr>
46 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#gc52b4731852ac8dac2f824fe0bdd153c">EDMA3_DRV_QDMA_CHANNEL_6</a> (EDMA3_DRV_QDMA_CHANNEL_0+6u)</td></tr>
48 <tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#gfc951e66232fc729344802c3abf6218b">EDMA3_DRV_QDMA_CHANNEL_7</a> (EDMA3_DRV_QDMA_CHANNEL_0+7u)</td></tr>
50 <tr><td colspan="2"><br><h2>Enumerations</h2></td></tr>
51 <tr><td class="memItemLeft" nowrap align="right" valign="top">enum </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g8e20d4ba59240144067e70bb8beb7879">EDMA3_DRV_HW_CHANNEL_EVENT</a> { <br>
52 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787937748ea68c4fbf181415d15e4548a9d5">EDMA3_DRV_HW_CHANNEL_EVENT_0</a> = 0,
53 <br>
54 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787934192b4602da79a32906e449e86ddea9">EDMA3_DRV_HW_CHANNEL_EVENT_1</a>,
55 <br>
56 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879c36395e3506bd6fc8daf06ea945c4f1b">EDMA3_DRV_HW_CHANNEL_EVENT_2</a>,
57 <br>
58 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879d26ddd5a62ff5a8c079eff713ed24a6c">EDMA3_DRV_HW_CHANNEL_EVENT_3</a>,
59 <br>
60 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879b8d954a5708596eb302bbe617e16883e">EDMA3_DRV_HW_CHANNEL_EVENT_4</a>,
61 <br>
62 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78792ca5cca9c6e9c39d36c71feb28729a4c">EDMA3_DRV_HW_CHANNEL_EVENT_5</a>,
63 <br>
64 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879fed5d83771dff787abfa671c489c5bc1">EDMA3_DRV_HW_CHANNEL_EVENT_6</a>,
65 <br>
66 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879ad3f865ffab348c3bcfd75339801fc33">EDMA3_DRV_HW_CHANNEL_EVENT_7</a>,
67 <br>
68 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78793725a5901d7680739b36b5ffd3e5128b">EDMA3_DRV_HW_CHANNEL_EVENT_8</a>,
69 <br>
70 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879842a774c34014c24c7ad9e4a8aa2aa72">EDMA3_DRV_HW_CHANNEL_EVENT_9</a>,
71 <br>
72 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78792d99e6b419712a65dcd7a920b36a866e">EDMA3_DRV_HW_CHANNEL_EVENT_10</a>,
73 <br>
74 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879b956cf256d1818a5909f0399d85612f4">EDMA3_DRV_HW_CHANNEL_EVENT_11</a>,
75 <br>
76 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787905b4c74778694509a7759e4cd124bc23">EDMA3_DRV_HW_CHANNEL_EVENT_12</a>,
77 <br>
78 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78797d86b7fe7d7c3f0077a2c8a445f16943">EDMA3_DRV_HW_CHANNEL_EVENT_13</a>,
79 <br>
80 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787944782731229ca9470e1f46ed93bf6954">EDMA3_DRV_HW_CHANNEL_EVENT_14</a>,
81 <br>
82 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78796a773568b775bff069188481b2b1dc75">EDMA3_DRV_HW_CHANNEL_EVENT_15</a>,
83 <br>
84 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879a7c914b81cad4f66cd91ec5e89240a9d">EDMA3_DRV_HW_CHANNEL_EVENT_16</a>,
85 <br>
86 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78796dedf754dfe2a6eb21a9c4b2a8342099">EDMA3_DRV_HW_CHANNEL_EVENT_17</a>,
87 <br>
88 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78797c0d3ec834f566bf8b3ce427038baf60">EDMA3_DRV_HW_CHANNEL_EVENT_18</a>,
89 <br>
90 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787971d5ec033e254c3a355a8c876304296f">EDMA3_DRV_HW_CHANNEL_EVENT_19</a>,
91 <br>
92 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879c9fd5d6ea19828bba5af7052223d532d">EDMA3_DRV_HW_CHANNEL_EVENT_20</a>,
93 <br>
94 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78794945278d24520fa8fe0dbf543582bdb4">EDMA3_DRV_HW_CHANNEL_EVENT_21</a>,
95 <br>
96 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78795222e130853fdbb6ce243bd8f8e516a6">EDMA3_DRV_HW_CHANNEL_EVENT_22</a>,
97 <br>
98 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78793ace2470d524a24e37a8e87fe5f4546e">EDMA3_DRV_HW_CHANNEL_EVENT_23</a>,
99 <br>
100 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879b8dbc9b117c7c16203ffe9268ac8943e">EDMA3_DRV_HW_CHANNEL_EVENT_24</a>,
101 <br>
102 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787996ff3814c0936e06525dae25737b8e8c">EDMA3_DRV_HW_CHANNEL_EVENT_25</a>,
103 <br>
104 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879524cc629d15967c9e21547a1053af654">EDMA3_DRV_HW_CHANNEL_EVENT_26</a>,
105 <br>
106 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78799138ddea8bb08222af544e7a1d884ebf">EDMA3_DRV_HW_CHANNEL_EVENT_27</a>,
107 <br>
108 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879e916849b035d8101e163ffb18a45f3b1">EDMA3_DRV_HW_CHANNEL_EVENT_28</a>,
109 <br>
110 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787997c9fd86fb3de0ff7963cdeb6ae0adb8">EDMA3_DRV_HW_CHANNEL_EVENT_29</a>,
111 <br>
112 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879b1bcf6eaa841f660d14fee3e96fd86ed">EDMA3_DRV_HW_CHANNEL_EVENT_30</a>,
113 <br>
114 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787923b6ccf182d6c2cf4572d84190021c51">EDMA3_DRV_HW_CHANNEL_EVENT_31</a>,
115 <br>
116 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879dbc4408571a19ec5ec731c2675aeeece">EDMA3_DRV_HW_CHANNEL_EVENT_32</a>,
117 <br>
118 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78794a54cb99692eb23ecb672ac221a70615">EDMA3_DRV_HW_CHANNEL_EVENT_33</a>,
119 <br>
120 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78790d03823cb59ab55fd030d1d9603d19af">EDMA3_DRV_HW_CHANNEL_EVENT_34</a>,
121 <br>
122 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879fda0f229cb06304229edf3900a522b88">EDMA3_DRV_HW_CHANNEL_EVENT_35</a>,
123 <br>
124 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879ec1b8659d6056dc1a469ff839cb45e8d">EDMA3_DRV_HW_CHANNEL_EVENT_36</a>,
125 <br>
126 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879aefcfee3c1dd42b400f4c5d746842068">EDMA3_DRV_HW_CHANNEL_EVENT_37</a>,
127 <br>
128 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78790f175e73d48663fd438dac124870e8db">EDMA3_DRV_HW_CHANNEL_EVENT_38</a>,
129 <br>
130 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879b3f7ae332e42e4e0c6cd626cb79f3fb7">EDMA3_DRV_HW_CHANNEL_EVENT_39</a>,
131 <br>
132 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787901ffb1c47ac459f570347f418da7d8b9">EDMA3_DRV_HW_CHANNEL_EVENT_40</a>,
133 <br>
134 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78791a5aa3f4c27488ec11c8e3b3bc2dd027">EDMA3_DRV_HW_CHANNEL_EVENT_41</a>,
135 <br>
136 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879ac157667fee035df11975decb8a0fdae">EDMA3_DRV_HW_CHANNEL_EVENT_42</a>,
137 <br>
138 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879a048e7a75547802ed7929cef4466fec0">EDMA3_DRV_HW_CHANNEL_EVENT_43</a>,
139 <br>
140 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787970b36fb01559fd3374607d8a574ded25">EDMA3_DRV_HW_CHANNEL_EVENT_44</a>,
141 <br>
142 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78797a654d02cf59e7102f0738071bdca213">EDMA3_DRV_HW_CHANNEL_EVENT_45</a>,
143 <br>
144 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879a229f0efb4bd21aa34211237b240c524">EDMA3_DRV_HW_CHANNEL_EVENT_46</a>,
145 <br>
146 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787905fc551f36ded0686a571b6631879a90">EDMA3_DRV_HW_CHANNEL_EVENT_47</a>,
147 <br>
148 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879295b1b324c9d77d4d971073c52e2e40e">EDMA3_DRV_HW_CHANNEL_EVENT_48</a>,
149 <br>
150 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78799073a64c7ba4caf6ef0359d82adf24d8">EDMA3_DRV_HW_CHANNEL_EVENT_49</a>,
151 <br>
152 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb78796af730dab1edf67d74b5104fda134950">EDMA3_DRV_HW_CHANNEL_EVENT_50</a>,
153 <br>
154 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879bd179dd58d8512110a5452b5bdcdbcc1">EDMA3_DRV_HW_CHANNEL_EVENT_51</a>,
155 <br>
156 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787951b4adfa16b35ade08028839796a1481">EDMA3_DRV_HW_CHANNEL_EVENT_52</a>,
157 <br>
158 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879e527c710b10d5b4f3f6d7b5968acaec4">EDMA3_DRV_HW_CHANNEL_EVENT_53</a>,
159 <br>
160 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787919505cbe43eabceb5988d8cd388b4789">EDMA3_DRV_HW_CHANNEL_EVENT_54</a>,
161 <br>
162 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879a565cbfa49e3f0c1fb2db2db71a454ce">EDMA3_DRV_HW_CHANNEL_EVENT_55</a>,
163 <br>
164 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879c3c80729cb5bb6f55ebe0366ddc7b54a">EDMA3_DRV_HW_CHANNEL_EVENT_56</a>,
165 <br>
166 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879910e620e5654fd23c6cfcef61332bed9">EDMA3_DRV_HW_CHANNEL_EVENT_57</a>,
167 <br>
168 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879a5be0518bc15f08ca41a4c9cdea357a0">EDMA3_DRV_HW_CHANNEL_EVENT_58</a>,
169 <br>
170 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb787942081e20d0bd84418cdebeb3d3c3a74e">EDMA3_DRV_HW_CHANNEL_EVENT_59</a>,
171 <br>
172 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879e6411d5de6e88e2dc7c41e8e5f7859e3">EDMA3_DRV_HW_CHANNEL_EVENT_60</a>,
173 <br>
174 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879786abf418a32147a6df87dac6943576c">EDMA3_DRV_HW_CHANNEL_EVENT_61</a>,
175 <br>
176 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879cf2aaad445adea762c1f1541038b2d9d">EDMA3_DRV_HW_CHANNEL_EVENT_62</a>,
177 <br>
178 <a class="el" href="group__Edma3DrvChannelSetup.html#gg8e20d4ba59240144067e70bb8beb7879f3f3eacae6b1b26111f7988ca3b3e9e8">EDMA3_DRV_HW_CHANNEL_EVENT_63</a>
179 <br>
180 }</td></tr>
182 <tr><td class="mdescLeft"> </td><td class="mdescRight">DMA Channels assigned to different Hardware Events. They should be used while requesting a specific DMA channel. One possible usage is to maintain a SoC specific file, which will contain the mapping of these hardware events to the respective peripherals for better understanding and lesser probability of errors. Also, if any event associated with a particular peripheral gets changed, only that SoC specific file needs to be changed. <a href="group__Edma3DrvChannelSetup.html#g8e20d4ba59240144067e70bb8beb7879">More...</a><br></td></tr>
183 <tr><td colspan="2"><br><h2>Functions</h2></td></tr>
184 <tr><td class="memItemLeft" nowrap align="right" valign="top">EDMA3_DRV_Result </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g301122cb5f7cca50ae824611bd816f8e">EDMA3_DRV_requestChannel</a> (EDMA3_DRV_Handle hEdma, unsigned int *pLCh, unsigned int *pTcc, EDMA3_RM_EventQueue evtQueue, EDMA3_RM_TccCallback tccCb, void *cbData)</td></tr>
186 <tr><td class="mdescLeft"> </td><td class="mdescRight">Request a DMA/QDMA/Link channel. <a href="#g301122cb5f7cca50ae824611bd816f8e"></a><br></td></tr>
187 <tr><td class="memItemLeft" nowrap align="right" valign="top">EDMA3_DRV_Result </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g0589ed9b15b42ecefc4a6ccd8e1758fc">EDMA3_DRV_freeChannel</a> (EDMA3_DRV_Handle hEdma, unsigned int channelId)</td></tr>
189 <tr><td class="mdescLeft"> </td><td class="mdescRight">Free the specified channel (DMA/QDMA/Link) and its associated resources (PaRAM Set, TCC etc) and removes various mappings. <a href="#g0589ed9b15b42ecefc4a6ccd8e1758fc"></a><br></td></tr>
190 <tr><td class="memItemLeft" nowrap align="right" valign="top">EDMA3_DRV_Result </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#g35daa16c899b38d5af19d7d2d22777a5">EDMA3_DRV_clearErrorBits</a> (EDMA3_DRV_Handle hEdma, unsigned int channelId)</td></tr>
192 <tr><td class="mdescLeft"> </td><td class="mdescRight">Disables the DMA Channel by clearing the Event Enable Register and clears Error Register & Secondary Event Register for a specific DMA channel. <a href="#g35daa16c899b38d5af19d7d2d22777a5"></a><br></td></tr>
193 <tr><td class="memItemLeft" nowrap align="right" valign="top">EDMA3_DRV_Result </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#ga8561ee446bd1b9d0c5c4b106c9f40a9">EDMA3_DRV_linkChannel</a> (EDMA3_DRV_Handle hEdma, unsigned int lCh1, unsigned int lCh2)</td></tr>
195 <tr><td class="mdescLeft"> </td><td class="mdescRight">Link two logical channels. <a href="#ga8561ee446bd1b9d0c5c4b106c9f40a9"></a><br></td></tr>
196 <tr><td class="memItemLeft" nowrap align="right" valign="top">EDMA3_DRV_Result </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Edma3DrvChannelSetup.html#gca6ef38f26d8e043352fa8963b7f090a">EDMA3_DRV_unlinkChannel</a> (EDMA3_DRV_Handle hEdma, unsigned int lCh)</td></tr>
198 <tr><td class="mdescLeft"> </td><td class="mdescRight">Unlink the channel from the earlier linked logical channel. <a href="#gca6ef38f26d8e043352fa8963b7f090a"></a><br></td></tr>
199 </table>
200 <hr><a name="_details"></a><h2>Detailed Description</h2>
201 Channel related Interface of the EDMA3 Driver <hr><h2>Define Documentation</h2>
202 <a class="anchor" name="g3f215945183f3d9fc88453c259fa4b7e"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_DMA_CHANNEL_ANY" ref="g3f215945183f3d9fc88453c259fa4b7e" args="" -->
203 <div class="memitem">
204 <div class="memproto">
205 <table class="memname">
206 <tr>
207 <td class="memname">#define EDMA3_DRV_DMA_CHANNEL_ANY 1002u </td>
208 </tr>
209 </table>
210 </div>
211 <div class="memdoc">
213 <p>
214 Used to specify any available DMA Channel while requesting one. Used in the API <a class="el" href="group__Edma3DrvChannelSetup.html#g301122cb5f7cca50ae824611bd816f8e" title="Request a DMA/QDMA/Link channel.">EDMA3_DRV_requestChannel()</a>. DMA channel from the pool of (owned && non_reserved && available_right_now) DMA channels will be chosen and returned.
215 <p>Referenced by <a class="el" href="edma3__drv__basic_8c_source.html#l00274">EDMA3_DRV_requestChannel()</a>.</p>
217 </div>
218 </div><p>
219 <a class="anchor" name="gc0d22d1bdbb6ee2bd6aa269429486375"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_LINK_CHANNEL" ref="gc0d22d1bdbb6ee2bd6aa269429486375" args="" -->
220 <div class="memitem">
221 <div class="memproto">
222 <table class="memname">
223 <tr>
224 <td class="memname">#define EDMA3_DRV_LINK_CHANNEL 1005u </td>
225 </tr>
226 </table>
227 </div>
228 <div class="memdoc">
230 <p>
231 Used to specify any available PaRAM Set while requesting one. Used in the API <a class="el" href="group__Edma3DrvChannelSetup.html#g301122cb5f7cca50ae824611bd816f8e" title="Request a DMA/QDMA/Link channel.">EDMA3_DRV_requestChannel()</a>, for Link channels. PaRAM Set from the pool of (owned && non_reserved && available_right_now) PaRAM Sets will be chosen and returned.
232 <p>Referenced by <a class="el" href="edma3__drv__basic_8c_source.html#l00274">EDMA3_DRV_requestChannel()</a>.</p>
234 </div>
235 </div><p>
236 <a class="anchor" name="ged8a176b1257cdc385c940a1a9a84107"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_QDMA_CHANNEL_0" ref="ged8a176b1257cdc385c940a1a9a84107" args="" -->
237 <div class="memitem">
238 <div class="memproto">
239 <table class="memname">
240 <tr>
241 <td class="memname">#define EDMA3_DRV_QDMA_CHANNEL_0 (EDMA3_MAX_DMA_CH + EDMA3_MAX_PARAM_SETS) </td>
242 </tr>
243 </table>
244 </div>
245 <div class="memdoc">
247 <p>
248 QDMA Channel defines They should be used while requesting a specific QDMA channel.
249 <p>
250 QDMA Channel 0
251 <p>Referenced by <a class="el" href="edma3__drv__adv_8c_source.html#l01036">EDMA3_DRV_setPaRAMField()</a>.</p>
253 </div>
254 </div><p>
255 <a class="anchor" name="g926b824823dfc5263108ee41eb6110d0"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_QDMA_CHANNEL_1" ref="g926b824823dfc5263108ee41eb6110d0" args="" -->
256 <div class="memitem">
257 <div class="memproto">
258 <table class="memname">
259 <tr>
260 <td class="memname">#define EDMA3_DRV_QDMA_CHANNEL_1 (EDMA3_DRV_QDMA_CHANNEL_0+1u) </td>
261 </tr>
262 </table>
263 </div>
264 <div class="memdoc">
266 <p>
267 QDMA Channel 1
268 </div>
269 </div><p>
270 <a class="anchor" name="g41b662ac932dfcddef137609a2bd3ad4"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_QDMA_CHANNEL_2" ref="g41b662ac932dfcddef137609a2bd3ad4" args="" -->
271 <div class="memitem">
272 <div class="memproto">
273 <table class="memname">
274 <tr>
275 <td class="memname">#define EDMA3_DRV_QDMA_CHANNEL_2 (EDMA3_DRV_QDMA_CHANNEL_0+2u) </td>
276 </tr>
277 </table>
278 </div>
279 <div class="memdoc">
281 <p>
282 QDMA Channel 2
283 </div>
284 </div><p>
285 <a class="anchor" name="ge97e0af735749d8ab8985dbd738eb578"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_QDMA_CHANNEL_3" ref="ge97e0af735749d8ab8985dbd738eb578" args="" -->
286 <div class="memitem">
287 <div class="memproto">
288 <table class="memname">
289 <tr>
290 <td class="memname">#define EDMA3_DRV_QDMA_CHANNEL_3 (EDMA3_DRV_QDMA_CHANNEL_0+3u) </td>
291 </tr>
292 </table>
293 </div>
294 <div class="memdoc">
296 <p>
297 QDMA Channel 3
298 </div>
299 </div><p>
300 <a class="anchor" name="g1c11bab1b40c683b59c4801962cc6046"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_QDMA_CHANNEL_4" ref="g1c11bab1b40c683b59c4801962cc6046" args="" -->
301 <div class="memitem">
302 <div class="memproto">
303 <table class="memname">
304 <tr>
305 <td class="memname">#define EDMA3_DRV_QDMA_CHANNEL_4 (EDMA3_DRV_QDMA_CHANNEL_0+4u) </td>
306 </tr>
307 </table>
308 </div>
309 <div class="memdoc">
311 <p>
312 QDMA Channel 4
313 </div>
314 </div><p>
315 <a class="anchor" name="g7d6c63e3a6da083430afd94578f4bd84"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_QDMA_CHANNEL_5" ref="g7d6c63e3a6da083430afd94578f4bd84" args="" -->
316 <div class="memitem">
317 <div class="memproto">
318 <table class="memname">
319 <tr>
320 <td class="memname">#define EDMA3_DRV_QDMA_CHANNEL_5 (EDMA3_DRV_QDMA_CHANNEL_0+5u) </td>
321 </tr>
322 </table>
323 </div>
324 <div class="memdoc">
326 <p>
327 QDMA Channel 5
328 </div>
329 </div><p>
330 <a class="anchor" name="gc52b4731852ac8dac2f824fe0bdd153c"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_QDMA_CHANNEL_6" ref="gc52b4731852ac8dac2f824fe0bdd153c" args="" -->
331 <div class="memitem">
332 <div class="memproto">
333 <table class="memname">
334 <tr>
335 <td class="memname">#define EDMA3_DRV_QDMA_CHANNEL_6 (EDMA3_DRV_QDMA_CHANNEL_0+6u) </td>
336 </tr>
337 </table>
338 </div>
339 <div class="memdoc">
341 <p>
342 QDMA Channel 6
343 </div>
344 </div><p>
345 <a class="anchor" name="gfc951e66232fc729344802c3abf6218b"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_QDMA_CHANNEL_7" ref="gfc951e66232fc729344802c3abf6218b" args="" -->
346 <div class="memitem">
347 <div class="memproto">
348 <table class="memname">
349 <tr>
350 <td class="memname">#define EDMA3_DRV_QDMA_CHANNEL_7 (EDMA3_DRV_QDMA_CHANNEL_0+7u) </td>
351 </tr>
352 </table>
353 </div>
354 <div class="memdoc">
356 <p>
357 QDMA Channel 7
358 <p>Referenced by <a class="el" href="edma3__drv__adv_8c_source.html#l01036">EDMA3_DRV_setPaRAMField()</a>.</p>
360 </div>
361 </div><p>
362 <a class="anchor" name="g48cab1397b2fff89e09b9b1e21b499bd"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_QDMA_CHANNEL_ANY" ref="g48cab1397b2fff89e09b9b1e21b499bd" args="" -->
363 <div class="memitem">
364 <div class="memproto">
365 <table class="memname">
366 <tr>
367 <td class="memname">#define EDMA3_DRV_QDMA_CHANNEL_ANY 1003u </td>
368 </tr>
369 </table>
370 </div>
371 <div class="memdoc">
373 <p>
374 Used to specify any available QDMA Channel while requesting one. Used in the API <a class="el" href="group__Edma3DrvChannelSetup.html#g301122cb5f7cca50ae824611bd816f8e" title="Request a DMA/QDMA/Link channel.">EDMA3_DRV_requestChannel()</a>. QDMA channel from the pool of (owned && non_reserved && available_right_now) QDMA channels will be chosen and returned.
375 <p>Referenced by <a class="el" href="edma3__drv__basic_8c_source.html#l00274">EDMA3_DRV_requestChannel()</a>.</p>
377 </div>
378 </div><p>
379 <a class="anchor" name="g72dbba10987168632d1994a98e3b497b"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_TCC_ANY" ref="g72dbba10987168632d1994a98e3b497b" args="" -->
380 <div class="memitem">
381 <div class="memproto">
382 <table class="memname">
383 <tr>
384 <td class="memname">#define EDMA3_DRV_TCC_ANY 1004u </td>
385 </tr>
386 </table>
387 </div>
388 <div class="memdoc">
390 <p>
391 Used to specify any available TCC while requesting one. Used in the API <a class="el" href="group__Edma3DrvChannelSetup.html#g301122cb5f7cca50ae824611bd816f8e" title="Request a DMA/QDMA/Link channel.">EDMA3_DRV_requestChannel()</a>, for both DMA and QDMA channels. TCC from the pool of (owned && non_reserved && available_right_now) TCCs will be chosen and returned.
392 <p>Referenced by <a class="el" href="edma3__drv__basic_8c_source.html#l00274">EDMA3_DRV_requestChannel()</a>.</p>
394 </div>
395 </div><p>
396 <hr><h2>Enumeration Type Documentation</h2>
397 <a class="anchor" name="g8e20d4ba59240144067e70bb8beb7879"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_HW_CHANNEL_EVENT" ref="g8e20d4ba59240144067e70bb8beb7879" args="" -->
398 <div class="memitem">
399 <div class="memproto">
400 <table class="memname">
401 <tr>
402 <td class="memname">enum <a class="el" href="group__Edma3DrvChannelSetup.html#g8e20d4ba59240144067e70bb8beb7879">EDMA3_DRV_HW_CHANNEL_EVENT</a> </td>
403 </tr>
404 </table>
405 </div>
406 <div class="memdoc">
408 <p>
409 DMA Channels assigned to different Hardware Events. They should be used while requesting a specific DMA channel. One possible usage is to maintain a SoC specific file, which will contain the mapping of these hardware events to the respective peripherals for better understanding and lesser probability of errors. Also, if any event associated with a particular peripheral gets changed, only that SoC specific file needs to be changed.
410 <p>
411 for eg, the sample SoC specific file "soc.h" can have these defines:<p>
412 define EDMA3_DRV_HW_CHANNEL_MCBSP_TX EDMA3_DRV_HW_CHANNEL_EVENT_2 define EDMA3_DRV_HW_CHANNEL_MCBSP_RX EDMA3_DRV_HW_CHANNEL_EVENT_3<p>
413 These defines will be used by the MCBSP driver. The same event EDMA3_DRV_HW_CHANNEL_EVENT_2/3 could be mapped to some other peripheral also. <dl compact><dt><b>Enumerator: </b></dt><dd>
414 <table border="0" cellspacing="2" cellpadding="0">
415 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787937748ea68c4fbf181415d15e4548a9d5"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_0" ref="gg8e20d4ba59240144067e70bb8beb787937748ea68c4fbf181415d15e4548a9d5" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_0</em> </td><td>
416 Channel assigned to EDMA3 Event 0 </td></tr>
417 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787934192b4602da79a32906e449e86ddea9"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_1" ref="gg8e20d4ba59240144067e70bb8beb787934192b4602da79a32906e449e86ddea9" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_1</em> </td><td>
418 Channel assigned to EDMA3 Event 1 </td></tr>
419 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879c36395e3506bd6fc8daf06ea945c4f1b"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_2" ref="gg8e20d4ba59240144067e70bb8beb7879c36395e3506bd6fc8daf06ea945c4f1b" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_2</em> </td><td>
420 Channel assigned to EDMA3 Event 2 </td></tr>
421 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879d26ddd5a62ff5a8c079eff713ed24a6c"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_3" ref="gg8e20d4ba59240144067e70bb8beb7879d26ddd5a62ff5a8c079eff713ed24a6c" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_3</em> </td><td>
422 Channel assigned to EDMA3 Event 3 </td></tr>
423 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879b8d954a5708596eb302bbe617e16883e"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_4" ref="gg8e20d4ba59240144067e70bb8beb7879b8d954a5708596eb302bbe617e16883e" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_4</em> </td><td>
424 Channel assigned to EDMA3 Event 4 </td></tr>
425 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78792ca5cca9c6e9c39d36c71feb28729a4c"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_5" ref="gg8e20d4ba59240144067e70bb8beb78792ca5cca9c6e9c39d36c71feb28729a4c" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_5</em> </td><td>
426 Channel assigned to EDMA3 Event 5 </td></tr>
427 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879fed5d83771dff787abfa671c489c5bc1"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_6" ref="gg8e20d4ba59240144067e70bb8beb7879fed5d83771dff787abfa671c489c5bc1" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_6</em> </td><td>
428 Channel assigned to EDMA3 Event 6 </td></tr>
429 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879ad3f865ffab348c3bcfd75339801fc33"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_7" ref="gg8e20d4ba59240144067e70bb8beb7879ad3f865ffab348c3bcfd75339801fc33" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_7</em> </td><td>
430 Channel assigned to EDMA3 Event 7 </td></tr>
431 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78793725a5901d7680739b36b5ffd3e5128b"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_8" ref="gg8e20d4ba59240144067e70bb8beb78793725a5901d7680739b36b5ffd3e5128b" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_8</em> </td><td>
432 Channel assigned to EDMA3 Event 8 </td></tr>
433 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879842a774c34014c24c7ad9e4a8aa2aa72"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_9" ref="gg8e20d4ba59240144067e70bb8beb7879842a774c34014c24c7ad9e4a8aa2aa72" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_9</em> </td><td>
434 Channel assigned to EDMA3 Event 9 </td></tr>
435 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78792d99e6b419712a65dcd7a920b36a866e"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_10" ref="gg8e20d4ba59240144067e70bb8beb78792d99e6b419712a65dcd7a920b36a866e" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_10</em> </td><td>
436 Channel assigned to EDMA3 Event 10 </td></tr>
437 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879b956cf256d1818a5909f0399d85612f4"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_11" ref="gg8e20d4ba59240144067e70bb8beb7879b956cf256d1818a5909f0399d85612f4" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_11</em> </td><td>
438 Channel assigned to EDMA3 Event 11 </td></tr>
439 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787905b4c74778694509a7759e4cd124bc23"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_12" ref="gg8e20d4ba59240144067e70bb8beb787905b4c74778694509a7759e4cd124bc23" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_12</em> </td><td>
440 Channel assigned to EDMA3 Event 12 </td></tr>
441 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78797d86b7fe7d7c3f0077a2c8a445f16943"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_13" ref="gg8e20d4ba59240144067e70bb8beb78797d86b7fe7d7c3f0077a2c8a445f16943" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_13</em> </td><td>
442 Channel assigned to EDMA3 Event 13 </td></tr>
443 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787944782731229ca9470e1f46ed93bf6954"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_14" ref="gg8e20d4ba59240144067e70bb8beb787944782731229ca9470e1f46ed93bf6954" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_14</em> </td><td>
444 Channel assigned to EDMA3 Event 14 </td></tr>
445 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78796a773568b775bff069188481b2b1dc75"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_15" ref="gg8e20d4ba59240144067e70bb8beb78796a773568b775bff069188481b2b1dc75" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_15</em> </td><td>
446 Channel assigned to EDMA3 Event 15 </td></tr>
447 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879a7c914b81cad4f66cd91ec5e89240a9d"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_16" ref="gg8e20d4ba59240144067e70bb8beb7879a7c914b81cad4f66cd91ec5e89240a9d" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_16</em> </td><td>
448 Channel assigned to EDMA3 Event 16 </td></tr>
449 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78796dedf754dfe2a6eb21a9c4b2a8342099"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_17" ref="gg8e20d4ba59240144067e70bb8beb78796dedf754dfe2a6eb21a9c4b2a8342099" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_17</em> </td><td>
450 Channel assigned to EDMA3 Event 17 </td></tr>
451 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78797c0d3ec834f566bf8b3ce427038baf60"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_18" ref="gg8e20d4ba59240144067e70bb8beb78797c0d3ec834f566bf8b3ce427038baf60" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_18</em> </td><td>
452 Channel assigned to EDMA3 Event 18 </td></tr>
453 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787971d5ec033e254c3a355a8c876304296f"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_19" ref="gg8e20d4ba59240144067e70bb8beb787971d5ec033e254c3a355a8c876304296f" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_19</em> </td><td>
454 Channel assigned to EDMA3 Event 19 </td></tr>
455 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879c9fd5d6ea19828bba5af7052223d532d"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_20" ref="gg8e20d4ba59240144067e70bb8beb7879c9fd5d6ea19828bba5af7052223d532d" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_20</em> </td><td>
456 Channel assigned to EDMA3 Event 20 </td></tr>
457 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78794945278d24520fa8fe0dbf543582bdb4"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_21" ref="gg8e20d4ba59240144067e70bb8beb78794945278d24520fa8fe0dbf543582bdb4" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_21</em> </td><td>
458 Channel assigned to EDMA3 Event 21 </td></tr>
459 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78795222e130853fdbb6ce243bd8f8e516a6"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_22" ref="gg8e20d4ba59240144067e70bb8beb78795222e130853fdbb6ce243bd8f8e516a6" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_22</em> </td><td>
460 Channel assigned to EDMA3 Event 22 </td></tr>
461 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78793ace2470d524a24e37a8e87fe5f4546e"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_23" ref="gg8e20d4ba59240144067e70bb8beb78793ace2470d524a24e37a8e87fe5f4546e" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_23</em> </td><td>
462 Channel assigned to EDMA3 Event 23 </td></tr>
463 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879b8dbc9b117c7c16203ffe9268ac8943e"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_24" ref="gg8e20d4ba59240144067e70bb8beb7879b8dbc9b117c7c16203ffe9268ac8943e" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_24</em> </td><td>
464 Channel assigned to EDMA3 Event 24 </td></tr>
465 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787996ff3814c0936e06525dae25737b8e8c"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_25" ref="gg8e20d4ba59240144067e70bb8beb787996ff3814c0936e06525dae25737b8e8c" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_25</em> </td><td>
466 Channel assigned to EDMA3 Event 25 </td></tr>
467 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879524cc629d15967c9e21547a1053af654"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_26" ref="gg8e20d4ba59240144067e70bb8beb7879524cc629d15967c9e21547a1053af654" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_26</em> </td><td>
468 Channel assigned to EDMA3 Event 26 </td></tr>
469 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78799138ddea8bb08222af544e7a1d884ebf"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_27" ref="gg8e20d4ba59240144067e70bb8beb78799138ddea8bb08222af544e7a1d884ebf" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_27</em> </td><td>
470 Channel assigned to EDMA3 Event 27 </td></tr>
471 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879e916849b035d8101e163ffb18a45f3b1"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_28" ref="gg8e20d4ba59240144067e70bb8beb7879e916849b035d8101e163ffb18a45f3b1" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_28</em> </td><td>
472 Channel assigned to EDMA3 Event 28 </td></tr>
473 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787997c9fd86fb3de0ff7963cdeb6ae0adb8"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_29" ref="gg8e20d4ba59240144067e70bb8beb787997c9fd86fb3de0ff7963cdeb6ae0adb8" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_29</em> </td><td>
474 Channel assigned to EDMA3 Event 29 </td></tr>
475 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879b1bcf6eaa841f660d14fee3e96fd86ed"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_30" ref="gg8e20d4ba59240144067e70bb8beb7879b1bcf6eaa841f660d14fee3e96fd86ed" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_30</em> </td><td>
476 Channel assigned to EDMA3 Event 30 </td></tr>
477 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787923b6ccf182d6c2cf4572d84190021c51"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_31" ref="gg8e20d4ba59240144067e70bb8beb787923b6ccf182d6c2cf4572d84190021c51" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_31</em> </td><td>
478 Channel assigned to EDMA3 Event 31 </td></tr>
479 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879dbc4408571a19ec5ec731c2675aeeece"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_32" ref="gg8e20d4ba59240144067e70bb8beb7879dbc4408571a19ec5ec731c2675aeeece" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_32</em> </td><td>
480 Channel assigned to EDMA3 Event 32 </td></tr>
481 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78794a54cb99692eb23ecb672ac221a70615"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_33" ref="gg8e20d4ba59240144067e70bb8beb78794a54cb99692eb23ecb672ac221a70615" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_33</em> </td><td>
482 Channel assigned to EDMA3 Event 33 </td></tr>
483 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78790d03823cb59ab55fd030d1d9603d19af"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_34" ref="gg8e20d4ba59240144067e70bb8beb78790d03823cb59ab55fd030d1d9603d19af" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_34</em> </td><td>
484 Channel assigned to EDMA3 Event 34 </td></tr>
485 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879fda0f229cb06304229edf3900a522b88"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_35" ref="gg8e20d4ba59240144067e70bb8beb7879fda0f229cb06304229edf3900a522b88" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_35</em> </td><td>
486 Channel assigned to EDMA3 Event 35 </td></tr>
487 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879ec1b8659d6056dc1a469ff839cb45e8d"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_36" ref="gg8e20d4ba59240144067e70bb8beb7879ec1b8659d6056dc1a469ff839cb45e8d" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_36</em> </td><td>
488 Channel assigned to EDMA3 Event 36 </td></tr>
489 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879aefcfee3c1dd42b400f4c5d746842068"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_37" ref="gg8e20d4ba59240144067e70bb8beb7879aefcfee3c1dd42b400f4c5d746842068" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_37</em> </td><td>
490 Channel assigned to EDMA3 Event 37 </td></tr>
491 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78790f175e73d48663fd438dac124870e8db"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_38" ref="gg8e20d4ba59240144067e70bb8beb78790f175e73d48663fd438dac124870e8db" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_38</em> </td><td>
492 Channel assigned to EDMA3 Event 38 </td></tr>
493 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879b3f7ae332e42e4e0c6cd626cb79f3fb7"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_39" ref="gg8e20d4ba59240144067e70bb8beb7879b3f7ae332e42e4e0c6cd626cb79f3fb7" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_39</em> </td><td>
494 Channel assigned to EDMA3 Event 39 </td></tr>
495 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787901ffb1c47ac459f570347f418da7d8b9"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_40" ref="gg8e20d4ba59240144067e70bb8beb787901ffb1c47ac459f570347f418da7d8b9" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_40</em> </td><td>
496 Channel assigned to EDMA3 Event 40 </td></tr>
497 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78791a5aa3f4c27488ec11c8e3b3bc2dd027"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_41" ref="gg8e20d4ba59240144067e70bb8beb78791a5aa3f4c27488ec11c8e3b3bc2dd027" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_41</em> </td><td>
498 Channel assigned to EDMA3 Event 41 </td></tr>
499 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879ac157667fee035df11975decb8a0fdae"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_42" ref="gg8e20d4ba59240144067e70bb8beb7879ac157667fee035df11975decb8a0fdae" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_42</em> </td><td>
500 Channel assigned to EDMA3 Event 42 </td></tr>
501 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879a048e7a75547802ed7929cef4466fec0"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_43" ref="gg8e20d4ba59240144067e70bb8beb7879a048e7a75547802ed7929cef4466fec0" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_43</em> </td><td>
502 Channel assigned to EDMA3 Event 43 </td></tr>
503 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787970b36fb01559fd3374607d8a574ded25"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_44" ref="gg8e20d4ba59240144067e70bb8beb787970b36fb01559fd3374607d8a574ded25" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_44</em> </td><td>
504 Channel assigned to EDMA3 Event 44 </td></tr>
505 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78797a654d02cf59e7102f0738071bdca213"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_45" ref="gg8e20d4ba59240144067e70bb8beb78797a654d02cf59e7102f0738071bdca213" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_45</em> </td><td>
506 Channel assigned to EDMA3 Event 45 </td></tr>
507 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879a229f0efb4bd21aa34211237b240c524"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_46" ref="gg8e20d4ba59240144067e70bb8beb7879a229f0efb4bd21aa34211237b240c524" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_46</em> </td><td>
508 Channel assigned to EDMA3 Event 46 </td></tr>
509 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787905fc551f36ded0686a571b6631879a90"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_47" ref="gg8e20d4ba59240144067e70bb8beb787905fc551f36ded0686a571b6631879a90" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_47</em> </td><td>
510 Channel assigned to EDMA3 Event 47 </td></tr>
511 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879295b1b324c9d77d4d971073c52e2e40e"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_48" ref="gg8e20d4ba59240144067e70bb8beb7879295b1b324c9d77d4d971073c52e2e40e" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_48</em> </td><td>
512 Channel assigned to EDMA3 Event 48 </td></tr>
513 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78799073a64c7ba4caf6ef0359d82adf24d8"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_49" ref="gg8e20d4ba59240144067e70bb8beb78799073a64c7ba4caf6ef0359d82adf24d8" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_49</em> </td><td>
514 Channel assigned to EDMA3 Event 49 </td></tr>
515 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb78796af730dab1edf67d74b5104fda134950"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_50" ref="gg8e20d4ba59240144067e70bb8beb78796af730dab1edf67d74b5104fda134950" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_50</em> </td><td>
516 Channel assigned to EDMA3 Event 50 </td></tr>
517 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879bd179dd58d8512110a5452b5bdcdbcc1"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_51" ref="gg8e20d4ba59240144067e70bb8beb7879bd179dd58d8512110a5452b5bdcdbcc1" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_51</em> </td><td>
518 Channel assigned to EDMA3 Event 51 </td></tr>
519 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787951b4adfa16b35ade08028839796a1481"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_52" ref="gg8e20d4ba59240144067e70bb8beb787951b4adfa16b35ade08028839796a1481" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_52</em> </td><td>
520 Channel assigned to EDMA3 Event 52 </td></tr>
521 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879e527c710b10d5b4f3f6d7b5968acaec4"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_53" ref="gg8e20d4ba59240144067e70bb8beb7879e527c710b10d5b4f3f6d7b5968acaec4" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_53</em> </td><td>
522 Channel assigned to EDMA3 Event 53 </td></tr>
523 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787919505cbe43eabceb5988d8cd388b4789"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_54" ref="gg8e20d4ba59240144067e70bb8beb787919505cbe43eabceb5988d8cd388b4789" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_54</em> </td><td>
524 Channel assigned to EDMA3 Event 54 </td></tr>
525 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879a565cbfa49e3f0c1fb2db2db71a454ce"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_55" ref="gg8e20d4ba59240144067e70bb8beb7879a565cbfa49e3f0c1fb2db2db71a454ce" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_55</em> </td><td>
526 Channel assigned to EDMA3 Event 55 </td></tr>
527 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879c3c80729cb5bb6f55ebe0366ddc7b54a"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_56" ref="gg8e20d4ba59240144067e70bb8beb7879c3c80729cb5bb6f55ebe0366ddc7b54a" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_56</em> </td><td>
528 Channel assigned to EDMA3 Event 56 </td></tr>
529 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879910e620e5654fd23c6cfcef61332bed9"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_57" ref="gg8e20d4ba59240144067e70bb8beb7879910e620e5654fd23c6cfcef61332bed9" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_57</em> </td><td>
530 Channel assigned to EDMA3 Event 57 </td></tr>
531 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879a5be0518bc15f08ca41a4c9cdea357a0"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_58" ref="gg8e20d4ba59240144067e70bb8beb7879a5be0518bc15f08ca41a4c9cdea357a0" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_58</em> </td><td>
532 Channel assigned to EDMA3 Event 58 </td></tr>
533 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb787942081e20d0bd84418cdebeb3d3c3a74e"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_59" ref="gg8e20d4ba59240144067e70bb8beb787942081e20d0bd84418cdebeb3d3c3a74e" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_59</em> </td><td>
534 Channel assigned to EDMA3 Event 59 </td></tr>
535 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879e6411d5de6e88e2dc7c41e8e5f7859e3"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_60" ref="gg8e20d4ba59240144067e70bb8beb7879e6411d5de6e88e2dc7c41e8e5f7859e3" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_60</em> </td><td>
536 Channel assigned to EDMA3 Event 60 </td></tr>
537 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879786abf418a32147a6df87dac6943576c"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_61" ref="gg8e20d4ba59240144067e70bb8beb7879786abf418a32147a6df87dac6943576c" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_61</em> </td><td>
538 Channel assigned to EDMA3 Event 61 </td></tr>
539 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879cf2aaad445adea762c1f1541038b2d9d"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_62" ref="gg8e20d4ba59240144067e70bb8beb7879cf2aaad445adea762c1f1541038b2d9d" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_62</em> </td><td>
540 Channel assigned to EDMA3 Event 62 </td></tr>
541 <tr><td valign="top"><em><a class="anchor" name="gg8e20d4ba59240144067e70bb8beb7879f3f3eacae6b1b26111f7988ca3b3e9e8"></a><!-- doxytag: member="EDMA3_DRV_HW_CHANNEL_EVENT_63" ref="gg8e20d4ba59240144067e70bb8beb7879f3f3eacae6b1b26111f7988ca3b3e9e8" args="" -->EDMA3_DRV_HW_CHANNEL_EVENT_63</em> </td><td>
542 Channel assigned to EDMA3 Event 63 </td></tr>
543 </table>
544 </dl>
546 </div>
547 </div><p>
548 <hr><h2>Function Documentation</h2>
549 <a class="anchor" name="g35daa16c899b38d5af19d7d2d22777a5"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_clearErrorBits" ref="g35daa16c899b38d5af19d7d2d22777a5" args="(EDMA3_DRV_Handle hEdma, unsigned int channelId)" -->
550 <div class="memitem">
551 <div class="memproto">
552 <table class="memname">
553 <tr>
554 <td class="memname">EDMA3_DRV_Result EDMA3_DRV_clearErrorBits </td>
555 <td>(</td>
556 <td class="paramtype">EDMA3_DRV_Handle </td>
557 <td class="paramname"> <em>hEdma</em>, </td>
558 </tr>
559 <tr>
560 <td class="paramkey"></td>
561 <td></td>
562 <td class="paramtype">unsigned int </td>
563 <td class="paramname"> <em>channelId</em></td><td> </td>
564 </tr>
565 <tr>
566 <td></td>
567 <td>)</td>
568 <td></td><td></td><td></td>
569 </tr>
570 </table>
571 </div>
572 <div class="memdoc">
574 <p>
575 Disables the DMA Channel by clearing the Event Enable Register and clears Error Register & Secondary Event Register for a specific DMA channel.
576 <p>
577 This API clears the Event Enable register, Event Miss register and Secondary Event register for a specific DMA channel. It also clears the CC Error register.<p>
578 <dl compact><dt><b>Parameters:</b></dt><dd>
579 <table border="0" cellspacing="2" cellpadding="0">
580 <tr><td valign="top"></td><td valign="top"><em>hEdma</em> </td><td>[IN] Handle to the EDMA Driver Instance. </td></tr>
581 <tr><td valign="top"></td><td valign="top"><em>channelId</em> </td><td>[IN] DMA Channel needs to be cleaned.</td></tr>
582 </table>
583 </dl>
584 <dl class="return" compact><dt><b>Returns:</b></dt><dd>EDMA3_DRV_SOK or EDMA3_DRV Error code</dd></dl>
585 <dl class="note" compact><dt><b>Note:</b></dt><dd>This function is re-entrant for unique channelId values. It is non- re-entrant for same channelId value. </dd></dl>
587 <p>References <a class="el" href="edma3_8h_source.html#l00198">EDMA3_DRV_DMA_CH_MAX_VAL</a>, <a class="el" href="edma3__drv_8h_source.html#l00518">EDMA3_DRV_E_INVALID_PARAM</a>, <a class="el" href="edma3_8h_source.html#l00266">EDMA3_DRV_Object::gblCfgParams</a>, <a class="el" href="edma3__drv_8h_source.html#l00624">EDMA3_DRV_GblConfigParams::globalRegs</a>, <a class="el" href="edma3__drv_8h_source.html#l00595">EDMA3_DRV_GblConfigParams::numEvtQueue</a>, <a class="el" href="edma3_8h_source.html#l00313">EDMA3_DRV_Instance::pDrvObjectHandle</a>, and <a class="el" href="edma3_8h_source.html#l00307">EDMA3_DRV_Instance::shadowRegs</a>.</p>
589 </div>
590 </div><p>
591 <a class="anchor" name="g0589ed9b15b42ecefc4a6ccd8e1758fc"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_freeChannel" ref="g0589ed9b15b42ecefc4a6ccd8e1758fc" args="(EDMA3_DRV_Handle hEdma, unsigned int channelId)" -->
592 <div class="memitem">
593 <div class="memproto">
594 <table class="memname">
595 <tr>
596 <td class="memname">EDMA3_DRV_Result EDMA3_DRV_freeChannel </td>
597 <td>(</td>
598 <td class="paramtype">EDMA3_DRV_Handle </td>
599 <td class="paramname"> <em>hEdma</em>, </td>
600 </tr>
601 <tr>
602 <td class="paramkey"></td>
603 <td></td>
604 <td class="paramtype">unsigned int </td>
605 <td class="paramname"> <em>channelId</em></td><td> </td>
606 </tr>
607 <tr>
608 <td></td>
609 <td>)</td>
610 <td></td><td></td><td></td>
611 </tr>
612 </table>
613 </div>
614 <div class="memdoc">
616 <p>
617 Free the specified channel (DMA/QDMA/Link) and its associated resources (PaRAM Set, TCC etc) and removes various mappings.
618 <p>
619 This API internally uses EDMA3_RM_freeResource () to free the desired resources.<p>
620 For Link channels, this API only frees the associated PaRAM Set.<p>
621 For DMA/QDMA channels, it does the following operations: a) Disable any ongoing transfer on the channel, b) Unregister the TCC Callback function and disable the interrupts, c) Remove the channel to Event Queue mapping, d) For DMA channels, clear the DCHMAP register, if available e) For QDMA channels, clear the QCHMAP register, f) Frees the DMA/QDMA channel in the end.<p>
622 <dl compact><dt><b>Parameters:</b></dt><dd>
623 <table border="0" cellspacing="2" cellpadding="0">
624 <tr><td valign="top"></td><td valign="top"><em>hEdma</em> </td><td>[IN] Handle to the EDMA Driver Instance. </td></tr>
625 <tr><td valign="top"></td><td valign="top"><em>channelId</em> </td><td>[IN] Logical Channel number to be freed.</td></tr>
626 </table>
627 </dl>
628 <dl class="return" compact><dt><b>Returns:</b></dt><dd>EDMA3_DRV_SOK or EDMA3_DRV Error code</dd></dl>
629 <dl class="note" compact><dt><b>Note:</b></dt><dd>This function disables the global interrupts while modifying the global CC registers and while modifying global data structures, to prevent simultaneous access to the global pool of resources. It internally calls EDMA3_RM_freeResource () for resource de-allocation. It is re-entrant. </dd></dl>
631 <p>References <a class="el" href="edma3_8h_source.html#l00354">EDMA3_DRV_CHANNEL_TYPE_DMA</a>, <a class="el" href="edma3_8h_source.html#l00360">EDMA3_DRV_CHANNEL_TYPE_LINK</a>, <a class="el" href="edma3_8h_source.html#l00351">EDMA3_DRV_CHANNEL_TYPE_NONE</a>, <a class="el" href="edma3_8h_source.html#l00357">EDMA3_DRV_CHANNEL_TYPE_QDMA</a>, <a class="el" href="edma3_8h_source.html#l00198">EDMA3_DRV_DMA_CH_MAX_VAL</a>, <a class="el" href="edma3__drv_8h_source.html#l00518">EDMA3_DRV_E_INVALID_PARAM</a>, <a class="el" href="edma3_8h_source.html#l00204">EDMA3_DRV_LINK_CH_MAX_VAL</a>, <a class="el" href="edma3_8h_source.html#l00201">EDMA3_DRV_LINK_CH_MIN_VAL</a>, <a class="el" href="edma3_8h_source.html#l00213">EDMA3_DRV_LOG_CH_MAX_VAL</a>, <a class="el" href="edma3_8h_source.html#l00210">EDMA3_DRV_QDMA_CH_MAX_VAL</a>, <a class="el" href="edma3_8h_source.html#l00207">EDMA3_DRV_QDMA_CH_MIN_VAL</a>, <a class="el" href="edma3__drv__basic_8c_source.html#l02498">edma3RemoveMapping()</a>, <a class="el" href="edma3_8h_source.html#l00266">EDMA3_DRV_Object::gblCfgParams</a>, <a class="el" href="edma3__drv_8h_source.html#l00592">EDMA3_DRV_GblConfigParams::numPaRAMSets</a>, <a class="el" href="edma3__drv_8h_source.html#l00589">EDMA3_DRV_GblConfigParams::numTccs</a>, <a class="el" href="edma3_8h_source.html#l00334">EDMA3_DRV_ChBoundResources::paRAMId</a>, <a class="el" href="edma3_8h_source.html#l00313">EDMA3_DRV_Instance::pDrvObjectHandle</a>, <a class="el" href="edma3_8h_source.html#l00250">EDMA3_DRV_Object::phyCtrllerInstId</a>, <a class="el" href="edma3_8h_source.html#l00316">EDMA3_DRV_Instance::resMgrInstance</a>, and <a class="el" href="edma3_8h_source.html#l00337">EDMA3_DRV_ChBoundResources::tcc</a>.</p>
633 <p>Referenced by <a class="el" href="edma3__drv__basic_8c_source.html#l00274">EDMA3_DRV_requestChannel()</a>.</p>
635 </div>
636 </div><p>
637 <a class="anchor" name="ga8561ee446bd1b9d0c5c4b106c9f40a9"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_linkChannel" ref="ga8561ee446bd1b9d0c5c4b106c9f40a9" args="(EDMA3_DRV_Handle hEdma, unsigned int lCh1, unsigned int lCh2)" -->
638 <div class="memitem">
639 <div class="memproto">
640 <table class="memname">
641 <tr>
642 <td class="memname">EDMA3_DRV_Result EDMA3_DRV_linkChannel </td>
643 <td>(</td>
644 <td class="paramtype">EDMA3_DRV_Handle </td>
645 <td class="paramname"> <em>hEdma</em>, </td>
646 </tr>
647 <tr>
648 <td class="paramkey"></td>
649 <td></td>
650 <td class="paramtype">unsigned int </td>
651 <td class="paramname"> <em>lCh1</em>, </td>
652 </tr>
653 <tr>
654 <td class="paramkey"></td>
655 <td></td>
656 <td class="paramtype">unsigned int </td>
657 <td class="paramname"> <em>lCh2</em></td><td> </td>
658 </tr>
659 <tr>
660 <td></td>
661 <td>)</td>
662 <td></td><td></td><td></td>
663 </tr>
664 </table>
665 </div>
666 <div class="memdoc">
668 <p>
669 Link two logical channels.
670 <p>
671 This API is used to link two previously allocated logical (DMA/QDMA/Link) channels.<p>
672 It sets the Link field of the PaRAM set associated with first logical channel (lCh1) to point it to the PaRAM set associated with second logical channel (lCh2).<p>
673 It also sets the TCC field of PaRAM set associated with second logical channel to the same as that of the first logical channel.<p>
674 After linking the channels, user should not update any PaRAM Set of the channel.<p>
675 <dl compact><dt><b>Parameters:</b></dt><dd>
676 <table border="0" cellspacing="2" cellpadding="0">
677 <tr><td valign="top"></td><td valign="top"><em>hEdma</em> </td><td>[IN] Handle to the EDMA Driver Instance. </td></tr>
678 <tr><td valign="top"></td><td valign="top"><em>lCh1</em> </td><td>[IN] Logical Channel to which particular channel will be linked. </td></tr>
679 <tr><td valign="top"></td><td valign="top"><em>lCh2</em> </td><td>[IN] Logical Channel which needs to be linked to the first channel. After the transfer based on the PaRAM set of lCh1 is over, the PaRAM set of lCh2 will be copied to the PaRAM set of lCh1 and transfer will resume. For DMA channels, another sync event is required to initiate the transfer on the Link channel.</td></tr>
680 </table>
681 </dl>
682 <dl class="return" compact><dt><b>Returns:</b></dt><dd>EDMA3_DRV_SOK or EDMA3_DRV Error Code</dd></dl>
683 <dl class="note" compact><dt><b>Note:</b></dt><dd>This function is re-entrant for unique lCh1 & lCh2 values. It is non-re-entrant for same lCh1 & lCh2 values. </dd></dl>
685 <p>References <a class="el" href="edma3__drv_8h_source.html#l00518">EDMA3_DRV_E_INVALID_PARAM</a>, <a class="el" href="edma3_8h_source.html#l00213">EDMA3_DRV_LOG_CH_MAX_VAL</a>, <a class="el" href="edma3_8h_source.html#l00094">EDMA3_DRV_OPT_TCC_CLR_MASK</a>, <a class="el" href="edma3_8h_source.html#l00131">EDMA3_DRV_OPT_TCC_GET_MASK</a>, <a class="el" href="edma3_8h_source.html#l00096">EDMA3_DRV_OPT_TCC_SET_MASK</a>, <a class="el" href="edma3__drv_8h_source.html#l02321">EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD</a>, <a class="el" href="edma3_8h_source.html#l00266">EDMA3_DRV_Object::gblCfgParams</a>, <a class="el" href="edma3__drv_8h_source.html#l00624">EDMA3_DRV_GblConfigParams::globalRegs</a>, <a class="el" href="edma3__drv_8h_source.html#l00592">EDMA3_DRV_GblConfigParams::numPaRAMSets</a>, <a class="el" href="edma3_8h_source.html#l00334">EDMA3_DRV_ChBoundResources::paRAMId</a>, <a class="el" href="edma3_8h_source.html#l00313">EDMA3_DRV_Instance::pDrvObjectHandle</a>, and <a class="el" href="edma3_8h_source.html#l00250">EDMA3_DRV_Object::phyCtrllerInstId</a>.</p>
687 </div>
688 </div><p>
689 <a class="anchor" name="g301122cb5f7cca50ae824611bd816f8e"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_requestChannel" ref="g301122cb5f7cca50ae824611bd816f8e" args="(EDMA3_DRV_Handle hEdma, unsigned int *pLCh, unsigned int *pTcc, EDMA3_RM_EventQueue evtQueue, EDMA3_RM_TccCallback tccCb, void *cbData)" -->
690 <div class="memitem">
691 <div class="memproto">
692 <table class="memname">
693 <tr>
694 <td class="memname">EDMA3_DRV_Result EDMA3_DRV_requestChannel </td>
695 <td>(</td>
696 <td class="paramtype">EDMA3_DRV_Handle </td>
697 <td class="paramname"> <em>hEdma</em>, </td>
698 </tr>
699 <tr>
700 <td class="paramkey"></td>
701 <td></td>
702 <td class="paramtype">unsigned int * </td>
703 <td class="paramname"> <em>pLCh</em>, </td>
704 </tr>
705 <tr>
706 <td class="paramkey"></td>
707 <td></td>
708 <td class="paramtype">unsigned int * </td>
709 <td class="paramname"> <em>pTcc</em>, </td>
710 </tr>
711 <tr>
712 <td class="paramkey"></td>
713 <td></td>
714 <td class="paramtype">EDMA3_RM_EventQueue </td>
715 <td class="paramname"> <em>evtQueue</em>, </td>
716 </tr>
717 <tr>
718 <td class="paramkey"></td>
719 <td></td>
720 <td class="paramtype">EDMA3_RM_TccCallback </td>
721 <td class="paramname"> <em>tccCb</em>, </td>
722 </tr>
723 <tr>
724 <td class="paramkey"></td>
725 <td></td>
726 <td class="paramtype">void * </td>
727 <td class="paramname"> <em>cbData</em></td><td> </td>
728 </tr>
729 <tr>
730 <td></td>
731 <td>)</td>
732 <td></td><td></td><td></td>
733 </tr>
734 </table>
735 </div>
736 <div class="memdoc">
738 <p>
739 Request a DMA/QDMA/Link channel.
740 <p>
741 Each channel (DMA/QDMA/Link) must be requested before initiating a DMA transfer on that channel.<p>
742 This API is used to allocate a logical channel (DMA/QDMA/Link) along with the associated resources. For DMA and QDMA channels, TCC and PaRAM Set are also allocated along with the requested channel. For Link channel, ONLY a PaRAM Set is allocated.<p>
743 User can request a specific logical channel by passing the channel id in 'pLCh'. Note that the channel id is the same as the actual resource id in case of DMA channels. To allocate specific QDMA channels, user SHOULD use the defines EDMA3_DRV_QDMA_CHANNEL_X mentioned above.<p>
744 User can also request ANY available logical channel also by specifying the below mentioned values in '*pLCh': a) EDMA3_DRV_DMA_CHANNEL_ANY: For DMA channels b) EDMA3_DRV_QDMA_CHANNEL_ANY: For QDMA channels, and c) EDMA3_DRV_LINK_CHANNEL: For Link channels. Normally user should use this value to request link channels (PaRAM Sets used for linking purpose only), unless he wants to use some specific link channels (PaRAM Sets) which is also allowed.<p>
745 This API internally uses EDMA3_RM_allocResource () to allocate the desired resources (DMA/QDMA channel, PaRAM Set and TCC).<p>
746 This API also registers a specific callback function against the allocated TCC.<p>
747 For DMA/QDMA channels, after allocating all the EDMA3 resources, this API sets the TCC field of the OPT PaRAM Word with the allocated TCC. It also sets the event queue for the channel allocated. The event queue needs to be specified by the user.<p>
748 For DMA channel, it also sets the DCHMAP register, if required.<p>
749 For QDMA channel, it sets the QCHMAP register and CCNT as trigger word and enables the QDMA channel by writing to the QEESR register.<p>
750 <dl compact><dt><b>Parameters:</b></dt><dd>
751 <table border="0" cellspacing="2" cellpadding="0">
752 <tr><td valign="top"></td><td valign="top"><em>hEdma</em> </td><td>[IN] Handle to the previously opened Driver Instance. </td></tr>
753 <tr><td valign="top"></td><td valign="top"><em>pLCh</em> </td><td>[IN/OUT] Requested logical channel id. Examples:<ul>
754 <li>EDMA3_DRV_HW_CHANNEL_EVENT_0</li><li>To request a DMA Master Channel mapped to EDMA Event 0.</li></ul>
755 </td></tr>
756 </table>
757 </dl>
758 <ul>
759 <li>EDMA3_DRV_DMA_CHANNEL_ANY</li><li>For requesting any DMA Master channel with no event mapping.</li></ul>
760 <p>
761 <ul>
762 <li>EDMA3_DRV_QDMA_CHANNEL_ANY</li><li>For requesting any QDMA Master channel</li></ul>
763 <p>
764 <ul>
765 <li>EDMA3_DRV_QDMA_CHANNEL_0</li><li>For requesting the QDMA Channel 0.</li></ul>
766 <p>
767 <ul>
768 <li>EDMA3_DRV_LINK_CHANNEL</li><li>For requesting a DMA Slave Channel,</li><li>to be linked to some other Master</li><li>channel.</li></ul>
769 <p>
770 In case user passes a specific channel Id, pLCh value is left unchanged. In case user requests ANY available resource, the allocated channel id is returned in pLCh.<p>
771 <dl class="note" compact><dt><b>Note:</b></dt><dd>To request a PaRAM Set for the purpose of linking to another channel, call the function with</dd></dl>
772 *pLCh = EDMA3_DRV_LINK_CHANNEL;<p>
773 This function will update *pLCh with the allocated Link channel handle. This handle could be DIFFERENT from the actual PaRAM Set allocated by the Resource Manager internally. So user SHOULD NOT assume the handle as the PaRAM Set Id.<p>
774 <dl compact><dt><b>Parameters:</b></dt><dd>
775 <table border="0" cellspacing="2" cellpadding="0">
776 <tr><td valign="top"></td><td valign="top"><em>pTcc</em> </td><td>[IN/OUT] The channel number on which the completion/error interrupt is generated. Not used if user requested for a Link channel. Examples:<ul>
777 <li>EDMA3_DRV_HW_CHANNEL_EVENT_0</li><li>To request TCC associated with</li><li>DMA Master Channel mapped to EDMA</li><li>event 0.</li></ul>
778 </td></tr>
779 </table>
780 </dl>
781 <ul>
782 <li>EDMA3_DRV_TCC_ANY</li><li>For requesting any TCC with no</li><li>channel mapping. In case user passes a specific TCC value, pTcc value is left unchanged. In case user requests ANY available TCC, the allocated one is returned in pTcc</li></ul>
783 <p>
784 <dl compact><dt><b>Parameters:</b></dt><dd>
785 <table border="0" cellspacing="2" cellpadding="0">
786 <tr><td valign="top"></td><td valign="top"><em>evtQueue</em> </td><td>[IN] Event Queue Number to which the channel will be mapped (valid only for the Master Channel (DMA/QDMA) request)</td></tr>
787 <tr><td valign="top"></td><td valign="top"><em>tccCb</em> </td><td>[IN] TCC callback - caters to channel- specific events like "Event Miss Error" or "Transfer Complete"</td></tr>
788 <tr><td valign="top"></td><td valign="top"><em>cbData</em> </td><td>[IN] Data which will be passed directly to the tccCb callback function</td></tr>
789 </table>
790 </dl>
791 <dl class="return" compact><dt><b>Returns:</b></dt><dd>EDMA3_DRV_SOK or EDMA3_DRV Error code</dd></dl>
792 <dl class="note" compact><dt><b>Note:</b></dt><dd>This function internally uses EDMA3 Resource Manager, which acquires a RM Instance specific semaphore to prevent simultaneous access to the global pool of resources. It also disables the global interrupts while modifying the global CC registers. It is re-entrant, but SHOULD NOT be called from the user callback function (ISR context). </dd></dl>
794 <p>
795 Fill the resource id, whose associated TCC needs to be registered. For QDMA channels, pass the actual QDMA channel no instead of (*pLCh).<p>
796 Map the allocated PaRAM Set to the logical DMa/QDMA channel.<p>
797 First check whether the mapping feature is supported on the underlying platform. In case it is not supported, dont call this API, because this API returns error in case the feature is not there.
798 <p>References <a class="el" href="edma3__drv_8h_source.html#l00684">EDMA3_DRV_GblConfigParams::dmaChannelPaRAMMap</a>, <a class="el" href="edma3__drv_8h_source.html#l00695">EDMA3_DRV_GblConfigParams::dmaChannelTccMap</a>, <a class="el" href="edma3__drv_8h_source.html#l00618">EDMA3_DRV_GblConfigParams::dmaChPaRAMMapExists</a>, <a class="el" href="edma3__drv_8h_source.html#l00547">EDMA3_DRV_CH_NO_PARAM_MAP</a>, <a class="el" href="edma3__drv_8h_source.html#l00558">EDMA3_DRV_CH_NO_TCC_MAP</a>, <a class="el" href="edma3_8h_source.html#l00354">EDMA3_DRV_CHANNEL_TYPE_DMA</a>, <a class="el" href="edma3_8h_source.html#l00357">EDMA3_DRV_CHANNEL_TYPE_QDMA</a>, <a class="el" href="edma3_8h_source.html#l00198">EDMA3_DRV_DMA_CH_MAX_VAL</a>, <a class="el" href="edma3__drv_8h_source.html#l01043">EDMA3_DRV_DMA_CHANNEL_ANY</a>, <a class="el" href="edma3_8h_source.html#l00142">EDMA3_DRV_DMAQNUM_CLR_MASK</a>, <a class="el" href="edma3_8h_source.html#l00144">EDMA3_DRV_DMAQNUM_SET_MASK</a>, <a class="el" href="edma3__drv_8h_source.html#l00509">EDMA3_DRV_E_CH_PARAM_BIND_FAIL</a>, <a class="el" href="edma3__drv_8h_source.html#l00494">EDMA3_DRV_E_DMA_CHANNEL_UNAVAIL</a>, <a class="el" href="edma3__drv_8h_source.html#l00518">EDMA3_DRV_E_INVALID_PARAM</a>, <a class="el" href="edma3__drv_8h_source.html#l00497">EDMA3_DRV_E_QDMA_CHANNEL_UNAVAIL</a>, <a class="el" href="edma3__drv_8h_source.html#l00506">EDMA3_DRV_E_TCC_REGISTER_FAIL</a>, <a class="el" href="edma3__drv_8h_source.html#l00503">EDMA3_DRV_E_TCC_UNAVAIL</a>, <a class="el" href="edma3__drv__basic_8c_source.html#l00718">EDMA3_DRV_freeChannel()</a>, <a class="el" href="edma3_8h_source.html#l00204">EDMA3_DRV_LINK_CH_MAX_VAL</a>, <a class="el" href="edma3_8h_source.html#l00201">EDMA3_DRV_LINK_CH_MIN_VAL</a>, <a class="el" href="edma3__drv_8h_source.html#l01068">EDMA3_DRV_LINK_CHANNEL</a>, <a class="el" href="edma3_8h_source.html#l00094">EDMA3_DRV_OPT_TCC_CLR_MASK</a>, <a class="el" href="edma3_8h_source.html#l00096">EDMA3_DRV_OPT_TCC_SET_MASK</a>, <a class="el" href="edma3__drv_8h_source.html#l02321">EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD</a>, <a class="el" href="edma3_8h_source.html#l00210">EDMA3_DRV_QDMA_CH_MAX_VAL</a>, <a class="el" href="edma3_8h_source.html#l00207">EDMA3_DRV_QDMA_CH_MIN_VAL</a>, <a class="el" href="edma3__drv_8h_source.html#l01051">EDMA3_DRV_QDMA_CHANNEL_ANY</a>, <a class="el" href="edma3_8h_source.html#l00146">EDMA3_DRV_QDMAQNUM_CLR_MASK</a>, <a class="el" href="edma3_8h_source.html#l00148">EDMA3_DRV_QDMAQNUM_SET_MASK</a>, <a class="el" href="edma3__drv_8h_source.html#l01060">EDMA3_DRV_TCC_ANY</a>, <a class="el" href="edma3__drv_8h_source.html#l02176">EDMA3_DRV_TRIG_MODE_NONE</a>, <a class="el" href="edma3__drv_8h_source.html#l02166">EDMA3_DRV_TRIG_MODE_QDMA</a>, <a class="el" href="edma3_8h_source.html#l00266">EDMA3_DRV_Object::gblCfgParams</a>, <a class="el" href="edma3__drv_8h_source.html#l00624">EDMA3_DRV_GblConfigParams::globalRegs</a>, <a class="el" href="edma3__drv_8h_source.html#l00580">EDMA3_DRV_GblConfigParams::numDmaChannels</a>, <a class="el" href="edma3__drv_8h_source.html#l00595">EDMA3_DRV_GblConfigParams::numEvtQueue</a>, <a class="el" href="edma3_8h_source.html#l00334">EDMA3_DRV_ChBoundResources::paRAMId</a>, <a class="el" href="edma3_8h_source.html#l00313">EDMA3_DRV_Instance::pDrvObjectHandle</a>, <a class="el" href="edma3_8h_source.html#l00250">EDMA3_DRV_Object::phyCtrllerInstId</a>, <a class="el" href="edma3_8h_source.html#l00316">EDMA3_DRV_Instance::resMgrInstance</a>, <a class="el" href="edma3_8h_source.html#l00307">EDMA3_DRV_Instance::shadowRegs</a>, <a class="el" href="edma3_8h_source.html#l00337">EDMA3_DRV_ChBoundResources::tcc</a>, and <a class="el" href="edma3_8h_source.html#l00340">EDMA3_DRV_ChBoundResources::trigMode</a>.</p>
800 </div>
801 </div><p>
802 <a class="anchor" name="gca6ef38f26d8e043352fa8963b7f090a"></a><!-- doxytag: member="edma3_drv.h::EDMA3_DRV_unlinkChannel" ref="gca6ef38f26d8e043352fa8963b7f090a" args="(EDMA3_DRV_Handle hEdma, unsigned int lCh)" -->
803 <div class="memitem">
804 <div class="memproto">
805 <table class="memname">
806 <tr>
807 <td class="memname">EDMA3_DRV_Result EDMA3_DRV_unlinkChannel </td>
808 <td>(</td>
809 <td class="paramtype">EDMA3_DRV_Handle </td>
810 <td class="paramname"> <em>hEdma</em>, </td>
811 </tr>
812 <tr>
813 <td class="paramkey"></td>
814 <td></td>
815 <td class="paramtype">unsigned int </td>
816 <td class="paramname"> <em>lCh</em></td><td> </td>
817 </tr>
818 <tr>
819 <td></td>
820 <td>)</td>
821 <td></td><td></td><td></td>
822 </tr>
823 </table>
824 </div>
825 <div class="memdoc">
827 <p>
828 Unlink the channel from the earlier linked logical channel.
829 <p>
830 This function breaks the link between the specified channel and the earlier linked logical channel by clearing the Link Address field.<p>
831 <dl compact><dt><b>Parameters:</b></dt><dd>
832 <table border="0" cellspacing="2" cellpadding="0">
833 <tr><td valign="top"></td><td valign="top"><em>hEdma</em> </td><td>[IN] Handle to the EDMA Driver Instance. </td></tr>
834 <tr><td valign="top"></td><td valign="top"><em>lCh</em> </td><td>[IN] Channel for which linking has to be removed</td></tr>
835 </table>
836 </dl>
837 <dl class="return" compact><dt><b>Returns:</b></dt><dd>EDMA3_DRV_SOK or EDMA3_DRV Error Code</dd></dl>
838 <dl class="note" compact><dt><b>Note:</b></dt><dd>This function is re-entrant for unique lCh values. It is non- re-entrant for same lCh value. </dd></dl>
840 <p>References <a class="el" href="edma3__drv_8h_source.html#l00518">EDMA3_DRV_E_INVALID_PARAM</a>, <a class="el" href="edma3_8h_source.html#l00213">EDMA3_DRV_LOG_CH_MAX_VAL</a>, <a class="el" href="edma3__drv_8h_source.html#l02321">EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD</a>, <a class="el" href="edma3_8h_source.html#l00266">EDMA3_DRV_Object::gblCfgParams</a>, <a class="el" href="edma3__drv_8h_source.html#l00624">EDMA3_DRV_GblConfigParams::globalRegs</a>, <a class="el" href="edma3__drv_8h_source.html#l00592">EDMA3_DRV_GblConfigParams::numPaRAMSets</a>, <a class="el" href="edma3_8h_source.html#l00334">EDMA3_DRV_ChBoundResources::paRAMId</a>, <a class="el" href="edma3_8h_source.html#l00313">EDMA3_DRV_Instance::pDrvObjectHandle</a>, and <a class="el" href="edma3_8h_source.html#l00250">EDMA3_DRV_Object::phyCtrllerInstId</a>.</p>
842 </div>
843 </div><p>
844 </div>
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