Merge pull request #20 in PROCESSOR-SDK/edma3_lld from misrac_fix_PRSDK-3354 to master
[keystone-rtos/edma3_lld.git] / packages / ti / sdo / edma3 / drv / src / edma3_drv_adv.c
1 /*
2  * edma3_drv_adv.c
3  *
4  * EDMA3 Driver Advanced Interface Implementation. This file contains
5  * advanced-level EDMA3 Driver APIs which are required to:
6  * a) Link and chain two channels.
7  * b) Set/get the whole PaRAM Set in one shot.
8  * c) Set/get each individual field of the PaRAM Set.
9  * d) Poll mode APIs.
10  * e) IOCTL interface.
11  * These APIs are provided to have complete control on the EDMA3 hardware and
12  * normally advanced users are expected to use them for their specific
13  * use-cases.
14  *
15  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
16  *
17  *
18  *  Redistribution and use in source and binary forms, with or without
19  *  modification, are permitted provided that the following conditions
20  *  are met:
21  *
22  *    Redistributions of source code must retain the above copyright
23  *    notice, this list of conditions and the following disclaimer.
24  *
25  *    Redistributions in binary form must reproduce the above copyright
26  *    notice, this list of conditions and the following disclaimer in the
27  *    documentation and/or other materials provided with the
28  *    distribution.
29  *
30  *    Neither the name of Texas Instruments Incorporated nor the names of
31  *    its contributors may be used to endorse or promote products derived
32  *    from this software without specific prior written permission.
33  *
34  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45  *
46 */
49 /* EDMA3 Driver Internal Header Files */
50 #include <ti/sdo/edma3/drv/src/edma3.h>
51 /* Resource Manager Internal Header Files */
52 #include <ti/sdo/edma3/rm/src/edma3resmgr.h>
54 /* Instrumentation Header File */
55 #ifdef EDMA3_INSTRUMENTATION_ENABLED
56 #include <ti/sdo/edma3/rm/src/edma3_log.h>
57 #endif
59 /* Externel Variables */
60 /*---------------------------------------------------------------------------*/
61 /**
62  * Maximum Resource Manager Instances supported by the EDMA3 Package.
63  */
64 extern const uint32_t EDMA3_MAX_RM_INSTANCES;
67 /**
68  * \brief EDMA3 Resource Manager Objects, tied to each EDMA3 HW Controller.
69  *
70  * Typically one RM object will cater to one EDMA3 HW controller
71  * and will have all the global config information.
72  */
73 extern EDMA3_RM_Obj resMgrObj[EDMA3_MAX_EDMA3_INSTANCES];
76 /**
77  * \brief Region Specific Configuration structure for
78  * EDMA3 controller, to provide region specific Information.
79  *
80  * This configuration info can also be provided by the user at run-time,
81  * while calling EDMA3_RM_open (). If not provided at run-time,
82  * this info will be taken from the config file "edma3_<PLATFORM_NAME>_cfg.c",
83  * for the specified platform.
84  */
85 #ifdef BUILD_C6XDSP
86 extern far EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;
87 #else
88 extern EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;
89 #endif
92 /**
93  * Handles of EDMA3 Resource Manager Instances.
94  *
95  * Used to maintain information of the EDMA3 RM Instances
96  * for each HW controller.
97  * There could be a maximum of EDMA3_MAX_RM_INSTANCES instances per
98  * EDMA3 HW.
99  */
100 #ifdef BUILD_C6XDSP
101 extern far EDMA3_RM_Instance *ptrRMIArray;
102 #else
103 extern EDMA3_RM_Instance *ptrRMIArray;
104 #endif
106 /** Local MemZero function */
107 extern void edma3MemZero(void *dst, uint32_t len);
108 /** Local MemCpy function to copy PaRAM Set ONLY */
109 extern void edma3ParamCpy(volatile void *dst, const volatile void *src);
111 /**
112  * \brief EDMA3 Driver Objects, tied to each EDMA3 HW Controller.
113  *
114  * Typically one object will cater to one EDMA3 HW controller
115  * and will have all regions' (ARM, DSP etc) specific config information.
116  */
117 extern EDMA3_DRV_Object drvObj [EDMA3_MAX_EDMA3_INSTANCES];
120 /**
121  * Handles of EDMA3 Driver Instances.
122  *
123  * Used to maintain information of the EDMA3 Driver Instances for
124  * each region, for each HW controller.
125  * There could be as many Driver Instances as there are shadow
126  * regions. Multiple EDMA3 Driver instances on the same shadow
127  * region are NOT allowed.
128  */
129 extern EDMA3_DRV_Instance drvInstance [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
131 /**
132  * \brief Resources bound to a Channel
133  *
134  * When a request for a channel is made, the resources PaRAM Set and TCC
135  * get bound to that channel. This information is needed internally by the
136  * driver when a request is made to free the channel (Since it is the
137  * responsibility of the driver to free up the channel-associated resources
138  * from the Resource Manager layer).
139  */
140 extern EDMA3_DRV_ChBoundResources edma3DrvChBoundRes [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_LOGICAL_CH];
142 /** Max of DMA Channels */
143 extern uint32_t edma3_dma_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
144 /** Min of Link Channels */
145 extern uint32_t edma3_link_ch_min_val[EDMA3_MAX_EDMA3_INSTANCES];
146 /** Max of Link Channels */
147 extern uint32_t edma3_link_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
148 /** Min of QDMA Channels */
149 extern uint32_t edma3_qdma_ch_min_val[EDMA3_MAX_EDMA3_INSTANCES];
150 /** Max of QDMA Channels */
151 extern uint32_t edma3_qdma_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
152 /** Max of Logical Channels */
153 extern uint32_t edma3_log_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
156 EDMA3_DRV_Result EDMA3_DRV_linkChannel (EDMA3_DRV_Handle hEdma,
157                         uint32_t lCh1, uint32_t lCh2)
158     {
159     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
160     EDMA3_DRV_Instance *drvInst = NULL;
161     EDMA3_DRV_Object *drvObject = NULL;
162     uint32_t linkBcntReld;
163     int32_t paRAM1Id = 0;
164     int32_t paRAM2Id = 0;
165     uint32_t oldTccVal = 0;
166     uint32_t optVal = 0;
167     uint32_t newOptVal = 0;
168     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
169         uint32_t edma3Id;
171 #ifdef EDMA3_INSTRUMENTATION_ENABLED
172     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
173                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
174                 EDMA3_DVT_dCOUNTER,
175                 EDMA3_DVT_dNONE,
176                 EDMA3_DVT_dNONE));
177 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
179         /* If parameter checking is enabled... */
180 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
181     if (hEdma == NULL)
182         {
183         result = EDMA3_DRV_E_INVALID_PARAM;
184         }
185 #endif
187         /* Check if the parameters are OK. */
188         if (EDMA3_DRV_SOK == result)
189         {
190         drvInst = (EDMA3_DRV_Instance *)hEdma;
191         drvObject = drvInst->pDrvObjectHandle;
193         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
194             {
195             result = EDMA3_DRV_E_INVALID_PARAM;
196             }
197         else
198             {
199             edma3Id = drvObject->phyCtrllerInstId;
200             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
201                 }
202                 }
204     if (EDMA3_DRV_SOK == result)
205     {
206         /* If parameter checking is enabled... */
207 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
208     if ((lCh1 > edma3_log_ch_max_val [edma3Id])
209         || (lCh2 > edma3_log_ch_max_val [edma3Id]))
210         {
211         result = EDMA3_DRV_E_INVALID_PARAM;
212         }
213 #endif
214     }
216     if (EDMA3_DRV_SOK == result)
217     {
218         if((lCh1 < EDMA3_MAX_LOGICAL_CH) && (lCh2 < EDMA3_MAX_LOGICAL_CH))
219         {
220         paRAM1Id = edma3DrvChBoundRes[edma3Id][lCh1].paRAMId;
221         paRAM2Id = edma3DrvChBoundRes[edma3Id][lCh2].paRAMId;
223         if ((paRAM1Id < 0) || (paRAM1Id >= drvObject->gblCfgParams.numPaRAMSets))
224             {
225             result = EDMA3_DRV_E_INVALID_PARAM;
226             }
228         if ((paRAM2Id < 0) || (paRAM2Id >= drvObject->gblCfgParams.numPaRAMSets))
229             {
230             result = EDMA3_DRV_E_INVALID_PARAM;
231             }
232         }
233         else
234         {
235             result = EDMA3_DRV_E_INVALID_PARAM;
236         }
237     }
239     if (result == EDMA3_DRV_SOK)
240         {
241         /* Get the Link-bcntReload PaRAM set entry */
242         linkBcntReld = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAM1Id].OPT) +
243                             EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
244         linkBcntReld &= 0xFFFF0000U;
245         /* Update the Link field with lch2 PaRAM set */
246         linkBcntReld |= ((uint32_t)0xFFFFU & (uint32_t)(&(globalRegs->PARAMENTRY [paRAM2Id].OPT)));
248         /* Store it back */
249         *((&globalRegs->PARAMENTRY[paRAM1Id].OPT)
250                     + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = linkBcntReld;
252         /*
253         * Set the TCC field of PaRAM set associated with lch2 to
254         * the same as that of lch1. This should be done ONLY when
255         * lch2 is NOT associated with any other TCC.
256         */
257         if (edma3DrvChBoundRes[edma3Id][lCh2].tcc == EDMA3_MAX_TCC)
258                 {
259                 /* for channel 1 */
260                 optVal = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAM1Id].OPT));
261                 oldTccVal = EDMA3_DRV_OPT_TCC_GET_MASK(optVal);
263                 /* for channel 2 */
264                 optVal = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAM2Id].OPT));
265                 newOptVal = (optVal & EDMA3_DRV_OPT_TCC_CLR_MASK)
266                             |
267                             (EDMA3_DRV_OPT_TCC_SET_MASK(oldTccVal));
268                 *(&globalRegs->PARAMENTRY[paRAM2Id].OPT) = newOptVal;
269                 }
270         }
272 #ifdef EDMA3_INSTRUMENTATION_ENABLED
273     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
274                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
275                 EDMA3_DVT_dCOUNTER,
276                 EDMA3_DVT_dNONE,
277                 EDMA3_DVT_dNONE));
278 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
280     return result;
281     }
283 EDMA3_DRV_Result EDMA3_DRV_unlinkChannel (EDMA3_DRV_Handle hEdma, uint32_t lCh)
284     {
285     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
286     uint32_t linkBcntReld;
287     int32_t paRAMId = 0;
288     EDMA3_DRV_Instance *drvInst = NULL;
289     EDMA3_DRV_Object *drvObject = NULL;
290     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
291         uint32_t edma3Id;
293 #ifdef EDMA3_INSTRUMENTATION_ENABLED
294     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
295                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
296                 EDMA3_DVT_dCOUNTER,
297                 EDMA3_DVT_dNONE,
298                 EDMA3_DVT_dNONE));
299 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
301         /* If parameter checking is enabled... */
302 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
303     if (hEdma == NULL)
304         {
305         result = EDMA3_DRV_E_INVALID_PARAM;
306         }
307 #endif
309         /* Check if the parameters are OK. */
310         if (EDMA3_DRV_SOK == result)
311         {
312         drvInst = (EDMA3_DRV_Instance *)hEdma;
313         drvObject = drvInst->pDrvObjectHandle;
315         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
316             {
317             result = EDMA3_DRV_E_INVALID_PARAM;
318             }
319         else
320             {
321             edma3Id = drvObject->phyCtrllerInstId;
322             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
323                 }
324                 }
326     if (EDMA3_DRV_SOK == result)
327     {
328         /* If parameter checking is enabled... */
329 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
330     if (lCh > edma3_log_ch_max_val [edma3Id])
331         {
332         result = EDMA3_DRV_E_INVALID_PARAM;
333         }
334 #endif
335     }
337     if (EDMA3_DRV_SOK == result)
338     {
339         if(lCh < EDMA3_MAX_LOGICAL_CH)
340         {
341             paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
342             if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
343             {
344                 result = EDMA3_DRV_E_INVALID_PARAM;
345             }
346             else
347             {
348                 /* Get the Link-bcntReload PaRAM set entry */
349                 linkBcntReld = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT)
350                                                     + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
352                 /* Remove any linking */
353                 linkBcntReld |= 0xFFFFU;
355                 /* Store it back */
356                 *((&globalRegs->PARAMENTRY[paRAMId].OPT)
357                             + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = linkBcntReld;
358             }
359         }
360         else
361         {
362             result = EDMA3_DRV_E_INVALID_PARAM;
363         }
364     }
366 #ifdef EDMA3_INSTRUMENTATION_ENABLED
367     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
368                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
369                 EDMA3_DVT_dCOUNTER,
370                 EDMA3_DVT_dNONE,
371                 EDMA3_DVT_dNONE));
372 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
374     return result;
375     }
377 EDMA3_DRV_Result EDMA3_DRV_chainChannel (EDMA3_DRV_Handle hEdma,
378                             uint32_t lCh1,
379                             uint32_t lCh2,
380                             const EDMA3_DRV_ChainOptions *chainOptions)
381     {
382     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
383     uint32_t opt = 0x0;
384     EDMA3_DRV_Instance *drvInst = NULL;
385     EDMA3_DRV_Object *drvObject = NULL;
386     int32_t paRAMId = 0;
387     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
388         uint32_t edma3Id;
390 #ifdef EDMA3_INSTRUMENTATION_ENABLED
391     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
392                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
393                 EDMA3_DVT_dCOUNTER,
394                 EDMA3_DVT_dNONE,
395                 EDMA3_DVT_dNONE));
396 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
398         /* If parameter checking is enabled... */
399 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
400     if (hEdma == NULL)
401         {
402         result = EDMA3_DRV_E_INVALID_PARAM;
403         }
405     if (chainOptions == NULL)
406         {
407         result = EDMA3_DRV_E_INVALID_PARAM;
408         }
409 #endif
411     if (result == EDMA3_DRV_SOK)
412         {
413         drvInst = (EDMA3_DRV_Instance *)hEdma;
414         drvObject = drvInst->pDrvObjectHandle;
416         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
417             {
418             result =  EDMA3_DRV_E_INVALID_PARAM;
419             }
420         else
421             {
422             edma3Id = drvObject->phyCtrllerInstId;
423             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
424                 }
425                 }
427     if (EDMA3_DRV_SOK == result)
428     {
429         /* If parameter checking is enabled... */
430 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
431     if ((lCh1 > edma3_log_ch_max_val [edma3Id])
432                         || (lCh2 > edma3_dma_ch_max_val [edma3Id]))
433         {
434         result = EDMA3_DRV_E_INVALID_PARAM;
435         }
436 #endif
437     }
439         if (EDMA3_DRV_SOK == result)
440         {
441         paRAMId = edma3DrvChBoundRes[edma3Id][lCh1].paRAMId;
442         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
443             {
444             result = EDMA3_DRV_E_INVALID_PARAM;
445             }
446                 }
448     if (result == EDMA3_DRV_SOK)
449         {
450         opt = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAMId].OPT));
452         /* set Transfer complete chaining */
453         if (chainOptions->tcchEn == EDMA3_DRV_TCCHEN_EN)
454             {
455             opt |= EDMA3_DRV_OPT_TCCHEN_SET_MASK(1U);
456             }
457         else
458             {
459             opt &= EDMA3_DRV_OPT_TCCHEN_CLR_MASK;
460             }
462         /*set Intermediate transfer completion chaining */
463         if (chainOptions->itcchEn == EDMA3_DRV_ITCCHEN_EN)
464             {
465             opt |= EDMA3_DRV_OPT_ITCCHEN_SET_MASK(1U);
466             }
467         else
468             {
469             opt &= EDMA3_DRV_OPT_ITCCHEN_CLR_MASK;
470             }
472         /*set Transfer complete interrupt */
473         if (chainOptions->tcintEn == EDMA3_DRV_TCINTEN_EN)
474             {
475             opt |= EDMA3_DRV_OPT_TCINTEN_SET_MASK(1U);
476             }
477         else
478             {
479             opt &= EDMA3_DRV_OPT_TCINTEN_CLR_MASK;
480             }
482         /*set Intermediate transfer completion interrupt */
483         if (chainOptions->itcintEn == EDMA3_DRV_ITCINTEN_EN)
484             {
485             opt |= EDMA3_DRV_OPT_ITCINTEN_SET_MASK(1U);
486             }
487         else
488             {
489             opt &= EDMA3_DRV_OPT_ITCINTEN_CLR_MASK;
490             }
492         opt &= EDMA3_DRV_OPT_TCC_CLR_MASK;
493         opt |= EDMA3_DRV_OPT_TCC_SET_MASK(lCh2);
495         *(&globalRegs->PARAMENTRY[paRAMId].OPT) = opt;
497         /* Set the trigger mode of lch2 as the same as of lch1 */
498         edma3DrvChBoundRes[edma3Id][lCh2].trigMode =
499                     edma3DrvChBoundRes[edma3Id][lCh1].trigMode;
500         }
502 #ifdef EDMA3_INSTRUMENTATION_ENABLED
503     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
504                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
505                 EDMA3_DVT_dCOUNTER,
506                 EDMA3_DVT_dNONE,
507                 EDMA3_DVT_dNONE));
508 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
510     return result;
511     }
513 EDMA3_DRV_Result EDMA3_DRV_unchainChannel (EDMA3_DRV_Handle hEdma,
514                     uint32_t lCh)
515     {
516     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
517     uint32_t opt;
518     EDMA3_DRV_Instance *drvInst = NULL;
519     EDMA3_DRV_Object *drvObject = NULL;
520     int32_t paRAMId = 0;
521     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
522         uint32_t edma3Id;
524 #ifdef EDMA3_INSTRUMENTATION_ENABLED
525     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
526                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
527                 EDMA3_DVT_dCOUNTER,
528                 EDMA3_DVT_dNONE,
529                 EDMA3_DVT_dNONE));
530 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
532         /* If parameter checking is enabled... */
533 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
534     if (hEdma == NULL)
535         {
536         result = EDMA3_DRV_E_INVALID_PARAM;
537         }
538 #endif
540     if (result == EDMA3_DRV_SOK)
541         {
542         drvInst = (EDMA3_DRV_Instance *)hEdma;
543         drvObject = drvInst->pDrvObjectHandle;
545         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
546             {
547             result =  EDMA3_DRV_E_INVALID_PARAM;
548             }
549         else
550             {
551             edma3Id = drvObject->phyCtrllerInstId;
552             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
553                 }
554                 }
556     if (result == EDMA3_DRV_SOK)
557     {
558         /* If parameter checking is enabled... */
559 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
560     if (lCh > edma3_log_ch_max_val [edma3Id])
561         {
562         result = EDMA3_DRV_E_INVALID_PARAM;
563         }
564 #endif
565     }
566         
567         if (EDMA3_DRV_SOK == result)
568         {
569         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
570         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
571             {
572             result = EDMA3_DRV_E_INVALID_PARAM;
573             }
574                 }
576     if (result == EDMA3_DRV_SOK)
577         {
578         opt = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAMId].OPT));
580         /* Reset TCCHEN */
581         opt &= EDMA3_DRV_OPT_TCCHEN_CLR_MASK;
582         /* Reset ITCCHEN */
583         opt &= EDMA3_DRV_OPT_ITCCHEN_CLR_MASK;
585         *(&globalRegs->PARAMENTRY[paRAMId].OPT) = opt;
586         }
588 #ifdef EDMA3_INSTRUMENTATION_ENABLED
589     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
590                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
591                 EDMA3_DVT_dCOUNTER,
592                 EDMA3_DVT_dNONE,
593                 EDMA3_DVT_dNONE));
594 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
596     return result;
597     }
599 EDMA3_DRV_Result EDMA3_DRV_setQdmaTrigWord (EDMA3_DRV_Handle hEdma,
600                     uint32_t lCh,
601                     EDMA3_RM_QdmaTrigWord trigWord)
602     {
603     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
604     EDMA3_DRV_Instance *drvInst = NULL;
605     EDMA3_DRV_Object *drvObject = NULL;
606     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
607         uint32_t edma3Id;
609 #ifdef EDMA3_INSTRUMENTATION_ENABLED
610     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
611                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
612                 EDMA3_DVT_dCOUNTER,
613                 EDMA3_DVT_dNONE,
614                 EDMA3_DVT_dNONE));
615 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
617         /* If parameter checking is enabled... */
618 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
619     if((hEdma == NULL)
620         || (((int32_t)trigWord < (int32_t)EDMA3_RM_QDMA_TRIG_OPT)
621         || (trigWord > EDMA3_RM_QDMA_TRIG_CCNT)))
622         {
623         result = EDMA3_DRV_E_INVALID_PARAM;
624         }
625 #endif
627         /* Check if the parameters are OK. */
628         if (EDMA3_DRV_SOK == result)
629         {
630         drvInst = (EDMA3_DRV_Instance *)hEdma;
631         drvObject = drvInst->pDrvObjectHandle;
633         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
634             {
635             result = EDMA3_DRV_E_INVALID_PARAM;
636             }
637         else
638             {
639             edma3Id = drvObject->phyCtrllerInstId;
640             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
641                 }
642                 }
644     if (result == EDMA3_DRV_SOK)
645     {
646         /* If parameter checking is enabled... */
647 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
648     if ((lCh < edma3_qdma_ch_min_val[edma3Id])
649         || (lCh > edma3_qdma_ch_max_val[edma3Id]))
650         {
651         result = EDMA3_DRV_E_INVALID_PARAM;
652         }
653 #endif
654     }
656         if (EDMA3_DRV_SOK == result)
657         {
658         globalRegs->QCHMAP[lCh - edma3_qdma_ch_min_val[edma3Id]]
659                                         &= EDMA3_DRV_QCH_TRWORD_CLR_MASK;
660         globalRegs->QCHMAP[lCh - edma3_qdma_ch_min_val[edma3Id]]
661                                         |= EDMA3_DRV_QCH_TRWORD_SET_MASK(trigWord);
662         }
664 #ifdef EDMA3_INSTRUMENTATION_ENABLED
665     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
666                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
667                 EDMA3_DVT_dCOUNTER,
668                 EDMA3_DVT_dNONE,
669                 EDMA3_DVT_dNONE));
670 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
672     return result;
673     }
675 EDMA3_DRV_Result EDMA3_DRV_setPaRAM (EDMA3_DRV_Handle hEdma,
676                     uint32_t lCh,
677                     const EDMA3_DRV_PaRAMRegs *newPaRAM)
678     {
679     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
680     EDMA3_DRV_Instance *drvInst = NULL;
681     EDMA3_DRV_Object *drvObject = NULL;
682     int32_t paRAMId = 0;
683     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
684         uint32_t edma3Id;
686 #ifdef EDMA3_INSTRUMENTATION_ENABLED
687     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
688                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
689                 EDMA3_DVT_dCOUNTER,
690                 EDMA3_DVT_dNONE,
691                 EDMA3_DVT_dNONE));
692 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
694         /* If parameter checking is enabled... */
695 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
696     if ((hEdma == NULL) || (newPaRAM == NULL))
697         {
698         result = EDMA3_DRV_E_INVALID_PARAM;
699         }
700 #endif
702     if (result == EDMA3_DRV_SOK)
703         {
704         drvInst = (EDMA3_DRV_Instance *)hEdma;
705         drvObject = drvInst->pDrvObjectHandle;
707         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
708             {
709             result = EDMA3_DRV_E_INVALID_PARAM;
710             }
711         else
712             {
713             edma3Id = drvObject->phyCtrllerInstId;
714             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
715                 }
716                 }
718     if (result == EDMA3_DRV_SOK)
719     {
720         /* If parameter checking is enabled... */
721 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
722     if (lCh > edma3_log_ch_max_val [edma3Id])
723         {
724         result = EDMA3_DRV_E_INVALID_PARAM;
725         }
726 #endif
727     }
728         if (EDMA3_DRV_SOK == result)
729         {
730         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
731         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
732             {
733             result = EDMA3_DRV_E_INVALID_PARAM;
734             }
735                 }
737     if (result == EDMA3_DRV_SOK)
738         {
739                 edma3ParamCpy ((volatile void *)(&(globalRegs->PARAMENTRY[paRAMId].OPT)),
740             (const void *)newPaRAM);
741         }
743 #ifdef EDMA3_INSTRUMENTATION_ENABLED
744     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
745                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
746                 EDMA3_DVT_dCOUNTER,
747                 EDMA3_DVT_dNONE,
748                 EDMA3_DVT_dNONE));
749 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
751     return result;
752     }
754 EDMA3_DRV_Result EDMA3_DRV_getPaRAM (EDMA3_DRV_Handle hEdma,
755                     uint32_t lCh,
756                     EDMA3_DRV_PaRAMRegs *currPaRAM)
757     {
758     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
759     EDMA3_DRV_Instance *drvInst = NULL;
760     EDMA3_DRV_Object *drvObject = NULL;
761     int32_t paRAMId = 0;
762     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
763         uint32_t edma3Id;
765 #ifdef EDMA3_INSTRUMENTATION_ENABLED
766     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
767                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
768                 EDMA3_DVT_dCOUNTER,
769                 EDMA3_DVT_dNONE,
770                 EDMA3_DVT_dNONE));
771 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
773         /* If parameter checking is enabled... */
774 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
775     if ((hEdma == NULL) || (currPaRAM == NULL))
776         {
777         result = EDMA3_DRV_E_INVALID_PARAM;
778         }
779 #endif
781     if (result == EDMA3_DRV_SOK)
782         {
783         drvInst = (EDMA3_DRV_Instance *)hEdma;
784         drvObject = drvInst->pDrvObjectHandle;
786         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
787             {
788             result = EDMA3_DRV_E_INVALID_PARAM;
789             }
790         else
791             {
792             edma3Id = drvObject->phyCtrllerInstId;
793             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
794                 }
795                 }
797     if (result == EDMA3_DRV_SOK)
798     {
799         /* If parameter checking is enabled... */
800 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
801     if (lCh > edma3_log_ch_max_val [edma3Id])
802         {
803         result = EDMA3_DRV_E_INVALID_PARAM;
804         }
805 #endif
806     }
807     if (EDMA3_DRV_SOK == result)
808     {
809         if(lCh < EDMA3_MAX_LOGICAL_CH)
810         {
811             paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
812             if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
813             {
814                 result = EDMA3_DRV_E_INVALID_PARAM;
815             }
816         }
817         else
818         {
819             result = EDMA3_DRV_E_INVALID_PARAM;
820         }
821     }
823     if (result == EDMA3_DRV_SOK)
824         {
825                 edma3ParamCpy ((void *)currPaRAM,
826                                         (const volatile void *)(&(globalRegs->PARAMENTRY [paRAMId].OPT)));
827         }
829 #ifdef EDMA3_INSTRUMENTATION_ENABLED
830     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
831                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
832                 EDMA3_DVT_dCOUNTER,
833                 EDMA3_DVT_dNONE,
834                 EDMA3_DVT_dNONE));
835 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
837     return result;
838     }
840 EDMA3_DRV_Result EDMA3_DRV_setPaRAMEntry (EDMA3_DRV_Handle hEdma,
841                     uint32_t lCh,
842                     EDMA3_DRV_PaRAMEntry paRAMEntry,
843                     uint32_t newPaRAMEntryVal)
844     {
845     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
846     EDMA3_DRV_Instance *drvInst = NULL;
847     EDMA3_DRV_Object *drvObject = NULL;
848     int32_t paRAMId = 0;
849     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
850         uint32_t edma3Id;
852 #ifdef EDMA3_INSTRUMENTATION_ENABLED
853     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
854                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
855                 EDMA3_DVT_dCOUNTER,
856                 EDMA3_DVT_dNONE,
857                 EDMA3_DVT_dNONE));
858 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
860         /* If parameter checking is enabled... */
861 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
862     if((hEdma == NULL)
863         || (((int32_t)paRAMEntry < (int32_t)EDMA3_DRV_PARAM_ENTRY_OPT)
864         || (paRAMEntry > EDMA3_DRV_PARAM_ENTRY_CCNT)))
865         {
866         result = EDMA3_DRV_E_INVALID_PARAM;
867         }
868 #endif
870         /* Check if the parameters are OK. */
871         if (EDMA3_DRV_SOK == result)
872         {
873         drvInst = (EDMA3_DRV_Instance *)hEdma;
874         drvObject = drvInst->pDrvObjectHandle;
876         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
877             {
878             result = EDMA3_DRV_E_INVALID_PARAM;
879             }
880         else
881             {
882             edma3Id = drvObject->phyCtrllerInstId;
883             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
884                 }
885                 }
887     if (result == EDMA3_DRV_SOK)
888     {
889         /* If parameter checking is enabled... */
890 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
891     if (lCh > edma3_log_ch_max_val [edma3Id])
892         {
893         result = EDMA3_DRV_E_INVALID_PARAM;
894         }
895 #endif
896     }
897     if (EDMA3_DRV_SOK == result)
898     {
899         if(lCh < EDMA3_MAX_LOGICAL_CH)
900         {
901             paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
902             if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
903             {
904             result = EDMA3_DRV_E_INVALID_PARAM;
905             }
906             else
907             {
908             *((&globalRegs->PARAMENTRY[paRAMId].OPT) +
909                                         (uint32_t)paRAMEntry) = newPaRAMEntryVal;
910             }
911         }
912         else
913         {
914             result = EDMA3_DRV_E_INVALID_PARAM;
915         }
916     }
918 #ifdef EDMA3_INSTRUMENTATION_ENABLED
919     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
920                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
921                 EDMA3_DVT_dCOUNTER,
922                 EDMA3_DVT_dNONE,
923                 EDMA3_DVT_dNONE));
924 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
926     return result;
927     }
929 EDMA3_DRV_Result EDMA3_DRV_getPaRAMEntry (EDMA3_DRV_Handle hEdma,
930                     uint32_t lCh,
931                     EDMA3_DRV_PaRAMEntry paRAMEntry,
932                     uint32_t *paRAMEntryVal)
933     {
934     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
935     EDMA3_DRV_Instance *drvInst = NULL;
936     EDMA3_DRV_Object *drvObject = NULL;
937     int32_t paRAMId = 0;
938     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
939         uint32_t edma3Id;
941 #ifdef EDMA3_INSTRUMENTATION_ENABLED
942     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
943                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
944                 EDMA3_DVT_dCOUNTER,
945                 EDMA3_DVT_dNONE,
946                 EDMA3_DVT_dNONE));
947 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
949         /* If parameter checking is enabled... */
950 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
951     if((hEdma == NULL) || (paRAMEntryVal == NULL))
952         {
953         result = EDMA3_DRV_E_INVALID_PARAM;
954         }
956     if(((int32_t)paRAMEntry < (int32_t)EDMA3_DRV_PARAM_ENTRY_OPT)
957         || (paRAMEntry > EDMA3_DRV_PARAM_ENTRY_CCNT))
958         {
959         result = EDMA3_DRV_E_INVALID_PARAM;
960         }
961 #endif
963         /* Check if the parameters are OK. */
964         if (EDMA3_DRV_SOK == result)
965         {
966         drvInst = (EDMA3_DRV_Instance *)hEdma;
967         drvObject = drvInst->pDrvObjectHandle;
969         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
970             {
971             result = EDMA3_DRV_E_INVALID_PARAM;
972             }
973         else
974             {
975             edma3Id = drvObject->phyCtrllerInstId;
976             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
977                 }
978                 }
980     if (result == EDMA3_DRV_SOK)
981     {
982         /* If parameter checking is enabled... */
983 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
984     if (lCh > edma3_log_ch_max_val [edma3Id])
985         {
986         result = EDMA3_DRV_E_INVALID_PARAM;
987         }
988 #endif
989     }
990         
991     if (EDMA3_DRV_SOK == result)
992         {
993         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
994         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
995             {
996             result = EDMA3_DRV_E_INVALID_PARAM;
997             }
998                 else
999             {
1000             *paRAMEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT)
1001                                                                                                         + (uint32_t)paRAMEntry));
1002             }
1003                 }
1005 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1006     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1007                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1008                 EDMA3_DVT_dCOUNTER,
1009                 EDMA3_DVT_dNONE,
1010                 EDMA3_DVT_dNONE));
1011 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1013     return result;
1014     }
1016 EDMA3_DRV_Result EDMA3_DRV_setPaRAMField (EDMA3_DRV_Handle hEdma,
1017                         uint32_t lCh,
1018                         EDMA3_DRV_PaRAMField paRAMField,
1019                         uint32_t newPaRAMFieldVal)
1020     {
1021     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1022     EDMA3_DRV_Instance *drvInst = NULL;
1023     EDMA3_DRV_Object *drvObject = NULL;
1024     uint32_t paramEntryVal = 0;
1025     int32_t paRAMId = 0;
1026     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1027         uint32_t edma3Id;
1029 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1030     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1031                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1032                 EDMA3_DVT_dCOUNTER,
1033                 EDMA3_DVT_dNONE,
1034                 EDMA3_DVT_dNONE));
1035 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1037         /* If parameter checking is enabled... */
1038 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1039     if((hEdma == NULL)
1040         || (((int32_t)paRAMField < (int32_t)EDMA3_DRV_PARAM_FIELD_OPT)
1041         || (paRAMField > EDMA3_DRV_PARAM_FIELD_CCNT)))
1042         {
1043         result =  EDMA3_DRV_E_INVALID_PARAM;
1044         }
1045 #endif
1047     if (result == EDMA3_DRV_SOK)
1048         {
1049         drvInst = (EDMA3_DRV_Instance *)hEdma;
1050         drvObject = drvInst->pDrvObjectHandle;
1052         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1053             {
1054             result =  EDMA3_DRV_E_INVALID_PARAM;
1055             }
1056         else
1057             {
1058             edma3Id = drvObject->phyCtrllerInstId;
1059             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1060                 }
1061                 }
1063     if (result == EDMA3_DRV_SOK)
1064     {
1065         /* If parameter checking is enabled... */
1066 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1067     /*
1068     * THIS API IS NOT ALLOWED FOR QDMA CHANNELS.
1069     * Reason being setting one PaRAM field might trigger the
1070     * transfer if the word written happends to be the trigger
1071     * word. One should use EDMA3_DRV_setPaRAMEntry ()
1072     * API instead to write the whole 32 bit word.
1073     */
1074     if ((lCh <= edma3_qdma_ch_min_val[edma3Id])
1075                         && (lCh >= edma3_qdma_ch_max_val[edma3Id]))
1076         {
1077         result = EDMA3_DRV_E_INVALID_PARAM;
1078         }
1080     if (lCh > edma3_log_ch_max_val [edma3Id])
1081         {
1082         result = EDMA3_DRV_E_INVALID_PARAM;
1083         }
1084 #endif
1085     }
1087         if (EDMA3_DRV_SOK == result)
1088         {
1089         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
1090         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
1091             {
1092             result = EDMA3_DRV_E_INVALID_PARAM;
1093             }
1094                 }
1096     if (result == EDMA3_DRV_SOK)
1097         {
1098         switch (paRAMField)
1099             {
1100             case EDMA3_DRV_PARAM_FIELD_OPT:
1101                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_OPT) = newPaRAMFieldVal;
1102                 break;
1104             case EDMA3_DRV_PARAM_FIELD_SRCADDR:
1105                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC) = newPaRAMFieldVal;
1106                 break;
1108             case EDMA3_DRV_PARAM_FIELD_ACNT:
1109                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1110                 paramEntryVal &= 0xFFFF0000U;
1111                 newPaRAMFieldVal &= 0x0000FFFFU;
1112                 paramEntryVal |= newPaRAMFieldVal;
1113                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT) = paramEntryVal;
1114                 break;
1116             case EDMA3_DRV_PARAM_FIELD_BCNT:
1117                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1118                 paramEntryVal &= 0x0000FFFFU;
1119                 newPaRAMFieldVal <<= 0x10U;
1120                 paramEntryVal |= newPaRAMFieldVal;
1121                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT) = paramEntryVal;
1122                 break;
1124             case EDMA3_DRV_PARAM_FIELD_DESTADDR:
1125                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_DST) = newPaRAMFieldVal;
1126                 break;
1128             case EDMA3_DRV_PARAM_FIELD_SRCBIDX:
1129                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1130                 paramEntryVal &= 0xFFFF0000U;
1131                 newPaRAMFieldVal &= 0x0000FFFFU;
1132                 paramEntryVal |= newPaRAMFieldVal;
1133                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX) = paramEntryVal;
1134                 break;
1136             case EDMA3_DRV_PARAM_FIELD_DESTBIDX:
1137                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1138                 paramEntryVal &= 0x0000FFFFU;
1139                 newPaRAMFieldVal <<= 0x10U;
1140                 paramEntryVal |= newPaRAMFieldVal;
1141                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX) = paramEntryVal;
1142                 break;
1144             case EDMA3_DRV_PARAM_FIELD_LINKADDR:
1145                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1146                 paramEntryVal &= 0xFFFF0000U;
1147                 newPaRAMFieldVal &= 0x0000FFFFU;
1148                 paramEntryVal |= newPaRAMFieldVal;
1149                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = paramEntryVal;
1150                 break;
1152             case EDMA3_DRV_PARAM_FIELD_BCNTRELOAD:
1153                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1154                 paramEntryVal &= 0x0000FFFFU;
1155                 newPaRAMFieldVal <<= 0x10U;
1156                 paramEntryVal |= newPaRAMFieldVal;
1157                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = paramEntryVal;
1158                 break;
1160             case EDMA3_DRV_PARAM_FIELD_SRCCIDX:
1161                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1162                 paramEntryVal &= 0xFFFF0000U;
1163                 newPaRAMFieldVal &= 0x0000FFFFU;
1164                 paramEntryVal |= newPaRAMFieldVal;
1165                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX) = paramEntryVal;
1166                 break;
1168             case EDMA3_DRV_PARAM_FIELD_DESTCIDX:
1169                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1170                 paramEntryVal &= 0x0000FFFFU;
1171                 newPaRAMFieldVal <<= 0x10U;
1172                 paramEntryVal |= newPaRAMFieldVal;
1173                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX) = paramEntryVal;
1174                 break;
1176             case EDMA3_DRV_PARAM_FIELD_CCNT:
1177                 newPaRAMFieldVal &= 0x0000FFFFU;
1178                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_CCNT) = newPaRAMFieldVal;
1179                 break;
1181             default:
1182                 break;
1183             }
1184         }
1186 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1187     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1188                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1189                 EDMA3_DVT_dCOUNTER,
1190                 EDMA3_DVT_dNONE,
1191                 EDMA3_DVT_dNONE));
1192 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1194     return result;
1195     }
1197 EDMA3_DRV_Result EDMA3_DRV_getPaRAMField (EDMA3_DRV_Handle hEdma,
1198                         uint32_t lCh,
1199                         EDMA3_DRV_PaRAMField paRAMField,
1200                         uint32_t *currPaRAMFieldVal)
1201     {
1202     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1203     EDMA3_DRV_Instance *drvInst = NULL;
1204     EDMA3_DRV_Object *drvObject = NULL;
1205     uint32_t paramEntryVal = 0;
1206     int32_t paRAMId = 0;
1207     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1208         uint32_t edma3Id;
1210 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1211     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1212                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1213                 EDMA3_DVT_dCOUNTER,
1214                 EDMA3_DVT_dNONE,
1215                 EDMA3_DVT_dNONE));
1216 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1218         /* If parameter checking is enabled... */
1219 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1220     if ((hEdma == NULL) || (currPaRAMFieldVal == NULL))
1221         {
1222         result =  EDMA3_DRV_E_INVALID_PARAM;
1223         }
1225     if(((int32_t)paRAMField < (int32_t)EDMA3_DRV_PARAM_FIELD_OPT)
1226        || (paRAMField > EDMA3_DRV_PARAM_FIELD_CCNT))
1227         {
1228         result =  EDMA3_DRV_E_INVALID_PARAM;
1229         }
1230 #endif
1232     if (result == EDMA3_DRV_SOK)
1233         {
1234         drvInst = (EDMA3_DRV_Instance *)hEdma;
1235         drvObject = drvInst->pDrvObjectHandle;
1237         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1238             {
1239             result =  EDMA3_DRV_E_INVALID_PARAM;
1240             }
1241         else
1242             {
1243             edma3Id = drvObject->phyCtrllerInstId;
1244             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1245                 }
1246                 }
1248     if (result == EDMA3_DRV_SOK)
1249     {
1250         /* If parameter checking is enabled... */
1251 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1252     if (lCh > edma3_log_ch_max_val [edma3Id])
1253         {
1254         result = EDMA3_DRV_E_INVALID_PARAM;
1255         }
1256 #endif
1257     }
1258         
1259         if (EDMA3_DRV_SOK == result)
1260         {
1261         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
1262         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
1263             {
1264             result = EDMA3_DRV_E_INVALID_PARAM;
1265             }
1266                 }
1268     if (result == EDMA3_DRV_SOK)
1269         {
1270         switch (paRAMField)
1271             {
1272             case EDMA3_DRV_PARAM_FIELD_OPT:
1273                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_OPT));
1274                 break;
1276             case EDMA3_DRV_PARAM_FIELD_SRCADDR:
1277                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC));
1278                 break;
1280             case EDMA3_DRV_PARAM_FIELD_ACNT:
1281                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1282                 paramEntryVal &= 0x0000FFFFU;
1283                 *currPaRAMFieldVal = paramEntryVal;
1284                 break;
1286             case EDMA3_DRV_PARAM_FIELD_BCNT:
1287                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1288                 paramEntryVal = paramEntryVal >> 0x10U;
1289                 *currPaRAMFieldVal = paramEntryVal;
1290                 break;
1292             case EDMA3_DRV_PARAM_FIELD_DESTADDR:
1293                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_DST));
1294                 break;
1296             case EDMA3_DRV_PARAM_FIELD_SRCBIDX:
1297                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1298                 paramEntryVal &= 0x0000FFFFU;
1299                 *currPaRAMFieldVal = paramEntryVal;
1300                 break;
1302             case EDMA3_DRV_PARAM_FIELD_DESTBIDX:
1303                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1304                 paramEntryVal = paramEntryVal >> 0x10U;
1305                 *currPaRAMFieldVal = paramEntryVal;
1306                 break;
1308             case EDMA3_DRV_PARAM_FIELD_LINKADDR:
1309                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1310                 paramEntryVal &= 0x0000FFFFU;
1311                 *currPaRAMFieldVal = paramEntryVal;
1312                 break;
1314             case EDMA3_DRV_PARAM_FIELD_BCNTRELOAD:
1315                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1316                 paramEntryVal = paramEntryVal >> 0x10U;
1317                 *currPaRAMFieldVal = paramEntryVal;
1318                 break;
1320             case EDMA3_DRV_PARAM_FIELD_SRCCIDX:
1321                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1322                 paramEntryVal &= 0x0000FFFFU;
1323                 *currPaRAMFieldVal = paramEntryVal;
1324                 break;
1326             case EDMA3_DRV_PARAM_FIELD_DESTCIDX:
1327                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1328                 paramEntryVal = paramEntryVal >> 0x10U;
1329                 *currPaRAMFieldVal = paramEntryVal;
1330                 break;
1332             case EDMA3_DRV_PARAM_FIELD_CCNT:
1333                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_CCNT));
1334                 break;
1336             default:
1337                 break;
1338             }
1339         }
1341 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1342     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1343                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1344                 EDMA3_DVT_dCOUNTER,
1345                 EDMA3_DVT_dNONE,
1346                 EDMA3_DVT_dNONE));
1347 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1349     return result;
1350     }
1352 EDMA3_DRV_Result EDMA3_DRV_setEvtQPriority (EDMA3_DRV_Handle hEdma,
1353                         const EDMA3_DRV_EvtQuePriority *evtQPriObj)
1354     {
1355     uint32_t intState;
1356     EDMA3_DRV_Instance *drvInst = NULL;
1357     EDMA3_DRV_Object *drvObject = NULL;
1358     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1359     uint32_t evtQNum = 0;
1360     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1362 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1363     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1364                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1365                 EDMA3_DVT_dCOUNTER,
1366                 EDMA3_DVT_dNONE,
1367                 EDMA3_DVT_dNONE));
1368 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1370         /* If parameter checking is enabled... */
1371 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1372     if ((hEdma == NULL) || (evtQPriObj== NULL))
1373         {
1374         result =  EDMA3_DRV_E_INVALID_PARAM;
1375         }
1376 #endif
1378         /* Check if the parameters are OK. */
1379         if (EDMA3_DRV_SOK == result)
1380         {
1381         drvInst = (EDMA3_DRV_Instance *)hEdma;
1382         drvObject = drvInst->pDrvObjectHandle;
1384         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1385             {
1386             result =  EDMA3_DRV_E_INVALID_PARAM;
1387             }
1388         else
1389             {
1390             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1392                         /* If parameter checking is enabled... */
1393 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1394             /* check event queue priority first*/
1395             while (evtQNum < drvObject->gblCfgParams.numEvtQueue)
1396                 {
1397                 if (evtQPriObj->evtQPri[evtQNum] > EDMA3_DRV_QPRIORITY_MAX_VAL)
1398                     {
1399                     result = EDMA3_DRV_E_INVALID_PARAM;
1400                     break;
1401                     }
1402                 evtQNum++;
1403                 }
1404 #endif
1406             if (result == EDMA3_DRV_SOK)
1407                 {
1408                 edma3OsProtectEntry (drvObject->phyCtrllerInstId,
1409                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1410                                                                         &intState);
1412                 /* Set TC Priority among system-wide bus-masters and Queue Watermark Level */
1413                 evtQNum = 0;
1414                 while (evtQNum < drvObject->gblCfgParams.numEvtQueue)
1415                     {
1416                     globalRegs->QUEPRI = globalRegs->QUEPRI &  EDMA3_RM_QUEPRI_CLR_MASK(evtQNum);
1417                     globalRegs->QUEPRI |= EDMA3_RM_QUEPRI_SET_MASK(evtQNum, evtQPriObj->evtQPri[evtQNum]);
1419                     evtQNum++;
1420                     }
1422                 edma3OsProtectExit (drvObject->phyCtrllerInstId,
1423                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1424                                                                         intState);
1425                 }
1426             }
1427         }
1429 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1430     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1431                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1432                 EDMA3_DVT_dCOUNTER,
1433                 EDMA3_DVT_dNONE,
1434                 EDMA3_DVT_dNONE));
1435 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1437     return result;
1438     }
1440 EDMA3_DRV_Result EDMA3_DRV_mapChToEvtQ(EDMA3_DRV_Handle hEdma,
1441                                 uint32_t channelId,
1442                                 EDMA3_RM_EventQueue eventQ)
1443     {
1444     EDMA3_DRV_Instance *drvInst = NULL;
1445     EDMA3_DRV_Object *drvObject = NULL;
1446     uint32_t intState;
1447     uint32_t edma3Id;
1448     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1449     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1451 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1452     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1453                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1454                 EDMA3_DVT_dCOUNTER,
1455                 EDMA3_DVT_dNONE,
1456                 EDMA3_DVT_dNONE));
1457 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1459         /* If parameter checking is enabled... */
1460 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1461     if (hEdma == NULL)
1462         {
1463         result = EDMA3_DRV_E_INVALID_PARAM;
1464         }
1465 #endif
1467     if (result == EDMA3_DRV_SOK)
1468         {
1469         drvInst = (EDMA3_DRV_Instance *)hEdma;
1470         drvObject = drvInst->pDrvObjectHandle;
1472         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1473             {
1474             result =  EDMA3_DRV_E_INVALID_PARAM;
1475             }
1476         else
1477             {
1478             edma3Id = drvObject->phyCtrllerInstId;
1479             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1480                 }
1481                 }
1483     if (result == EDMA3_DRV_SOK)
1484     {
1485         /* If parameter checking is enabled... */
1486 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1487     if (channelId > edma3_log_ch_max_val [edma3Id])
1488         {
1489         result = EDMA3_DRV_E_INVALID_PARAM;
1490         }
1492     }
1494     if (result == EDMA3_DRV_SOK)
1495     {
1496     /* Check the event queue */
1497     if (eventQ >= drvObject->gblCfgParams.numEvtQueue)
1498         {
1499         result = EDMA3_DRV_E_INVALID_PARAM;
1500         }
1501 #endif
1502     }
1503     if (result == EDMA3_DRV_SOK)
1504         {
1505         if (channelId <= edma3_dma_ch_max_val [edma3Id])
1506             {
1507             /* DMA channel */
1508             edma3OsProtectEntry (edma3Id,
1509                                                 (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1510                                                 &intState);
1512             globalRegs->DMAQNUM[channelId >> 3U] &=
1513                                         EDMA3_DRV_DMAQNUM_CLR_MASK(channelId);
1514             globalRegs->DMAQNUM[channelId >> 3U] |=
1515                                 EDMA3_DRV_DMAQNUM_SET_MASK(channelId, eventQ);
1517             edma3OsProtectExit(edma3Id,
1518                                                                 (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1519                                                                 intState);
1520             }
1521         else
1522             {
1523             if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
1524                      && (channelId <= edma3_qdma_ch_max_val[edma3Id]))
1525                 {
1526                 /* QDMA channel */
1527                 edma3OsProtectEntry (edma3Id,
1528                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1529                                                         &intState);
1531                 globalRegs->QDMAQNUM &=
1532                         EDMA3_DRV_QDMAQNUM_CLR_MASK(channelId-edma3_qdma_ch_min_val[edma3Id]);
1533                 globalRegs->QDMAQNUM |=
1534                                         EDMA3_DRV_QDMAQNUM_SET_MASK(channelId-edma3_qdma_ch_min_val[edma3Id], eventQ);
1536                 edma3OsProtectExit(edma3Id,
1537                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1538                                                                         intState);
1539                 }
1540             else
1541                 {
1542                 /* API valid for DMA/QDMA channel only, return error... */
1543                 result = EDMA3_DRV_E_INVALID_PARAM;
1544                 }
1545             }
1546         }
1548 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1549     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1550                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1551                 EDMA3_DVT_dCOUNTER,
1552                 EDMA3_DVT_dNONE,
1553                 EDMA3_DVT_dNONE));
1554 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1556     return result;
1557     }
1559 EDMA3_DRV_Result EDMA3_DRV_getMapChToEvtQ (EDMA3_DRV_Handle hEdma,
1560                                     uint32_t channelId,
1561                                     uint32_t *mappedEvtQ)
1562     {
1563     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1564     EDMA3_DRV_Instance *drvInst = NULL;
1565     EDMA3_DRV_Object *drvObject = NULL;
1566     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1567     uint32_t edma3Id;
1569 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1570     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1571                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1572                 EDMA3_DVT_dCOUNTER,
1573                 EDMA3_DVT_dNONE,
1574                 EDMA3_DVT_dNONE));
1575 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1577         /* If parameter checking is enabled... */
1578 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1579     if ((hEdma == NULL) || (mappedEvtQ == NULL))
1580         {
1581         result =  EDMA3_DRV_E_INVALID_PARAM;
1582         }
1583 #endif
1585         /* Check if the parameters are OK. */
1586         if (EDMA3_DRV_SOK == result)
1587         {
1588         drvInst = (EDMA3_DRV_Instance *)hEdma;
1589         drvObject = drvInst->pDrvObjectHandle;
1591         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1592             {
1593             result = EDMA3_DRV_E_INVALID_PARAM;
1594             }
1595                 }
1597         if (EDMA3_DRV_SOK == result)
1598                 {
1599         globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1600                 edma3Id = drvObject->phyCtrllerInstId;
1602         if (channelId <= edma3_dma_ch_max_val [edma3Id])
1603             {
1604             *mappedEvtQ = ((globalRegs->DMAQNUM[channelId >> 3U])
1605                             & (~(EDMA3_DRV_DMAQNUM_CLR_MASK(channelId))))
1606                               >> ((channelId%8U)*4U);
1607             }
1608         else
1609             {
1610             if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
1611                  &&(channelId <= edma3_qdma_ch_max_val[edma3Id]))
1612                 {
1613                 *mappedEvtQ = ((globalRegs->QDMAQNUM)
1614                                 & (~(EDMA3_DRV_QDMAQNUM_CLR_MASK(channelId - edma3_qdma_ch_min_val[edma3Id]))))
1615                                >> (channelId*4U);
1616                 }
1617             else
1618                 {
1619                 /* Only valid for DMA/QDMA channel, return error... */
1620                 result = EDMA3_DRV_E_INVALID_PARAM;
1621                 }
1622             }
1623         }
1625 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1626     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1627                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1628                 EDMA3_DVT_dCOUNTER,
1629                 EDMA3_DVT_dNONE,
1630                 EDMA3_DVT_dNONE));
1631 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1633     return result;
1634     }
1636 EDMA3_DRV_Result EDMA3_DRV_setCCRegister (EDMA3_DRV_Handle hEdma,
1637                     uint32_t regOffset,
1638                     uint32_t newRegValue)
1639     {
1640     uint32_t intState;
1641     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1642     EDMA3_DRV_Instance *drvInst = NULL;
1643     EDMA3_DRV_Object *drvObject = NULL;
1644     volatile uint32_t regPhyAddr = 0x0U;
1646 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1647     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1648                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1649                 EDMA3_DVT_dCOUNTER,
1650                 EDMA3_DVT_dNONE,
1651                 EDMA3_DVT_dNONE));
1652 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1655         /* If parameter checking is enabled... */
1656 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1657     if ((hEdma == NULL) || ((regOffset % 4U) != 0))
1658         {
1659         result = EDMA3_DRV_E_INVALID_PARAM;
1660         }
1661 #endif
1663         /* Check if the parameters are OK. */
1664         if (EDMA3_DRV_SOK == result)
1665         {
1666         drvInst = (EDMA3_DRV_Instance *)hEdma;
1667         drvObject = drvInst->pDrvObjectHandle;
1669         if (drvObject == NULL)
1670             {
1671             result = EDMA3_DRV_E_INVALID_PARAM;
1672             }
1673         else
1674             {
1675             if (drvObject->gblCfgParams.globalRegs != NULL)
1676                 {
1677                 /**
1678                   * Take the instance specific semaphore, to prevent simultaneous
1679                   * access to the shared resources.
1680                   */
1681                 result = edma3OsSemTake(drvInst->drvSemHandle,
1682                                         EDMA3_OSSEM_NO_TIMEOUT);
1684                 if (EDMA3_DRV_SOK == result)
1685                     {
1686                                         /* Semaphore taken successfully, modify the registers. */
1687                     edma3OsProtectEntry (drvObject->phyCtrllerInstId,
1688                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1689                                                                         &intState);
1690                     /* Global interrupts disabled, modify the registers. */
1691                     regPhyAddr = (uint32_t)drvObject->gblCfgParams.globalRegs + regOffset;
1693                     *(uint32_t *)regPhyAddr = newRegValue;
1695                     edma3OsProtectExit (drvObject->phyCtrllerInstId,
1696                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1697                                                                         intState);
1698                     /* Return the semaphore back */
1699                     result = edma3OsSemGive(drvInst->drvSemHandle);
1700                     }
1701                 }
1702             }
1703         }
1705 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1706     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1707                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1708                 EDMA3_DVT_dCOUNTER,
1709                 EDMA3_DVT_dNONE,
1710                 EDMA3_DVT_dNONE));
1711 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1713     return result;
1714     }
1716 EDMA3_DRV_Result EDMA3_DRV_getCCRegister ( EDMA3_DRV_Handle hEdma,
1717                     uint32_t regOffset,
1718                     uint32_t *regValue)
1719     {
1720     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1721     EDMA3_DRV_Instance *drvInst = NULL;
1722     EDMA3_DRV_Object *drvObject = NULL;
1723     volatile uint32_t regPhyAddr = 0x0U;
1725 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1726     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1727                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1728                 EDMA3_DVT_dCOUNTER,
1729                 EDMA3_DVT_dNONE,
1730                 EDMA3_DVT_dNONE));
1731 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1733         /* If parameter checking is enabled... */
1734 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1735     if (((hEdma == NULL) || (regValue == NULL))
1736         || ((regOffset % 4U) != 0))
1737         {
1738         result =  EDMA3_DRV_E_INVALID_PARAM;
1739         }
1740 #endif
1742         /* Check if the parameters are OK. */
1743         if (EDMA3_DRV_SOK == result)
1744         {
1745         drvInst = (EDMA3_DRV_Instance *)hEdma;
1746         drvObject = drvInst->pDrvObjectHandle;
1748         if (drvObject == NULL)
1749             {
1750             result = EDMA3_DRV_E_INVALID_PARAM;
1751             }
1752         else
1753             {
1754             if (drvObject->gblCfgParams.globalRegs != NULL)
1755                 {
1756                 regPhyAddr = (uint32_t)drvObject->gblCfgParams.globalRegs + regOffset;
1758                 *regValue = *(uint32_t *)regPhyAddr;
1759                 }
1760             }
1761         }
1763 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1764     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1765                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1766                 EDMA3_DVT_dCOUNTER,
1767                 EDMA3_DVT_dNONE,
1768                 EDMA3_DVT_dNONE));
1769 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1771     return result;
1772     }
1774 EDMA3_DRV_Result EDMA3_DRV_waitAndClearTcc (EDMA3_DRV_Handle hEdma,
1775                     uint32_t tccNo)
1776     {
1777     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1778     EDMA3_DRV_Instance *drvInst = NULL;
1779     EDMA3_DRV_Object *drvObject = NULL;
1780     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1781     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
1782     uint32_t tccBitMask = 0x0U;
1784 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1785     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1786                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1787                 EDMA3_DVT_dCOUNTER,
1788                 EDMA3_DVT_dNONE,
1789                 EDMA3_DVT_dNONE));
1790 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1792         /* If parameter checking is enabled... */
1793 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1794     if (hEdma == NULL)
1795         {
1796         result = EDMA3_DRV_E_INVALID_PARAM;
1797         }
1798 #endif
1800         /* Check if the parameters are OK. */
1801         if (EDMA3_DRV_SOK == result)
1802         {
1803         drvInst = (EDMA3_DRV_Instance *)hEdma;
1804         drvObject = drvInst->pDrvObjectHandle;
1806         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1807             {
1808             result = EDMA3_DRV_E_INVALID_PARAM;
1809             }
1810         else
1811             {
1812                         /* If parameter checking is enabled... */
1813 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1814             if (tccNo >= drvObject->gblCfgParams.numTccs)
1815                 {
1816                 result = EDMA3_DRV_E_INVALID_PARAM;
1817                 }
1818 #endif
1820                         /* Check if the parameters are OK. */
1821                         if (EDMA3_DRV_SOK == result)
1822                 {
1823                 globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1824                 shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)
1825                                         &globalRegs->SHADOW[drvInst->regionId];
1827                 if (shadowRegs != NULL)
1828                     {
1829                     if(tccNo < 32U)
1830                         {
1831                         tccBitMask = 1U << tccNo;
1833                         /* Check the status of the IPR[tccNo] bit. */
1834                         while ((uint32_t)FALSE == (shadowRegs->IPR & tccBitMask))
1835                             {
1836                             /* Transfer not yet completed, bit not SET */
1837                             }
1839                         /**
1840                          * Bit found SET, transfer is completed,
1841                          * clear the pending interrupt and return.
1842                          */
1843                         shadowRegs->ICR = tccBitMask;
1844                         }
1845                     else
1846                         {
1847                         tccBitMask = 1U << (tccNo - 32U);
1849                         /* Check the status of the IPRH[tccNo-32] bit. */
1850                         while ((uint32_t)FALSE == (shadowRegs->IPRH & tccBitMask))
1851                             {
1852                             /* Transfer not yet completed, bit not SET */
1853                             }
1855                         /**
1856                          * Bit found SET, transfer is completed,
1857                          * clear the pending interrupt and return.
1858                          */
1859                         shadowRegs->ICRH = tccBitMask;
1860                         }
1861                     }
1862                 }
1863             }
1864         }
1866 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1867     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1868                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1869                 EDMA3_DVT_dCOUNTER,
1870                 EDMA3_DVT_dNONE,
1871                 EDMA3_DVT_dNONE));
1872 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1874     return result;
1875     }
1877 EDMA3_DRV_Result EDMA3_DRV_checkAndClearTcc (EDMA3_DRV_Handle hEdma,
1878                     uint32_t tccNo,
1879                     uint16_t *tccStatus)
1880     {
1881     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1882     EDMA3_DRV_Instance *drvInst = NULL;
1883     EDMA3_DRV_Object *drvObject = NULL;
1884     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1885     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
1886     uint32_t tccBitMask = 0x0U;
1888 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1889     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1890                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1891                 EDMA3_DVT_dCOUNTER,
1892                 EDMA3_DVT_dNONE,
1893                 EDMA3_DVT_dNONE));
1894 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1897         /* If parameter checking is enabled... */
1898 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1899     if ((hEdma == NULL) || (tccStatus == NULL))
1900         {
1901         result = EDMA3_DRV_E_INVALID_PARAM;
1902         }
1903 #endif
1905         /* Check if the parameters are OK. */
1906         if (EDMA3_DRV_SOK == result)
1907         {
1908         drvInst = (EDMA3_DRV_Instance *)hEdma;
1909         drvObject = drvInst->pDrvObjectHandle;
1911         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1912             {
1913             result = EDMA3_DRV_E_INVALID_PARAM;
1914             }
1915         else
1916             {
1917                         /* If parameter checking is enabled... */
1918 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1919             if (tccNo >= drvObject->gblCfgParams.numTccs)
1920                 {
1921                 result = EDMA3_DRV_E_INVALID_PARAM;
1922                 }
1923 #endif
1925                         /* Check if the parameters are OK. */
1926                         if (EDMA3_DRV_SOK == result)
1927                 {
1928                 globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1929                 shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)
1930                                         &globalRegs->SHADOW[drvInst->regionId];
1932                 /* Reset the tccStatus */
1933                 *tccStatus = FALSE;
1935                 if (shadowRegs != NULL)
1936                     {
1937                     if(tccNo < 32U)
1938                         {
1939                         tccBitMask = 1U << tccNo;
1941                         /* Check the status of the IPR[tccNo] bit. */
1942                         if ((shadowRegs->IPR & tccBitMask) != FALSE)
1943                             {
1944                             /* Transfer completed, bit found SET */
1945                             *tccStatus = TRUE;
1947                             /* Clear the pending interrupt also. */
1948                             shadowRegs->ICR = tccBitMask;
1949                             }
1950                         }
1951                     else
1952                         {
1953                         tccBitMask = 1U << (tccNo - 32U);
1955                         /* Check the status of the IPRH[tccNo-32] bit. */
1956                         if ((shadowRegs->IPRH & tccBitMask) != FALSE)
1957                             {
1958                             /* Transfer completed, bit found SET */
1959                             *tccStatus = TRUE;
1961                             /* Clear the pending interrupt also. */
1962                             shadowRegs->ICRH = tccBitMask;
1963                             }
1964                         }
1965                     }
1966                 }
1967             }
1968         }
1970 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1971     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1972                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1973                 EDMA3_DVT_dCOUNTER,
1974                 EDMA3_DVT_dNONE,
1975                 EDMA3_DVT_dNONE));
1976 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1978     return result;
1979     }
1981 EDMA3_DRV_Result EDMA3_DRV_getPaRAMPhyAddr(EDMA3_DRV_Handle hEdma,
1982                     uint32_t lCh,
1983                     uint32_t *paramPhyAddr)
1984     {
1985     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1986     EDMA3_DRV_Instance *drvInst = NULL;
1987     EDMA3_DRV_Object *drvObject = NULL;
1988     int32_t paRAMId = 0;
1989     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1990         uint32_t edma3Id;
1992 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1993     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1994                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1995                 EDMA3_DVT_dCOUNTER,
1996                 EDMA3_DVT_dNONE,
1997                 EDMA3_DVT_dNONE));
1998 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2001         /* If parameter checking is enabled... */
2002 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2003     if ((hEdma == NULL) || (paramPhyAddr == NULL))
2004         {
2005         result = EDMA3_DRV_E_INVALID_PARAM;
2006         }
2007 #endif
2009         /* Check if the parameters are OK. */
2010         if (EDMA3_DRV_SOK == result)
2011         {
2012         drvInst = (EDMA3_DRV_Instance *)hEdma;
2013         drvObject = drvInst->pDrvObjectHandle;
2015         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
2016             {
2017             result =  EDMA3_DRV_E_INVALID_PARAM;
2018             }
2019         else
2020             {
2021             edma3Id = drvObject->phyCtrllerInstId;
2022             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
2023                 }
2024                 }
2026     if (result == EDMA3_DRV_SOK)
2027     {
2028         /* If parameter checking is enabled... */
2029 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2030     if (lCh > edma3_log_ch_max_val [edma3Id])
2031         {
2032         result = EDMA3_DRV_E_INVALID_PARAM;
2033         }
2034 #endif
2035     }
2037         if (EDMA3_DRV_SOK == result)
2038         {
2039         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
2040         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
2041             {
2042             result = EDMA3_DRV_E_INVALID_PARAM;
2043             }
2044                 else
2045             {
2046             *paramPhyAddr = (uint32_t)&(globalRegs->PARAMENTRY [paRAMId].OPT);
2047             }
2048                 }
2050 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2051     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2052                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2053                 EDMA3_DVT_dCOUNTER,
2054                 EDMA3_DVT_dNONE,
2055                 EDMA3_DVT_dNONE));
2056 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2058     return result;
2059     }
2061 EDMA3_DRV_Result EDMA3_DRV_Ioctl(
2062                       EDMA3_DRV_Handle       hEdma,
2063                       EDMA3_DRV_IoctlCmd     cmd,
2064                       void                  *cmdArg,
2065                       void                  *param
2066                      )
2067     {
2068     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2069     EDMA3_DRV_Instance *drvInst = NULL;
2071 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2072     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2073                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2074                 EDMA3_DVT_dCOUNTER,
2075                 EDMA3_DVT_dNONE,
2076                 EDMA3_DVT_dNONE));
2077 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2079         /* If parameter checking is enabled... */
2080 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2081     if (hEdma == NULL)
2082         {
2083         result = EDMA3_DRV_E_INVALID_PARAM;
2084         }
2086     if ((cmd <= EDMA3_DRV_IOCTL_MIN_IOCTL)
2087         || (cmd >= EDMA3_DRV_IOCTL_MAX_IOCTL))
2088         {
2089         result = EDMA3_DRV_E_INVALID_PARAM;
2090         }
2091 #endif
2093     if (result == EDMA3_DRV_SOK)
2094         {
2095         drvInst = (EDMA3_DRV_Instance *)hEdma;
2097         if (drvInst == NULL)
2098             {
2099             result = EDMA3_DRV_E_INVALID_PARAM;
2100             }
2101         }
2103     if (result == EDMA3_DRV_SOK)
2104         {
2105         switch (cmd)
2106             {
2107             case EDMA3_DRV_IOCTL_SET_PARAM_CLEAR_OPTION:
2108                 {
2109                 result = EDMA3_RM_Ioctl (drvInst->resMgrInstance,
2110                                                                                 EDMA3_RM_IOCTL_SET_PARAM_CLEAR_OPTION,
2111                                                                                 cmdArg,
2112                                                                                 param);
2114                 break;
2115                 }
2117             case EDMA3_DRV_IOCTL_GET_PARAM_CLEAR_OPTION:
2118                 {
2119                 if (NULL == cmdArg)
2120                     {
2121                     result = EDMA3_DRV_E_INVALID_PARAM;
2122                     }
2123                 else
2124                     {
2125                     result = EDMA3_RM_Ioctl (drvInst->resMgrInstance,
2126                                                                                         EDMA3_RM_IOCTL_GET_PARAM_CLEAR_OPTION,
2127                                                                                         cmdArg,
2128                                                                                         param);
2129                     }
2131                 break;
2132                 }
2134             default:
2135                 /* You passed invalid IOCTL cmd */
2136                 result = EDMA3_DRV_E_INVALID_PARAM;
2137                                 break;
2138             }
2139         }
2141 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2142         EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2143                     EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2144                     EDMA3_DVT_dCOUNTER,
2145                     EDMA3_DVT_dNONE,
2146                     EDMA3_DVT_dNONE));
2147 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2149         return result;
2150     }
2152 EDMA3_DRV_Handle EDMA3_DRV_getInstHandle(uint32_t phyCtrllerInstId,
2153                                                                 EDMA3_RM_RegionId regionId,
2154                                                                 EDMA3_DRV_Result *errorCode)
2155         {
2156     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2157         EDMA3_DRV_Object *drvObject = NULL;
2158         EDMA3_DRV_Instance *drvInstanceHandle = NULL;
2160         /* If parameter checking is enabled... */
2161 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2162     if ((phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
2163         || (errorCode == NULL))
2164         {
2165         result = EDMA3_DRV_E_INVALID_PARAM;
2166         }
2167 #endif
2169         if (EDMA3_DRV_SOK == result)
2170                 {
2171                 drvObject = &drvObj[phyCtrllerInstId];
2173                 /* If parameter checking is enabled... */
2174 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2175         /* Check regionId. */
2176     if (regionId >= drvObject->gblCfgParams.numRegions)
2177         {
2178         result = EDMA3_DRV_E_INVALID_PARAM;
2179         }
2180 #endif
2181                 }
2183         if (EDMA3_DRV_SOK == result)
2184                 {
2185         /* If the driver instance is already opened for this specific region,
2186         *  return it, else return an error.
2187         */
2188                 drvInstanceHandle = &drvInstance[phyCtrllerInstId][regionId];
2190         if (NULL == drvInstanceHandle->pDrvObjectHandle)
2191             {
2192             /* Instance not opened yet!!! */
2193             drvInstanceHandle = NULL;
2194             result = EDMA3_DRV_E_INST_NOT_OPENED;
2195             }
2196                 }
2197     if(errorCode != NULL)
2198     {
2199         *errorCode = result;
2200     }
2202         return (EDMA3_DRV_Handle)drvInstanceHandle;
2203         }
2205 EDMA3_DRV_Result EDMA3_DRV_registerTccCb(EDMA3_DRV_Handle hEdma,
2206                     const uint32_t channelId,
2207                     EDMA3_RM_TccCallback tccCb,
2208                     void *cbData)
2209         {
2210     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2211     EDMA3_DRV_Instance *drvInst = NULL;
2212     EDMA3_DRV_Object *drvObject = NULL;
2213         uint32_t edma3Id;
2214     EDMA3_RM_ResDesc channelObj;
2216 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2217     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2218                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2219                 EDMA3_DVT_dCOUNTER,
2220                 EDMA3_DVT_dNONE,
2221                 EDMA3_DVT_dNONE));
2222 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2224         /* If parameter checking is enabled... */
2225 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2226     if ((hEdma == NULL) || (tccCb == NULL))
2227         {
2228         result = EDMA3_DRV_E_INVALID_PARAM;
2229         }
2230 #endif
2232     if (result == EDMA3_DRV_SOK)
2233         {
2234         drvInst = (EDMA3_DRV_Instance *)hEdma;
2235         drvObject = drvInst->pDrvObjectHandle;
2237         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
2238             {
2239             result = EDMA3_DRV_E_INVALID_PARAM;
2240             }
2241         else
2242             {
2243             edma3Id = drvObject->phyCtrllerInstId;
2244                 }
2245                 }
2247         if (result == EDMA3_DRV_SOK)
2248                 {
2249             if (channelId <= edma3_dma_ch_max_val [edma3Id])
2250                 {
2251                 channelObj.type = EDMA3_RM_RES_DMA_CHANNEL;
2252                         channelObj.resId = channelId;
2253                 }
2254                 else
2255                         {
2256                         if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
2257                                 || (channelId <= edma3_qdma_ch_max_val[edma3Id]))
2258                                 {
2259                         channelObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
2260                                 channelObj.resId = channelId - edma3_qdma_ch_min_val[edma3Id];
2261                                 }
2262                         else
2263                                 {
2264                                 result = EDMA3_DRV_E_INVALID_PARAM;
2265                                 }
2266                         }
2267                 }
2269         if (result == EDMA3_DRV_SOK)
2270                 {
2271                 /* Call the RM function now */
2272                 result = EDMA3_RM_registerTccCb (drvInst->resMgrInstance,
2273                                                     (EDMA3_RM_ResDesc *)&channelObj,
2274                                                     edma3DrvChBoundRes[edma3Id][channelId].tcc,
2275                                                     tccCb,
2276                                                     cbData);
2277                 }
2279 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2280         EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2281                     EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2282                     EDMA3_DVT_dCOUNTER,
2283                     EDMA3_DVT_dNONE,
2284                     EDMA3_DVT_dNONE));
2285 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2287     return result;
2288         }
2290 EDMA3_DRV_Result EDMA3_DRV_unregisterTccCb(EDMA3_DRV_Handle hEdma,
2291                     const uint32_t channelId)
2293         {
2294     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2295     EDMA3_DRV_Instance *drvInst = NULL;
2296     EDMA3_DRV_Object *drvObject = NULL;
2297         uint32_t edma3Id;
2298     EDMA3_RM_ResDesc channelObj;
2300 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2301     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2302                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2303                 EDMA3_DVT_dCOUNTER,
2304                 EDMA3_DVT_dNONE,
2305                 EDMA3_DVT_dNONE));
2306 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2308         /* If parameter checking is enabled... */
2309 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2310     if (hEdma == NULL)
2311         {
2312         result = EDMA3_DRV_E_INVALID_PARAM;
2313         }
2314 #endif
2316     if (result == EDMA3_DRV_SOK)
2317         {
2318         drvInst = (EDMA3_DRV_Instance *)hEdma;
2319         drvObject = drvInst->pDrvObjectHandle;
2321         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
2322             {
2323             result = EDMA3_DRV_E_INVALID_PARAM;
2324             }
2325         else
2326             {
2327             edma3Id = drvObject->phyCtrllerInstId;
2328                 }
2329                 }
2331         if (result == EDMA3_DRV_SOK)
2332                 {
2333             if (channelId <= edma3_dma_ch_max_val [edma3Id])
2334                 {
2335                 channelObj.type = EDMA3_RM_RES_DMA_CHANNEL;
2336                         channelObj.resId = channelId;
2337                 }
2338                 else
2339                         {
2340                         if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
2341                                 || (channelId <= edma3_qdma_ch_max_val[edma3Id]))
2342                                 {
2343                         channelObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
2344                                 channelObj.resId = channelId - edma3_qdma_ch_min_val[edma3Id];
2345                                 }
2346                         else
2347                                 {
2348                                 result = EDMA3_DRV_E_INVALID_PARAM;
2349                                 }
2350                         }
2351                 }
2353         if (result == EDMA3_DRV_SOK)
2354                 {
2355                 /* Call the RM function now */
2356                 result = EDMA3_RM_unregisterTccCb (drvInst->resMgrInstance,
2357                                                     (EDMA3_RM_ResDesc *)&channelObj);
2358                 }
2360 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2361         EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2362                     EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2363                     EDMA3_DVT_dCOUNTER,
2364                     EDMA3_DVT_dNONE,
2365                     EDMA3_DVT_dNONE));
2366 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2368     return result;
2369         }
2371 EDMA3_DRV_Result EDMA3_DRV_setTcErrorInt(uint32_t phyCtrllerInstId,
2372                                         uint32_t tcId,
2373                                         EDMA3_DRV_Tc_Err tcErr)
2374         {
2375     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2376     EDMA3_DRV_Object *drvObject = NULL;
2377     volatile EDMA3_TCRL_Regs *tcRegs = NULL;
2379 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2380     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2381                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2382                 EDMA3_DVT_dCOUNTER,
2383                 EDMA3_DVT_dNONE,
2384                 EDMA3_DVT_dNONE));
2385 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2387         /* If parameter checking is enabled... */
2388 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2389         if (phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
2390         {
2391         result = EDMA3_DRV_E_INVALID_PARAM;
2392         }
2394     if (((int32_t)tcErr < (int32_t)EDMA3_DRV_TC_ERR_BUSERR_DIS)
2395         || (tcErr > EDMA3_DRV_TC_ERR_EN))
2396         {
2397         result = EDMA3_DRV_E_INVALID_PARAM;
2398         }
2399 #endif
2401         /* Check if the parameters are OK. */
2402         if (EDMA3_DRV_SOK == result)
2403         {
2404         drvObject = &drvObj[phyCtrllerInstId];
2406         if (tcId >= drvObject->gblCfgParams.numTcs)
2407                         {
2408                         result = EDMA3_DRV_E_INVALID_PARAM;
2409                         }
2410                 }
2412         if (EDMA3_DRV_SOK == result)
2413         {
2414         tcRegs = (volatile EDMA3_TCRL_Regs *)drvObject->gblCfgParams.tcRegs[tcId];
2416             if (NULL == tcRegs)
2417                 {
2418                 result = EDMA3_DRV_E_INVALID_PARAM;
2419                 }
2420                 }
2422         if (EDMA3_DRV_SOK == result)
2423         {
2424         switch (tcErr)
2425                 {
2426                 case EDMA3_DRV_TC_ERR_BUSERR_DIS:
2427                                 tcRegs->ERREN &= ~((uint32_t)1 << EDMA3_TCRL_ERREN_BUSERR_SHIFT);
2428                                 break;
2430                 case EDMA3_DRV_TC_ERR_BUSERR_EN:
2431                                 tcRegs->ERREN |= ((uint32_t)1 << EDMA3_TCRL_ERREN_BUSERR_SHIFT);
2432                                 break;
2434                 case EDMA3_DRV_TC_ERR_TRERR_DIS:
2435                                 tcRegs->ERREN &= ~((uint32_t)1 << EDMA3_TCRL_ERREN_TRERR_SHIFT);
2436                                 break;
2438                 case EDMA3_DRV_TC_ERR_TRERR_EN:
2439                                 tcRegs->ERREN |= ((uint32_t)1 << EDMA3_TCRL_ERREN_TRERR_SHIFT);
2440                                 break;
2442                 case EDMA3_DRV_TC_ERR_MMRAERR_DIS:
2443                                 tcRegs->ERREN &= ~((uint32_t)1 << EDMA3_TCRL_ERREN_MMRAERR_SHIFT);
2444                                 break;
2446                 case EDMA3_DRV_TC_ERR_MMRAERR_EN:
2447                                 tcRegs->ERREN |= ((uint32_t)1 << EDMA3_TCRL_ERREN_MMRAERR_SHIFT);
2448                                 break;
2450                 case EDMA3_DRV_TC_ERR_DIS:
2451                                 tcRegs->ERREN = EDMA3_TCRL_ERREN_RESETVAL;
2452                                 break;
2454                 case EDMA3_DRV_TC_ERR_EN:
2455                                 tcRegs->ERREN = EDMA3_TCRL_ERREN_BUSERR_MASK
2456                                                                 | EDMA3_TCRL_ERREN_TRERR_MASK
2457                                                                 | EDMA3_TCRL_ERREN_MMRAERR_MASK;
2458                                 break;
2460                         default:
2461                                 result = EDMA3_DRV_E_INVALID_PARAM;
2462                                 break;
2463                 }
2464                 }
2466 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2467     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2468                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2469                 EDMA3_DVT_dCOUNTER,
2470                 EDMA3_DVT_dNONE,
2471                 EDMA3_DVT_dNONE));
2472 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2474     return result;
2475         }
2477 EDMA3_DRV_Result EDMA3_DRV_getChannelStatus(EDMA3_DRV_Handle hEdma,
2478                         uint32_t lCh, uint32_t *lchStatus)
2479         {
2480         EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2481     EDMA3_DRV_Instance *drvInst = NULL;
2482     EDMA3_DRV_Object *drvObject = NULL;
2483     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
2484     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
2485         uint32_t edma3Id;
2486         uint32_t status = 0x0;
2487         uint32_t tcc;
2489 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2490     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2491                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2492                 EDMA3_DVT_dCOUNTER,
2493                 EDMA3_DVT_dNONE,
2494                 EDMA3_DVT_dNONE));
2495 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2497         /* If parameter checking is enabled... */
2498 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2499     if ((hEdma == NULL)
2500                 || (lchStatus == NULL))
2501         {
2502         result = EDMA3_DRV_E_INVALID_PARAM;
2503         }
2504 #endif
2506         /* Check if the parameters are OK. */
2507         if (EDMA3_DRV_SOK == result)
2508         {
2509         drvInst = (EDMA3_DRV_Instance *)hEdma;
2510         drvObject = drvInst->pDrvObjectHandle;
2512         if ((drvObject == NULL) ||
2513                         (drvObject->gblCfgParams.globalRegs == NULL))
2514             {
2515             result = EDMA3_DRV_E_INVALID_PARAM;
2516             }
2517         else
2518             {
2519             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
2520             shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)
2521                                     &globalRegs->SHADOW[drvInst->regionId];
2522             edma3Id = drvObject->phyCtrllerInstId;
2523                 }
2524                 }
2526     if (result == EDMA3_DRV_SOK)
2527     {
2528         /* If parameter checking is enabled... */
2529 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2530     if (lCh > edma3_log_ch_max_val [edma3Id])
2531         {
2532         result = EDMA3_DRV_E_INVALID_PARAM;
2533         }
2535         /* Not valid for Link channels */
2536     if ( (lCh >= edma3_link_ch_min_val [edma3Id])
2537                 && (lCh <= edma3_link_ch_max_val [edma3Id]))
2538         {
2539         result = EDMA3_DRV_E_INVALID_PARAM;
2540         }
2541 #endif
2542     }
2544         if (EDMA3_DRV_SOK == result)
2545         {
2546         tcc = edma3DrvChBoundRes[edma3Id][lCh].tcc;
2548         if (tcc >= drvObject->gblCfgParams.numTccs)
2549             {
2550             result = EDMA3_DRV_E_INVALID_PARAM;
2551             }
2552                 }
2554         if (EDMA3_DRV_SOK == result)
2555         {
2556         /* DMA Channel, check for event pending and event miss */
2557                 if (lCh <= edma3_dma_ch_max_val[edma3Id])
2558                         {
2559                         if (lCh < 32U)
2560                                 {
2561                         if((globalRegs->EMR & ((uint32_t)1U << lCh)) != FALSE)
2562                             {
2563                             status |= EDMA3_DRV_CHANNEL_ERR;
2564                             }
2566                         if((shadowRegs->ER & ((uint32_t)1U << lCh)) != FALSE)
2567                             {
2568                             status |= EDMA3_DRV_CHANNEL_EVENT_PENDING;
2569                             }
2570                                 }
2571                         else
2572                                 {
2573                 if((globalRegs->EMRH & ((uint32_t)1U << (lCh-32U))) != FALSE)
2574                     {
2575                     status |= EDMA3_DRV_CHANNEL_ERR;
2576                     }
2577                         if((shadowRegs->ERH & ((uint32_t)1U << (lCh-32U))) != FALSE)
2578                             {
2579                             status |= EDMA3_DRV_CHANNEL_EVENT_PENDING;
2580                             }
2581                                 }
2582                         }
2584         /* QDMA Channel, check for event miss */
2585                 if ((lCh >= edma3_qdma_ch_min_val[edma3Id])
2586                         && (lCh <= edma3_qdma_ch_max_val[edma3Id]))
2587                         {
2588                         uint32_t qdma_ch = lCh - edma3_qdma_ch_min_val[edma3Id];
2590                 if((globalRegs->QEMR & ((uint32_t)1U << qdma_ch)) != FALSE)
2591                     {
2592                     status |= EDMA3_DRV_CHANNEL_ERR;
2593                     }
2594                         }
2596                 /* Check for xfer completion interrupt */
2597                 if (tcc < 32U)
2598                         {
2599                 if((shadowRegs->IPR & ((uint32_t)1U << tcc)) != FALSE)
2600                     {
2601                     status |= EDMA3_DRV_CHANNEL_XFER_COMPLETE;
2602                     }
2603                         }
2604                 else
2605                         {
2606                 if((shadowRegs->IPRH & ((uint32_t)1U << (tcc-32U))) != FALSE)
2607                     {
2608                     status |= EDMA3_DRV_CHANNEL_XFER_COMPLETE;
2609                     }
2610                         }
2612                 /* Update the status */
2613                 *lchStatus = status;
2614                 }
2616 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2617     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2618                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2619                 EDMA3_DVT_dCOUNTER,
2620                 EDMA3_DVT_dNONE,
2621                 EDMA3_DVT_dNONE));
2622 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2624     return result;
2625     }
2627 EDMA3_DRV_Result EDMA3_DRV_mapTccLinkCh ( EDMA3_DRV_Handle hEdma,
2628                                                 uint32_t linkCh,
2629                                                 uint32_t tcc)
2630         {
2631     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2632     EDMA3_DRV_Instance *drvInst = NULL;
2633     EDMA3_DRV_Object *drvObject = NULL;
2634     int32_t paRAMId;
2635     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
2636         uint32_t edma3Id;
2638         /* If parameter checking is enabled... */
2639 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2640     if (hEdma == NULL)
2641         {
2642         result = EDMA3_DRV_E_INVALID_PARAM;
2643         }
2644 #endif
2646         if (EDMA3_DRV_SOK == result)
2647         {
2648         drvInst = (EDMA3_DRV_Instance *)hEdma;
2649         drvObject = drvInst->pDrvObjectHandle;
2651         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
2652             {
2653             result = EDMA3_DRV_E_INVALID_PARAM;
2654             }
2655                 }
2657         if (EDMA3_DRV_SOK == result)
2658         {
2659         edma3Id = drvObject->phyCtrllerInstId;
2660         globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
2662         /* Validate the arguments */
2663                 if (((linkCh < edma3_link_ch_min_val[edma3Id]) ||
2664                                 (linkCh > edma3_link_ch_max_val[edma3Id])) ||
2665                                 (tcc >= drvObject->gblCfgParams.numTccs))
2666                         {
2667                         result = EDMA3_DRV_E_INVALID_PARAM;
2668                         }
2669                 }
2671         if (EDMA3_DRV_SOK == result)
2672         {
2673         paRAMId = edma3DrvChBoundRes[edma3Id][linkCh].paRAMId;
2675         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
2676             {
2677             result = EDMA3_DRV_E_INVALID_PARAM;
2678             }
2679                 else
2680                         {
2681             /* Set TCC in ParamSet.OPT field */
2682             globalRegs->PARAMENTRY [paRAMId].OPT &= EDMA3_DRV_OPT_TCC_CLR_MASK;
2683             globalRegs->PARAMENTRY [paRAMId].OPT |= EDMA3_DRV_OPT_TCC_SET_MASK(tcc);
2685                         /* Update the tcc */
2686                         edma3DrvChBoundRes[edma3Id][linkCh].tcc = tcc;
2687                         }
2688                 }
2690         return result;
2691         }
2693 /* End of File */