5abb7ac4e35dc86c784d06474f2c87126a07dfd6
[keystone-rtos/edma3_lld.git] / packages / ti / sdo / edma3 / drv / src / edma3_drv_adv.c
1 /*
2  * edma3_drv_adv.c
3  *
4  * EDMA3 Driver Advanced Interface Implementation. This file contains
5  * advanced-level EDMA3 Driver APIs which are required to:
6  * a) Link and chain two channels.
7  * b) Set/get the whole PaRAM Set in one shot.
8  * c) Set/get each individual field of the PaRAM Set.
9  * d) Poll mode APIs.
10  * e) IOCTL interface.
11  * These APIs are provided to have complete control on the EDMA3 hardware and
12  * normally advanced users are expected to use them for their specific
13  * use-cases.
14  *
15  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
16  *
17  *
18  *  Redistribution and use in source and binary forms, with or without
19  *  modification, are permitted provided that the following conditions
20  *  are met:
21  *
22  *    Redistributions of source code must retain the above copyright
23  *    notice, this list of conditions and the following disclaimer.
24  *
25  *    Redistributions in binary form must reproduce the above copyright
26  *    notice, this list of conditions and the following disclaimer in the
27  *    documentation and/or other materials provided with the
28  *    distribution.
29  *
30  *    Neither the name of Texas Instruments Incorporated nor the names of
31  *    its contributors may be used to endorse or promote products derived
32  *    from this software without specific prior written permission.
33  *
34  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45  *
46 */
49 /* EDMA3 Driver Internal Header Files */
50 #include <ti/sdo/edma3/drv/src/edma3.h>
51 /* Resource Manager Internal Header Files */
52 #include <ti/sdo/edma3/rm/src/edma3resmgr.h>
54 /* Instrumentation Header File */
55 #ifdef EDMA3_INSTRUMENTATION_ENABLED
56 #include <ti/sdo/edma3/rm/src/edma3_log.h>
57 #endif
59 /* Externel Variables */
60 /*---------------------------------------------------------------------------*/
61 /**
62  * Maximum Resource Manager Instances supported by the EDMA3 Package.
63  */
64 extern const uint32_t EDMA3_MAX_RM_INSTANCES;
67 /**
68  * \brief EDMA3 Resource Manager Objects, tied to each EDMA3 HW Controller.
69  *
70  * Typically one RM object will cater to one EDMA3 HW controller
71  * and will have all the global config information.
72  */
73 extern EDMA3_RM_Obj resMgrObj[EDMA3_MAX_EDMA3_INSTANCES];
76 /**
77  * \brief Region Specific Configuration structure for
78  * EDMA3 controller, to provide region specific Information.
79  *
80  * This configuration info can also be provided by the user at run-time,
81  * while calling EDMA3_RM_open (). If not provided at run-time,
82  * this info will be taken from the config file "edma3_<PLATFORM_NAME>_cfg.c",
83  * for the specified platform.
84  */
85 #ifdef BUILD_C6XDSP
86 extern far EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;
87 #else
88 extern EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;
89 #endif
92 /**
93  * Handles of EDMA3 Resource Manager Instances.
94  *
95  * Used to maintain information of the EDMA3 RM Instances
96  * for each HW controller.
97  * There could be a maximum of EDMA3_MAX_RM_INSTANCES instances per
98  * EDMA3 HW.
99  */
100 #ifdef BUILD_C6XDSP
101 extern far EDMA3_RM_Instance *ptrRMIArray;
102 #else
103 extern EDMA3_RM_Instance *ptrRMIArray;
104 #endif
106 /** Local MemZero function */
107 extern void edma3MemZero(void *dst, uint32_t len);
108 /** Local MemCpy function to copy PaRAM Set ONLY */
109 extern void edma3ParamCpy(void *dst, const void *src);
111 /**
112  * \brief EDMA3 Driver Objects, tied to each EDMA3 HW Controller.
113  *
114  * Typically one object will cater to one EDMA3 HW controller
115  * and will have all regions' (ARM, DSP etc) specific config information.
116  */
117 extern EDMA3_DRV_Object drvObj [EDMA3_MAX_EDMA3_INSTANCES];
120 /**
121  * Handles of EDMA3 Driver Instances.
122  *
123  * Used to maintain information of the EDMA3 Driver Instances for
124  * each region, for each HW controller.
125  * There could be as many Driver Instances as there are shadow
126  * regions. Multiple EDMA3 Driver instances on the same shadow
127  * region are NOT allowed.
128  */
129 extern EDMA3_DRV_Instance drvInstance [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
131 /**
132  * \brief Resources bound to a Channel
133  *
134  * When a request for a channel is made, the resources PaRAM Set and TCC
135  * get bound to that channel. This information is needed internally by the
136  * driver when a request is made to free the channel (Since it is the
137  * responsibility of the driver to free up the channel-associated resources
138  * from the Resource Manager layer).
139  */
140 extern EDMA3_DRV_ChBoundResources edma3DrvChBoundRes [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_LOGICAL_CH];
142 /** Max of DMA Channels */
143 extern uint32_t edma3_dma_ch_max_val[];
144 /** Min of Link Channels */
145 extern uint32_t edma3_link_ch_min_val[];
146 /** Max of Link Channels */
147 extern uint32_t edma3_link_ch_max_val[];
148 /** Min of QDMA Channels */
149 extern uint32_t edma3_qdma_ch_min_val[];
150 /** Max of QDMA Channels */
151 extern uint32_t edma3_qdma_ch_max_val[];
152 /** Max of Logical Channels */
153 extern uint32_t edma3_log_ch_max_val[];
156 EDMA3_DRV_Result EDMA3_DRV_linkChannel (EDMA3_DRV_Handle hEdma,
157                         uint32_t lCh1, uint32_t lCh2)
158     {
159     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
160     EDMA3_DRV_Instance *drvInst = NULL;
161     EDMA3_DRV_Object *drvObject = NULL;
162     uint32_t linkBcntReld;
163     int32_t paRAM1Id = 0;
164     int32_t paRAM2Id = 0;
165     uint32_t oldTccVal = 0;
166     uint32_t optVal = 0;
167     uint32_t newOptVal = 0;
168     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
169         uint32_t edma3Id;
171 #ifdef EDMA3_INSTRUMENTATION_ENABLED
172     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
173                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
174                 EDMA3_DVT_dCOUNTER,
175                 EDMA3_DVT_dNONE,
176                 EDMA3_DVT_dNONE));
177 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
179         /* If parameter checking is enabled... */
180 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
181     if (hEdma == NULL)
182         {
183         result = EDMA3_DRV_E_INVALID_PARAM;
184         }
185 #endif
187         /* Check if the parameters are OK. */
188         if (EDMA3_DRV_SOK == result)
189         {
190         drvInst = (EDMA3_DRV_Instance *)hEdma;
191         drvObject = drvInst->pDrvObjectHandle;
193         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
194             {
195             result = EDMA3_DRV_E_INVALID_PARAM;
196             }
197         else
198             {
199             edma3Id = drvObject->phyCtrllerInstId;
200             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
201                 }
202                 }
204         /* If parameter checking is enabled... */
205 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
206     if ((lCh1 > edma3_log_ch_max_val [edma3Id])
207         || (lCh2 > edma3_log_ch_max_val [edma3Id]))
208         {
209         result = EDMA3_DRV_E_INVALID_PARAM;
210         }
211 #endif
213         if (EDMA3_DRV_SOK == result)
214         {
215         paRAM1Id = edma3DrvChBoundRes[edma3Id][lCh1].paRAMId;
216         paRAM2Id = edma3DrvChBoundRes[edma3Id][lCh2].paRAMId;
218         if ((paRAM1Id < 0) || (paRAM1Id >= drvObject->gblCfgParams.numPaRAMSets))
219             {
220             result = EDMA3_DRV_E_INVALID_PARAM;
221             }
223         if ((paRAM2Id < 0) || (paRAM2Id >= drvObject->gblCfgParams.numPaRAMSets))
224             {
225             result = EDMA3_DRV_E_INVALID_PARAM;
226             }
227                 }
229     if (result == EDMA3_DRV_SOK)
230         {
231         /* Get the Link-bcntReload PaRAM set entry */
232         linkBcntReld = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAM1Id].OPT) +
233                             (uint32_t)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
234         linkBcntReld &= 0xFFFF0000u;
235         /* Update the Link field with lch2 PaRAM set */
236         linkBcntReld |= (0xFFFFu & (uint32_t)(&(globalRegs->PARAMENTRY [paRAM2Id].OPT)));
238         /* Store it back */
239         *((&globalRegs->PARAMENTRY[paRAM1Id].OPT)
240                     + (uint32_t)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = linkBcntReld;
242         /*
243         * Set the TCC field of PaRAM set associated with lch2 to
244         * the same as that of lch1. This should be done ONLY when
245         * lch2 is NOT associated with any other TCC.
246         */
247         if (edma3DrvChBoundRes[edma3Id][lCh2].tcc == EDMA3_MAX_TCC)
248                 {
249                 /* for channel 1 */
250                 optVal = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAM1Id].OPT));
251                 oldTccVal = EDMA3_DRV_OPT_TCC_GET_MASK(optVal);
253                 /* for channel 2 */
254                 optVal = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAM2Id].OPT));
255                 newOptVal = (optVal & EDMA3_DRV_OPT_TCC_CLR_MASK)
256                             |
257                             (EDMA3_DRV_OPT_TCC_SET_MASK(oldTccVal));
258                 *(&globalRegs->PARAMENTRY[paRAM2Id].OPT) = newOptVal;
259                 }
260         }
262 #ifdef EDMA3_INSTRUMENTATION_ENABLED
263     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
264                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
265                 EDMA3_DVT_dCOUNTER,
266                 EDMA3_DVT_dNONE,
267                 EDMA3_DVT_dNONE));
268 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
270     return result;
271     }
273 EDMA3_DRV_Result EDMA3_DRV_unlinkChannel (EDMA3_DRV_Handle hEdma, uint32_t lCh)
274     {
275     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
276     uint32_t linkBcntReld;
277     int32_t paRAMId = 0;
278     EDMA3_DRV_Instance *drvInst = NULL;
279     EDMA3_DRV_Object *drvObject = NULL;
280     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
281         uint32_t edma3Id;
283 #ifdef EDMA3_INSTRUMENTATION_ENABLED
284     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
285                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
286                 EDMA3_DVT_dCOUNTER,
287                 EDMA3_DVT_dNONE,
288                 EDMA3_DVT_dNONE));
289 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
291         /* If parameter checking is enabled... */
292 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
293     if (hEdma == NULL)
294         {
295         result = EDMA3_DRV_E_INVALID_PARAM;
296         }
297 #endif
299         /* Check if the parameters are OK. */
300         if (EDMA3_DRV_SOK == result)
301         {
302         drvInst = (EDMA3_DRV_Instance *)hEdma;
303         drvObject = drvInst->pDrvObjectHandle;
305         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
306             {
307             result = EDMA3_DRV_E_INVALID_PARAM;
308             }
309         else
310             {
311             edma3Id = drvObject->phyCtrllerInstId;
312             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
313                 }
314                 }
316         /* If parameter checking is enabled... */
317 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
318     if (lCh > edma3_log_ch_max_val [edma3Id])
319         {
320         result = EDMA3_DRV_E_INVALID_PARAM;
321         }
322 #endif
324         if (EDMA3_DRV_SOK == result)
325         {
326         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
327         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
328             {
329             result = EDMA3_DRV_E_INVALID_PARAM;
330             }
331                 else
332                 {
333                 /* Get the Link-bcntReload PaRAM set entry */
334                 linkBcntReld = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT)
335                                                         + (uint32_t)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
337                 /* Remove any linking */
338                 linkBcntReld |= 0xFFFFu;
340                 /* Store it back */
341                 *((&globalRegs->PARAMENTRY[paRAMId].OPT)
342                             + (uint32_t)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = linkBcntReld;
343                 }
344                 }
346 #ifdef EDMA3_INSTRUMENTATION_ENABLED
347     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
348                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
349                 EDMA3_DVT_dCOUNTER,
350                 EDMA3_DVT_dNONE,
351                 EDMA3_DVT_dNONE));
352 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
354     return result;
355     }
357 EDMA3_DRV_Result EDMA3_DRV_chainChannel (EDMA3_DRV_Handle hEdma,
358                             uint32_t lCh1,
359                             uint32_t lCh2,
360                             const EDMA3_DRV_ChainOptions *chainOptions)
361     {
362     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
363     uint32_t opt = 0x0;
364     EDMA3_DRV_Instance *drvInst = NULL;
365     EDMA3_DRV_Object *drvObject = NULL;
366     int32_t paRAMId = 0;
367     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
368         uint32_t edma3Id;
370 #ifdef EDMA3_INSTRUMENTATION_ENABLED
371     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
372                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
373                 EDMA3_DVT_dCOUNTER,
374                 EDMA3_DVT_dNONE,
375                 EDMA3_DVT_dNONE));
376 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
378         /* If parameter checking is enabled... */
379 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
380     if (hEdma == NULL)
381         {
382         result = EDMA3_DRV_E_INVALID_PARAM;
383         }
385     if (chainOptions == NULL)
386         {
387         result = EDMA3_DRV_E_INVALID_PARAM;
388         }
389 #endif
391     if (result == EDMA3_DRV_SOK)
392         {
393         drvInst = (EDMA3_DRV_Instance *)hEdma;
394         drvObject = drvInst->pDrvObjectHandle;
396         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
397             {
398             result =  EDMA3_DRV_E_INVALID_PARAM;
399             }
400         else
401             {
402             edma3Id = drvObject->phyCtrllerInstId;
403             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
404                 }
405                 }
407         /* If parameter checking is enabled... */
408 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
409     if ((lCh1 > edma3_log_ch_max_val [edma3Id])
410                         || (lCh2 > edma3_dma_ch_max_val [edma3Id]))
411         {
412         result = EDMA3_DRV_E_INVALID_PARAM;
413         }
414 #endif
416         if (EDMA3_DRV_SOK == result)
417         {
418         paRAMId = edma3DrvChBoundRes[edma3Id][lCh1].paRAMId;
419         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
420             {
421             result = EDMA3_DRV_E_INVALID_PARAM;
422             }
423                 }
425     if (result == EDMA3_DRV_SOK)
426         {
427         opt = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAMId].OPT));
429         /* set Transfer complete chaining */
430         if (chainOptions->tcchEn == EDMA3_DRV_TCCHEN_EN)
431             {
432             opt |= EDMA3_DRV_OPT_TCCHEN_SET_MASK(1u);
433             }
434         else
435             {
436             opt &= EDMA3_DRV_OPT_TCCHEN_CLR_MASK;
437             }
439         /*set Intermediate transfer completion chaining */
440         if (chainOptions->itcchEn == EDMA3_DRV_ITCCHEN_EN)
441             {
442             opt |= EDMA3_DRV_OPT_ITCCHEN_SET_MASK(1u);
443             }
444         else
445             {
446             opt &= EDMA3_DRV_OPT_ITCCHEN_CLR_MASK;
447             }
449         /*set Transfer complete interrupt */
450         if (chainOptions->tcintEn == EDMA3_DRV_TCINTEN_EN)
451             {
452             opt |= EDMA3_DRV_OPT_TCINTEN_SET_MASK(1u);
453             }
454         else
455             {
456             opt &= EDMA3_DRV_OPT_TCINTEN_CLR_MASK;
457             }
459         /*set Intermediate transfer completion interrupt */
460         if (chainOptions->itcintEn == EDMA3_DRV_ITCINTEN_EN)
461             {
462             opt |= EDMA3_DRV_OPT_ITCINTEN_SET_MASK(1u);
463             }
464         else
465             {
466             opt &= EDMA3_DRV_OPT_ITCINTEN_CLR_MASK;
467             }
469         opt &= EDMA3_DRV_OPT_TCC_CLR_MASK;
470         opt |= EDMA3_DRV_OPT_TCC_SET_MASK(lCh2);
472         *(&globalRegs->PARAMENTRY[paRAMId].OPT) = opt;
474         /* Set the trigger mode of lch2 as the same as of lch1 */
475         edma3DrvChBoundRes[edma3Id][lCh2].trigMode =
476                     edma3DrvChBoundRes[edma3Id][lCh1].trigMode;
477         }
479 #ifdef EDMA3_INSTRUMENTATION_ENABLED
480     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
481                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
482                 EDMA3_DVT_dCOUNTER,
483                 EDMA3_DVT_dNONE,
484                 EDMA3_DVT_dNONE));
485 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
487     return result;
488     }
490 EDMA3_DRV_Result EDMA3_DRV_unchainChannel (EDMA3_DRV_Handle hEdma,
491                     uint32_t lCh)
492     {
493     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
494     uint32_t opt;
495     EDMA3_DRV_Instance *drvInst = NULL;
496     EDMA3_DRV_Object *drvObject = NULL;
497     int32_t paRAMId = 0;
498     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
499         uint32_t edma3Id;
501 #ifdef EDMA3_INSTRUMENTATION_ENABLED
502     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
503                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
504                 EDMA3_DVT_dCOUNTER,
505                 EDMA3_DVT_dNONE,
506                 EDMA3_DVT_dNONE));
507 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
509         /* If parameter checking is enabled... */
510 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
511     if (hEdma == NULL)
512         {
513         result = EDMA3_DRV_E_INVALID_PARAM;
514         }
515 #endif
517     if (result == EDMA3_DRV_SOK)
518         {
519         drvInst = (EDMA3_DRV_Instance *)hEdma;
520         drvObject = drvInst->pDrvObjectHandle;
522         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
523             {
524             result =  EDMA3_DRV_E_INVALID_PARAM;
525             }
526         else
527             {
528             edma3Id = drvObject->phyCtrllerInstId;
529             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
530                 }
531                 }
533         /* If parameter checking is enabled... */
534 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
535     if (lCh > edma3_log_ch_max_val [edma3Id])
536         {
537         result = EDMA3_DRV_E_INVALID_PARAM;
538         }
539 #endif
541         if (EDMA3_DRV_SOK == result)
542         {
543         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
544         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
545             {
546             result = EDMA3_DRV_E_INVALID_PARAM;
547             }
548                 }
550     if (result == EDMA3_DRV_SOK)
551         {
552         opt = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAMId].OPT));
554         /* Reset TCCHEN */
555         opt &= EDMA3_DRV_OPT_TCCHEN_CLR_MASK;
556         /* Reset ITCCHEN */
557         opt &= EDMA3_DRV_OPT_ITCCHEN_CLR_MASK;
559         *(&globalRegs->PARAMENTRY[paRAMId].OPT) = opt;
560         }
562 #ifdef EDMA3_INSTRUMENTATION_ENABLED
563     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
564                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
565                 EDMA3_DVT_dCOUNTER,
566                 EDMA3_DVT_dNONE,
567                 EDMA3_DVT_dNONE));
568 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
570     return result;
571     }
573 EDMA3_DRV_Result EDMA3_DRV_setQdmaTrigWord (EDMA3_DRV_Handle hEdma,
574                     uint32_t lCh,
575                     EDMA3_RM_QdmaTrigWord trigWord)
576     {
577     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
578     EDMA3_DRV_Instance *drvInst = NULL;
579     EDMA3_DRV_Object *drvObject = NULL;
580     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
581         uint32_t edma3Id;
583 #ifdef EDMA3_INSTRUMENTATION_ENABLED
584     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
585                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
586                 EDMA3_DVT_dCOUNTER,
587                 EDMA3_DVT_dNONE,
588                 EDMA3_DVT_dNONE));
589 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
591         /* If parameter checking is enabled... */
592 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
593     if((hEdma == NULL)
594         || (((int32_t)trigWord < (int32_t)EDMA3_RM_QDMA_TRIG_OPT)
595         || (trigWord > EDMA3_RM_QDMA_TRIG_CCNT)))
596         {
597         result = EDMA3_DRV_E_INVALID_PARAM;
598         }
599 #endif
601         /* Check if the parameters are OK. */
602         if (EDMA3_DRV_SOK == result)
603         {
604         drvInst = (EDMA3_DRV_Instance *)hEdma;
605         drvObject = drvInst->pDrvObjectHandle;
607         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
608             {
609             result = EDMA3_DRV_E_INVALID_PARAM;
610             }
611         else
612             {
613             edma3Id = drvObject->phyCtrllerInstId;
614             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
615                 }
616                 }
618         /* If parameter checking is enabled... */
619 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
620     if ((lCh < edma3_qdma_ch_min_val[edma3Id])
621         || (lCh > edma3_qdma_ch_max_val[edma3Id]))
622         {
623         result = EDMA3_DRV_E_INVALID_PARAM;
624         }
625 #endif
627         if (EDMA3_DRV_SOK == result)
628         {
629         globalRegs->QCHMAP[lCh - edma3_qdma_ch_min_val[edma3Id]]
630                                         &= EDMA3_DRV_QCH_TRWORD_CLR_MASK;
631         globalRegs->QCHMAP[lCh - edma3_qdma_ch_min_val[edma3Id]]
632                                         |= EDMA3_DRV_QCH_TRWORD_SET_MASK(trigWord);
633         }
635 #ifdef EDMA3_INSTRUMENTATION_ENABLED
636     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
637                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
638                 EDMA3_DVT_dCOUNTER,
639                 EDMA3_DVT_dNONE,
640                 EDMA3_DVT_dNONE));
641 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
643     return result;
644     }
646 EDMA3_DRV_Result EDMA3_DRV_setPaRAM (EDMA3_DRV_Handle hEdma,
647                     uint32_t lCh,
648                     const EDMA3_DRV_PaRAMRegs *newPaRAM)
649     {
650     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
651     EDMA3_DRV_Instance *drvInst = NULL;
652     EDMA3_DRV_Object *drvObject = NULL;
653     int32_t paRAMId = 0;
654     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
655         uint32_t edma3Id;
657 #ifdef EDMA3_INSTRUMENTATION_ENABLED
658     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
659                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
660                 EDMA3_DVT_dCOUNTER,
661                 EDMA3_DVT_dNONE,
662                 EDMA3_DVT_dNONE));
663 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
665         /* If parameter checking is enabled... */
666 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
667     if ((hEdma == NULL) || (newPaRAM == NULL))
668         {
669         result = EDMA3_DRV_E_INVALID_PARAM;
670         }
671 #endif
673     if (result == EDMA3_DRV_SOK)
674         {
675         drvInst = (EDMA3_DRV_Instance *)hEdma;
676         drvObject = drvInst->pDrvObjectHandle;
678         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
679             {
680             result = EDMA3_DRV_E_INVALID_PARAM;
681             }
682         else
683             {
684             edma3Id = drvObject->phyCtrllerInstId;
685             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
686                 }
687                 }
689         /* If parameter checking is enabled... */
690 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
691     if (lCh > edma3_log_ch_max_val [edma3Id])
692         {
693         result = EDMA3_DRV_E_INVALID_PARAM;
694         }
695 #endif
697         if (EDMA3_DRV_SOK == result)
698         {
699         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
700         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
701             {
702             result = EDMA3_DRV_E_INVALID_PARAM;
703             }
704                 }
706     if (result == EDMA3_DRV_SOK)
707         {
708                 edma3ParamCpy ((void *)(&(globalRegs->PARAMENTRY[paRAMId].OPT)),
709             (const void *)newPaRAM);
710         }
712 #ifdef EDMA3_INSTRUMENTATION_ENABLED
713     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
714                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
715                 EDMA3_DVT_dCOUNTER,
716                 EDMA3_DVT_dNONE,
717                 EDMA3_DVT_dNONE));
718 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
720     return result;
721     }
723 EDMA3_DRV_Result EDMA3_DRV_getPaRAM (EDMA3_DRV_Handle hEdma,
724                     uint32_t lCh,
725                     EDMA3_DRV_PaRAMRegs *currPaRAM)
726     {
727     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
728     EDMA3_DRV_Instance *drvInst = NULL;
729     EDMA3_DRV_Object *drvObject = NULL;
730     int32_t paRAMId = 0;
731     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
732         uint32_t edma3Id;
734 #ifdef EDMA3_INSTRUMENTATION_ENABLED
735     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
736                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
737                 EDMA3_DVT_dCOUNTER,
738                 EDMA3_DVT_dNONE,
739                 EDMA3_DVT_dNONE));
740 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
742         /* If parameter checking is enabled... */
743 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
744     if ((hEdma == NULL) || (currPaRAM == NULL))
745         {
746         result = EDMA3_DRV_E_INVALID_PARAM;
747         }
748 #endif
750     if (result == EDMA3_DRV_SOK)
751         {
752         drvInst = (EDMA3_DRV_Instance *)hEdma;
753         drvObject = drvInst->pDrvObjectHandle;
755         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
756             {
757             result = EDMA3_DRV_E_INVALID_PARAM;
758             }
759         else
760             {
761             edma3Id = drvObject->phyCtrllerInstId;
762             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
763                 }
764                 }
766         /* If parameter checking is enabled... */
767 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
768     if (lCh > edma3_log_ch_max_val [edma3Id])
769         {
770         result = EDMA3_DRV_E_INVALID_PARAM;
771         }
772 #endif
774         if (EDMA3_DRV_SOK == result)
775         {
776         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
777         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
778             {
779             result = EDMA3_DRV_E_INVALID_PARAM;
780             }
781                 }
783     if (result == EDMA3_DRV_SOK)
784         {
785                 edma3ParamCpy ((void *)currPaRAM,
786                                         (const void *)(&(globalRegs->PARAMENTRY [paRAMId].OPT)));
787         }
789 #ifdef EDMA3_INSTRUMENTATION_ENABLED
790     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
791                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
792                 EDMA3_DVT_dCOUNTER,
793                 EDMA3_DVT_dNONE,
794                 EDMA3_DVT_dNONE));
795 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
797     return result;
798     }
800 EDMA3_DRV_Result EDMA3_DRV_setPaRAMEntry (EDMA3_DRV_Handle hEdma,
801                     uint32_t lCh,
802                     EDMA3_DRV_PaRAMEntry paRAMEntry,
803                     uint32_t newPaRAMEntryVal)
804     {
805     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
806     EDMA3_DRV_Instance *drvInst = NULL;
807     EDMA3_DRV_Object *drvObject = NULL;
808     int32_t paRAMId = 0;
809     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
810         uint32_t edma3Id;
812 #ifdef EDMA3_INSTRUMENTATION_ENABLED
813     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
814                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
815                 EDMA3_DVT_dCOUNTER,
816                 EDMA3_DVT_dNONE,
817                 EDMA3_DVT_dNONE));
818 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
820         /* If parameter checking is enabled... */
821 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
822     if((hEdma == NULL)
823         || (((int32_t)paRAMEntry < (int32_t)EDMA3_DRV_PARAM_ENTRY_OPT)
824         || (paRAMEntry > EDMA3_DRV_PARAM_ENTRY_CCNT)))
825         {
826         result = EDMA3_DRV_E_INVALID_PARAM;
827         }
828 #endif
830         /* Check if the parameters are OK. */
831         if (EDMA3_DRV_SOK == result)
832         {
833         drvInst = (EDMA3_DRV_Instance *)hEdma;
834         drvObject = drvInst->pDrvObjectHandle;
836         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
837             {
838             result = EDMA3_DRV_E_INVALID_PARAM;
839             }
840         else
841             {
842             edma3Id = drvObject->phyCtrllerInstId;
843             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
844                 }
845                 }
847         /* If parameter checking is enabled... */
848 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
849     if (lCh > edma3_log_ch_max_val [edma3Id])
850         {
851         result = EDMA3_DRV_E_INVALID_PARAM;
852         }
853 #endif
855         if (EDMA3_DRV_SOK == result)
856         {
857         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
858         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
859             {
860             result = EDMA3_DRV_E_INVALID_PARAM;
861             }
862         else
863             {
864             *((&globalRegs->PARAMENTRY[paRAMId].OPT) +
865                                         (uint32_t)paRAMEntry) = newPaRAMEntryVal;
866             }
867                 }
869 #ifdef EDMA3_INSTRUMENTATION_ENABLED
870     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
871                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
872                 EDMA3_DVT_dCOUNTER,
873                 EDMA3_DVT_dNONE,
874                 EDMA3_DVT_dNONE));
875 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
877     return result;
878     }
880 EDMA3_DRV_Result EDMA3_DRV_getPaRAMEntry (EDMA3_DRV_Handle hEdma,
881                     uint32_t lCh,
882                     EDMA3_DRV_PaRAMEntry paRAMEntry,
883                     uint32_t *paRAMEntryVal)
884     {
885     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
886     EDMA3_DRV_Instance *drvInst = NULL;
887     EDMA3_DRV_Object *drvObject = NULL;
888     int32_t paRAMId = 0;
889     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
890         uint32_t edma3Id;
892 #ifdef EDMA3_INSTRUMENTATION_ENABLED
893     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
894                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
895                 EDMA3_DVT_dCOUNTER,
896                 EDMA3_DVT_dNONE,
897                 EDMA3_DVT_dNONE));
898 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
900         /* If parameter checking is enabled... */
901 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
902     if((hEdma == NULL) || (paRAMEntryVal == NULL))
903         {
904         result = EDMA3_DRV_E_INVALID_PARAM;
905         }
907     if(((int32_t)paRAMEntry < (int32_t)EDMA3_DRV_PARAM_ENTRY_OPT)
908         || (paRAMEntry > EDMA3_DRV_PARAM_ENTRY_CCNT))
909         {
910         result = EDMA3_DRV_E_INVALID_PARAM;
911         }
912 #endif
914         /* Check if the parameters are OK. */
915         if (EDMA3_DRV_SOK == result)
916         {
917         drvInst = (EDMA3_DRV_Instance *)hEdma;
918         drvObject = drvInst->pDrvObjectHandle;
920         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
921             {
922             result = EDMA3_DRV_E_INVALID_PARAM;
923             }
924         else
925             {
926             edma3Id = drvObject->phyCtrllerInstId;
927             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
928                 }
929                 }
931         /* If parameter checking is enabled... */
932 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
933     if (lCh > edma3_log_ch_max_val [edma3Id])
934         {
935         result = EDMA3_DRV_E_INVALID_PARAM;
936         }
937 #endif
939         if (EDMA3_DRV_SOK == result)
940         {
941         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
942         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
943             {
944             result = EDMA3_DRV_E_INVALID_PARAM;
945             }
946                 else
947             {
948             *paRAMEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT)
949                                                                                                         + (uint32_t)paRAMEntry));
950             }
951                 }
953 #ifdef EDMA3_INSTRUMENTATION_ENABLED
954     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
955                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
956                 EDMA3_DVT_dCOUNTER,
957                 EDMA3_DVT_dNONE,
958                 EDMA3_DVT_dNONE));
959 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
961     return result;
962     }
964 EDMA3_DRV_Result EDMA3_DRV_setPaRAMField (EDMA3_DRV_Handle hEdma,
965                         uint32_t lCh,
966                         EDMA3_DRV_PaRAMField paRAMField,
967                         uint32_t newPaRAMFieldVal)
968     {
969     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
970     EDMA3_DRV_Instance *drvInst = NULL;
971     EDMA3_DRV_Object *drvObject = NULL;
972     uint32_t paramEntryVal = 0;
973     int32_t paRAMId = 0;
974     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
975         uint32_t edma3Id;
977 #ifdef EDMA3_INSTRUMENTATION_ENABLED
978     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
979                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
980                 EDMA3_DVT_dCOUNTER,
981                 EDMA3_DVT_dNONE,
982                 EDMA3_DVT_dNONE));
983 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
985         /* If parameter checking is enabled... */
986 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
987     if((hEdma == NULL)
988         || (((int32_t)paRAMField < (int32_t)EDMA3_DRV_PARAM_FIELD_OPT)
989         || (paRAMField > EDMA3_DRV_PARAM_FIELD_CCNT)))
990         {
991         result =  EDMA3_DRV_E_INVALID_PARAM;
992         }
993 #endif
995     if (result == EDMA3_DRV_SOK)
996         {
997         drvInst = (EDMA3_DRV_Instance *)hEdma;
998         drvObject = drvInst->pDrvObjectHandle;
1000         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1001             {
1002             result =  EDMA3_DRV_E_INVALID_PARAM;
1003             }
1004         else
1005             {
1006             edma3Id = drvObject->phyCtrllerInstId;
1007             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
1008                 }
1009                 }
1011         /* If parameter checking is enabled... */
1012 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1013     /*
1014     * THIS API IS NOT ALLOWED FOR QDMA CHANNELS.
1015     * Reason being setting one PaRAM field might trigger the
1016     * transfer if the word written happends to be the trigger
1017     * word. One should use EDMA3_DRV_setPaRAMEntry ()
1018     * API instead to write the whole 32 bit word.
1019     */
1020     if ((lCh <= edma3_qdma_ch_min_val[edma3Id])
1021                         && (lCh >= edma3_qdma_ch_max_val[edma3Id]))
1022         {
1023         result = EDMA3_DRV_E_INVALID_PARAM;
1024         }
1026     if (lCh > edma3_log_ch_max_val [edma3Id])
1027         {
1028         result = EDMA3_DRV_E_INVALID_PARAM;
1029         }
1030 #endif
1032         if (EDMA3_DRV_SOK == result)
1033         {
1034         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
1035         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
1036             {
1037             result = EDMA3_DRV_E_INVALID_PARAM;
1038             }
1039                 }
1041     if (result == EDMA3_DRV_SOK)
1042         {
1043         switch (paRAMField)
1044             {
1045             case EDMA3_DRV_PARAM_FIELD_OPT:
1046                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_OPT) = newPaRAMFieldVal;
1047                 break;
1049             case EDMA3_DRV_PARAM_FIELD_SRCADDR:
1050                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC) = newPaRAMFieldVal;
1051                 break;
1053             case EDMA3_DRV_PARAM_FIELD_ACNT:
1054                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1055                 paramEntryVal &= 0xFFFF0000u;
1056                 newPaRAMFieldVal &= 0x0000FFFFu;
1057                 paramEntryVal |= newPaRAMFieldVal;
1058                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT) = paramEntryVal;
1059                 break;
1061             case EDMA3_DRV_PARAM_FIELD_BCNT:
1062                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1063                 paramEntryVal &= 0x0000FFFFu;
1064                 newPaRAMFieldVal <<= 0x10u;
1065                 paramEntryVal |= newPaRAMFieldVal;
1066                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT) = paramEntryVal;
1067                 break;
1069             case EDMA3_DRV_PARAM_FIELD_DESTADDR:
1070                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_DST) = newPaRAMFieldVal;
1071                 break;
1073             case EDMA3_DRV_PARAM_FIELD_SRCBIDX:
1074                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1075                 paramEntryVal &= 0xFFFF0000u;
1076                 newPaRAMFieldVal &= 0x0000FFFFu;
1077                 paramEntryVal |= newPaRAMFieldVal;
1078                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX) = paramEntryVal;
1079                 break;
1081             case EDMA3_DRV_PARAM_FIELD_DESTBIDX:
1082                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1083                 paramEntryVal &= 0x0000FFFFu;
1084                 newPaRAMFieldVal <<= 0x10u;
1085                 paramEntryVal |= newPaRAMFieldVal;
1086                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX) = paramEntryVal;
1087                 break;
1089             case EDMA3_DRV_PARAM_FIELD_LINKADDR:
1090                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1091                 paramEntryVal &= 0xFFFF0000u;
1092                 newPaRAMFieldVal &= 0x0000FFFFu;
1093                 paramEntryVal |= newPaRAMFieldVal;
1094                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = paramEntryVal;
1095                 break;
1097             case EDMA3_DRV_PARAM_FIELD_BCNTRELOAD:
1098                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1099                 paramEntryVal &= 0x0000FFFFu;
1100                 newPaRAMFieldVal <<= 0x10u;
1101                 paramEntryVal |= newPaRAMFieldVal;
1102                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = paramEntryVal;
1103                 break;
1105             case EDMA3_DRV_PARAM_FIELD_SRCCIDX:
1106                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1107                 paramEntryVal &= 0xFFFF0000u;
1108                 newPaRAMFieldVal &= 0x0000FFFFu;
1109                 paramEntryVal |= newPaRAMFieldVal;
1110                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX) = paramEntryVal;
1111                 break;
1113             case EDMA3_DRV_PARAM_FIELD_DESTCIDX:
1114                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1115                 paramEntryVal &= 0x0000FFFFu;
1116                 newPaRAMFieldVal <<= 0x10u;
1117                 paramEntryVal |= newPaRAMFieldVal;
1118                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX) = paramEntryVal;
1119                 break;
1121             case EDMA3_DRV_PARAM_FIELD_CCNT:
1122                 newPaRAMFieldVal &= 0x0000FFFFu;
1123                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_CCNT) = newPaRAMFieldVal;
1124                 break;
1126             default:
1127                 break;
1128             }
1129         }
1131 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1132     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1133                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1134                 EDMA3_DVT_dCOUNTER,
1135                 EDMA3_DVT_dNONE,
1136                 EDMA3_DVT_dNONE));
1137 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1139     return result;
1140     }
1142 EDMA3_DRV_Result EDMA3_DRV_getPaRAMField (EDMA3_DRV_Handle hEdma,
1143                         uint32_t lCh,
1144                         EDMA3_DRV_PaRAMField paRAMField,
1145                         uint32_t *currPaRAMFieldVal)
1146     {
1147     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1148     EDMA3_DRV_Instance *drvInst = NULL;
1149     EDMA3_DRV_Object *drvObject = NULL;
1150     uint32_t paramEntryVal = 0;
1151     int32_t paRAMId = 0;
1152     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1153         uint32_t edma3Id;
1155 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1156     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1157                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1158                 EDMA3_DVT_dCOUNTER,
1159                 EDMA3_DVT_dNONE,
1160                 EDMA3_DVT_dNONE));
1161 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1163         /* If parameter checking is enabled... */
1164 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1165     if ((hEdma == NULL) || (currPaRAMFieldVal == NULL))
1166         {
1167         result =  EDMA3_DRV_E_INVALID_PARAM;
1168         }
1170     if(((int32_t)paRAMField < (int32_t)EDMA3_DRV_PARAM_FIELD_OPT)
1171        || (paRAMField > EDMA3_DRV_PARAM_FIELD_CCNT))
1172         {
1173         result =  EDMA3_DRV_E_INVALID_PARAM;
1174         }
1175 #endif
1177     if (result == EDMA3_DRV_SOK)
1178         {
1179         drvInst = (EDMA3_DRV_Instance *)hEdma;
1180         drvObject = drvInst->pDrvObjectHandle;
1182         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1183             {
1184             result =  EDMA3_DRV_E_INVALID_PARAM;
1185             }
1186         else
1187             {
1188             edma3Id = drvObject->phyCtrllerInstId;
1189             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
1190                 }
1191                 }
1193         /* If parameter checking is enabled... */
1194 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1195     if (lCh > edma3_log_ch_max_val [edma3Id])
1196         {
1197         result = EDMA3_DRV_E_INVALID_PARAM;
1198         }
1199 #endif
1201         if (EDMA3_DRV_SOK == result)
1202         {
1203         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
1204         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
1205             {
1206             result = EDMA3_DRV_E_INVALID_PARAM;
1207             }
1208                 }
1210     if (result == EDMA3_DRV_SOK)
1211         {
1212         switch (paRAMField)
1213             {
1214             case EDMA3_DRV_PARAM_FIELD_OPT:
1215                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_OPT));
1216                 break;
1218             case EDMA3_DRV_PARAM_FIELD_SRCADDR:
1219                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC));
1220                 break;
1222             case EDMA3_DRV_PARAM_FIELD_ACNT:
1223                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1224                 paramEntryVal &= 0x0000FFFFu;
1225                 *currPaRAMFieldVal = paramEntryVal;
1226                 break;
1228             case EDMA3_DRV_PARAM_FIELD_BCNT:
1229                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1230                 paramEntryVal = paramEntryVal >> 0x10u;
1231                 *currPaRAMFieldVal = paramEntryVal;
1232                 break;
1234             case EDMA3_DRV_PARAM_FIELD_DESTADDR:
1235                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_DST));
1236                 break;
1238             case EDMA3_DRV_PARAM_FIELD_SRCBIDX:
1239                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1240                 paramEntryVal &= 0x0000FFFFu;
1241                 *currPaRAMFieldVal = paramEntryVal;
1242                 break;
1244             case EDMA3_DRV_PARAM_FIELD_DESTBIDX:
1245                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1246                 paramEntryVal = paramEntryVal >> 0x10u;
1247                 *currPaRAMFieldVal = paramEntryVal;
1248                 break;
1250             case EDMA3_DRV_PARAM_FIELD_LINKADDR:
1251                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1252                 paramEntryVal &= 0x0000FFFFu;
1253                 *currPaRAMFieldVal = paramEntryVal;
1254                 break;
1256             case EDMA3_DRV_PARAM_FIELD_BCNTRELOAD:
1257                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1258                 paramEntryVal = paramEntryVal >> 0x10u;
1259                 *currPaRAMFieldVal = paramEntryVal;
1260                 break;
1262             case EDMA3_DRV_PARAM_FIELD_SRCCIDX:
1263                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1264                 paramEntryVal &= 0x0000FFFFu;
1265                 *currPaRAMFieldVal = paramEntryVal;
1266                 break;
1268             case EDMA3_DRV_PARAM_FIELD_DESTCIDX:
1269                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1270                 paramEntryVal = paramEntryVal >> 0x10u;
1271                 *currPaRAMFieldVal = paramEntryVal;
1272                 break;
1274             case EDMA3_DRV_PARAM_FIELD_CCNT:
1275                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_CCNT));
1276                 break;
1278             default:
1279                 break;
1280             }
1281         }
1283 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1284     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1285                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1286                 EDMA3_DVT_dCOUNTER,
1287                 EDMA3_DVT_dNONE,
1288                 EDMA3_DVT_dNONE));
1289 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1291     return result;
1292     }
1294 EDMA3_DRV_Result EDMA3_DRV_setEvtQPriority (EDMA3_DRV_Handle hEdma,
1295                         const EDMA3_DRV_EvtQuePriority *evtQPriObj)
1296     {
1297     uint32_t intState;
1298     EDMA3_DRV_Instance *drvInst = NULL;
1299     EDMA3_DRV_Object *drvObject = NULL;
1300     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1301     uint32_t evtQNum = 0;
1302     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1304 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1305     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1306                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1307                 EDMA3_DVT_dCOUNTER,
1308                 EDMA3_DVT_dNONE,
1309                 EDMA3_DVT_dNONE));
1310 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1312         /* If parameter checking is enabled... */
1313 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1314     if ((hEdma == NULL) || (evtQPriObj== NULL))
1315         {
1316         result =  EDMA3_DRV_E_INVALID_PARAM;
1317         }
1318 #endif
1320         /* Check if the parameters are OK. */
1321         if (EDMA3_DRV_SOK == result)
1322         {
1323         drvInst = (EDMA3_DRV_Instance *)hEdma;
1324         drvObject = drvInst->pDrvObjectHandle;
1326         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1327             {
1328             result =  EDMA3_DRV_E_INVALID_PARAM;
1329             }
1330         else
1331             {
1332             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
1334                         /* If parameter checking is enabled... */
1335 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1336             /* check event queue priority first*/
1337             while (evtQNum < drvObject->gblCfgParams.numEvtQueue)
1338                 {
1339                 if (evtQPriObj->evtQPri[evtQNum] > EDMA3_DRV_QPRIORITY_MAX_VAL)
1340                     {
1341                     result = EDMA3_DRV_E_INVALID_PARAM;
1342                     break;
1343                     }
1344                 evtQNum++;
1345                 }
1346 #endif
1348             if (result == EDMA3_DRV_SOK)
1349                 {
1350                 edma3OsProtectEntry (drvObject->phyCtrllerInstId,
1351                                                                         EDMA3_OS_PROTECT_INTERRUPT,
1352                                                                         &intState);
1354                 /* Set TC Priority among system-wide bus-masters and Queue Watermark Level */
1355                 evtQNum = 0;
1356                 while (evtQNum < drvObject->gblCfgParams.numEvtQueue)
1357                     {
1358                     globalRegs->QUEPRI = globalRegs->QUEPRI & (uint32_t)EDMA3_RM_QUEPRI_CLR_MASK(evtQNum);
1359                     globalRegs->QUEPRI |= EDMA3_RM_QUEPRI_SET_MASK(evtQNum, evtQPriObj->evtQPri[evtQNum]);
1361                     evtQNum++;
1362                     }
1364                 edma3OsProtectExit (drvObject->phyCtrllerInstId,
1365                                                                         EDMA3_OS_PROTECT_INTERRUPT,
1366                                                                         intState);
1367                 }
1368             }
1369         }
1371 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1372     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1373                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1374                 EDMA3_DVT_dCOUNTER,
1375                 EDMA3_DVT_dNONE,
1376                 EDMA3_DVT_dNONE));
1377 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1379     return result;
1380     }
1382 EDMA3_DRV_Result EDMA3_DRV_mapChToEvtQ(EDMA3_DRV_Handle hEdma,
1383                                 uint32_t channelId,
1384                                 EDMA3_RM_EventQueue eventQ)
1385     {
1386     EDMA3_DRV_Instance *drvInst = NULL;
1387     EDMA3_DRV_Object *drvObject = NULL;
1388     uint32_t intState;
1389     uint32_t edma3Id;
1390     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1391     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1393 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1394     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1395                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1396                 EDMA3_DVT_dCOUNTER,
1397                 EDMA3_DVT_dNONE,
1398                 EDMA3_DVT_dNONE));
1399 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1401         /* If parameter checking is enabled... */
1402 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1403     if (hEdma == NULL)
1404         {
1405         result = EDMA3_DRV_E_INVALID_PARAM;
1406         }
1407 #endif
1409     if (result == EDMA3_DRV_SOK)
1410         {
1411         drvInst = (EDMA3_DRV_Instance *)hEdma;
1412         drvObject = drvInst->pDrvObjectHandle;
1414         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1415             {
1416             result =  EDMA3_DRV_E_INVALID_PARAM;
1417             }
1418         else
1419             {
1420             edma3Id = drvObject->phyCtrllerInstId;
1421             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
1422                 }
1423                 }
1425         /* If parameter checking is enabled... */
1426 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1427     if (channelId > edma3_log_ch_max_val [edma3Id])
1428         {
1429         result = EDMA3_DRV_E_INVALID_PARAM;
1430         }
1432     /* Check the event queue */
1433     if (eventQ >= drvObject->gblCfgParams.numEvtQueue)
1434         {
1435         result = EDMA3_DRV_E_INVALID_PARAM;
1436         }
1437 #endif
1439     if (result == EDMA3_DRV_SOK)
1440         {
1441         if (channelId <= edma3_dma_ch_max_val [edma3Id])
1442             {
1443             /* DMA channel */
1444             edma3OsProtectEntry (edma3Id,
1445                                                 EDMA3_OS_PROTECT_INTERRUPT,
1446                                                 &intState);
1448             globalRegs->DMAQNUM[channelId >> 3u] &=
1449                                         EDMA3_DRV_DMAQNUM_CLR_MASK(channelId);
1450             globalRegs->DMAQNUM[channelId >> 3u] |=
1451                                 EDMA3_DRV_DMAQNUM_SET_MASK(channelId, eventQ);
1453             edma3OsProtectExit(edma3Id,
1454                                                                 EDMA3_OS_PROTECT_INTERRUPT,
1455                                                                 intState);
1456             }
1457         else
1458             {
1459             if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
1460                      && (channelId <= edma3_qdma_ch_max_val[edma3Id]))
1461                 {
1462                 /* QDMA channel */
1463                 edma3OsProtectEntry (edma3Id,
1464                                                         EDMA3_OS_PROTECT_INTERRUPT,
1465                                                         &intState);
1467                 globalRegs->QDMAQNUM &=
1468                         EDMA3_DRV_QDMAQNUM_CLR_MASK(channelId-edma3_qdma_ch_min_val[edma3Id]);
1469                 globalRegs->QDMAQNUM |=
1470                                         EDMA3_DRV_QDMAQNUM_SET_MASK(channelId-edma3_qdma_ch_min_val[edma3Id], eventQ);
1472                 edma3OsProtectExit(edma3Id,
1473                                                                         EDMA3_OS_PROTECT_INTERRUPT,
1474                                                                         intState);
1475                 }
1476             else
1477                 {
1478                 /* API valid for DMA/QDMA channel only, return error... */
1479                 result = EDMA3_DRV_E_INVALID_PARAM;
1480                 }
1481             }
1482         }
1484 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1485     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1486                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1487                 EDMA3_DVT_dCOUNTER,
1488                 EDMA3_DVT_dNONE,
1489                 EDMA3_DVT_dNONE));
1490 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1492     return result;
1493     }
1495 EDMA3_DRV_Result EDMA3_DRV_getMapChToEvtQ (EDMA3_DRV_Handle hEdma,
1496                                     uint32_t channelId,
1497                                     uint32_t *mappedEvtQ)
1498     {
1499     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1500     EDMA3_DRV_Instance *drvInst = NULL;
1501     EDMA3_DRV_Object *drvObject = NULL;
1502     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1503     uint32_t edma3Id;
1505 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1506     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1507                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1508                 EDMA3_DVT_dCOUNTER,
1509                 EDMA3_DVT_dNONE,
1510                 EDMA3_DVT_dNONE));
1511 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1513         /* If parameter checking is enabled... */
1514 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1515     if ((hEdma == NULL) || (mappedEvtQ == NULL))
1516         {
1517         result =  EDMA3_DRV_E_INVALID_PARAM;
1518         }
1519 #endif
1521         /* Check if the parameters are OK. */
1522         if (EDMA3_DRV_SOK == result)
1523         {
1524         drvInst = (EDMA3_DRV_Instance *)hEdma;
1525         drvObject = drvInst->pDrvObjectHandle;
1527         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1528             {
1529             result = EDMA3_DRV_E_INVALID_PARAM;
1530             }
1531                 }
1533         if (EDMA3_DRV_SOK == result)
1534                 {
1535         globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
1536                 edma3Id = drvObject->phyCtrllerInstId;
1538         if (channelId <= edma3_dma_ch_max_val [edma3Id])
1539             {
1540             *mappedEvtQ = ((globalRegs->DMAQNUM[channelId >> 3u])
1541                             & (~(EDMA3_DRV_DMAQNUM_CLR_MASK(channelId))))
1542                               >> ((channelId%8u)*4u);
1543             }
1544         else
1545             {
1546             if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
1547                  &&(channelId <= edma3_qdma_ch_max_val[edma3Id]))
1548                 {
1549                 *mappedEvtQ = ((globalRegs->QDMAQNUM)
1550                                 & (~(EDMA3_DRV_QDMAQNUM_CLR_MASK(channelId - edma3_qdma_ch_min_val[edma3Id]))))
1551                                >> (channelId*4u);
1552                 }
1553             else
1554                 {
1555                 /* Only valid for DMA/QDMA channel, return error... */
1556                 result = EDMA3_DRV_E_INVALID_PARAM;
1557                 }
1558             }
1559         }
1561 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1562     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1563                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1564                 EDMA3_DVT_dCOUNTER,
1565                 EDMA3_DVT_dNONE,
1566                 EDMA3_DVT_dNONE));
1567 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1569     return result;
1570     }
1572 EDMA3_DRV_Result EDMA3_DRV_setCCRegister (EDMA3_DRV_Handle hEdma,
1573                     uint32_t regOffset,
1574                     uint32_t newRegValue)
1575     {
1576     uint32_t intState;
1577     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1578     EDMA3_DRV_Instance *drvInst = NULL;
1579     EDMA3_DRV_Object *drvObject = NULL;
1580     volatile uint32_t regPhyAddr = 0x0u;
1582 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1583     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1584                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1585                 EDMA3_DVT_dCOUNTER,
1586                 EDMA3_DVT_dNONE,
1587                 EDMA3_DVT_dNONE));
1588 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1591         /* If parameter checking is enabled... */
1592 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1593     if ((hEdma == NULL) || ((regOffset % 4u) != 0))
1594         {
1595         result = EDMA3_DRV_E_INVALID_PARAM;
1596         }
1597 #endif
1599         /* Check if the parameters are OK. */
1600         if (EDMA3_DRV_SOK == result)
1601         {
1602         drvInst = (EDMA3_DRV_Instance *)hEdma;
1603         drvObject = drvInst->pDrvObjectHandle;
1605         if (drvObject == NULL)
1606             {
1607             result = EDMA3_DRV_E_INVALID_PARAM;
1608             }
1609         else
1610             {
1611             if (drvObject->gblCfgParams.globalRegs != NULL)
1612                 {
1613                 /**
1614                   * Take the instance specific semaphore, to prevent simultaneous
1615                   * access to the shared resources.
1616                   */
1617                 result = edma3OsSemTake(drvInst->drvSemHandle,
1618                                         EDMA3_OSSEM_NO_TIMEOUT);
1620                 if (EDMA3_DRV_SOK == result)
1621                     {
1622                                         /* Semaphore taken successfully, modify the registers. */
1623                     edma3OsProtectEntry (drvObject->phyCtrllerInstId,
1624                                                                         EDMA3_OS_PROTECT_INTERRUPT,
1625                                                                         &intState);
1626                     /* Global interrupts disabled, modify the registers. */
1627                     regPhyAddr = (uint32_t)(drvObject->gblCfgParams.globalRegs) + regOffset;
1629                     *(uint32_t *)regPhyAddr = newRegValue;
1631                     edma3OsProtectExit (drvObject->phyCtrllerInstId,
1632                                                                         EDMA3_OS_PROTECT_INTERRUPT,
1633                                                                         intState);
1634                     /* Return the semaphore back */
1635                     result = edma3OsSemGive(drvInst->drvSemHandle);
1636                     }
1637                 }
1638             }
1639         }
1641 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1642     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1643                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1644                 EDMA3_DVT_dCOUNTER,
1645                 EDMA3_DVT_dNONE,
1646                 EDMA3_DVT_dNONE));
1647 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1649     return result;
1650     }
1652 EDMA3_DRV_Result EDMA3_DRV_getCCRegister ( EDMA3_DRV_Handle hEdma,
1653                     uint32_t regOffset,
1654                     uint32_t *regValue)
1655     {
1656     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1657     EDMA3_DRV_Instance *drvInst = NULL;
1658     EDMA3_DRV_Object *drvObject = NULL;
1659     volatile uint32_t regPhyAddr = 0x0u;
1661 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1662     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1663                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1664                 EDMA3_DVT_dCOUNTER,
1665                 EDMA3_DVT_dNONE,
1666                 EDMA3_DVT_dNONE));
1667 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1669         /* If parameter checking is enabled... */
1670 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1671     if (((hEdma == NULL) || (regValue == NULL))
1672         || ((regOffset % 4u) != 0))
1673         {
1674         result =  EDMA3_DRV_E_INVALID_PARAM;
1675         }
1676 #endif
1678         /* Check if the parameters are OK. */
1679         if (EDMA3_DRV_SOK == result)
1680         {
1681         drvInst = (EDMA3_DRV_Instance *)hEdma;
1682         drvObject = drvInst->pDrvObjectHandle;
1684         if (drvObject == NULL)
1685             {
1686             result = EDMA3_DRV_E_INVALID_PARAM;
1687             }
1688         else
1689             {
1690             if (drvObject->gblCfgParams.globalRegs != NULL)
1691                 {
1692                 regPhyAddr = (uint32_t)(drvObject->gblCfgParams.globalRegs) + regOffset;
1694                 *regValue = *(uint32_t *)regPhyAddr;
1695                 }
1696             }
1697         }
1699 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1700     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1701                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1702                 EDMA3_DVT_dCOUNTER,
1703                 EDMA3_DVT_dNONE,
1704                 EDMA3_DVT_dNONE));
1705 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1707     return result;
1708     }
1710 EDMA3_DRV_Result EDMA3_DRV_waitAndClearTcc (EDMA3_DRV_Handle hEdma,
1711                     uint32_t tccNo)
1712     {
1713     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1714     EDMA3_DRV_Instance *drvInst = NULL;
1715     EDMA3_DRV_Object *drvObject = NULL;
1716     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1717     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
1718     uint32_t tccBitMask = 0x0u;
1720 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1721     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1722                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1723                 EDMA3_DVT_dCOUNTER,
1724                 EDMA3_DVT_dNONE,
1725                 EDMA3_DVT_dNONE));
1726 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1728         /* If parameter checking is enabled... */
1729 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1730     if (hEdma == NULL)
1731         {
1732         result = EDMA3_DRV_E_INVALID_PARAM;
1733         }
1734 #endif
1736         /* Check if the parameters are OK. */
1737         if (EDMA3_DRV_SOK == result)
1738         {
1739         drvInst = (EDMA3_DRV_Instance *)hEdma;
1740         drvObject = drvInst->pDrvObjectHandle;
1742         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1743             {
1744             result = EDMA3_DRV_E_INVALID_PARAM;
1745             }
1746         else
1747             {
1748                         /* If parameter checking is enabled... */
1749 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1750             if (tccNo >= drvObject->gblCfgParams.numTccs)
1751                 {
1752                 result = EDMA3_DRV_E_INVALID_PARAM;
1753                 }
1754 #endif
1756                         /* Check if the parameters are OK. */
1757                         if (EDMA3_DRV_SOK == result)
1758                 {
1759                 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
1760                 shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)
1761                                         (&globalRegs->SHADOW[drvInst->regionId]);
1763                 if (shadowRegs != NULL)
1764                     {
1765                     if(tccNo < 32u)
1766                         {
1767                         tccBitMask = (1u << tccNo);
1769                         /* Check the status of the IPR[tccNo] bit. */
1770                         while (FALSE == (shadowRegs->IPR & tccBitMask))
1771                             {
1772                             /* Transfer not yet completed, bit not SET */
1773                             }
1775                         /**
1776                          * Bit found SET, transfer is completed,
1777                          * clear the pending interrupt and return.
1778                          */
1779                         shadowRegs->ICR = tccBitMask;
1780                         }
1781                     else
1782                         {
1783                         tccBitMask = (1u << (tccNo - 32u));
1785                         /* Check the status of the IPRH[tccNo-32] bit. */
1786                         while (FALSE == (shadowRegs->IPRH & tccBitMask))
1787                             {
1788                             /* Transfer not yet completed, bit not SET */
1789                             }
1791                         /**
1792                          * Bit found SET, transfer is completed,
1793                          * clear the pending interrupt and return.
1794                          */
1795                         shadowRegs->ICRH = tccBitMask;
1796                         }
1797                     }
1798                 }
1799             }
1800         }
1802 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1803     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1804                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1805                 EDMA3_DVT_dCOUNTER,
1806                 EDMA3_DVT_dNONE,
1807                 EDMA3_DVT_dNONE));
1808 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1810     return result;
1811     }
1813 EDMA3_DRV_Result EDMA3_DRV_checkAndClearTcc (EDMA3_DRV_Handle hEdma,
1814                     uint32_t tccNo,
1815                     uint16_t *tccStatus)
1816     {
1817     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1818     EDMA3_DRV_Instance *drvInst = NULL;
1819     EDMA3_DRV_Object *drvObject = NULL;
1820     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1821     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
1822     uint32_t tccBitMask = 0x0u;
1824 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1825     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1826                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1827                 EDMA3_DVT_dCOUNTER,
1828                 EDMA3_DVT_dNONE,
1829                 EDMA3_DVT_dNONE));
1830 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1833         /* If parameter checking is enabled... */
1834 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1835     if ((hEdma == NULL) || (tccStatus == NULL))
1836         {
1837         result = EDMA3_DRV_E_INVALID_PARAM;
1838         }
1839 #endif
1841         /* Check if the parameters are OK. */
1842         if (EDMA3_DRV_SOK == result)
1843         {
1844         drvInst = (EDMA3_DRV_Instance *)hEdma;
1845         drvObject = drvInst->pDrvObjectHandle;
1847         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1848             {
1849             result = EDMA3_DRV_E_INVALID_PARAM;
1850             }
1851         else
1852             {
1853                         /* If parameter checking is enabled... */
1854 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1855             if (tccNo >= drvObject->gblCfgParams.numTccs)
1856                 {
1857                 result = EDMA3_DRV_E_INVALID_PARAM;
1858                 }
1859 #endif
1861                         /* Check if the parameters are OK. */
1862                         if (EDMA3_DRV_SOK == result)
1863                 {
1864                 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
1865                 shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)
1866                                         (&globalRegs->SHADOW[drvInst->regionId]);
1868                 /* Reset the tccStatus */
1869                 *tccStatus = FALSE;
1871                 if (shadowRegs != NULL)
1872                     {
1873                     if(tccNo < 32u)
1874                         {
1875                         tccBitMask = (1u << tccNo);
1877                         /* Check the status of the IPR[tccNo] bit. */
1878                         if ((shadowRegs->IPR & tccBitMask) != FALSE)
1879                             {
1880                             /* Transfer completed, bit found SET */
1881                             *tccStatus = TRUE;
1883                             /* Clear the pending interrupt also. */
1884                             shadowRegs->ICR = tccBitMask;
1885                             }
1886                         }
1887                     else
1888                         {
1889                         tccBitMask = (1u << (tccNo - 32u));
1891                         /* Check the status of the IPRH[tccNo-32] bit. */
1892                         if ((shadowRegs->IPRH & tccBitMask) != FALSE)
1893                             {
1894                             /* Transfer completed, bit found SET */
1895                             *tccStatus = TRUE;
1897                             /* Clear the pending interrupt also. */
1898                             shadowRegs->ICRH = tccBitMask;
1899                             }
1900                         }
1901                     }
1902                 }
1903             }
1904         }
1906 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1907     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1908                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1909                 EDMA3_DVT_dCOUNTER,
1910                 EDMA3_DVT_dNONE,
1911                 EDMA3_DVT_dNONE));
1912 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1914     return result;
1915     }
1917 EDMA3_DRV_Result EDMA3_DRV_getPaRAMPhyAddr(EDMA3_DRV_Handle hEdma,
1918                     uint32_t lCh,
1919                     uint32_t *paramPhyAddr)
1920     {
1921     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1922     EDMA3_DRV_Instance *drvInst = NULL;
1923     EDMA3_DRV_Object *drvObject = NULL;
1924     int32_t paRAMId = 0;
1925     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1926         uint32_t edma3Id;
1928 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1929     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1930                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1931                 EDMA3_DVT_dCOUNTER,
1932                 EDMA3_DVT_dNONE,
1933                 EDMA3_DVT_dNONE));
1934 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1937         /* If parameter checking is enabled... */
1938 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1939     if ((hEdma == NULL) || (paramPhyAddr == NULL))
1940         {
1941         result = EDMA3_DRV_E_INVALID_PARAM;
1942         }
1943 #endif
1945         /* Check if the parameters are OK. */
1946         if (EDMA3_DRV_SOK == result)
1947         {
1948         drvInst = (EDMA3_DRV_Instance *)hEdma;
1949         drvObject = drvInst->pDrvObjectHandle;
1951         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1952             {
1953             result =  EDMA3_DRV_E_INVALID_PARAM;
1954             }
1955         else
1956             {
1957             edma3Id = drvObject->phyCtrllerInstId;
1958             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
1959                 }
1960                 }
1962         /* If parameter checking is enabled... */
1963 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1964     if (lCh > edma3_log_ch_max_val [edma3Id])
1965         {
1966         result = EDMA3_DRV_E_INVALID_PARAM;
1967         }
1968 #endif
1970         if (EDMA3_DRV_SOK == result)
1971         {
1972         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
1973         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
1974             {
1975             result = EDMA3_DRV_E_INVALID_PARAM;
1976             }
1977                 else
1978             {
1979             *paramPhyAddr = (uint32_t)&(globalRegs->PARAMENTRY [paRAMId].OPT);
1980             }
1981                 }
1983 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1984     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1985                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1986                 EDMA3_DVT_dCOUNTER,
1987                 EDMA3_DVT_dNONE,
1988                 EDMA3_DVT_dNONE));
1989 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1991     return result;
1992     }
1994 EDMA3_DRV_Result EDMA3_DRV_Ioctl(
1995                       EDMA3_DRV_Handle       hEdma,
1996                       EDMA3_DRV_IoctlCmd     cmd,
1997                       void                  *cmdArg,
1998                       void                  *param
1999                      )
2000     {
2001     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2002     EDMA3_DRV_Instance *drvInst = NULL;
2004     /* To remove CCS warnings */
2005     (void)param;
2007 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2008     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2009                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2010                 EDMA3_DVT_dCOUNTER,
2011                 EDMA3_DVT_dNONE,
2012                 EDMA3_DVT_dNONE));
2013 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2015         /* If parameter checking is enabled... */
2016 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2017     if (hEdma == NULL)
2018         {
2019         result = EDMA3_DRV_E_INVALID_PARAM;
2020         }
2022     if ((cmd <= EDMA3_DRV_IOCTL_MIN_IOCTL)
2023         || (cmd >= EDMA3_DRV_IOCTL_MAX_IOCTL))
2024         {
2025         result = EDMA3_DRV_E_INVALID_PARAM;
2026         }
2027 #endif
2029     if (result == EDMA3_DRV_SOK)
2030         {
2031         drvInst = (EDMA3_DRV_Instance *)hEdma;
2033         if (drvInst == NULL)
2034             {
2035             result = EDMA3_DRV_E_INVALID_PARAM;
2036             }
2037         }
2039     if (result == EDMA3_DRV_SOK)
2040         {
2041         switch (cmd)
2042             {
2043             case EDMA3_DRV_IOCTL_SET_PARAM_CLEAR_OPTION:
2044                 {
2045                 result = EDMA3_RM_Ioctl (drvInst->resMgrInstance,
2046                                                                                 EDMA3_RM_IOCTL_SET_PARAM_CLEAR_OPTION,
2047                                                                                 cmdArg,
2048                                                                                 param);
2050                 break;
2051                 }
2053             case EDMA3_DRV_IOCTL_GET_PARAM_CLEAR_OPTION:
2054                 {
2055                 if (NULL == cmdArg)
2056                     {
2057                     result = EDMA3_DRV_E_INVALID_PARAM;
2058                     }
2059                 else
2060                     {
2061                     result = EDMA3_RM_Ioctl (drvInst->resMgrInstance,
2062                                                                                         EDMA3_RM_IOCTL_GET_PARAM_CLEAR_OPTION,
2063                                                                                         cmdArg,
2064                                                                                         param);
2065                     }
2067                 break;
2068                 }
2070             default:
2071                 /* You passed invalid IOCTL cmd */
2072                 result = EDMA3_DRV_E_INVALID_PARAM;
2073             }
2074         }
2076 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2077         EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2078                     EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2079                     EDMA3_DVT_dCOUNTER,
2080                     EDMA3_DVT_dNONE,
2081                     EDMA3_DVT_dNONE));
2082 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2084         return result;
2085     }
2087 EDMA3_DRV_Handle EDMA3_DRV_getInstHandle(uint32_t phyCtrllerInstId,
2088                                                                 EDMA3_RM_RegionId regionId,
2089                                                                 EDMA3_DRV_Result *errorCode)
2090         {
2091     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2092         EDMA3_DRV_Object *drvObject = NULL;
2093         EDMA3_DRV_Instance *drvInstanceHandle = NULL;
2095         /* If parameter checking is enabled... */
2096 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2097     if ((phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
2098         || (errorCode == NULL))
2099         {
2100         result = EDMA3_DRV_E_INVALID_PARAM;
2101         }
2102 #endif
2104         if (EDMA3_DRV_SOK == result)
2105                 {
2106                 drvObject = &drvObj[phyCtrllerInstId];
2108                 if (NULL == drvObject)
2109             {
2110             result = EDMA3_DRV_E_INVALID_PARAM;
2111             }
2113                 /* If parameter checking is enabled... */
2114 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2115         /* Check regionId. */
2116     if (regionId >= drvObject->gblCfgParams.numRegions)
2117         {
2118         result = EDMA3_DRV_E_INVALID_PARAM;
2119         }
2120 #endif
2121                 }
2123         if (EDMA3_DRV_SOK == result)
2124                 {
2125         /* If the driver instance is already opened for this specific region,
2126         *  return it, else return an error.
2127         */
2128                 drvInstanceHandle = &drvInstance[phyCtrllerInstId][regionId];
2130         if (NULL == drvInstanceHandle->pDrvObjectHandle)
2131             {
2132             /* Instance not opened yet!!! */
2133             drvInstanceHandle = NULL;
2134             result = EDMA3_DRV_E_INST_NOT_OPENED;
2135             }
2136                 }
2138         *errorCode = result;
2139         return (EDMA3_DRV_Handle)drvInstanceHandle;
2140         }
2142 EDMA3_DRV_Result EDMA3_DRV_registerTccCb(EDMA3_DRV_Handle hEdma,
2143                     const uint32_t channelId,
2144                     EDMA3_RM_TccCallback tccCb,
2145                     void *cbData)
2146         {
2147     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2148     EDMA3_DRV_Instance *drvInst = NULL;
2149     EDMA3_DRV_Object *drvObject = NULL;
2150         uint32_t edma3Id;
2151     EDMA3_RM_ResDesc channelObj;
2153 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2154     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2155                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2156                 EDMA3_DVT_dCOUNTER,
2157                 EDMA3_DVT_dNONE,
2158                 EDMA3_DVT_dNONE));
2159 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2161         /* If parameter checking is enabled... */
2162 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2163     if ((hEdma == NULL) || (tccCb == NULL))
2164         {
2165         result = EDMA3_DRV_E_INVALID_PARAM;
2166         }
2167 #endif
2169     if (result == EDMA3_DRV_SOK)
2170         {
2171         drvInst = (EDMA3_DRV_Instance *)hEdma;
2172         drvObject = drvInst->pDrvObjectHandle;
2174         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
2175             {
2176             result = EDMA3_DRV_E_INVALID_PARAM;
2177             }
2178         else
2179             {
2180             edma3Id = drvObject->phyCtrllerInstId;
2181                 }
2182                 }
2184         if (result == EDMA3_DRV_SOK)
2185                 {
2186             if (channelId <= edma3_dma_ch_max_val [edma3Id])
2187                 {
2188                 channelObj.type = EDMA3_RM_RES_DMA_CHANNEL;
2189                         channelObj.resId = channelId;
2190                 }
2191                 else
2192                         {
2193                         if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
2194                                 || (channelId <= edma3_qdma_ch_max_val[edma3Id]))
2195                                 {
2196                         channelObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
2197                                 channelObj.resId = channelId - edma3_qdma_ch_min_val[edma3Id];
2198                                 }
2199                         else
2200                                 {
2201                                 result = EDMA3_DRV_E_INVALID_PARAM;
2202                                 }
2203                         }
2204                 }
2206         if (result == EDMA3_DRV_SOK)
2207                 {
2208                 /* Call the RM function now */
2209                 result = EDMA3_RM_registerTccCb (drvInst->resMgrInstance,
2210                                                     (EDMA3_RM_ResDesc *)&channelObj,
2211                                                     edma3DrvChBoundRes[edma3Id][channelId].tcc,
2212                                                     tccCb,
2213                                                     cbData);
2214                 }
2216 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2217         EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2218                     EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2219                     EDMA3_DVT_dCOUNTER,
2220                     EDMA3_DVT_dNONE,
2221                     EDMA3_DVT_dNONE));
2222 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2224     return result;
2225         }
2227 EDMA3_DRV_Result EDMA3_DRV_unregisterTccCb(EDMA3_DRV_Handle hEdma,
2228                     const uint32_t channelId)
2230         {
2231     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2232     EDMA3_DRV_Instance *drvInst = NULL;
2233     EDMA3_DRV_Object *drvObject = NULL;
2234         uint32_t edma3Id;
2235     EDMA3_RM_ResDesc channelObj;
2237 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2238     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2239                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2240                 EDMA3_DVT_dCOUNTER,
2241                 EDMA3_DVT_dNONE,
2242                 EDMA3_DVT_dNONE));
2243 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2245         /* If parameter checking is enabled... */
2246 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2247     if (hEdma == NULL)
2248         {
2249         result = EDMA3_DRV_E_INVALID_PARAM;
2250         }
2251 #endif
2253     if (result == EDMA3_DRV_SOK)
2254         {
2255         drvInst = (EDMA3_DRV_Instance *)hEdma;
2256         drvObject = drvInst->pDrvObjectHandle;
2258         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
2259             {
2260             result = EDMA3_DRV_E_INVALID_PARAM;
2261             }
2262         else
2263             {
2264             edma3Id = drvObject->phyCtrllerInstId;
2265                 }
2266                 }
2268         if (result == EDMA3_DRV_SOK)
2269                 {
2270             if (channelId <= edma3_dma_ch_max_val [edma3Id])
2271                 {
2272                 channelObj.type = EDMA3_RM_RES_DMA_CHANNEL;
2273                         channelObj.resId = channelId;
2274                 }
2275                 else
2276                         {
2277                         if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
2278                                 || (channelId <= edma3_qdma_ch_max_val[edma3Id]))
2279                                 {
2280                         channelObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
2281                                 channelObj.resId = channelId - edma3_qdma_ch_min_val[edma3Id];
2282                                 }
2283                         else
2284                                 {
2285                                 result = EDMA3_DRV_E_INVALID_PARAM;
2286                                 }
2287                         }
2288                 }
2290         if (result == EDMA3_DRV_SOK)
2291                 {
2292                 /* Call the RM function now */
2293                 result = EDMA3_RM_unregisterTccCb (drvInst->resMgrInstance,
2294                                                     (EDMA3_RM_ResDesc *)&channelObj);
2295                 }
2297 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2298         EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2299                     EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2300                     EDMA3_DVT_dCOUNTER,
2301                     EDMA3_DVT_dNONE,
2302                     EDMA3_DVT_dNONE));
2303 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2305     return result;
2306         }
2308 EDMA3_DRV_Result EDMA3_DRV_setTcErrorInt(uint32_t phyCtrllerInstId,
2309                                         uint32_t tcId,
2310                                         EDMA3_DRV_Tc_Err tcErr)
2311         {
2312     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2313     EDMA3_DRV_Object *drvObject = NULL;
2314     volatile EDMA3_TCRL_Regs *tcRegs = NULL;
2316 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2317     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2318                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2319                 EDMA3_DVT_dCOUNTER,
2320                 EDMA3_DVT_dNONE,
2321                 EDMA3_DVT_dNONE));
2322 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2324         /* If parameter checking is enabled... */
2325 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2326         if (phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
2327         {
2328         result = EDMA3_DRV_E_INVALID_PARAM;
2329         }
2331     if (((int32_t)tcErr < (int32_t)EDMA3_DRV_TC_ERR_BUSERR_DIS)
2332         || (tcErr > EDMA3_DRV_TC_ERR_EN))
2333         {
2334         result = EDMA3_DRV_E_INVALID_PARAM;
2335         }
2336 #endif
2338         /* Check if the parameters are OK. */
2339         if (EDMA3_DRV_SOK == result)
2340         {
2341         drvObject = &drvObj[phyCtrllerInstId];
2343         if (drvObject == NULL)
2344             {
2345             result =  EDMA3_DRV_E_INVALID_PARAM;
2346             }
2347                 else
2348                         {
2349                 if (tcId >= drvObject->gblCfgParams.numTcs)
2350                         {
2351                         result = EDMA3_DRV_E_INVALID_PARAM;
2352                         }
2353                         }
2354                 }
2356         if (EDMA3_DRV_SOK == result)
2357         {
2358         tcRegs = (volatile EDMA3_TCRL_Regs *)(drvObject->gblCfgParams.tcRegs[tcId]);
2360             if (NULL == tcRegs)
2361                 {
2362                 result = EDMA3_DRV_E_INVALID_PARAM;
2363                 }
2364                 }
2366         if (EDMA3_DRV_SOK == result)
2367         {
2368         switch (tcErr)
2369                 {
2370                 case EDMA3_DRV_TC_ERR_BUSERR_DIS:
2371                                 tcRegs->ERREN &= ~(1 << EDMA3_TCRL_ERREN_BUSERR_SHIFT);
2372                                 break;
2374                 case EDMA3_DRV_TC_ERR_BUSERR_EN:
2375                                 tcRegs->ERREN |= (1 << EDMA3_TCRL_ERREN_BUSERR_SHIFT);
2376                                 break;
2378                 case EDMA3_DRV_TC_ERR_TRERR_DIS:
2379                                 tcRegs->ERREN &= ~(1 << EDMA3_TCRL_ERREN_TRERR_SHIFT);
2380                                 break;
2382                 case EDMA3_DRV_TC_ERR_TRERR_EN:
2383                                 tcRegs->ERREN |= (1 << EDMA3_TCRL_ERREN_TRERR_SHIFT);
2384                                 break;
2386                 case EDMA3_DRV_TC_ERR_MMRAERR_DIS:
2387                                 tcRegs->ERREN &= ~(1 << EDMA3_TCRL_ERREN_MMRAERR_SHIFT);
2388                                 break;
2390                 case EDMA3_DRV_TC_ERR_MMRAERR_EN:
2391                                 tcRegs->ERREN |= (1 << EDMA3_TCRL_ERREN_MMRAERR_SHIFT);
2392                                 break;
2394                 case EDMA3_DRV_TC_ERR_DIS:
2395                                 tcRegs->ERREN = EDMA3_TCRL_ERREN_RESETVAL;
2396                                 break;
2398                 case EDMA3_DRV_TC_ERR_EN:
2399                                 tcRegs->ERREN = (EDMA3_TCRL_ERREN_BUSERR_MASK
2400                                                                 | EDMA3_TCRL_ERREN_TRERR_MASK
2401                                                                 | EDMA3_TCRL_ERREN_MMRAERR_MASK);
2402                                 break;
2404                         default:
2405                                 result = EDMA3_DRV_E_INVALID_PARAM;
2406                                 break;
2407                 }
2408                 }
2410 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2411     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2412                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2413                 EDMA3_DVT_dCOUNTER,
2414                 EDMA3_DVT_dNONE,
2415                 EDMA3_DVT_dNONE));
2416 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2418     return result;
2419         }
2421 EDMA3_DRV_Result EDMA3_DRV_getChannelStatus(EDMA3_DRV_Handle hEdma,
2422                         uint32_t lCh, uint32_t *lchStatus)
2423         {
2424         EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2425     EDMA3_DRV_Instance *drvInst = NULL;
2426     EDMA3_DRV_Object *drvObject = NULL;
2427     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
2428     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
2429         uint32_t edma3Id;
2430         uint32_t status = 0x0;
2431         uint32_t tcc;
2433 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2434     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2435                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2436                 EDMA3_DVT_dCOUNTER,
2437                 EDMA3_DVT_dNONE,
2438                 EDMA3_DVT_dNONE));
2439 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2441         /* If parameter checking is enabled... */
2442 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2443     if ((hEdma == NULL)
2444                 || (lchStatus == NULL))
2445         {
2446         result = EDMA3_DRV_E_INVALID_PARAM;
2447         }
2448 #endif
2450         /* Check if the parameters are OK. */
2451         if (EDMA3_DRV_SOK == result)
2452         {
2453         drvInst = (EDMA3_DRV_Instance *)hEdma;
2454         drvObject = drvInst->pDrvObjectHandle;
2456         if ((drvObject == NULL) ||
2457                         (drvObject->gblCfgParams.globalRegs == NULL))
2458             {
2459             result = EDMA3_DRV_E_INVALID_PARAM;
2460             }
2461         else
2462             {
2463             globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
2464             shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)
2465                                     (&globalRegs->SHADOW[drvInst->regionId]);
2466             edma3Id = drvObject->phyCtrllerInstId;
2467                 }
2468                 }
2470         /* If parameter checking is enabled... */
2471 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2472     if (lCh > edma3_log_ch_max_val [edma3Id])
2473         {
2474         result = EDMA3_DRV_E_INVALID_PARAM;
2475         }
2477         /* Not valid for Link channels */
2478     if ( lCh >= edma3_link_ch_min_val [edma3Id]
2479                 && lCh <= edma3_link_ch_max_val [edma3Id])
2480         {
2481         result = EDMA3_DRV_E_INVALID_PARAM;
2482         }
2483 #endif
2485         if (EDMA3_DRV_SOK == result)
2486         {
2487         tcc = edma3DrvChBoundRes[edma3Id][lCh].tcc;
2489         if (tcc >= drvObject->gblCfgParams.numTccs)
2490             {
2491             result = EDMA3_DRV_E_INVALID_PARAM;
2492             }
2493                 }
2495         if (EDMA3_DRV_SOK == result)
2496         {
2497         /* DMA Channel, check for event pending and event miss */
2498                 if (lCh <= edma3_dma_ch_max_val[edma3Id])
2499                         {
2500                         if (lCh < 32u)
2501                                 {
2502                         if((globalRegs->EMR & (1u << lCh)) != FALSE)
2503                             {
2504                             status |= EDMA3_DRV_CHANNEL_ERR;
2505                             }
2507                         if((shadowRegs->ER & (1u << lCh)) != FALSE)
2508                             {
2509                             status |= EDMA3_DRV_CHANNEL_EVENT_PENDING;
2510                             }
2511                                 }
2512                         else
2513                                 {
2514                 if((globalRegs->EMRH & (1u << (lCh-32u))) != FALSE)
2515                     {
2516                     status |= EDMA3_DRV_CHANNEL_ERR;
2517                     }
2519                         if((shadowRegs->ERH & (1u << (lCh-32u))) != FALSE)
2520                             {
2521                             status |= EDMA3_DRV_CHANNEL_EVENT_PENDING;
2522                             }
2523                                 }
2524                         }
2526         /* QDMA Channel, check for event miss */
2527                 if (lCh >= edma3_qdma_ch_min_val[edma3Id]
2528                         && lCh <= edma3_qdma_ch_max_val[edma3Id])
2529                         {
2530                         uint32_t qdma_ch = lCh - edma3_qdma_ch_min_val[edma3Id];
2532                 if((globalRegs->QEMR & (1u << qdma_ch)) != FALSE)
2533                     {
2534                     status |= EDMA3_DRV_CHANNEL_ERR;
2535                     }
2536                         }
2538                 /* Check for xfer completion interrupt */
2539                 if (tcc < 32u)
2540                         {
2541                 if((shadowRegs->IPR & (1u << tcc)) != FALSE)
2542                     {
2543                     status |= EDMA3_DRV_CHANNEL_XFER_COMPLETE;
2544                     }
2545                         }
2546                 else
2547                         {
2548                 if((shadowRegs->IPRH & (1u << (tcc-32u))) != FALSE)
2549                     {
2550                     status |= EDMA3_DRV_CHANNEL_XFER_COMPLETE;
2551                     }
2552                         }
2554                 /* Update the status */
2555                 *lchStatus = status;
2556                 }
2558 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2559     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2560                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2561                 EDMA3_DVT_dCOUNTER,
2562                 EDMA3_DVT_dNONE,
2563                 EDMA3_DVT_dNONE));
2564 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2566     return result;
2567     }
2569 EDMA3_DRV_Result EDMA3_DRV_mapTccLinkCh ( EDMA3_DRV_Handle hEdma,
2570                                                 uint32_t linkCh,
2571                                                 uint32_t tcc)
2572         {
2573     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2574     EDMA3_DRV_Instance *drvInst = NULL;
2575     EDMA3_DRV_Object *drvObject = NULL;
2576     int32_t paRAMId;
2577     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
2578         uint32_t edma3Id;
2580         /* If parameter checking is enabled... */
2581 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2582     if (hEdma == NULL)
2583         {
2584         result = EDMA3_DRV_E_INVALID_PARAM;
2585         }
2586 #endif
2588         if (EDMA3_DRV_SOK == result)
2589         {
2590         drvInst = (EDMA3_DRV_Instance *)hEdma;
2591         drvObject = drvInst->pDrvObjectHandle;
2593         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
2594             {
2595             result = EDMA3_DRV_E_INVALID_PARAM;
2596             }
2597                 }
2599         if (EDMA3_DRV_SOK == result)
2600         {
2601         edma3Id = drvObject->phyCtrllerInstId;
2602         globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);
2604         /* Validate the arguments */
2605                 if ((linkCh < edma3_link_ch_min_val[edma3Id] ||
2606                                 linkCh > edma3_link_ch_max_val[edma3Id]) ||
2607                                 (tcc >= drvObject->gblCfgParams.numTccs))
2608                         {
2609                         result = EDMA3_DRV_E_INVALID_PARAM;
2610                         }
2611                 }
2613         if (EDMA3_DRV_SOK == result)
2614         {
2615         paRAMId = edma3DrvChBoundRes[edma3Id][linkCh].paRAMId;
2617         if (paRAMId < 0 || paRAMId >= drvObject->gblCfgParams.numPaRAMSets)
2618             {
2619             result = EDMA3_DRV_E_INVALID_PARAM;
2620             }
2621                 else
2622                         {
2623             /* Set TCC in ParamSet.OPT field */
2624             globalRegs->PARAMENTRY [paRAMId].OPT &= EDMA3_DRV_OPT_TCC_CLR_MASK;
2625             globalRegs->PARAMENTRY [paRAMId].OPT |= EDMA3_DRV_OPT_TCC_SET_MASK(tcc);
2627                         /* Update the tcc */
2628                         edma3DrvChBoundRes[edma3Id][linkCh].tcc = tcc;
2629                         }
2630                 }
2632         return result;
2633         }
2635 /* End of File */