Merge pull request #28 in PROCESSOR-SDK/edma3_lld from PRSDK-3314 to master
[keystone-rtos/edma3_lld.git] / packages / ti / sdo / edma3 / drv / src / edma3_drv_adv.c
1 /*
2  * edma3_drv_adv.c
3  *
4  * EDMA3 Driver Advanced Interface Implementation. This file contains
5  * advanced-level EDMA3 Driver APIs which are required to:
6  * a) Link and chain two channels.
7  * b) Set/get the whole PaRAM Set in one shot.
8  * c) Set/get each individual field of the PaRAM Set.
9  * d) Poll mode APIs.
10  * e) IOCTL interface.
11  * These APIs are provided to have complete control on the EDMA3 hardware and
12  * normally advanced users are expected to use them for their specific
13  * use-cases.
14  *
15  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
16  *
17  *
18  *  Redistribution and use in source and binary forms, with or without
19  *  modification, are permitted provided that the following conditions
20  *  are met:
21  *
22  *    Redistributions of source code must retain the above copyright
23  *    notice, this list of conditions and the following disclaimer.
24  *
25  *    Redistributions in binary form must reproduce the above copyright
26  *    notice, this list of conditions and the following disclaimer in the
27  *    documentation and/or other materials provided with the
28  *    distribution.
29  *
30  *    Neither the name of Texas Instruments Incorporated nor the names of
31  *    its contributors may be used to endorse or promote products derived
32  *    from this software without specific prior written permission.
33  *
34  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45  *
46 */
49 /* EDMA3 Driver Internal Header Files */
50 #include <ti/sdo/edma3/drv/src/edma3.h>
51 /* Resource Manager Internal Header Files */
52 #include <ti/sdo/edma3/rm/src/edma3resmgr.h>
54 /* Instrumentation Header File */
55 #ifdef EDMA3_INSTRUMENTATION_ENABLED
56 #include <ti/sdo/edma3/rm/src/edma3_log.h>
57 #endif
59 /* Externel Variables */
60 /*---------------------------------------------------------------------------*/
61 /**
62  * Maximum Resource Manager Instances supported by the EDMA3 Package.
63  */
64 extern const uint32_t EDMA3_MAX_RM_INSTANCES;
67 /**
68  * \brief EDMA3 Resource Manager Objects, tied to each EDMA3 HW Controller.
69  *
70  * Typically one RM object will cater to one EDMA3 HW controller
71  * and will have all the global config information.
72  */
73 extern EDMA3_RM_Obj resMgrObj[EDMA3_MAX_EDMA3_INSTANCES];
76 /**
77  * \brief Region Specific Configuration structure for
78  * EDMA3 controller, to provide region specific Information.
79  *
80  * This configuration info can also be provided by the user at run-time,
81  * while calling EDMA3_RM_open (). If not provided at run-time,
82  * this info will be taken from the config file "edma3_<PLATFORM_NAME>_cfg.c",
83  * for the specified platform.
84  */
85 #ifdef BUILD_C6XDSP
86 extern far EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;
87 #else
88 extern EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;
89 #endif
92 /**
93  * Handles of EDMA3 Resource Manager Instances.
94  *
95  * Used to maintain information of the EDMA3 RM Instances
96  * for each HW controller.
97  * There could be a maximum of EDMA3_MAX_RM_INSTANCES instances per
98  * EDMA3 HW.
99  */
100 #ifdef BUILD_C6XDSP
101 extern far EDMA3_RM_Instance *ptrRMIArray;
102 #else
103 extern EDMA3_RM_Instance *ptrRMIArray;
104 #endif
106 /** Local MemZero function */
107 extern void edma3MemZero(void *dst, uint32_t len);
108 /** Local MemCpy function to copy PaRAM Set ONLY */
109 extern void edma3ParamCpy(volatile void *dst, const volatile void *src);
111 /**
112  * \brief EDMA3 Driver Objects, tied to each EDMA3 HW Controller.
113  *
114  * Typically one object will cater to one EDMA3 HW controller
115  * and will have all regions' (ARM, DSP etc) specific config information.
116  */
117 extern EDMA3_DRV_Object drvObj [EDMA3_MAX_EDMA3_INSTANCES];
120 /**
121  * Handles of EDMA3 Driver Instances.
122  *
123  * Used to maintain information of the EDMA3 Driver Instances for
124  * each region, for each HW controller.
125  * There could be as many Driver Instances as there are shadow
126  * regions. Multiple EDMA3 Driver instances on the same shadow
127  * region are NOT allowed.
128  */
129 extern EDMA3_DRV_Instance drvInstance [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
131 /**
132  * \brief Resources bound to a Channel
133  *
134  * When a request for a channel is made, the resources PaRAM Set and TCC
135  * get bound to that channel. This information is needed internally by the
136  * driver when a request is made to free the channel (Since it is the
137  * responsibility of the driver to free up the channel-associated resources
138  * from the Resource Manager layer).
139  */
140 extern EDMA3_DRV_ChBoundResources edma3DrvChBoundRes [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_LOGICAL_CH];
142 /** Max of DMA Channels */
143 extern uint32_t edma3_dma_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
144 /** Min of Link Channels */
145 extern uint32_t edma3_link_ch_min_val[EDMA3_MAX_EDMA3_INSTANCES];
146 /** Max of Link Channels */
147 extern uint32_t edma3_link_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
148 /** Min of QDMA Channels */
149 extern uint32_t edma3_qdma_ch_min_val[EDMA3_MAX_EDMA3_INSTANCES];
150 /** Max of QDMA Channels */
151 extern uint32_t edma3_qdma_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
152 /** Max of Logical Channels */
153 extern uint32_t edma3_log_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
156 EDMA3_DRV_Result EDMA3_DRV_linkChannel (EDMA3_DRV_Handle hEdma,
157                         uint32_t lCh1, uint32_t lCh2)
158     {
159     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
160     EDMA3_DRV_Instance *drvInst = NULL;
161     EDMA3_DRV_Object *drvObject = NULL;
162     uint32_t linkBcntReld;
163     int32_t paRAM1Id = 0;
164     int32_t paRAM2Id = 0;
165     uint32_t oldTccVal = 0;
166     uint32_t optVal = 0;
167     uint32_t newOptVal = 0;
168     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
169         uint32_t edma3Id;
171 #ifdef EDMA3_INSTRUMENTATION_ENABLED
172     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
173                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
174                 EDMA3_DVT_dCOUNTER,
175                 EDMA3_DVT_dNONE,
176                 EDMA3_DVT_dNONE));
177 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
179         /* If parameter checking is enabled... */
180 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
181     if (hEdma == NULL)
182         {
183         result = EDMA3_DRV_E_INVALID_PARAM;
184         }
185 #endif
187         /* Check if the parameters are OK. */
188         if (EDMA3_DRV_SOK == result)
189         {
190         drvInst = (EDMA3_DRV_Instance *)hEdma;
191         drvObject = drvInst->pDrvObjectHandle;
193         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
194             {
195             result = EDMA3_DRV_E_INVALID_PARAM;
196             }
197         else
198             {
199             edma3Id = drvObject->phyCtrllerInstId;
200             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
201                 }
202                 }
204     if (EDMA3_DRV_SOK == result)
205     {
206         /* If parameter checking is enabled... */
207 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
208     if ((lCh1 > edma3_log_ch_max_val [edma3Id])
209         || (lCh2 > edma3_log_ch_max_val [edma3Id]))
210         {
211         result = EDMA3_DRV_E_INVALID_PARAM;
212         }
213 #endif
214     }
216         if (EDMA3_DRV_SOK == result)
217         {
218         paRAM1Id = edma3DrvChBoundRes[edma3Id][lCh1].paRAMId;
219         paRAM2Id = edma3DrvChBoundRes[edma3Id][lCh2].paRAMId;
221         if ((paRAM1Id < 0) || (paRAM1Id >= drvObject->gblCfgParams.numPaRAMSets))
222             {
223             result = EDMA3_DRV_E_INVALID_PARAM;
224             }
226         if ((paRAM2Id < 0) || (paRAM2Id >= drvObject->gblCfgParams.numPaRAMSets))
227             {
228             result = EDMA3_DRV_E_INVALID_PARAM;
229             }
230                 }
232     if (result == EDMA3_DRV_SOK)
233         {
234         /* Get the Link-bcntReload PaRAM set entry */
235         linkBcntReld = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAM1Id].OPT) +
236                             EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
237         linkBcntReld &= 0xFFFF0000U;
238         /* Update the Link field with lch2 PaRAM set */
239         linkBcntReld |= ((uint32_t)0xFFFFU & (uint32_t)(&(globalRegs->PARAMENTRY [paRAM2Id].OPT)));
241         /* Store it back */
242         *((&globalRegs->PARAMENTRY[paRAM1Id].OPT)
243                     + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = linkBcntReld;
245         /*
246         * Set the TCC field of PaRAM set associated with lch2 to
247         * the same as that of lch1. This should be done ONLY when
248         * lch2 is NOT associated with any other TCC.
249         */
250         if (edma3DrvChBoundRes[edma3Id][lCh2].tcc == EDMA3_MAX_TCC)
251                 {
252                 /* for channel 1 */
253                 optVal = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAM1Id].OPT));
254                 oldTccVal = EDMA3_DRV_OPT_TCC_GET_MASK(optVal);
256                 /* for channel 2 */
257                 optVal = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAM2Id].OPT));
258                 newOptVal = (optVal & EDMA3_DRV_OPT_TCC_CLR_MASK)
259                             |
260                             (EDMA3_DRV_OPT_TCC_SET_MASK(oldTccVal));
261                 *(&globalRegs->PARAMENTRY[paRAM2Id].OPT) = newOptVal;
262                 }
263         }
265 #ifdef EDMA3_INSTRUMENTATION_ENABLED
266     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
267                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
268                 EDMA3_DVT_dCOUNTER,
269                 EDMA3_DVT_dNONE,
270                 EDMA3_DVT_dNONE));
271 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
273     return result;
274     }
276 EDMA3_DRV_Result EDMA3_DRV_unlinkChannel (EDMA3_DRV_Handle hEdma, uint32_t lCh)
277     {
278     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
279     uint32_t linkBcntReld;
280     int32_t paRAMId = 0;
281     EDMA3_DRV_Instance *drvInst = NULL;
282     EDMA3_DRV_Object *drvObject = NULL;
283     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
284         uint32_t edma3Id;
286 #ifdef EDMA3_INSTRUMENTATION_ENABLED
287     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
288                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
289                 EDMA3_DVT_dCOUNTER,
290                 EDMA3_DVT_dNONE,
291                 EDMA3_DVT_dNONE));
292 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
294         /* If parameter checking is enabled... */
295 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
296     if (hEdma == NULL)
297         {
298         result = EDMA3_DRV_E_INVALID_PARAM;
299         }
300 #endif
302         /* Check if the parameters are OK. */
303         if (EDMA3_DRV_SOK == result)
304         {
305         drvInst = (EDMA3_DRV_Instance *)hEdma;
306         drvObject = drvInst->pDrvObjectHandle;
308         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
309             {
310             result = EDMA3_DRV_E_INVALID_PARAM;
311             }
312         else
313             {
314             edma3Id = drvObject->phyCtrllerInstId;
315             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
316                 }
317                 }
319     if (EDMA3_DRV_SOK == result)
320     {
321         /* If parameter checking is enabled... */
322 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
323     if (lCh > edma3_log_ch_max_val [edma3Id])
324         {
325         result = EDMA3_DRV_E_INVALID_PARAM;
326         }
327 #endif
328     }
330         if (EDMA3_DRV_SOK == result)
331         {
332         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
333         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
334             {
335             result = EDMA3_DRV_E_INVALID_PARAM;
336             }
337                 else
338                 {
339                 /* Get the Link-bcntReload PaRAM set entry */
340                 linkBcntReld = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT)
341                                                         + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
343                 /* Remove any linking */
344                 linkBcntReld |= 0xFFFFU;
346                 /* Store it back */
347                 *((&globalRegs->PARAMENTRY[paRAMId].OPT)
348                             + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = linkBcntReld;
349                 }
350                 }
352 #ifdef EDMA3_INSTRUMENTATION_ENABLED
353     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
354                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
355                 EDMA3_DVT_dCOUNTER,
356                 EDMA3_DVT_dNONE,
357                 EDMA3_DVT_dNONE));
358 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
360     return result;
361     }
363 EDMA3_DRV_Result EDMA3_DRV_chainChannel (EDMA3_DRV_Handle hEdma,
364                             uint32_t lCh1,
365                             uint32_t lCh2,
366                             const EDMA3_DRV_ChainOptions *chainOptions)
367     {
368     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
369     uint32_t opt = 0x0;
370     EDMA3_DRV_Instance *drvInst = NULL;
371     EDMA3_DRV_Object *drvObject = NULL;
372     int32_t paRAMId = 0;
373     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
374         uint32_t edma3Id;
376 #ifdef EDMA3_INSTRUMENTATION_ENABLED
377     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
378                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
379                 EDMA3_DVT_dCOUNTER,
380                 EDMA3_DVT_dNONE,
381                 EDMA3_DVT_dNONE));
382 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
384         /* If parameter checking is enabled... */
385 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
386     if (hEdma == NULL)
387         {
388         result = EDMA3_DRV_E_INVALID_PARAM;
389         }
391     if (chainOptions == NULL)
392         {
393         result = EDMA3_DRV_E_INVALID_PARAM;
394         }
395 #endif
397     if (result == EDMA3_DRV_SOK)
398         {
399         drvInst = (EDMA3_DRV_Instance *)hEdma;
400         drvObject = drvInst->pDrvObjectHandle;
402         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
403             {
404             result =  EDMA3_DRV_E_INVALID_PARAM;
405             }
406         else
407             {
408             edma3Id = drvObject->phyCtrllerInstId;
409             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
410                 }
411                 }
413     if (EDMA3_DRV_SOK == result)
414     {
415         /* If parameter checking is enabled... */
416 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
417     if ((lCh1 > edma3_log_ch_max_val [edma3Id])
418                         || (lCh2 > edma3_dma_ch_max_val [edma3Id]))
419         {
420         result = EDMA3_DRV_E_INVALID_PARAM;
421         }
422 #endif
423     }
425         if (EDMA3_DRV_SOK == result)
426         {
427         paRAMId = edma3DrvChBoundRes[edma3Id][lCh1].paRAMId;
428         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
429             {
430             result = EDMA3_DRV_E_INVALID_PARAM;
431             }
432                 }
434     if (result == EDMA3_DRV_SOK)
435         {
436         opt = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAMId].OPT));
438         /* set Transfer complete chaining */
439         if (chainOptions->tcchEn == EDMA3_DRV_TCCHEN_EN)
440             {
441             opt |= EDMA3_DRV_OPT_TCCHEN_SET_MASK(1U);
442             }
443         else
444             {
445             opt &= EDMA3_DRV_OPT_TCCHEN_CLR_MASK;
446             }
448         /*set Intermediate transfer completion chaining */
449         if (chainOptions->itcchEn == EDMA3_DRV_ITCCHEN_EN)
450             {
451             opt |= EDMA3_DRV_OPT_ITCCHEN_SET_MASK(1U);
452             }
453         else
454             {
455             opt &= EDMA3_DRV_OPT_ITCCHEN_CLR_MASK;
456             }
458         /*set Transfer complete interrupt */
459         if (chainOptions->tcintEn == EDMA3_DRV_TCINTEN_EN)
460             {
461             opt |= EDMA3_DRV_OPT_TCINTEN_SET_MASK(1U);
462             }
463         else
464             {
465             opt &= EDMA3_DRV_OPT_TCINTEN_CLR_MASK;
466             }
468         /*set Intermediate transfer completion interrupt */
469         if (chainOptions->itcintEn == EDMA3_DRV_ITCINTEN_EN)
470             {
471             opt |= EDMA3_DRV_OPT_ITCINTEN_SET_MASK(1U);
472             }
473         else
474             {
475             opt &= EDMA3_DRV_OPT_ITCINTEN_CLR_MASK;
476             }
478         opt &= EDMA3_DRV_OPT_TCC_CLR_MASK;
479         opt |= EDMA3_DRV_OPT_TCC_SET_MASK(lCh2);
481         *(&globalRegs->PARAMENTRY[paRAMId].OPT) = opt;
483         /* Set the trigger mode of lch2 as the same as of lch1 */
484         edma3DrvChBoundRes[edma3Id][lCh2].trigMode =
485                     edma3DrvChBoundRes[edma3Id][lCh1].trigMode;
486         }
488 #ifdef EDMA3_INSTRUMENTATION_ENABLED
489     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
490                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
491                 EDMA3_DVT_dCOUNTER,
492                 EDMA3_DVT_dNONE,
493                 EDMA3_DVT_dNONE));
494 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
496     return result;
497     }
499 EDMA3_DRV_Result EDMA3_DRV_unchainChannel (EDMA3_DRV_Handle hEdma,
500                     uint32_t lCh)
501     {
502     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
503     uint32_t opt;
504     EDMA3_DRV_Instance *drvInst = NULL;
505     EDMA3_DRV_Object *drvObject = NULL;
506     int32_t paRAMId = 0;
507     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
508         uint32_t edma3Id;
510 #ifdef EDMA3_INSTRUMENTATION_ENABLED
511     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
512                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
513                 EDMA3_DVT_dCOUNTER,
514                 EDMA3_DVT_dNONE,
515                 EDMA3_DVT_dNONE));
516 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
518         /* If parameter checking is enabled... */
519 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
520     if (hEdma == NULL)
521         {
522         result = EDMA3_DRV_E_INVALID_PARAM;
523         }
524 #endif
526     if (result == EDMA3_DRV_SOK)
527         {
528         drvInst = (EDMA3_DRV_Instance *)hEdma;
529         drvObject = drvInst->pDrvObjectHandle;
531         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
532             {
533             result =  EDMA3_DRV_E_INVALID_PARAM;
534             }
535         else
536             {
537             edma3Id = drvObject->phyCtrllerInstId;
538             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
539                 }
540                 }
542     if (result == EDMA3_DRV_SOK)
543     {
544         /* If parameter checking is enabled... */
545 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
546     if (lCh > edma3_log_ch_max_val [edma3Id])
547         {
548         result = EDMA3_DRV_E_INVALID_PARAM;
549         }
550 #endif
551     }
552         
553         if (EDMA3_DRV_SOK == result)
554         {
555         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
556         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
557             {
558             result = EDMA3_DRV_E_INVALID_PARAM;
559             }
560                 }
562     if (result == EDMA3_DRV_SOK)
563         {
564         opt = (uint32_t)(*(&globalRegs->PARAMENTRY [paRAMId].OPT));
566         /* Reset TCCHEN */
567         opt &= EDMA3_DRV_OPT_TCCHEN_CLR_MASK;
568         /* Reset ITCCHEN */
569         opt &= EDMA3_DRV_OPT_ITCCHEN_CLR_MASK;
571         *(&globalRegs->PARAMENTRY[paRAMId].OPT) = opt;
572         }
574 #ifdef EDMA3_INSTRUMENTATION_ENABLED
575     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
576                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
577                 EDMA3_DVT_dCOUNTER,
578                 EDMA3_DVT_dNONE,
579                 EDMA3_DVT_dNONE));
580 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
582     return result;
583     }
585 EDMA3_DRV_Result EDMA3_DRV_setQdmaTrigWord (EDMA3_DRV_Handle hEdma,
586                     uint32_t lCh,
587                     EDMA3_RM_QdmaTrigWord trigWord)
588     {
589     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
590     EDMA3_DRV_Instance *drvInst = NULL;
591     EDMA3_DRV_Object *drvObject = NULL;
592     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
593         uint32_t edma3Id;
595 #ifdef EDMA3_INSTRUMENTATION_ENABLED
596     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
597                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
598                 EDMA3_DVT_dCOUNTER,
599                 EDMA3_DVT_dNONE,
600                 EDMA3_DVT_dNONE));
601 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
603         /* If parameter checking is enabled... */
604 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
605     if((hEdma == NULL)
606         || (((int32_t)trigWord < (int32_t)EDMA3_RM_QDMA_TRIG_OPT)
607         || (trigWord > EDMA3_RM_QDMA_TRIG_CCNT)))
608         {
609         result = EDMA3_DRV_E_INVALID_PARAM;
610         }
611 #endif
613         /* Check if the parameters are OK. */
614         if (EDMA3_DRV_SOK == result)
615         {
616         drvInst = (EDMA3_DRV_Instance *)hEdma;
617         drvObject = drvInst->pDrvObjectHandle;
619         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
620             {
621             result = EDMA3_DRV_E_INVALID_PARAM;
622             }
623         else
624             {
625             edma3Id = drvObject->phyCtrllerInstId;
626             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
627                 }
628                 }
630     if (result == EDMA3_DRV_SOK)
631     {
632         /* If parameter checking is enabled... */
633 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
634     if ((lCh < edma3_qdma_ch_min_val[edma3Id])
635         || (lCh > edma3_qdma_ch_max_val[edma3Id]))
636         {
637         result = EDMA3_DRV_E_INVALID_PARAM;
638         }
639 #endif
640     }
642         if (EDMA3_DRV_SOK == result)
643         {
644         globalRegs->QCHMAP[lCh - edma3_qdma_ch_min_val[edma3Id]]
645                                         &= EDMA3_DRV_QCH_TRWORD_CLR_MASK;
646         globalRegs->QCHMAP[lCh - edma3_qdma_ch_min_val[edma3Id]]
647                                         |= EDMA3_DRV_QCH_TRWORD_SET_MASK(trigWord);
648         }
650 #ifdef EDMA3_INSTRUMENTATION_ENABLED
651     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
652                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
653                 EDMA3_DVT_dCOUNTER,
654                 EDMA3_DVT_dNONE,
655                 EDMA3_DVT_dNONE));
656 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
658     return result;
659     }
661 EDMA3_DRV_Result EDMA3_DRV_setPaRAM (EDMA3_DRV_Handle hEdma,
662                     uint32_t lCh,
663                     const EDMA3_DRV_PaRAMRegs *newPaRAM)
664     {
665     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
666     EDMA3_DRV_Instance *drvInst = NULL;
667     EDMA3_DRV_Object *drvObject = NULL;
668     int32_t paRAMId = 0;
669     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
670         uint32_t edma3Id;
672 #ifdef EDMA3_INSTRUMENTATION_ENABLED
673     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
674                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
675                 EDMA3_DVT_dCOUNTER,
676                 EDMA3_DVT_dNONE,
677                 EDMA3_DVT_dNONE));
678 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
680         /* If parameter checking is enabled... */
681 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
682     if ((hEdma == NULL) || (newPaRAM == NULL))
683         {
684         result = EDMA3_DRV_E_INVALID_PARAM;
685         }
686 #endif
688     if (result == EDMA3_DRV_SOK)
689         {
690         drvInst = (EDMA3_DRV_Instance *)hEdma;
691         drvObject = drvInst->pDrvObjectHandle;
693         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
694             {
695             result = EDMA3_DRV_E_INVALID_PARAM;
696             }
697         else
698             {
699             edma3Id = drvObject->phyCtrllerInstId;
700             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
701                 }
702                 }
704     if (result == EDMA3_DRV_SOK)
705     {
706         /* If parameter checking is enabled... */
707 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
708     if (lCh > edma3_log_ch_max_val [edma3Id])
709         {
710         result = EDMA3_DRV_E_INVALID_PARAM;
711         }
712 #endif
713     }
714         if (EDMA3_DRV_SOK == result)
715         {
716         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
717         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
718             {
719             result = EDMA3_DRV_E_INVALID_PARAM;
720             }
721                 }
723     if (result == EDMA3_DRV_SOK)
724         {
725                 edma3ParamCpy ((volatile void *)(&(globalRegs->PARAMENTRY[paRAMId].OPT)),
726             (const void *)newPaRAM);
727         }
729 #ifdef EDMA3_INSTRUMENTATION_ENABLED
730     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
731                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
732                 EDMA3_DVT_dCOUNTER,
733                 EDMA3_DVT_dNONE,
734                 EDMA3_DVT_dNONE));
735 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
737     return result;
738     }
740 EDMA3_DRV_Result EDMA3_DRV_getPaRAM (EDMA3_DRV_Handle hEdma,
741                     uint32_t lCh,
742                     EDMA3_DRV_PaRAMRegs *currPaRAM)
743     {
744     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
745     EDMA3_DRV_Instance *drvInst = NULL;
746     EDMA3_DRV_Object *drvObject = NULL;
747     int32_t paRAMId = 0;
748     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
749         uint32_t edma3Id;
751 #ifdef EDMA3_INSTRUMENTATION_ENABLED
752     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
753                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
754                 EDMA3_DVT_dCOUNTER,
755                 EDMA3_DVT_dNONE,
756                 EDMA3_DVT_dNONE));
757 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
759         /* If parameter checking is enabled... */
760 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
761     if ((hEdma == NULL) || (currPaRAM == NULL))
762         {
763         result = EDMA3_DRV_E_INVALID_PARAM;
764         }
765 #endif
767     if (result == EDMA3_DRV_SOK)
768         {
769         drvInst = (EDMA3_DRV_Instance *)hEdma;
770         drvObject = drvInst->pDrvObjectHandle;
772         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
773             {
774             result = EDMA3_DRV_E_INVALID_PARAM;
775             }
776         else
777             {
778             edma3Id = drvObject->phyCtrllerInstId;
779             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
780                 }
781                 }
783     if (result == EDMA3_DRV_SOK)
784     {
785         /* If parameter checking is enabled... */
786 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
787     if (lCh > edma3_log_ch_max_val [edma3Id])
788         {
789         result = EDMA3_DRV_E_INVALID_PARAM;
790         }
791 #endif
792     }
793         if (EDMA3_DRV_SOK == result)
794         {
795         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
796         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
797             {
798             result = EDMA3_DRV_E_INVALID_PARAM;
799             }
800                 }
802     if (result == EDMA3_DRV_SOK)
803         {
804                 edma3ParamCpy ((void *)currPaRAM,
805                                         (const volatile void *)(&(globalRegs->PARAMENTRY [paRAMId].OPT)));
806         }
808 #ifdef EDMA3_INSTRUMENTATION_ENABLED
809     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
810                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
811                 EDMA3_DVT_dCOUNTER,
812                 EDMA3_DVT_dNONE,
813                 EDMA3_DVT_dNONE));
814 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
816     return result;
817     }
819 EDMA3_DRV_Result EDMA3_DRV_setPaRAMEntry (EDMA3_DRV_Handle hEdma,
820                     uint32_t lCh,
821                     EDMA3_DRV_PaRAMEntry paRAMEntry,
822                     uint32_t newPaRAMEntryVal)
823     {
824     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
825     EDMA3_DRV_Instance *drvInst = NULL;
826     EDMA3_DRV_Object *drvObject = NULL;
827     int32_t paRAMId = 0;
828     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
829         uint32_t edma3Id;
831 #ifdef EDMA3_INSTRUMENTATION_ENABLED
832     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
833                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
834                 EDMA3_DVT_dCOUNTER,
835                 EDMA3_DVT_dNONE,
836                 EDMA3_DVT_dNONE));
837 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
839         /* If parameter checking is enabled... */
840 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
841     if((hEdma == NULL)
842         || (((int32_t)paRAMEntry < (int32_t)EDMA3_DRV_PARAM_ENTRY_OPT)
843         || (paRAMEntry > EDMA3_DRV_PARAM_ENTRY_CCNT)))
844         {
845         result = EDMA3_DRV_E_INVALID_PARAM;
846         }
847 #endif
849         /* Check if the parameters are OK. */
850         if (EDMA3_DRV_SOK == result)
851         {
852         drvInst = (EDMA3_DRV_Instance *)hEdma;
853         drvObject = drvInst->pDrvObjectHandle;
855         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
856             {
857             result = EDMA3_DRV_E_INVALID_PARAM;
858             }
859         else
860             {
861             edma3Id = drvObject->phyCtrllerInstId;
862             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
863                 }
864                 }
866     if (result == EDMA3_DRV_SOK)
867     {
868         /* If parameter checking is enabled... */
869 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
870     if (lCh > edma3_log_ch_max_val [edma3Id])
871         {
872         result = EDMA3_DRV_E_INVALID_PARAM;
873         }
874 #endif
875     }
876     if (EDMA3_DRV_SOK == result)
877         {
878         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
879         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
880             {
881             result = EDMA3_DRV_E_INVALID_PARAM;
882             }
883         else
884             {
885             *((&globalRegs->PARAMENTRY[paRAMId].OPT) +
886                                         (uint32_t)paRAMEntry) = newPaRAMEntryVal;
887             }
888                 }
890 #ifdef EDMA3_INSTRUMENTATION_ENABLED
891     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
892                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
893                 EDMA3_DVT_dCOUNTER,
894                 EDMA3_DVT_dNONE,
895                 EDMA3_DVT_dNONE));
896 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
898     return result;
899     }
901 EDMA3_DRV_Result EDMA3_DRV_getPaRAMEntry (EDMA3_DRV_Handle hEdma,
902                     uint32_t lCh,
903                     EDMA3_DRV_PaRAMEntry paRAMEntry,
904                     uint32_t *paRAMEntryVal)
905     {
906     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
907     EDMA3_DRV_Instance *drvInst = NULL;
908     EDMA3_DRV_Object *drvObject = NULL;
909     int32_t paRAMId = 0;
910     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
911         uint32_t edma3Id;
913 #ifdef EDMA3_INSTRUMENTATION_ENABLED
914     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
915                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
916                 EDMA3_DVT_dCOUNTER,
917                 EDMA3_DVT_dNONE,
918                 EDMA3_DVT_dNONE));
919 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
921         /* If parameter checking is enabled... */
922 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
923     if((hEdma == NULL) || (paRAMEntryVal == NULL))
924         {
925         result = EDMA3_DRV_E_INVALID_PARAM;
926         }
928     if(((int32_t)paRAMEntry < (int32_t)EDMA3_DRV_PARAM_ENTRY_OPT)
929         || (paRAMEntry > EDMA3_DRV_PARAM_ENTRY_CCNT))
930         {
931         result = EDMA3_DRV_E_INVALID_PARAM;
932         }
933 #endif
935         /* Check if the parameters are OK. */
936         if (EDMA3_DRV_SOK == result)
937         {
938         drvInst = (EDMA3_DRV_Instance *)hEdma;
939         drvObject = drvInst->pDrvObjectHandle;
941         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
942             {
943             result = EDMA3_DRV_E_INVALID_PARAM;
944             }
945         else
946             {
947             edma3Id = drvObject->phyCtrllerInstId;
948             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
949                 }
950                 }
952     if (result == EDMA3_DRV_SOK)
953     {
954         /* If parameter checking is enabled... */
955 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
956     if (lCh > edma3_log_ch_max_val [edma3Id])
957         {
958         result = EDMA3_DRV_E_INVALID_PARAM;
959         }
960 #endif
961     }
962         
963     if (EDMA3_DRV_SOK == result)
964         {
965         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
966         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
967             {
968             result = EDMA3_DRV_E_INVALID_PARAM;
969             }
970                 else
971             {
972             *paRAMEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT)
973                                                                                                         + (uint32_t)paRAMEntry));
974             }
975                 }
977 #ifdef EDMA3_INSTRUMENTATION_ENABLED
978     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
979                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
980                 EDMA3_DVT_dCOUNTER,
981                 EDMA3_DVT_dNONE,
982                 EDMA3_DVT_dNONE));
983 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
985     return result;
986     }
988 EDMA3_DRV_Result EDMA3_DRV_setPaRAMField (EDMA3_DRV_Handle hEdma,
989                         uint32_t lCh,
990                         EDMA3_DRV_PaRAMField paRAMField,
991                         uint32_t newPaRAMFieldVal)
992     {
993     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
994     EDMA3_DRV_Instance *drvInst = NULL;
995     EDMA3_DRV_Object *drvObject = NULL;
996     uint32_t paramEntryVal = 0;
997     int32_t paRAMId = 0;
998     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
999         uint32_t edma3Id;
1001 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1002     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1003                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1004                 EDMA3_DVT_dCOUNTER,
1005                 EDMA3_DVT_dNONE,
1006                 EDMA3_DVT_dNONE));
1007 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1009         /* If parameter checking is enabled... */
1010 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1011     if((hEdma == NULL)
1012         || (((int32_t)paRAMField < (int32_t)EDMA3_DRV_PARAM_FIELD_OPT)
1013         || (paRAMField > EDMA3_DRV_PARAM_FIELD_CCNT)))
1014         {
1015         result =  EDMA3_DRV_E_INVALID_PARAM;
1016         }
1017 #endif
1019     if (result == EDMA3_DRV_SOK)
1020         {
1021         drvInst = (EDMA3_DRV_Instance *)hEdma;
1022         drvObject = drvInst->pDrvObjectHandle;
1024         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1025             {
1026             result =  EDMA3_DRV_E_INVALID_PARAM;
1027             }
1028         else
1029             {
1030             edma3Id = drvObject->phyCtrllerInstId;
1031             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1032                 }
1033                 }
1035     if (result == EDMA3_DRV_SOK)
1036     {
1037         /* If parameter checking is enabled... */
1038 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1039     /*
1040     * THIS API IS NOT ALLOWED FOR QDMA CHANNELS.
1041     * Reason being setting one PaRAM field might trigger the
1042     * transfer if the word written happends to be the trigger
1043     * word. One should use EDMA3_DRV_setPaRAMEntry ()
1044     * API instead to write the whole 32 bit word.
1045     */
1046     if ((lCh <= edma3_qdma_ch_min_val[edma3Id])
1047                         && (lCh >= edma3_qdma_ch_max_val[edma3Id]))
1048         {
1049         result = EDMA3_DRV_E_INVALID_PARAM;
1050         }
1052     if (lCh > edma3_log_ch_max_val [edma3Id])
1053         {
1054         result = EDMA3_DRV_E_INVALID_PARAM;
1055         }
1056 #endif
1057     }
1059         if (EDMA3_DRV_SOK == result)
1060         {
1061         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
1062         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
1063             {
1064             result = EDMA3_DRV_E_INVALID_PARAM;
1065             }
1066                 }
1068     if (result == EDMA3_DRV_SOK)
1069         {
1070         switch (paRAMField)
1071             {
1072             case EDMA3_DRV_PARAM_FIELD_OPT:
1073                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_OPT) = newPaRAMFieldVal;
1074                 break;
1076             case EDMA3_DRV_PARAM_FIELD_SRCADDR:
1077                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC) = newPaRAMFieldVal;
1078                 break;
1080             case EDMA3_DRV_PARAM_FIELD_ACNT:
1081                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1082                 paramEntryVal &= 0xFFFF0000U;
1083                 newPaRAMFieldVal &= 0x0000FFFFU;
1084                 paramEntryVal |= newPaRAMFieldVal;
1085                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT) = paramEntryVal;
1086                 break;
1088             case EDMA3_DRV_PARAM_FIELD_BCNT:
1089                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1090                 paramEntryVal &= 0x0000FFFFU;
1091                 newPaRAMFieldVal <<= 0x10U;
1092                 paramEntryVal |= newPaRAMFieldVal;
1093                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT) = paramEntryVal;
1094                 break;
1096             case EDMA3_DRV_PARAM_FIELD_DESTADDR:
1097                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_DST) = newPaRAMFieldVal;
1098                 break;
1100             case EDMA3_DRV_PARAM_FIELD_SRCBIDX:
1101                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1102                 paramEntryVal &= 0xFFFF0000U;
1103                 newPaRAMFieldVal &= 0x0000FFFFU;
1104                 paramEntryVal |= newPaRAMFieldVal;
1105                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX) = paramEntryVal;
1106                 break;
1108             case EDMA3_DRV_PARAM_FIELD_DESTBIDX:
1109                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1110                 paramEntryVal &= 0x0000FFFFU;
1111                 newPaRAMFieldVal <<= 0x10U;
1112                 paramEntryVal |= newPaRAMFieldVal;
1113                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX) = paramEntryVal;
1114                 break;
1116             case EDMA3_DRV_PARAM_FIELD_LINKADDR:
1117                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1118                 paramEntryVal &= 0xFFFF0000U;
1119                 newPaRAMFieldVal &= 0x0000FFFFU;
1120                 paramEntryVal |= newPaRAMFieldVal;
1121                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = paramEntryVal;
1122                 break;
1124             case EDMA3_DRV_PARAM_FIELD_BCNTRELOAD:
1125                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1126                 paramEntryVal &= 0x0000FFFFU;
1127                 newPaRAMFieldVal <<= 0x10U;
1128                 paramEntryVal |= newPaRAMFieldVal;
1129                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = paramEntryVal;
1130                 break;
1132             case EDMA3_DRV_PARAM_FIELD_SRCCIDX:
1133                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1134                 paramEntryVal &= 0xFFFF0000U;
1135                 newPaRAMFieldVal &= 0x0000FFFFU;
1136                 paramEntryVal |= newPaRAMFieldVal;
1137                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX) = paramEntryVal;
1138                 break;
1140             case EDMA3_DRV_PARAM_FIELD_DESTCIDX:
1141                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1142                 paramEntryVal &= 0x0000FFFFU;
1143                 newPaRAMFieldVal <<= 0x10U;
1144                 paramEntryVal |= newPaRAMFieldVal;
1145                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX) = paramEntryVal;
1146                 break;
1148             case EDMA3_DRV_PARAM_FIELD_CCNT:
1149                 newPaRAMFieldVal &= 0x0000FFFFU;
1150                 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_CCNT) = newPaRAMFieldVal;
1151                 break;
1153             default:
1154                 break;
1155             }
1156         }
1158 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1159     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1160                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1161                 EDMA3_DVT_dCOUNTER,
1162                 EDMA3_DVT_dNONE,
1163                 EDMA3_DVT_dNONE));
1164 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1166     return result;
1167     }
1169 EDMA3_DRV_Result EDMA3_DRV_getPaRAMField (EDMA3_DRV_Handle hEdma,
1170                         uint32_t lCh,
1171                         EDMA3_DRV_PaRAMField paRAMField,
1172                         uint32_t *currPaRAMFieldVal)
1173     {
1174     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1175     EDMA3_DRV_Instance *drvInst = NULL;
1176     EDMA3_DRV_Object *drvObject = NULL;
1177     uint32_t paramEntryVal = 0;
1178     int32_t paRAMId = 0;
1179     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1180         uint32_t edma3Id;
1182 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1183     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1184                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1185                 EDMA3_DVT_dCOUNTER,
1186                 EDMA3_DVT_dNONE,
1187                 EDMA3_DVT_dNONE));
1188 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1190         /* If parameter checking is enabled... */
1191 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1192     if ((hEdma == NULL) || (currPaRAMFieldVal == NULL))
1193         {
1194         result =  EDMA3_DRV_E_INVALID_PARAM;
1195         }
1197     if(((int32_t)paRAMField < (int32_t)EDMA3_DRV_PARAM_FIELD_OPT)
1198        || (paRAMField > EDMA3_DRV_PARAM_FIELD_CCNT))
1199         {
1200         result =  EDMA3_DRV_E_INVALID_PARAM;
1201         }
1202 #endif
1204     if (result == EDMA3_DRV_SOK)
1205         {
1206         drvInst = (EDMA3_DRV_Instance *)hEdma;
1207         drvObject = drvInst->pDrvObjectHandle;
1209         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1210             {
1211             result =  EDMA3_DRV_E_INVALID_PARAM;
1212             }
1213         else
1214             {
1215             edma3Id = drvObject->phyCtrllerInstId;
1216             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1217                 }
1218                 }
1220     if (result == EDMA3_DRV_SOK)
1221     {
1222         /* If parameter checking is enabled... */
1223 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1224     if (lCh > edma3_log_ch_max_val [edma3Id])
1225         {
1226         result = EDMA3_DRV_E_INVALID_PARAM;
1227         }
1228 #endif
1229     }
1230         
1231         if (EDMA3_DRV_SOK == result)
1232         {
1233         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
1234         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
1235             {
1236             result = EDMA3_DRV_E_INVALID_PARAM;
1237             }
1238                 }
1240     if (result == EDMA3_DRV_SOK)
1241         {
1242         switch (paRAMField)
1243             {
1244             case EDMA3_DRV_PARAM_FIELD_OPT:
1245                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_OPT));
1246                 break;
1248             case EDMA3_DRV_PARAM_FIELD_SRCADDR:
1249                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC));
1250                 break;
1252             case EDMA3_DRV_PARAM_FIELD_ACNT:
1253                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1254                 paramEntryVal &= 0x0000FFFFU;
1255                 *currPaRAMFieldVal = paramEntryVal;
1256                 break;
1258             case EDMA3_DRV_PARAM_FIELD_BCNT:
1259                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));
1260                 paramEntryVal = paramEntryVal >> 0x10U;
1261                 *currPaRAMFieldVal = paramEntryVal;
1262                 break;
1264             case EDMA3_DRV_PARAM_FIELD_DESTADDR:
1265                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_DST));
1266                 break;
1268             case EDMA3_DRV_PARAM_FIELD_SRCBIDX:
1269                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1270                 paramEntryVal &= 0x0000FFFFU;
1271                 *currPaRAMFieldVal = paramEntryVal;
1272                 break;
1274             case EDMA3_DRV_PARAM_FIELD_DESTBIDX:
1275                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));
1276                 paramEntryVal = paramEntryVal >> 0x10U;
1277                 *currPaRAMFieldVal = paramEntryVal;
1278                 break;
1280             case EDMA3_DRV_PARAM_FIELD_LINKADDR:
1281                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1282                 paramEntryVal &= 0x0000FFFFU;
1283                 *currPaRAMFieldVal = paramEntryVal;
1284                 break;
1286             case EDMA3_DRV_PARAM_FIELD_BCNTRELOAD:
1287                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));
1288                 paramEntryVal = paramEntryVal >> 0x10U;
1289                 *currPaRAMFieldVal = paramEntryVal;
1290                 break;
1292             case EDMA3_DRV_PARAM_FIELD_SRCCIDX:
1293                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1294                 paramEntryVal &= 0x0000FFFFU;
1295                 *currPaRAMFieldVal = paramEntryVal;
1296                 break;
1298             case EDMA3_DRV_PARAM_FIELD_DESTCIDX:
1299                 paramEntryVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));
1300                 paramEntryVal = paramEntryVal >> 0x10U;
1301                 *currPaRAMFieldVal = paramEntryVal;
1302                 break;
1304             case EDMA3_DRV_PARAM_FIELD_CCNT:
1305                 *currPaRAMFieldVal = (uint32_t)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + EDMA3_DRV_PARAM_ENTRY_CCNT));
1306                 break;
1308             default:
1309                 break;
1310             }
1311         }
1313 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1314     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1315                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1316                 EDMA3_DVT_dCOUNTER,
1317                 EDMA3_DVT_dNONE,
1318                 EDMA3_DVT_dNONE));
1319 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1321     return result;
1322     }
1324 EDMA3_DRV_Result EDMA3_DRV_setEvtQPriority (EDMA3_DRV_Handle hEdma,
1325                         const EDMA3_DRV_EvtQuePriority *evtQPriObj)
1326     {
1327     uint32_t intState;
1328     EDMA3_DRV_Instance *drvInst = NULL;
1329     EDMA3_DRV_Object *drvObject = NULL;
1330     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1331     uint32_t evtQNum = 0;
1332     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1334 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1335     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1336                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1337                 EDMA3_DVT_dCOUNTER,
1338                 EDMA3_DVT_dNONE,
1339                 EDMA3_DVT_dNONE));
1340 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1342         /* If parameter checking is enabled... */
1343 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1344     if ((hEdma == NULL) || (evtQPriObj== NULL))
1345         {
1346         result =  EDMA3_DRV_E_INVALID_PARAM;
1347         }
1348 #endif
1350         /* Check if the parameters are OK. */
1351         if (EDMA3_DRV_SOK == result)
1352         {
1353         drvInst = (EDMA3_DRV_Instance *)hEdma;
1354         drvObject = drvInst->pDrvObjectHandle;
1356         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1357             {
1358             result =  EDMA3_DRV_E_INVALID_PARAM;
1359             }
1360         else
1361             {
1362             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1364                         /* If parameter checking is enabled... */
1365 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1366             /* check event queue priority first*/
1367             while (evtQNum < drvObject->gblCfgParams.numEvtQueue)
1368                 {
1369                 if (evtQPriObj->evtQPri[evtQNum] > EDMA3_DRV_QPRIORITY_MAX_VAL)
1370                     {
1371                     result = EDMA3_DRV_E_INVALID_PARAM;
1372                     break;
1373                     }
1374                 evtQNum++;
1375                 }
1376 #endif
1378             if (result == EDMA3_DRV_SOK)
1379                 {
1380                 edma3OsProtectEntry (drvObject->phyCtrllerInstId,
1381                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1382                                                                         &intState);
1384                 /* Set TC Priority among system-wide bus-masters and Queue Watermark Level */
1385                 evtQNum = 0;
1386                 while (evtQNum < drvObject->gblCfgParams.numEvtQueue)
1387                     {
1388                     globalRegs->QUEPRI = globalRegs->QUEPRI &  EDMA3_RM_QUEPRI_CLR_MASK(evtQNum);
1389                     globalRegs->QUEPRI |= EDMA3_RM_QUEPRI_SET_MASK(evtQNum, evtQPriObj->evtQPri[evtQNum]);
1391                     evtQNum++;
1392                     }
1394                 edma3OsProtectExit (drvObject->phyCtrllerInstId,
1395                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1396                                                                         intState);
1397                 }
1398             }
1399         }
1401 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1402     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1403                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1404                 EDMA3_DVT_dCOUNTER,
1405                 EDMA3_DVT_dNONE,
1406                 EDMA3_DVT_dNONE));
1407 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1409     return result;
1410     }
1412 EDMA3_DRV_Result EDMA3_DRV_mapChToEvtQ(EDMA3_DRV_Handle hEdma,
1413                                 uint32_t channelId,
1414                                 EDMA3_RM_EventQueue eventQ)
1415     {
1416     EDMA3_DRV_Instance *drvInst = NULL;
1417     EDMA3_DRV_Object *drvObject = NULL;
1418     uint32_t intState;
1419     uint32_t edma3Id;
1420     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1421     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1423 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1424     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1425                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1426                 EDMA3_DVT_dCOUNTER,
1427                 EDMA3_DVT_dNONE,
1428                 EDMA3_DVT_dNONE));
1429 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1431         /* If parameter checking is enabled... */
1432 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1433     if (hEdma == NULL)
1434         {
1435         result = EDMA3_DRV_E_INVALID_PARAM;
1436         }
1437 #endif
1439     if (result == EDMA3_DRV_SOK)
1440         {
1441         drvInst = (EDMA3_DRV_Instance *)hEdma;
1442         drvObject = drvInst->pDrvObjectHandle;
1444         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1445             {
1446             result =  EDMA3_DRV_E_INVALID_PARAM;
1447             }
1448         else
1449             {
1450             edma3Id = drvObject->phyCtrllerInstId;
1451             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1452                 }
1453                 }
1455     if (result == EDMA3_DRV_SOK)
1456     {
1457         /* If parameter checking is enabled... */
1458 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1459     if (channelId > edma3_log_ch_max_val [edma3Id])
1460         {
1461         result = EDMA3_DRV_E_INVALID_PARAM;
1462         }
1464     }
1466     if (result == EDMA3_DRV_SOK)
1467     {
1468     /* Check the event queue */
1469     if (eventQ >= drvObject->gblCfgParams.numEvtQueue)
1470         {
1471         result = EDMA3_DRV_E_INVALID_PARAM;
1472         }
1473 #endif
1474     }
1475     if (result == EDMA3_DRV_SOK)
1476         {
1477         if (channelId <= edma3_dma_ch_max_val [edma3Id])
1478             {
1479             /* DMA channel */
1480             edma3OsProtectEntry (edma3Id,
1481                                                 (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1482                                                 &intState);
1484             globalRegs->DMAQNUM[channelId >> 3U] &=
1485                                         EDMA3_DRV_DMAQNUM_CLR_MASK(channelId);
1486             globalRegs->DMAQNUM[channelId >> 3U] |=
1487                                 EDMA3_DRV_DMAQNUM_SET_MASK(channelId, eventQ);
1489             edma3OsProtectExit(edma3Id,
1490                                                                 (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1491                                                                 intState);
1492             }
1493         else
1494             {
1495             if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
1496                      && (channelId <= edma3_qdma_ch_max_val[edma3Id]))
1497                 {
1498                 /* QDMA channel */
1499                 edma3OsProtectEntry (edma3Id,
1500                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1501                                                         &intState);
1503                 globalRegs->QDMAQNUM &=
1504                         EDMA3_DRV_QDMAQNUM_CLR_MASK(channelId-edma3_qdma_ch_min_val[edma3Id]);
1505                 globalRegs->QDMAQNUM |=
1506                                         EDMA3_DRV_QDMAQNUM_SET_MASK(channelId-edma3_qdma_ch_min_val[edma3Id], eventQ);
1508                 edma3OsProtectExit(edma3Id,
1509                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1510                                                                         intState);
1511                 }
1512             else
1513                 {
1514                 /* API valid for DMA/QDMA channel only, return error... */
1515                 result = EDMA3_DRV_E_INVALID_PARAM;
1516                 }
1517             }
1518         }
1520 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1521     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1522                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1523                 EDMA3_DVT_dCOUNTER,
1524                 EDMA3_DVT_dNONE,
1525                 EDMA3_DVT_dNONE));
1526 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1528     return result;
1529     }
1531 EDMA3_DRV_Result EDMA3_DRV_getMapChToEvtQ (EDMA3_DRV_Handle hEdma,
1532                                     uint32_t channelId,
1533                                     uint32_t *mappedEvtQ)
1534     {
1535     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1536     EDMA3_DRV_Instance *drvInst = NULL;
1537     EDMA3_DRV_Object *drvObject = NULL;
1538     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1539     uint32_t edma3Id;
1541 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1542     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1543                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1544                 EDMA3_DVT_dCOUNTER,
1545                 EDMA3_DVT_dNONE,
1546                 EDMA3_DVT_dNONE));
1547 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1549         /* If parameter checking is enabled... */
1550 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1551     if ((hEdma == NULL) || (mappedEvtQ == NULL))
1552         {
1553         result =  EDMA3_DRV_E_INVALID_PARAM;
1554         }
1555 #endif
1557         /* Check if the parameters are OK. */
1558         if (EDMA3_DRV_SOK == result)
1559         {
1560         drvInst = (EDMA3_DRV_Instance *)hEdma;
1561         drvObject = drvInst->pDrvObjectHandle;
1563         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1564             {
1565             result = EDMA3_DRV_E_INVALID_PARAM;
1566             }
1567                 }
1569         if (EDMA3_DRV_SOK == result)
1570                 {
1571         globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1572                 edma3Id = drvObject->phyCtrllerInstId;
1574         if (channelId <= edma3_dma_ch_max_val [edma3Id])
1575             {
1576             *mappedEvtQ = ((globalRegs->DMAQNUM[channelId >> 3U])
1577                             & (~(EDMA3_DRV_DMAQNUM_CLR_MASK(channelId))))
1578                               >> ((channelId%8U)*4U);
1579             }
1580         else
1581             {
1582             if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
1583                  &&(channelId <= edma3_qdma_ch_max_val[edma3Id]))
1584                 {
1585                 *mappedEvtQ = ((globalRegs->QDMAQNUM)
1586                                 & (~(EDMA3_DRV_QDMAQNUM_CLR_MASK(channelId - edma3_qdma_ch_min_val[edma3Id]))))
1587                                >> (channelId*4U);
1588                 }
1589             else
1590                 {
1591                 /* Only valid for DMA/QDMA channel, return error... */
1592                 result = EDMA3_DRV_E_INVALID_PARAM;
1593                 }
1594             }
1595         }
1597 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1598     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1599                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1600                 EDMA3_DVT_dCOUNTER,
1601                 EDMA3_DVT_dNONE,
1602                 EDMA3_DVT_dNONE));
1603 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1605     return result;
1606     }
1608 EDMA3_DRV_Result EDMA3_DRV_setCCRegister (EDMA3_DRV_Handle hEdma,
1609                     uint32_t regOffset,
1610                     uint32_t newRegValue)
1611     {
1612     uint32_t intState;
1613     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1614     EDMA3_DRV_Instance *drvInst = NULL;
1615     EDMA3_DRV_Object *drvObject = NULL;
1616     volatile uint32_t regPhyAddr = 0x0U;
1618 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1619     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1620                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1621                 EDMA3_DVT_dCOUNTER,
1622                 EDMA3_DVT_dNONE,
1623                 EDMA3_DVT_dNONE));
1624 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1627         /* If parameter checking is enabled... */
1628 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1629     if ((hEdma == NULL) || ((regOffset % 4U) != 0))
1630         {
1631         result = EDMA3_DRV_E_INVALID_PARAM;
1632         }
1633 #endif
1635         /* Check if the parameters are OK. */
1636         if (EDMA3_DRV_SOK == result)
1637         {
1638         drvInst = (EDMA3_DRV_Instance *)hEdma;
1639         drvObject = drvInst->pDrvObjectHandle;
1641         if (drvObject == NULL)
1642             {
1643             result = EDMA3_DRV_E_INVALID_PARAM;
1644             }
1645         else
1646             {
1647             if (drvObject->gblCfgParams.globalRegs != NULL)
1648                 {
1649                 /**
1650                   * Take the instance specific semaphore, to prevent simultaneous
1651                   * access to the shared resources.
1652                   */
1653                 result = edma3OsSemTake(drvInst->drvSemHandle,
1654                                         EDMA3_OSSEM_NO_TIMEOUT);
1656                 if (EDMA3_DRV_SOK == result)
1657                     {
1658                                         /* Semaphore taken successfully, modify the registers. */
1659                     edma3OsProtectEntry (drvObject->phyCtrllerInstId,
1660                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1661                                                                         &intState);
1662                     /* Global interrupts disabled, modify the registers. */
1663                     regPhyAddr = (uint32_t)drvObject->gblCfgParams.globalRegs + regOffset;
1665                     *(uint32_t *)regPhyAddr = newRegValue;
1667                     edma3OsProtectExit (drvObject->phyCtrllerInstId,
1668                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1669                                                                         intState);
1670                     /* Return the semaphore back */
1671                     result = edma3OsSemGive(drvInst->drvSemHandle);
1672                     }
1673                 }
1674             }
1675         }
1677 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1678     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1679                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1680                 EDMA3_DVT_dCOUNTER,
1681                 EDMA3_DVT_dNONE,
1682                 EDMA3_DVT_dNONE));
1683 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1685     return result;
1686     }
1688 EDMA3_DRV_Result EDMA3_DRV_getCCRegister ( EDMA3_DRV_Handle hEdma,
1689                     uint32_t regOffset,
1690                     uint32_t *regValue)
1691     {
1692     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1693     EDMA3_DRV_Instance *drvInst = NULL;
1694     EDMA3_DRV_Object *drvObject = NULL;
1695     volatile uint32_t regPhyAddr = 0x0U;
1697 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1698     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1699                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1700                 EDMA3_DVT_dCOUNTER,
1701                 EDMA3_DVT_dNONE,
1702                 EDMA3_DVT_dNONE));
1703 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1705         /* If parameter checking is enabled... */
1706 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1707     if (((hEdma == NULL) || (regValue == NULL))
1708         || ((regOffset % 4U) != 0))
1709         {
1710         result =  EDMA3_DRV_E_INVALID_PARAM;
1711         }
1712 #endif
1714         /* Check if the parameters are OK. */
1715         if (EDMA3_DRV_SOK == result)
1716         {
1717         drvInst = (EDMA3_DRV_Instance *)hEdma;
1718         drvObject = drvInst->pDrvObjectHandle;
1720         if (drvObject == NULL)
1721             {
1722             result = EDMA3_DRV_E_INVALID_PARAM;
1723             }
1724         else
1725             {
1726             if (drvObject->gblCfgParams.globalRegs != NULL)
1727                 {
1728                 regPhyAddr = (uint32_t)drvObject->gblCfgParams.globalRegs + regOffset;
1730                 *regValue = *(uint32_t *)regPhyAddr;
1731                 }
1732             }
1733         }
1735 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1736     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1737                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1738                 EDMA3_DVT_dCOUNTER,
1739                 EDMA3_DVT_dNONE,
1740                 EDMA3_DVT_dNONE));
1741 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1743     return result;
1744     }
1746 EDMA3_DRV_Result EDMA3_DRV_waitAndClearTcc (EDMA3_DRV_Handle hEdma,
1747                     uint32_t tccNo)
1748     {
1749     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1750     EDMA3_DRV_Instance *drvInst = NULL;
1751     EDMA3_DRV_Object *drvObject = NULL;
1752     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1753     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
1754     uint32_t tccBitMask = 0x0U;
1756 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1757     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1758                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1759                 EDMA3_DVT_dCOUNTER,
1760                 EDMA3_DVT_dNONE,
1761                 EDMA3_DVT_dNONE));
1762 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1764         /* If parameter checking is enabled... */
1765 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1766     if (hEdma == NULL)
1767         {
1768         result = EDMA3_DRV_E_INVALID_PARAM;
1769         }
1770 #endif
1772         /* Check if the parameters are OK. */
1773         if (EDMA3_DRV_SOK == result)
1774         {
1775         drvInst = (EDMA3_DRV_Instance *)hEdma;
1776         drvObject = drvInst->pDrvObjectHandle;
1778         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1779             {
1780             result = EDMA3_DRV_E_INVALID_PARAM;
1781             }
1782         else
1783             {
1784                         /* If parameter checking is enabled... */
1785 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1786             if (tccNo >= drvObject->gblCfgParams.numTccs)
1787                 {
1788                 result = EDMA3_DRV_E_INVALID_PARAM;
1789                 }
1790 #endif
1792                         /* Check if the parameters are OK. */
1793                         if (EDMA3_DRV_SOK == result)
1794                 {
1795                 globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1796                 shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)
1797                                         &globalRegs->SHADOW[drvInst->regionId];
1799                 if (shadowRegs != NULL)
1800                     {
1801                     if(tccNo < 32U)
1802                         {
1803                         tccBitMask = 1U << tccNo;
1805                         /* Check the status of the IPR[tccNo] bit. */
1806                         while ((uint32_t)FALSE == (shadowRegs->IPR & tccBitMask))
1807                             {
1808                             /* Transfer not yet completed, bit not SET */
1809                             }
1811                         /**
1812                          * Bit found SET, transfer is completed,
1813                          * clear the pending interrupt and return.
1814                          */
1815                         shadowRegs->ICR = tccBitMask;
1816                         }
1817                     else
1818                         {
1819                         tccBitMask = 1U << (tccNo - 32U);
1821                         /* Check the status of the IPRH[tccNo-32] bit. */
1822                         while ((uint32_t)FALSE == (shadowRegs->IPRH & tccBitMask))
1823                             {
1824                             /* Transfer not yet completed, bit not SET */
1825                             }
1827                         /**
1828                          * Bit found SET, transfer is completed,
1829                          * clear the pending interrupt and return.
1830                          */
1831                         shadowRegs->ICRH = tccBitMask;
1832                         }
1833                     }
1834                 }
1835             }
1836         }
1838 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1839     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1840                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1841                 EDMA3_DVT_dCOUNTER,
1842                 EDMA3_DVT_dNONE,
1843                 EDMA3_DVT_dNONE));
1844 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1846     return result;
1847     }
1849 EDMA3_DRV_Result EDMA3_DRV_checkAndClearTcc (EDMA3_DRV_Handle hEdma,
1850                     uint32_t tccNo,
1851                     uint16_t *tccStatus)
1852     {
1853     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1854     EDMA3_DRV_Instance *drvInst = NULL;
1855     EDMA3_DRV_Object *drvObject = NULL;
1856     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1857     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
1858     uint32_t tccBitMask = 0x0U;
1860 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1861     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1862                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1863                 EDMA3_DVT_dCOUNTER,
1864                 EDMA3_DVT_dNONE,
1865                 EDMA3_DVT_dNONE));
1866 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1869         /* If parameter checking is enabled... */
1870 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1871     if ((hEdma == NULL) || (tccStatus == NULL))
1872         {
1873         result = EDMA3_DRV_E_INVALID_PARAM;
1874         }
1875 #endif
1877         /* Check if the parameters are OK. */
1878         if (EDMA3_DRV_SOK == result)
1879         {
1880         drvInst = (EDMA3_DRV_Instance *)hEdma;
1881         drvObject = drvInst->pDrvObjectHandle;
1883         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1884             {
1885             result = EDMA3_DRV_E_INVALID_PARAM;
1886             }
1887         else
1888             {
1889                         /* If parameter checking is enabled... */
1890 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1891             if (tccNo >= drvObject->gblCfgParams.numTccs)
1892                 {
1893                 result = EDMA3_DRV_E_INVALID_PARAM;
1894                 }
1895 #endif
1897                         /* Check if the parameters are OK. */
1898                         if (EDMA3_DRV_SOK == result)
1899                 {
1900                 globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1901                 shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)
1902                                         &globalRegs->SHADOW[drvInst->regionId];
1904                 /* Reset the tccStatus */
1905                 *tccStatus = FALSE;
1907                 if (shadowRegs != NULL)
1908                     {
1909                     if(tccNo < 32U)
1910                         {
1911                         tccBitMask = 1U << tccNo;
1913                         /* Check the status of the IPR[tccNo] bit. */
1914                         if ((shadowRegs->IPR & tccBitMask) != FALSE)
1915                             {
1916                             /* Transfer completed, bit found SET */
1917                             *tccStatus = TRUE;
1919                             /* Clear the pending interrupt also. */
1920                             shadowRegs->ICR = tccBitMask;
1921                             }
1922                         }
1923                     else
1924                         {
1925                         tccBitMask = 1U << (tccNo - 32U);
1927                         /* Check the status of the IPRH[tccNo-32] bit. */
1928                         if ((shadowRegs->IPRH & tccBitMask) != FALSE)
1929                             {
1930                             /* Transfer completed, bit found SET */
1931                             *tccStatus = TRUE;
1933                             /* Clear the pending interrupt also. */
1934                             shadowRegs->ICRH = tccBitMask;
1935                             }
1936                         }
1937                     }
1938                 }
1939             }
1940         }
1942 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1943     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1944                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1945                 EDMA3_DVT_dCOUNTER,
1946                 EDMA3_DVT_dNONE,
1947                 EDMA3_DVT_dNONE));
1948 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1950     return result;
1951     }
1953 EDMA3_DRV_Result EDMA3_DRV_getPaRAMPhyAddr(EDMA3_DRV_Handle hEdma,
1954                     uint32_t lCh,
1955                     uint32_t *paramPhyAddr)
1956     {
1957     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
1958     EDMA3_DRV_Instance *drvInst = NULL;
1959     EDMA3_DRV_Object *drvObject = NULL;
1960     int32_t paRAMId = 0;
1961     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
1962         uint32_t edma3Id;
1964 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1965     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1966                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1967                 EDMA3_DVT_dCOUNTER,
1968                 EDMA3_DVT_dNONE,
1969                 EDMA3_DVT_dNONE));
1970 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1973         /* If parameter checking is enabled... */
1974 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
1975     if ((hEdma == NULL) || (paramPhyAddr == NULL))
1976         {
1977         result = EDMA3_DRV_E_INVALID_PARAM;
1978         }
1979 #endif
1981         /* Check if the parameters are OK. */
1982         if (EDMA3_DRV_SOK == result)
1983         {
1984         drvInst = (EDMA3_DRV_Instance *)hEdma;
1985         drvObject = drvInst->pDrvObjectHandle;
1987         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
1988             {
1989             result =  EDMA3_DRV_E_INVALID_PARAM;
1990             }
1991         else
1992             {
1993             edma3Id = drvObject->phyCtrllerInstId;
1994             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
1995                 }
1996                 }
1998     if (result == EDMA3_DRV_SOK)
1999     {
2000         /* If parameter checking is enabled... */
2001 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2002     if (lCh > edma3_log_ch_max_val [edma3Id])
2003         {
2004         result = EDMA3_DRV_E_INVALID_PARAM;
2005         }
2006 #endif
2007     }
2009         if (EDMA3_DRV_SOK == result)
2010         {
2011         paRAMId = edma3DrvChBoundRes[edma3Id][lCh].paRAMId;
2012         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
2013             {
2014             result = EDMA3_DRV_E_INVALID_PARAM;
2015             }
2016                 else
2017             {
2018             *paramPhyAddr = (uint32_t)&(globalRegs->PARAMENTRY [paRAMId].OPT);
2019             }
2020                 }
2022 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2023     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2024                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2025                 EDMA3_DVT_dCOUNTER,
2026                 EDMA3_DVT_dNONE,
2027                 EDMA3_DVT_dNONE));
2028 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2030     return result;
2031     }
2033 EDMA3_DRV_Result EDMA3_DRV_Ioctl(
2034                       EDMA3_DRV_Handle       hEdma,
2035                       EDMA3_DRV_IoctlCmd     cmd,
2036                       void                  *cmdArg,
2037                       void                  *param
2038                      )
2039     {
2040     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2041     EDMA3_DRV_Instance *drvInst = NULL;
2043 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2044     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2045                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2046                 EDMA3_DVT_dCOUNTER,
2047                 EDMA3_DVT_dNONE,
2048                 EDMA3_DVT_dNONE));
2049 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2051         /* If parameter checking is enabled... */
2052 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2053     if (hEdma == NULL)
2054         {
2055         result = EDMA3_DRV_E_INVALID_PARAM;
2056         }
2058     if ((cmd <= EDMA3_DRV_IOCTL_MIN_IOCTL)
2059         || (cmd >= EDMA3_DRV_IOCTL_MAX_IOCTL))
2060         {
2061         result = EDMA3_DRV_E_INVALID_PARAM;
2062         }
2063 #endif
2065     if (result == EDMA3_DRV_SOK)
2066         {
2067         drvInst = (EDMA3_DRV_Instance *)hEdma;
2069         if (drvInst == NULL)
2070             {
2071             result = EDMA3_DRV_E_INVALID_PARAM;
2072             }
2073         }
2075     if (result == EDMA3_DRV_SOK)
2076         {
2077         switch (cmd)
2078             {
2079             case EDMA3_DRV_IOCTL_SET_PARAM_CLEAR_OPTION:
2080                 {
2081                 result = EDMA3_RM_Ioctl (drvInst->resMgrInstance,
2082                                                                                 EDMA3_RM_IOCTL_SET_PARAM_CLEAR_OPTION,
2083                                                                                 cmdArg,
2084                                                                                 param);
2086                 break;
2087                 }
2089             case EDMA3_DRV_IOCTL_GET_PARAM_CLEAR_OPTION:
2090                 {
2091                 if (NULL == cmdArg)
2092                     {
2093                     result = EDMA3_DRV_E_INVALID_PARAM;
2094                     }
2095                 else
2096                     {
2097                     result = EDMA3_RM_Ioctl (drvInst->resMgrInstance,
2098                                                                                         EDMA3_RM_IOCTL_GET_PARAM_CLEAR_OPTION,
2099                                                                                         cmdArg,
2100                                                                                         param);
2101                     }
2103                 break;
2104                 }
2106             default:
2107                 /* You passed invalid IOCTL cmd */
2108                 result = EDMA3_DRV_E_INVALID_PARAM;
2109                                 break;
2110             }
2111         }
2113 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2114         EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2115                     EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2116                     EDMA3_DVT_dCOUNTER,
2117                     EDMA3_DVT_dNONE,
2118                     EDMA3_DVT_dNONE));
2119 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2121         return result;
2122     }
2124 EDMA3_DRV_Handle EDMA3_DRV_getInstHandle(uint32_t phyCtrllerInstId,
2125                                                                 EDMA3_RM_RegionId regionId,
2126                                                                 EDMA3_DRV_Result *errorCode)
2127         {
2128     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2129         EDMA3_DRV_Object *drvObject = NULL;
2130         EDMA3_DRV_Instance *drvInstanceHandle = NULL;
2132         /* If parameter checking is enabled... */
2133 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2134     if ((phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
2135         || (errorCode == NULL))
2136         {
2137         result = EDMA3_DRV_E_INVALID_PARAM;
2138         }
2139 #endif
2141         if (EDMA3_DRV_SOK == result)
2142                 {
2143                 drvObject = &drvObj[phyCtrllerInstId];
2145                 /* If parameter checking is enabled... */
2146 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2147         /* Check regionId. */
2148     if (regionId >= drvObject->gblCfgParams.numRegions)
2149         {
2150         result = EDMA3_DRV_E_INVALID_PARAM;
2151         }
2152 #endif
2153                 }
2155         if (EDMA3_DRV_SOK == result)
2156                 {
2157         /* If the driver instance is already opened for this specific region,
2158         *  return it, else return an error.
2159         */
2160                 drvInstanceHandle = &drvInstance[phyCtrllerInstId][regionId];
2162         if (NULL == drvInstanceHandle->pDrvObjectHandle)
2163             {
2164             /* Instance not opened yet!!! */
2165             drvInstanceHandle = NULL;
2166             result = EDMA3_DRV_E_INST_NOT_OPENED;
2167             }
2168                 }
2169     if(errorCode != NULL)
2170     {
2171         *errorCode = result;
2172     }
2174         return (EDMA3_DRV_Handle)drvInstanceHandle;
2175         }
2177 EDMA3_DRV_Result EDMA3_DRV_registerTccCb(EDMA3_DRV_Handle hEdma,
2178                     const uint32_t channelId,
2179                     EDMA3_RM_TccCallback tccCb,
2180                     void *cbData)
2181         {
2182     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2183     EDMA3_DRV_Instance *drvInst = NULL;
2184     EDMA3_DRV_Object *drvObject = NULL;
2185         uint32_t edma3Id;
2186     EDMA3_RM_ResDesc channelObj;
2188 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2189     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2190                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2191                 EDMA3_DVT_dCOUNTER,
2192                 EDMA3_DVT_dNONE,
2193                 EDMA3_DVT_dNONE));
2194 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2196         /* If parameter checking is enabled... */
2197 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2198     if ((hEdma == NULL) || (tccCb == NULL))
2199         {
2200         result = EDMA3_DRV_E_INVALID_PARAM;
2201         }
2202 #endif
2204     if (result == EDMA3_DRV_SOK)
2205         {
2206         drvInst = (EDMA3_DRV_Instance *)hEdma;
2207         drvObject = drvInst->pDrvObjectHandle;
2209         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
2210             {
2211             result = EDMA3_DRV_E_INVALID_PARAM;
2212             }
2213         else
2214             {
2215             edma3Id = drvObject->phyCtrllerInstId;
2216                 }
2217                 }
2219         if (result == EDMA3_DRV_SOK)
2220                 {
2221             if (channelId <= edma3_dma_ch_max_val [edma3Id])
2222                 {
2223                 channelObj.type = EDMA3_RM_RES_DMA_CHANNEL;
2224                         channelObj.resId = channelId;
2225                 }
2226                 else
2227                         {
2228                         if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
2229                                 || (channelId <= edma3_qdma_ch_max_val[edma3Id]))
2230                                 {
2231                         channelObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
2232                                 channelObj.resId = channelId - edma3_qdma_ch_min_val[edma3Id];
2233                                 }
2234                         else
2235                                 {
2236                                 result = EDMA3_DRV_E_INVALID_PARAM;
2237                                 }
2238                         }
2239                 }
2241         if (result == EDMA3_DRV_SOK)
2242                 {
2243                 /* Call the RM function now */
2244                 result = EDMA3_RM_registerTccCb (drvInst->resMgrInstance,
2245                                                     (EDMA3_RM_ResDesc *)&channelObj,
2246                                                     edma3DrvChBoundRes[edma3Id][channelId].tcc,
2247                                                     tccCb,
2248                                                     cbData);
2249                 }
2251 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2252         EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2253                     EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2254                     EDMA3_DVT_dCOUNTER,
2255                     EDMA3_DVT_dNONE,
2256                     EDMA3_DVT_dNONE));
2257 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2259     return result;
2260         }
2262 EDMA3_DRV_Result EDMA3_DRV_unregisterTccCb(EDMA3_DRV_Handle hEdma,
2263                     const uint32_t channelId)
2265         {
2266     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2267     EDMA3_DRV_Instance *drvInst = NULL;
2268     EDMA3_DRV_Object *drvObject = NULL;
2269         uint32_t edma3Id;
2270     EDMA3_RM_ResDesc channelObj;
2272 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2273     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2274                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2275                 EDMA3_DVT_dCOUNTER,
2276                 EDMA3_DVT_dNONE,
2277                 EDMA3_DVT_dNONE));
2278 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2280         /* If parameter checking is enabled... */
2281 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2282     if (hEdma == NULL)
2283         {
2284         result = EDMA3_DRV_E_INVALID_PARAM;
2285         }
2286 #endif
2288     if (result == EDMA3_DRV_SOK)
2289         {
2290         drvInst = (EDMA3_DRV_Instance *)hEdma;
2291         drvObject = drvInst->pDrvObjectHandle;
2293         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
2294             {
2295             result = EDMA3_DRV_E_INVALID_PARAM;
2296             }
2297         else
2298             {
2299             edma3Id = drvObject->phyCtrllerInstId;
2300                 }
2301                 }
2303         if (result == EDMA3_DRV_SOK)
2304                 {
2305             if (channelId <= edma3_dma_ch_max_val [edma3Id])
2306                 {
2307                 channelObj.type = EDMA3_RM_RES_DMA_CHANNEL;
2308                         channelObj.resId = channelId;
2309                 }
2310                 else
2311                         {
2312                         if ((channelId >= edma3_qdma_ch_min_val[edma3Id])
2313                                 || (channelId <= edma3_qdma_ch_max_val[edma3Id]))
2314                                 {
2315                         channelObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
2316                                 channelObj.resId = channelId - edma3_qdma_ch_min_val[edma3Id];
2317                                 }
2318                         else
2319                                 {
2320                                 result = EDMA3_DRV_E_INVALID_PARAM;
2321                                 }
2322                         }
2323                 }
2325         if (result == EDMA3_DRV_SOK)
2326                 {
2327                 /* Call the RM function now */
2328                 result = EDMA3_RM_unregisterTccCb (drvInst->resMgrInstance,
2329                                                     (EDMA3_RM_ResDesc *)&channelObj);
2330                 }
2332 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2333         EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2334                     EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2335                     EDMA3_DVT_dCOUNTER,
2336                     EDMA3_DVT_dNONE,
2337                     EDMA3_DVT_dNONE));
2338 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2340     return result;
2341         }
2343 EDMA3_DRV_Result EDMA3_DRV_setTcErrorInt(uint32_t phyCtrllerInstId,
2344                                         uint32_t tcId,
2345                                         EDMA3_DRV_Tc_Err tcErr)
2346         {
2347     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2348     EDMA3_DRV_Object *drvObject = NULL;
2349     volatile EDMA3_TCRL_Regs *tcRegs = NULL;
2351 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2352     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2353                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2354                 EDMA3_DVT_dCOUNTER,
2355                 EDMA3_DVT_dNONE,
2356                 EDMA3_DVT_dNONE));
2357 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2359         /* If parameter checking is enabled... */
2360 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2361         if (phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
2362         {
2363         result = EDMA3_DRV_E_INVALID_PARAM;
2364         }
2366     if (((int32_t)tcErr < (int32_t)EDMA3_DRV_TC_ERR_BUSERR_DIS)
2367         || (tcErr > EDMA3_DRV_TC_ERR_EN))
2368         {
2369         result = EDMA3_DRV_E_INVALID_PARAM;
2370         }
2371 #endif
2373         /* Check if the parameters are OK. */
2374         if (EDMA3_DRV_SOK == result)
2375         {
2376         drvObject = &drvObj[phyCtrllerInstId];
2378         if (tcId >= drvObject->gblCfgParams.numTcs)
2379                         {
2380                         result = EDMA3_DRV_E_INVALID_PARAM;
2381                         }
2382                 }
2384         if (EDMA3_DRV_SOK == result)
2385         {
2386         tcRegs = (volatile EDMA3_TCRL_Regs *)drvObject->gblCfgParams.tcRegs[tcId];
2388             if (NULL == tcRegs)
2389                 {
2390                 result = EDMA3_DRV_E_INVALID_PARAM;
2391                 }
2392                 }
2394         if (EDMA3_DRV_SOK == result)
2395         {
2396         switch (tcErr)
2397                 {
2398                 case EDMA3_DRV_TC_ERR_BUSERR_DIS:
2399                                 tcRegs->ERREN &= ~((uint32_t)1 << EDMA3_TCRL_ERREN_BUSERR_SHIFT);
2400                                 break;
2402                 case EDMA3_DRV_TC_ERR_BUSERR_EN:
2403                                 tcRegs->ERREN |= ((uint32_t)1 << EDMA3_TCRL_ERREN_BUSERR_SHIFT);
2404                                 break;
2406                 case EDMA3_DRV_TC_ERR_TRERR_DIS:
2407                                 tcRegs->ERREN &= ~((uint32_t)1 << EDMA3_TCRL_ERREN_TRERR_SHIFT);
2408                                 break;
2410                 case EDMA3_DRV_TC_ERR_TRERR_EN:
2411                                 tcRegs->ERREN |= ((uint32_t)1 << EDMA3_TCRL_ERREN_TRERR_SHIFT);
2412                                 break;
2414                 case EDMA3_DRV_TC_ERR_MMRAERR_DIS:
2415                                 tcRegs->ERREN &= ~((uint32_t)1 << EDMA3_TCRL_ERREN_MMRAERR_SHIFT);
2416                                 break;
2418                 case EDMA3_DRV_TC_ERR_MMRAERR_EN:
2419                                 tcRegs->ERREN |= ((uint32_t)1 << EDMA3_TCRL_ERREN_MMRAERR_SHIFT);
2420                                 break;
2422                 case EDMA3_DRV_TC_ERR_DIS:
2423                                 tcRegs->ERREN = EDMA3_TCRL_ERREN_RESETVAL;
2424                                 break;
2426                 case EDMA3_DRV_TC_ERR_EN:
2427                                 tcRegs->ERREN = EDMA3_TCRL_ERREN_BUSERR_MASK
2428                                                                 | EDMA3_TCRL_ERREN_TRERR_MASK
2429                                                                 | EDMA3_TCRL_ERREN_MMRAERR_MASK;
2430                                 break;
2432                         default:
2433                                 result = EDMA3_DRV_E_INVALID_PARAM;
2434                                 break;
2435                 }
2436                 }
2438 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2439     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2440                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2441                 EDMA3_DVT_dCOUNTER,
2442                 EDMA3_DVT_dNONE,
2443                 EDMA3_DVT_dNONE));
2444 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2446     return result;
2447         }
2449 EDMA3_DRV_Result EDMA3_DRV_getChannelStatus(EDMA3_DRV_Handle hEdma,
2450                         uint32_t lCh, uint32_t *lchStatus)
2451         {
2452         EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2453     EDMA3_DRV_Instance *drvInst = NULL;
2454     EDMA3_DRV_Object *drvObject = NULL;
2455     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
2456     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
2457         uint32_t edma3Id;
2458         uint32_t status = 0x0;
2459         uint32_t tcc;
2461 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2462     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2463                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
2464                 EDMA3_DVT_dCOUNTER,
2465                 EDMA3_DVT_dNONE,
2466                 EDMA3_DVT_dNONE));
2467 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2469         /* If parameter checking is enabled... */
2470 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2471     if ((hEdma == NULL)
2472                 || (lchStatus == NULL))
2473         {
2474         result = EDMA3_DRV_E_INVALID_PARAM;
2475         }
2476 #endif
2478         /* Check if the parameters are OK. */
2479         if (EDMA3_DRV_SOK == result)
2480         {
2481         drvInst = (EDMA3_DRV_Instance *)hEdma;
2482         drvObject = drvInst->pDrvObjectHandle;
2484         if ((drvObject == NULL) ||
2485                         (drvObject->gblCfgParams.globalRegs == NULL))
2486             {
2487             result = EDMA3_DRV_E_INVALID_PARAM;
2488             }
2489         else
2490             {
2491             globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
2492             shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)
2493                                     &globalRegs->SHADOW[drvInst->regionId];
2494             edma3Id = drvObject->phyCtrllerInstId;
2495                 }
2496                 }
2498     if (result == EDMA3_DRV_SOK)
2499     {
2500         /* If parameter checking is enabled... */
2501 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2502     if (lCh > edma3_log_ch_max_val [edma3Id])
2503         {
2504         result = EDMA3_DRV_E_INVALID_PARAM;
2505         }
2507         /* Not valid for Link channels */
2508     if ( (lCh >= edma3_link_ch_min_val [edma3Id])
2509                 && (lCh <= edma3_link_ch_max_val [edma3Id]))
2510         {
2511         result = EDMA3_DRV_E_INVALID_PARAM;
2512         }
2513 #endif
2514     }
2516         if (EDMA3_DRV_SOK == result)
2517         {
2518         tcc = edma3DrvChBoundRes[edma3Id][lCh].tcc;
2520         if (tcc >= drvObject->gblCfgParams.numTccs)
2521             {
2522             result = EDMA3_DRV_E_INVALID_PARAM;
2523             }
2524                 }
2526         if (EDMA3_DRV_SOK == result)
2527         {
2528         /* DMA Channel, check for event pending and event miss */
2529                 if (lCh <= edma3_dma_ch_max_val[edma3Id])
2530                         {
2531                         if (lCh < 32U)
2532                                 {
2533                         if((globalRegs->EMR & ((uint32_t)1U << lCh)) != FALSE)
2534                             {
2535                             status |= EDMA3_DRV_CHANNEL_ERR;
2536                             }
2538                         if((shadowRegs->ER & ((uint32_t)1U << lCh)) != FALSE)
2539                             {
2540                             status |= EDMA3_DRV_CHANNEL_EVENT_PENDING;
2541                             }
2542                                 }
2543                         else
2544                                 {
2545                 if((globalRegs->EMRH & ((uint32_t)1U << (lCh-32U))) != FALSE)
2546                     {
2547                     status |= EDMA3_DRV_CHANNEL_ERR;
2548                     }
2549                         if((shadowRegs->ERH & ((uint32_t)1U << (lCh-32U))) != FALSE)
2550                             {
2551                             status |= EDMA3_DRV_CHANNEL_EVENT_PENDING;
2552                             }
2553                                 }
2554                         }
2556         /* QDMA Channel, check for event miss */
2557                 if ((lCh >= edma3_qdma_ch_min_val[edma3Id])
2558                         && (lCh <= edma3_qdma_ch_max_val[edma3Id]))
2559                         {
2560                         uint32_t qdma_ch = lCh - edma3_qdma_ch_min_val[edma3Id];
2562                 if((globalRegs->QEMR & ((uint32_t)1U << qdma_ch)) != FALSE)
2563                     {
2564                     status |= EDMA3_DRV_CHANNEL_ERR;
2565                     }
2566                         }
2568                 /* Check for xfer completion interrupt */
2569                 if (tcc < 32U)
2570                         {
2571                 if((shadowRegs->IPR & ((uint32_t)1U << tcc)) != FALSE)
2572                     {
2573                     status |= EDMA3_DRV_CHANNEL_XFER_COMPLETE;
2574                     }
2575                         }
2576                 else
2577                         {
2578                 if((shadowRegs->IPRH & ((uint32_t)1U << (tcc-32U))) != FALSE)
2579                     {
2580                     status |= EDMA3_DRV_CHANNEL_XFER_COMPLETE;
2581                     }
2582                         }
2584                 /* Update the status */
2585                 *lchStatus = status;
2586                 }
2588 #ifdef EDMA3_INSTRUMENTATION_ENABLED
2589     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
2590                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
2591                 EDMA3_DVT_dCOUNTER,
2592                 EDMA3_DVT_dNONE,
2593                 EDMA3_DVT_dNONE));
2594 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
2596     return result;
2597     }
2599 EDMA3_DRV_Result EDMA3_DRV_mapTccLinkCh ( EDMA3_DRV_Handle hEdma,
2600                                                 uint32_t linkCh,
2601                                                 uint32_t tcc)
2602         {
2603     EDMA3_DRV_Result result = EDMA3_DRV_SOK;
2604     EDMA3_DRV_Instance *drvInst = NULL;
2605     EDMA3_DRV_Object *drvObject = NULL;
2606     int32_t paRAMId;
2607     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
2608         uint32_t edma3Id;
2610         /* If parameter checking is enabled... */
2611 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
2612     if (hEdma == NULL)
2613         {
2614         result = EDMA3_DRV_E_INVALID_PARAM;
2615         }
2616 #endif
2618         if (EDMA3_DRV_SOK == result)
2619         {
2620         drvInst = (EDMA3_DRV_Instance *)hEdma;
2621         drvObject = drvInst->pDrvObjectHandle;
2623         if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))
2624             {
2625             result = EDMA3_DRV_E_INVALID_PARAM;
2626             }
2627                 }
2629         if (EDMA3_DRV_SOK == result)
2630         {
2631         edma3Id = drvObject->phyCtrllerInstId;
2632         globalRegs = (volatile EDMA3_CCRL_Regs *)drvObject->gblCfgParams.globalRegs;
2634         /* Validate the arguments */
2635                 if (((linkCh < edma3_link_ch_min_val[edma3Id]) ||
2636                                 (linkCh > edma3_link_ch_max_val[edma3Id])) ||
2637                                 (tcc >= drvObject->gblCfgParams.numTccs))
2638                         {
2639                         result = EDMA3_DRV_E_INVALID_PARAM;
2640                         }
2641                 }
2643         if (EDMA3_DRV_SOK == result)
2644         {
2645         paRAMId = edma3DrvChBoundRes[edma3Id][linkCh].paRAMId;
2647         if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))
2648             {
2649             result = EDMA3_DRV_E_INVALID_PARAM;
2650             }
2651                 else
2652                         {
2653             /* Set TCC in ParamSet.OPT field */
2654             globalRegs->PARAMENTRY [paRAMId].OPT &= EDMA3_DRV_OPT_TCC_CLR_MASK;
2655             globalRegs->PARAMENTRY [paRAMId].OPT |= EDMA3_DRV_OPT_TCC_SET_MASK(tcc);
2657                         /* Update the tcc */
2658                         edma3DrvChBoundRes[edma3Id][linkCh].tcc = tcc;
2659                         }
2660                 }
2662         return result;
2663         }
2665 /* End of File */