1 /*******************************************************************************\r
2 **+--------------------------------------------------------------------------+**\r
3 **| **** |**\r
4 **| **** |**\r
5 **| ******o*** |**\r
6 **| ********_///_**** |**\r
7 **| ***** /_//_/ **** |**\r
8 **| ** ** (__/ **** |**\r
9 **| ********* |**\r
10 **| **** |**\r
11 **| *** |**\r
12 **| |**\r
13 **| Copyright (c) 1998-2006 Texas Instruments Incorporated |**\r
14 **| ALL RIGHTS RESERVED |**\r
15 **| |**\r
16 **| Permission is hereby granted to licensees of Texas Instruments |**\r
17 **| Incorporated (TI) products to use this computer program for the sole |**\r
18 **| purpose of implementing a licensee product based on TI products. |**\r
19 **| No other rights to reproduce, use, or disseminate this computer |**\r
20 **| program, whether in part or in whole, are granted. |**\r
21 **| |**\r
22 **| TI makes no representation or warranties with respect to the |**\r
23 **| performance of this computer program, and specifically disclaims |**\r
24 **| any responsibility for any damages, special or consequential, |**\r
25 **| connected with the use of this program. |**\r
26 **| |**\r
27 **+--------------------------------------------------------------------------+**\r
28 *******************************************************************************/\r
29 \r
30 /**\r
31 * \file edma3_drv_adv.c\r
32 *\r
33 * \brief EDMA3 Driver Advanced Interface Implementation\r
34 * This file contains advanced-level EDMA3 Driver APIs which are required\r
35 * to:\r
36 * a) Link and chain two channels.\r
37 * b) Set/get the whole PaRAM Set in one shot.\r
38 * c) Set/get each individual field of the PaRAM Set.\r
39 * d) Poll mode APIs.\r
40 * e) IOCTL interface.\r
41 * These APIs are provided to have complete control on the EDMA3 hardware and\r
42 * normally advanced users are expected to use them for their specific use-cases.\r
43 *\r
44 * @author: PSP Team, TII\r
45 *\r
46 */\r
47 \r
48 \r
49 /* EDMa3 Driver Internal Header Files */\r
50 #include <ti/sdo/edma3/drv/src/edma3.h>\r
51 /* Resource Manager Internal Header Files */\r
52 #include <ti/sdo/edma3/rm/src/edma3ResMgr.h>\r
53 \r
54 /* Instrumentation Header File */\r
55 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
56 #include <ti/sdo/edma3/rm/src/edma3_log.h>\r
57 #endif\r
58 \r
59 /* Externel Variables */\r
60 /*---------------------------------------------------------------------------*/\r
61 /**\r
62 * Maximum Resource Manager Instances supported by the EDMA3 Package.\r
63 */\r
64 extern const unsigned int EDMA3_MAX_RM_INSTANCES;\r
65 \r
66 \r
67 /**\r
68 * \brief EDMA3 Resource Manager Objects, tied to each EDMA3 HW Controller.\r
69 *\r
70 * Typically one RM object will cater to one EDMA3 HW controller\r
71 * and will have all the global config information.\r
72 */\r
73 extern EDMA3_RM_Obj resMgrObj[EDMA3_MAX_EDMA3_INSTANCES];\r
74 \r
75 \r
76 /**\r
77 * \brief Region Specific Configuration structure for\r
78 * EDMA3 controller, to provide region specific Information.\r
79 *\r
80 * This configuration info can also be provided by the user at run-time,\r
81 * while calling EDMA3_RM_open (). If not provided at run-time,\r
82 * this info will be taken from the config file "edma3_<PLATFORM_NAME>_cfg.c",\r
83 * for the specified platform.\r
84 */\r
85 extern EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;\r
86 \r
87 \r
88 /**\r
89 * Handles of EDMA3 Resource Manager Instances.\r
90 *\r
91 * Used to maintain information of the EDMA3 RM Instances\r
92 * for each HW controller.\r
93 * There could be a maximum of EDMA3_MAX_RM_INSTANCES instances per\r
94 * EDMA3 HW.\r
95 */\r
96 extern EDMA3_RM_Instance *ptrRMIArray;\r
97 \r
98 /** Local MemSet function */\r
99 extern void edma3MemSet(void *dst, unsigned char data, unsigned int len);\r
100 /** Local MemCpy function */\r
101 extern void edma3MemCpy(void *dst, const void *src, unsigned int len);\r
102 \r
103 /**\r
104 * \brief EDMA3 Driver Objects, tied to each EDMA3 HW Controller.\r
105 *\r
106 * Typically one object will cater to one EDMA3 HW controller\r
107 * and will have all regions' (ARM, DSP etc) specific config information.\r
108 */\r
109 extern EDMA3_DRV_Object drvObj [EDMA3_MAX_EDMA3_INSTANCES];\r
110 \r
111 \r
112 /**\r
113 * Handles of EDMA3 Driver Instances.\r
114 *\r
115 * Used to maintain information of the EDMA3 Driver Instances for\r
116 * each region, for each HW controller.\r
117 * There could be as many Driver Instances as there are shadow\r
118 * regions. Multiple EDMA3 Driver instances on the same shadow\r
119 * region are NOT allowed.\r
120 */\r
121 extern EDMA3_DRV_Instance drvInstance [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];\r
122 \r
123 /**\r
124 * \brief Resources bound to a Channel\r
125 *\r
126 * When a request for a channel is made, the resources PaRAM Set and TCC\r
127 * get bound to that channel. This information is needed internally by the\r
128 * driver when a request is made to free the channel (Since it is the\r
129 * responsibility of the driver to free up the channel-associated resources\r
130 * from the Resource Manager layer).\r
131 */\r
132 extern EDMA3_DRV_ChBoundResources edma3DrvChBoundRes [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_LOGICAL_CH];\r
133 \r
134 \r
135 /**\r
136 * \brief Link two logical channels.\r
137 *\r
138 * This API is used to link two previously allocated logical (DMA/QDMA/Link)\r
139 * channels.\r
140 *\r
141 * It sets the Link field of the PaRAM set associated with first logical\r
142 * channel (lCh1) to point it to the PaRAM set associated with second logical\r
143 * channel (lCh2).\r
144 *\r
145 * It also sets the TCC field of PaRAM set associated with second logical\r
146 * channel to the same as that of the first logical channel.\r
147 *\r
148 * After linking the channels, user should not update any PaRAM Set of the\r
149 * channel.\r
150 *\r
151 * \param hEdma [IN] Handle to the EDMA Driver Instance.\r
152 * \param lCh1 [IN] Logical Channel to which particular channel\r
153 * will be linked.\r
154 * \param lCh2 [IN] Logical Channel which needs to be linked to\r
155 * the first channel.\r
156 * After the transfer based on the PaRAM set\r
157 * of lCh1 is over, the PaRAM set of lCh2 will\r
158 * be copied to the PaRAM set of lCh1 and\r
159 * transfer will resume.\r
160 * For DMA channels, another sync event is\r
161 * required to initiate the transfer on the\r
162 * Link channel.\r
163 *\r
164 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
165 *\r
166 * \note This function is re-entrant for unique lCh1 & lCh2 values. It is\r
167 * non-re-entrant for same lCh1 & lCh2 values.\r
168 */\r
169 EDMA3_DRV_Result EDMA3_DRV_linkChannel (EDMA3_DRV_Handle hEdma,\r
170 unsigned int lCh1, unsigned int lCh2)\r
171 {\r
172 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
173 EDMA3_DRV_Instance *drvInst = NULL;\r
174 EDMA3_DRV_Object *drvObject = NULL;\r
175 unsigned int linkBcntReld;\r
176 int paRAM1Id = 0;\r
177 int paRAM2Id = 0;\r
178 unsigned int oldTccVal = 0;\r
179 unsigned int optVal = 0;\r
180 unsigned int newOptVal = 0;\r
181 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
182 \r
183 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
184 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
185 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
186 EDMA3_DVT_dCOUNTER,\r
187 EDMA3_DVT_dNONE,\r
188 EDMA3_DVT_dNONE));\r
189 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
190 \r
191 /* If parameter checking is enabled... */\r
192 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
193 if (((lCh1 > EDMA3_DRV_LOG_CH_MAX_VAL)\r
194 || (lCh2 > EDMA3_DRV_LOG_CH_MAX_VAL))\r
195 || (hEdma == NULL))\r
196 {\r
197 result = EDMA3_DRV_E_INVALID_PARAM;\r
198 }\r
199 #endif\r
200 \r
201 /* Check if the parameters are OK. */\r
202 if (EDMA3_DRV_SOK == result)\r
203 {\r
204 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
205 drvObject = drvInst->pDrvObjectHandle;\r
206 \r
207 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
208 {\r
209 result = EDMA3_DRV_E_INVALID_PARAM;\r
210 }\r
211 else\r
212 {\r
213 paRAM1Id = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh1].paRAMId;\r
214 paRAM2Id = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh2].paRAMId;\r
215 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
216 \r
217 if ((paRAM1Id < 0) || (paRAM1Id >= drvObject->gblCfgParams.numPaRAMSets))\r
218 {\r
219 result = EDMA3_DRV_E_INVALID_PARAM;\r
220 }\r
221 \r
222 if ((paRAM2Id < 0) || (paRAM2Id >= drvObject->gblCfgParams.numPaRAMSets))\r
223 {\r
224 result = EDMA3_DRV_E_INVALID_PARAM;\r
225 }\r
226 \r
227 if (result == EDMA3_DRV_SOK)\r
228 {\r
229 /* Get the Link-bcntReload PaRAM set entry */\r
230 linkBcntReld = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAM1Id].OPT) +\r
231 (unsigned int)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));\r
232 linkBcntReld &= 0xFFFF0000u;\r
233 /* Update the Link field with lch2 PaRAM set */\r
234 linkBcntReld |= (0xFFFFu & (unsigned int)(&(globalRegs->PARAMENTRY [paRAM2Id].OPT)));\r
235 \r
236 /* Store it back */\r
237 *((&globalRegs->PARAMENTRY[paRAM1Id].OPT)\r
238 + (unsigned int)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = linkBcntReld;\r
239 \r
240 /*\r
241 * Set the TCC field of PaRAM set associated with lch2 to\r
242 * the same as that of lch1.\r
243 */\r
244 /* for channel 1 */\r
245 optVal = (unsigned int)(*(&globalRegs->PARAMENTRY [paRAM1Id].OPT));\r
246 oldTccVal = EDMA3_DRV_OPT_TCC_GET_MASK(optVal);\r
247 \r
248 /* for channel 2 */\r
249 optVal = (unsigned int)(*(&globalRegs->PARAMENTRY [paRAM2Id].OPT));\r
250 newOptVal = (optVal & EDMA3_DRV_OPT_TCC_CLR_MASK)\r
251 |\r
252 (EDMA3_DRV_OPT_TCC_SET_MASK(oldTccVal));\r
253 *(&globalRegs->PARAMENTRY[paRAM2Id].OPT) = newOptVal;\r
254 }\r
255 }\r
256 }\r
257 \r
258 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
259 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
260 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
261 EDMA3_DVT_dCOUNTER,\r
262 EDMA3_DVT_dNONE,\r
263 EDMA3_DVT_dNONE));\r
264 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
265 \r
266 return result;\r
267 }\r
268 \r
269 \r
270 \r
271 /**\r
272 * \brief Unlink the channel from the earlier linked logical channel.\r
273 *\r
274 * This function breaks the link between the specified\r
275 * channel and the earlier linked logical channel\r
276 * by clearing the Link Address field.\r
277 *\r
278 * \param hEdma [IN] Handle to the EDMA Driver Instance.\r
279 * \param lCh [IN] Channel for which linking has to be removed\r
280 *\r
281 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
282 *\r
283 * \note This function is re-entrant for unique lCh values. It is non-\r
284 * re-entrant for same lCh value.\r
285 */\r
286 EDMA3_DRV_Result EDMA3_DRV_unlinkChannel (EDMA3_DRV_Handle hEdma, unsigned int lCh)\r
287 {\r
288 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
289 unsigned int linkBcntReld;\r
290 int paRAMId = 0;\r
291 EDMA3_DRV_Instance *drvInst = NULL;\r
292 EDMA3_DRV_Object *drvObject = NULL;\r
293 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
294 \r
295 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
296 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
297 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
298 EDMA3_DVT_dCOUNTER,\r
299 EDMA3_DVT_dNONE,\r
300 EDMA3_DVT_dNONE));\r
301 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
302 \r
303 /* If parameter checking is enabled... */\r
304 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
305 if ((lCh > EDMA3_DRV_LOG_CH_MAX_VAL) || (hEdma == NULL))\r
306 {\r
307 result = EDMA3_DRV_E_INVALID_PARAM;\r
308 }\r
309 #endif\r
310 \r
311 /* Check if the parameters are OK. */\r
312 if (EDMA3_DRV_SOK == result)\r
313 {\r
314 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
315 drvObject = drvInst->pDrvObjectHandle;\r
316 \r
317 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
318 {\r
319 result = EDMA3_DRV_E_INVALID_PARAM;\r
320 }\r
321 else\r
322 {\r
323 paRAMId = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh].paRAMId;\r
324 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
325 \r
326 if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))\r
327 {\r
328 result = EDMA3_DRV_E_INVALID_PARAM;\r
329 }\r
330 \r
331 if (result == EDMA3_DRV_SOK)\r
332 {\r
333 /* Get the Link-bcntReload PaRAM set entry */\r
334 linkBcntReld = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) +\r
335 (unsigned int)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));\r
336 \r
337 /* Remove any linking */\r
338 linkBcntReld |= 0xFFFFu;\r
339 \r
340 /* Store it back */\r
341 *((&globalRegs->PARAMENTRY[paRAMId].OPT)\r
342 + (unsigned int)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = linkBcntReld;\r
343 }\r
344 }\r
345 }\r
346 \r
347 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
348 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
349 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
350 EDMA3_DVT_dCOUNTER,\r
351 EDMA3_DVT_dNONE,\r
352 EDMA3_DVT_dNONE));\r
353 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
354 \r
355 return result;\r
356 }\r
357 \r
358 \r
359 /**\r
360 * \brief Chain the two specified channels.\r
361 *\r
362 * This API is used to chain two previously allocated logical (DMA/QDMA)\r
363 * channels.\r
364 *\r
365 * Chaining is different from Linking. The EDMA3 link feature reloads the\r
366 * current channel parameter set with the linked parameter set. The EDMA3\r
367 * chaining feature does not modify or update any channel parameter set;\r
368 * it provides a synchronization event to the chained channel.\r
369 *\r
370 * \param hEdma [IN] Handle to the EDMA Driver Instance.\r
371 *\r
372 * \param lCh1 [IN] Channel to which particular channel\r
373 * will be chained.\r
374 * \param lCh2 [IN] Channel which needs to be chained to\r
375 * the first channel.\r
376 * \param chainOptions [IN] Options such as intermediate interrupts\r
377 * are required or not, intermediate/final\r
378 * chaining is enabled or not etc.\r
379 *\r
380 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
381 *\r
382 * \note This function is re-entrant for unique lCh1 & lCh2 values. It is\r
383 * non-re-entrant for same lCh1 & lCh2 values.\r
384 */\r
385 EDMA3_DRV_Result EDMA3_DRV_chainChannel (EDMA3_DRV_Handle hEdma,\r
386 unsigned int lCh1,\r
387 unsigned int lCh2,\r
388 const EDMA3_DRV_ChainOptions *chainOptions)\r
389 {\r
390 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
391 unsigned int opt = 0x0;\r
392 EDMA3_DRV_Instance *drvInst = NULL;\r
393 EDMA3_DRV_Object *drvObject = NULL;\r
394 int paRAMId = 0;\r
395 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
396 \r
397 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
398 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
399 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
400 EDMA3_DVT_dCOUNTER,\r
401 EDMA3_DVT_dNONE,\r
402 EDMA3_DVT_dNONE));\r
403 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
404 \r
405 /* If parameter checking is enabled... */\r
406 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
407 if (((lCh1 > EDMA3_DRV_LOG_CH_MAX_VAL) || (lCh2 > EDMA3_DRV_LOG_CH_MAX_VAL))\r
408 || (hEdma == NULL))\r
409 {\r
410 result = EDMA3_DRV_E_INVALID_PARAM;\r
411 }\r
412 \r
413 if (chainOptions == NULL)\r
414 {\r
415 result = EDMA3_DRV_E_INVALID_PARAM;\r
416 }\r
417 #endif\r
418 \r
419 if (result == EDMA3_DRV_SOK)\r
420 {\r
421 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
422 drvObject = drvInst->pDrvObjectHandle;\r
423 \r
424 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
425 {\r
426 result = EDMA3_DRV_E_INVALID_PARAM;\r
427 }\r
428 }\r
429 \r
430 if (result == EDMA3_DRV_SOK)\r
431 {\r
432 paRAMId = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh1].paRAMId;\r
433 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
434 \r
435 if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))\r
436 {\r
437 result = EDMA3_DRV_E_INVALID_PARAM;\r
438 }\r
439 }\r
440 \r
441 if (result == EDMA3_DRV_SOK)\r
442 {\r
443 opt = (unsigned int)(*(&globalRegs->PARAMENTRY [paRAMId].OPT));\r
444 \r
445 /* set Transfer complete chaining */\r
446 if (chainOptions->tcchEn == EDMA3_DRV_TCCHEN_EN)\r
447 {\r
448 opt |= EDMA3_DRV_OPT_TCCHEN_SET_MASK(1u);\r
449 }\r
450 else\r
451 {\r
452 opt &= EDMA3_DRV_OPT_TCCHEN_CLR_MASK;\r
453 }\r
454 \r
455 /*set Intermediate transfer completion chaining */\r
456 if (chainOptions->itcchEn == EDMA3_DRV_ITCCHEN_EN)\r
457 {\r
458 opt |= EDMA3_DRV_OPT_ITCCHEN_SET_MASK(1u);\r
459 }\r
460 else\r
461 {\r
462 opt &= EDMA3_DRV_OPT_ITCCHEN_CLR_MASK;\r
463 }\r
464 \r
465 /*set Transfer complete interrupt */\r
466 if (chainOptions->tcintEn == EDMA3_DRV_TCINTEN_EN)\r
467 {\r
468 opt |= EDMA3_DRV_OPT_TCINTEN_SET_MASK(1u);\r
469 }\r
470 else\r
471 {\r
472 opt &= EDMA3_DRV_OPT_TCINTEN_CLR_MASK;\r
473 }\r
474 \r
475 /*set Intermediate transfer completion interrupt */\r
476 if (chainOptions->itcintEn == EDMA3_DRV_ITCINTEN_EN)\r
477 {\r
478 opt |= EDMA3_DRV_OPT_ITCINTEN_SET_MASK(1u);\r
479 }\r
480 else\r
481 {\r
482 opt &= EDMA3_DRV_OPT_ITCINTEN_CLR_MASK;\r
483 }\r
484 \r
485 opt &= EDMA3_DRV_OPT_TCC_CLR_MASK;\r
486 opt |= EDMA3_DRV_OPT_TCC_SET_MASK(lCh2);\r
487 \r
488 *(&globalRegs->PARAMENTRY[paRAMId].OPT) = opt;\r
489 \r
490 /* Set the trigger mode of lch2 as the same as of lch1 */\r
491 edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh2].trigMode =\r
492 edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh1].trigMode;\r
493 }\r
494 \r
495 \r
496 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
497 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
498 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
499 EDMA3_DVT_dCOUNTER,\r
500 EDMA3_DVT_dNONE,\r
501 EDMA3_DVT_dNONE));\r
502 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
503 \r
504 return result;\r
505 }\r
506 \r
507 \r
508 \r
509 /**\r
510 * \brief Unchain the two channels.\r
511 *\r
512 * \param hEdma [IN] Handle to the EDMA Driver Instance.\r
513 * \param lCh [IN] Channel whose chaining with the other\r
514 * channel has to be removed.\r
515 *\r
516 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
517 *\r
518 * \note This function is re-entrant for unique lCh values. It is non-\r
519 * re-entrant for same lCh value.\r
520 */\r
521 EDMA3_DRV_Result EDMA3_DRV_unchainChannel (EDMA3_DRV_Handle hEdma,\r
522 unsigned int lCh)\r
523 {\r
524 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
525 unsigned int opt;\r
526 EDMA3_DRV_Instance *drvInst = NULL;\r
527 EDMA3_DRV_Object *drvObject = NULL;\r
528 int paRAMId = 0;\r
529 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
530 \r
531 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
532 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
533 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
534 EDMA3_DVT_dCOUNTER,\r
535 EDMA3_DVT_dNONE,\r
536 EDMA3_DVT_dNONE));\r
537 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
538 \r
539 /* If parameter checking is enabled... */\r
540 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
541 if ((lCh > EDMA3_DRV_LOG_CH_MAX_VAL) || (hEdma == NULL))\r
542 {\r
543 result = EDMA3_DRV_E_INVALID_PARAM;\r
544 }\r
545 #endif\r
546 \r
547 if (result == EDMA3_DRV_SOK)\r
548 {\r
549 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
550 drvObject = drvInst->pDrvObjectHandle;\r
551 \r
552 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
553 {\r
554 result = EDMA3_DRV_E_INVALID_PARAM;\r
555 }\r
556 }\r
557 \r
558 if (result == EDMA3_DRV_SOK)\r
559 {\r
560 paRAMId = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh].paRAMId;\r
561 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
562 \r
563 if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))\r
564 {\r
565 result = EDMA3_DRV_E_INVALID_PARAM;\r
566 }\r
567 }\r
568 \r
569 if (result == EDMA3_DRV_SOK)\r
570 {\r
571 opt = (unsigned int)(*(&globalRegs->PARAMENTRY [paRAMId].OPT));\r
572 \r
573 /* Reset TCCHEN */\r
574 opt &= EDMA3_DRV_OPT_TCCHEN_CLR_MASK;\r
575 /* Reset ITCCHEN */\r
576 opt &= EDMA3_DRV_OPT_ITCCHEN_CLR_MASK;\r
577 \r
578 *(&globalRegs->PARAMENTRY[paRAMId].OPT) = opt;\r
579 }\r
580 \r
581 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
582 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
583 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
584 EDMA3_DVT_dCOUNTER,\r
585 EDMA3_DVT_dNONE,\r
586 EDMA3_DVT_dNONE));\r
587 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
588 \r
589 return result;\r
590 }\r
591 \r
592 \r
593 /**\r
594 * \brief Assign a Trigger Word to the specified QDMA channel\r
595 *\r
596 * This API sets the Trigger word for the specific QDMA channel in the QCHMAP\r
597 * Register. Default QDMA trigger word is CCNT.\r
598 *\r
599 * \param hEdma [IN] Handle to the EDMA Instance object\r
600 * \param lCh [IN] QDMA Channel which needs to be assigned\r
601 * the Trigger Word\r
602 * \param trigWord [IN] The Trigger Word for the QDMA channel.\r
603 * Trigger Word is the word in the PaRAM\r
604 * Register Set which, when written to by CPU,\r
605 * will start the QDMA transfer automatically.\r
606 *\r
607 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
608 *\r
609 * \note This function is re-entrant for unique lCh values. It is non-\r
610 * re-entrant for same lCh value.\r
611 */\r
612 EDMA3_DRV_Result EDMA3_DRV_setQdmaTrigWord (EDMA3_DRV_Handle hEdma,\r
613 unsigned int lCh,\r
614 EDMA3_RM_QdmaTrigWord trigWord)\r
615 {\r
616 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
617 EDMA3_DRV_Instance *drvInst = NULL;\r
618 EDMA3_DRV_Object *drvObject = NULL;\r
619 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
620 \r
621 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
622 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
623 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
624 EDMA3_DVT_dCOUNTER,\r
625 EDMA3_DVT_dNONE,\r
626 EDMA3_DVT_dNONE));\r
627 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
628 \r
629 /* If parameter checking is enabled... */\r
630 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
631 if((hEdma == NULL)\r
632 || (((lCh < EDMA3_DRV_QDMA_CH_MIN_VAL)\r
633 || (lCh > EDMA3_DRV_QDMA_CH_MAX_VAL))\r
634 || ((trigWord < EDMA3_RM_QDMA_TRIG_OPT)\r
635 || (trigWord > EDMA3_RM_QDMA_TRIG_CCNT))))\r
636 {\r
637 result = EDMA3_DRV_E_INVALID_PARAM;\r
638 }\r
639 #endif\r
640 \r
641 /* Check if the parameters are OK. */\r
642 if (EDMA3_DRV_SOK == result)\r
643 {\r
644 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
645 drvObject = drvInst->pDrvObjectHandle;\r
646 \r
647 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
648 {\r
649 result = EDMA3_DRV_E_INVALID_PARAM;\r
650 }\r
651 else\r
652 {\r
653 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
654 \r
655 globalRegs->QCHMAP[lCh -EDMA3_DRV_QDMA_CH_MIN_VAL] &= EDMA3_DRV_QCH_TRWORD_CLR_MASK;\r
656 globalRegs->QCHMAP[lCh -EDMA3_DRV_QDMA_CH_MIN_VAL] |= EDMA3_DRV_QCH_TRWORD_SET_MASK(trigWord);\r
657 }\r
658 }\r
659 \r
660 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
661 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
662 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
663 EDMA3_DVT_dCOUNTER,\r
664 EDMA3_DVT_dNONE,\r
665 EDMA3_DVT_dNONE));\r
666 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
667 \r
668 return result;\r
669 }\r
670 \r
671 \r
672 /**\r
673 * \brief Copy the user specified PaRAM Set onto the PaRAM Set\r
674 * associated with the logical channel (DMA/QDMA/Link).\r
675 *\r
676 * This API takes a PaRAM Set as input and copies it onto the actual PaRAM Set\r
677 * associated with the logical channel. OPT field of the PaRAM Set is written\r
678 * first and the CCNT field is written last.\r
679 *\r
680 * Caution: It should be used carefully when programming the QDMA channels whose\r
681 * trigger words are not CCNT field.\r
682 *\r
683 * \param hEdma [IN] Handle to the EDMA Instance object\r
684 * \param lCh [IN] Logical Channel for which new PaRAM set is\r
685 * specified\r
686 * \param newPaRAM [IN] Parameter RAM set to be copied onto existing PaRAM\r
687 *\r
688 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
689 *\r
690 * \note This function is re-entrant for unique lCh values. It is non-\r
691 * re-entrant for same lCh value.\r
692 */\r
693 EDMA3_DRV_Result EDMA3_DRV_setPaRAM (EDMA3_DRV_Handle hEdma,\r
694 unsigned int lCh,\r
695 const EDMA3_DRV_PaRAMRegs *newPaRAM)\r
696 {\r
697 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
698 EDMA3_DRV_Instance *drvInst = NULL;\r
699 EDMA3_DRV_Object *drvObject = NULL;\r
700 int paRAMId = 0;\r
701 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
702 \r
703 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
704 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
705 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
706 EDMA3_DVT_dCOUNTER,\r
707 EDMA3_DVT_dNONE,\r
708 EDMA3_DVT_dNONE));\r
709 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
710 \r
711 /* If parameter checking is enabled... */\r
712 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
713 if (((lCh > EDMA3_DRV_LOG_CH_MAX_VAL) || (hEdma == NULL))\r
714 || (newPaRAM == NULL))\r
715 {\r
716 result = EDMA3_DRV_E_INVALID_PARAM;\r
717 }\r
718 #endif\r
719 \r
720 if (result == EDMA3_DRV_SOK)\r
721 {\r
722 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
723 drvObject = drvInst->pDrvObjectHandle;\r
724 \r
725 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
726 {\r
727 result = EDMA3_DRV_E_INVALID_PARAM;\r
728 }\r
729 }\r
730 \r
731 if (result == EDMA3_DRV_SOK)\r
732 {\r
733 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
734 paRAMId = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh].paRAMId;\r
735 \r
736 if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))\r
737 {\r
738 result = EDMA3_DRV_E_INVALID_PARAM;\r
739 }\r
740 }\r
741 \r
742 if (result == EDMA3_DRV_SOK)\r
743 {\r
744 edma3MemCpy ((void *)(&(globalRegs->PARAMENTRY[paRAMId].OPT)),\r
745 (const void *)newPaRAM,\r
746 sizeof(EDMA3_CCRL_ParamentryRegs));\r
747 }\r
748 \r
749 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
750 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
751 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
752 EDMA3_DVT_dCOUNTER,\r
753 EDMA3_DVT_dNONE,\r
754 EDMA3_DVT_dNONE));\r
755 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
756 \r
757 return result;\r
758 }\r
759 \r
760 \r
761 /**\r
762 * \brief Retrieve existing PaRAM set associated with specified logical\r
763 * channel (DMA/QDMA/Link).\r
764 *\r
765 * \param hEdma [IN] Handle to the EDMA Instance object\r
766 * \param lCh [IN] Logical Channel whose PaRAM set is\r
767 * requested\r
768 * \param currPaRAM [IN/OUT] User gets the existing PaRAM here\r
769 *\r
770 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
771 *\r
772 * \note This function is re-entrant.\r
773 */\r
774 EDMA3_DRV_Result EDMA3_DRV_getPaRAM (EDMA3_DRV_Handle hEdma,\r
775 unsigned int lCh,\r
776 EDMA3_DRV_PaRAMRegs *currPaRAM)\r
777 {\r
778 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
779 EDMA3_DRV_Instance *drvInst = NULL;\r
780 EDMA3_DRV_Object *drvObject = NULL;\r
781 int paRAMId = 0;\r
782 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
783 \r
784 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
785 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
786 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
787 EDMA3_DVT_dCOUNTER,\r
788 EDMA3_DVT_dNONE,\r
789 EDMA3_DVT_dNONE));\r
790 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
791 \r
792 /* If parameter checking is enabled... */\r
793 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
794 if (((lCh > EDMA3_DRV_LOG_CH_MAX_VAL) || (hEdma == NULL))\r
795 || (currPaRAM == NULL))\r
796 {\r
797 result = EDMA3_DRV_E_INVALID_PARAM;\r
798 }\r
799 #endif\r
800 \r
801 if (result == EDMA3_DRV_SOK)\r
802 {\r
803 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
804 drvObject = drvInst->pDrvObjectHandle;\r
805 \r
806 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
807 {\r
808 result = EDMA3_DRV_E_INVALID_PARAM;\r
809 }\r
810 }\r
811 \r
812 if (result == EDMA3_DRV_SOK)\r
813 {\r
814 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
815 paRAMId = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh].paRAMId;\r
816 \r
817 if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))\r
818 {\r
819 result = EDMA3_DRV_E_INVALID_PARAM;\r
820 }\r
821 }\r
822 \r
823 if (result == EDMA3_DRV_SOK)\r
824 {\r
825 edma3MemCpy ((void *)currPaRAM ,\r
826 (const void *)(&(globalRegs->PARAMENTRY [paRAMId].OPT)),\r
827 sizeof(EDMA3_CCRL_ParamentryRegs));\r
828 }\r
829 \r
830 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
831 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
832 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
833 EDMA3_DVT_dCOUNTER,\r
834 EDMA3_DVT_dNONE,\r
835 EDMA3_DVT_dNONE));\r
836 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
837 \r
838 return result;\r
839 }\r
840 \r
841 \r
842 /**\r
843 * \brief Set a particular PaRAM set entry of the specified PaRAM set\r
844 *\r
845 *\r
846 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
847 * \param lCh [IN] Logical Channel bound to the Parameter RAM set\r
848 * whose specified field needs to be set\r
849 * \param paRAMEntry [IN] Specify the PaRAM set entry which needs\r
850 * to be set\r
851 * \param newPaRAMEntryVal [IN] The new field setting\r
852 *\r
853 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
854 *\r
855 * \note This API should be used while setting the PaRAM set entry\r
856 * for QDMA channels. If EDMA3_DRV_setPaRAMField () used,\r
857 * it will trigger the QDMA channel before complete\r
858 * PaRAM set entry is written. For DMA channels, no such\r
859 * constraint is there.\r
860 *\r
861 * This function is re-entrant for unique lCh values. It is non-\r
862 * re-entrant for same lCh value.\r
863 */\r
864 EDMA3_DRV_Result EDMA3_DRV_setPaRAMEntry (EDMA3_DRV_Handle hEdma,\r
865 unsigned int lCh,\r
866 EDMA3_DRV_PaRAMEntry paRAMEntry,\r
867 unsigned int newPaRAMEntryVal)\r
868 {\r
869 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
870 EDMA3_DRV_Instance *drvInst = NULL;\r
871 EDMA3_DRV_Object *drvObject = NULL;\r
872 int paRAMId = 0;\r
873 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
874 \r
875 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
876 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
877 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
878 EDMA3_DVT_dCOUNTER,\r
879 EDMA3_DVT_dNONE,\r
880 EDMA3_DVT_dNONE));\r
881 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
882 \r
883 /* If parameter checking is enabled... */\r
884 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
885 if(((lCh > EDMA3_DRV_LOG_CH_MAX_VAL) || (hEdma == NULL))\r
886 || ((paRAMEntry < EDMA3_DRV_PARAM_ENTRY_OPT)\r
887 || (paRAMEntry > EDMA3_DRV_PARAM_ENTRY_CCNT)))\r
888 {\r
889 result = EDMA3_DRV_E_INVALID_PARAM;\r
890 }\r
891 #endif\r
892 \r
893 /* Check if the parameters are OK. */\r
894 if (EDMA3_DRV_SOK == result)\r
895 {\r
896 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
897 drvObject = drvInst->pDrvObjectHandle;\r
898 \r
899 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
900 {\r
901 result = EDMA3_DRV_E_INVALID_PARAM;\r
902 }\r
903 else\r
904 {\r
905 paRAMId = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh].paRAMId;\r
906 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
907 \r
908 if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))\r
909 {\r
910 result = EDMA3_DRV_E_INVALID_PARAM;\r
911 }\r
912 else\r
913 {\r
914 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned int)paRAMEntry) = newPaRAMEntryVal;\r
915 }\r
916 }\r
917 }\r
918 \r
919 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
920 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
921 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
922 EDMA3_DVT_dCOUNTER,\r
923 EDMA3_DVT_dNONE,\r
924 EDMA3_DVT_dNONE));\r
925 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
926 \r
927 return result;\r
928 }\r
929 \r
930 \r
931 /**\r
932 * \brief Get a particular PaRAM set entry of the specified PaRAM set\r
933 *\r
934 *\r
935 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
936 * \param lCh [IN] Logical Channel bound to the Parameter RAM set\r
937 * whose specified field value is needed\r
938 * \param paRAMEntry [IN] Specify the PaRAM set entry which needs\r
939 * to be obtained\r
940 * \param paRAMEntryVal [IN/OUT] The value of the field is returned here\r
941 *\r
942 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
943 *\r
944 * \note This function is re-entrant.\r
945 */\r
946 EDMA3_DRV_Result EDMA3_DRV_getPaRAMEntry (EDMA3_DRV_Handle hEdma,\r
947 unsigned int lCh,\r
948 EDMA3_DRV_PaRAMEntry paRAMEntry,\r
949 unsigned int *paRAMEntryVal)\r
950 {\r
951 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
952 EDMA3_DRV_Instance *drvInst = NULL;\r
953 EDMA3_DRV_Object *drvObject = NULL;\r
954 int paRAMId = 0;\r
955 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
956 \r
957 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
958 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
959 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
960 EDMA3_DVT_dCOUNTER,\r
961 EDMA3_DVT_dNONE,\r
962 EDMA3_DVT_dNONE));\r
963 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
964 \r
965 /* If parameter checking is enabled... */\r
966 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
967 if(((lCh > EDMA3_DRV_LOG_CH_MAX_VAL)\r
968 || ((hEdma == NULL) || (paRAMEntryVal == NULL)))\r
969 || ((paRAMEntry < EDMA3_DRV_PARAM_ENTRY_OPT)\r
970 || (paRAMEntry > EDMA3_DRV_PARAM_ENTRY_CCNT)))\r
971 {\r
972 result = EDMA3_DRV_E_INVALID_PARAM;\r
973 }\r
974 #endif\r
975 \r
976 /* Check if the parameters are OK. */\r
977 if (EDMA3_DRV_SOK == result)\r
978 {\r
979 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
980 drvObject = drvInst->pDrvObjectHandle;\r
981 \r
982 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
983 {\r
984 result = EDMA3_DRV_E_INVALID_PARAM;\r
985 }\r
986 else\r
987 {\r
988 paRAMId = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh].paRAMId;\r
989 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
990 \r
991 \r
992 if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))\r
993 {\r
994 result = EDMA3_DRV_E_INVALID_PARAM;\r
995 }\r
996 else\r
997 {\r
998 *paRAMEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned int)paRAMEntry));\r
999 }\r
1000 }\r
1001 }\r
1002 \r
1003 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1004 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1005 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
1006 EDMA3_DVT_dCOUNTER,\r
1007 EDMA3_DVT_dNONE,\r
1008 EDMA3_DVT_dNONE));\r
1009 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1010 \r
1011 return result;\r
1012 }\r
1013 \r
1014 \r
1015 /**\r
1016 * \brief Set a particular PaRAM set field of the specified PaRAM set\r
1017 *\r
1018 *\r
1019 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
1020 * \param lCh [IN] Logical Channel bound to the PaRAM set\r
1021 * whose specified field needs to be set\r
1022 * \param paRAMField [IN] Specify the PaRAM set field which needs\r
1023 * to be set\r
1024 * \param newPaRAMFieldVal [IN] The new field setting\r
1025 *\r
1026 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
1027 *\r
1028 * \note This API CANNOT be used while setting the PaRAM set\r
1029 * field for QDMA channels. It can trigger the QDMA channel before\r
1030 * complete PaRAM set ENTRY (4-bytes field) is written (for eg, as\r
1031 * soon one sets the ACNT field for QDMA channel, transfer is started,\r
1032 * before one modifies the BCNT field). For DMA channels, no such\r
1033 * constraint is there.\r
1034 *\r
1035 * This function is re-entrant for unique lCh values. It is non-\r
1036 * re-entrant for same lCh value.\r
1037 */\r
1038 EDMA3_DRV_Result EDMA3_DRV_setPaRAMField (EDMA3_DRV_Handle hEdma,\r
1039 unsigned int lCh,\r
1040 EDMA3_DRV_PaRAMField paRAMField,\r
1041 unsigned int newPaRAMFieldVal)\r
1042 {\r
1043 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
1044 EDMA3_DRV_Instance *drvInst = NULL;\r
1045 EDMA3_DRV_Object *drvObject = NULL;\r
1046 unsigned int paramEntryVal = 0;\r
1047 int paRAMId = 0;\r
1048 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
1049 \r
1050 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1051 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1052 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
1053 EDMA3_DVT_dCOUNTER,\r
1054 EDMA3_DVT_dNONE,\r
1055 EDMA3_DVT_dNONE));\r
1056 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1057 \r
1058 /* If parameter checking is enabled... */\r
1059 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1060 /*\r
1061 * THIS API IS NOT ALLOWED FOR QDMA CHANNELS.\r
1062 * Reason being setting one PaRAM field might trigger the\r
1063 * transfer if the word written happends to be the trigger\r
1064 * word. One should use EDMA3_DRV_setPaRAMEntry ()\r
1065 * API instead to write the whole 32 bit word.\r
1066 */\r
1067 if ((lCh >= EDMA3_DRV_QDMA_CHANNEL_0) && (lCh <= EDMA3_DRV_QDMA_CHANNEL_7))\r
1068 {\r
1069 result = EDMA3_DRV_E_INVALID_PARAM;\r
1070 }\r
1071 \r
1072 if(lCh > EDMA3_DRV_LOG_CH_MAX_VAL)\r
1073 {\r
1074 result = EDMA3_DRV_E_INVALID_PARAM;\r
1075 }\r
1076 \r
1077 if((hEdma == NULL)\r
1078 || ((paRAMField < EDMA3_DRV_PARAM_FIELD_OPT)\r
1079 || (paRAMField > EDMA3_DRV_PARAM_FIELD_CCNT)))\r
1080 {\r
1081 result = EDMA3_DRV_E_INVALID_PARAM;\r
1082 }\r
1083 #endif\r
1084 \r
1085 if (result == EDMA3_DRV_SOK)\r
1086 {\r
1087 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
1088 drvObject = drvInst->pDrvObjectHandle;\r
1089 \r
1090 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
1091 {\r
1092 result = EDMA3_DRV_E_INVALID_PARAM;\r
1093 }\r
1094 }\r
1095 \r
1096 if (result == EDMA3_DRV_SOK)\r
1097 {\r
1098 paRAMId = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh].paRAMId;\r
1099 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
1100 \r
1101 if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))\r
1102 {\r
1103 result = EDMA3_DRV_E_INVALID_PARAM;\r
1104 }\r
1105 }\r
1106 \r
1107 \r
1108 if (result == EDMA3_DRV_SOK)\r
1109 {\r
1110 switch (paRAMField)\r
1111 {\r
1112 case EDMA3_DRV_PARAM_FIELD_OPT:\r
1113 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_OPT) = newPaRAMFieldVal;\r
1114 break;\r
1115 \r
1116 case EDMA3_DRV_PARAM_FIELD_SRCADDR:\r
1117 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC) = newPaRAMFieldVal;\r
1118 break;\r
1119 \r
1120 case EDMA3_DRV_PARAM_FIELD_ACNT:\r
1121 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));\r
1122 paramEntryVal &= 0xFFFF0000u;\r
1123 newPaRAMFieldVal &= 0x0000FFFFu;\r
1124 paramEntryVal |= newPaRAMFieldVal;\r
1125 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT) = paramEntryVal;\r
1126 break;\r
1127 \r
1128 case EDMA3_DRV_PARAM_FIELD_BCNT:\r
1129 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));\r
1130 paramEntryVal &= 0x0000FFFFu;\r
1131 newPaRAMFieldVal <<= 0x10u;\r
1132 paramEntryVal |= newPaRAMFieldVal;\r
1133 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT) = paramEntryVal;\r
1134 break;\r
1135 \r
1136 case EDMA3_DRV_PARAM_FIELD_DESTADDR:\r
1137 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_DST) = newPaRAMFieldVal;\r
1138 break;\r
1139 \r
1140 case EDMA3_DRV_PARAM_FIELD_SRCBIDX:\r
1141 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));\r
1142 paramEntryVal &= 0xFFFF0000u;\r
1143 newPaRAMFieldVal &= 0x0000FFFFu;\r
1144 paramEntryVal |= newPaRAMFieldVal;\r
1145 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX) = paramEntryVal;\r
1146 break;\r
1147 \r
1148 case EDMA3_DRV_PARAM_FIELD_DESTBIDX:\r
1149 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));\r
1150 paramEntryVal &= 0x0000FFFFu;\r
1151 newPaRAMFieldVal <<= 0x10u;\r
1152 paramEntryVal |= newPaRAMFieldVal;\r
1153 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX) = paramEntryVal;\r
1154 break;\r
1155 \r
1156 case EDMA3_DRV_PARAM_FIELD_LINKADDR:\r
1157 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));\r
1158 paramEntryVal &= 0xFFFF0000u;\r
1159 newPaRAMFieldVal &= 0x0000FFFFu;\r
1160 paramEntryVal |= newPaRAMFieldVal;\r
1161 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = paramEntryVal;\r
1162 break;\r
1163 \r
1164 case EDMA3_DRV_PARAM_FIELD_BCNTRELOAD:\r
1165 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));\r
1166 paramEntryVal &= 0x0000FFFFu;\r
1167 newPaRAMFieldVal <<= 0x10u;\r
1168 paramEntryVal |= newPaRAMFieldVal;\r
1169 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD) = paramEntryVal;\r
1170 break;\r
1171 \r
1172 case EDMA3_DRV_PARAM_FIELD_SRCCIDX:\r
1173 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));\r
1174 paramEntryVal &= 0xFFFF0000u;\r
1175 newPaRAMFieldVal &= 0x0000FFFFu;\r
1176 paramEntryVal |= newPaRAMFieldVal;\r
1177 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX) = paramEntryVal;\r
1178 break;\r
1179 \r
1180 case EDMA3_DRV_PARAM_FIELD_DESTCIDX:\r
1181 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));\r
1182 paramEntryVal &= 0x0000FFFFu;\r
1183 newPaRAMFieldVal <<= 0x10u;\r
1184 paramEntryVal |= newPaRAMFieldVal;\r
1185 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX) = paramEntryVal;\r
1186 break;\r
1187 \r
1188 case EDMA3_DRV_PARAM_FIELD_CCNT:\r
1189 newPaRAMFieldVal &= 0x0000FFFFu;\r
1190 *((&globalRegs->PARAMENTRY[paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_CCNT) = newPaRAMFieldVal;\r
1191 break;\r
1192 \r
1193 default:\r
1194 break;\r
1195 }\r
1196 }\r
1197 \r
1198 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1199 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1200 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
1201 EDMA3_DVT_dCOUNTER,\r
1202 EDMA3_DVT_dNONE,\r
1203 EDMA3_DVT_dNONE));\r
1204 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1205 \r
1206 return result;\r
1207 }\r
1208 \r
1209 \r
1210 /**\r
1211 * \brief Get a particular PaRAM set field of the specified PaRAM set\r
1212 *\r
1213 *\r
1214 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
1215 * \param lCh [IN] Logical Channel bound to the PaRAM set\r
1216 * whose specified field value is needed\r
1217 * \param paRAMField [IN] Specify the PaRAM set field which needs\r
1218 * to be obtained\r
1219 * \param currPaRAMFieldVal [IN/OUT] The value of the field is returned here\r
1220 *\r
1221 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
1222 *\r
1223 * \note This function is re-entrant.\r
1224 */\r
1225 EDMA3_DRV_Result EDMA3_DRV_getPaRAMField (EDMA3_DRV_Handle hEdma,\r
1226 unsigned int lCh,\r
1227 EDMA3_DRV_PaRAMField paRAMField,\r
1228 unsigned int *currPaRAMFieldVal)\r
1229 {\r
1230 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
1231 EDMA3_DRV_Instance *drvInst = NULL;\r
1232 EDMA3_DRV_Object *drvObject = NULL;\r
1233 unsigned int paramEntryVal = 0;\r
1234 int paRAMId = 0;\r
1235 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
1236 \r
1237 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1238 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1239 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
1240 EDMA3_DVT_dCOUNTER,\r
1241 EDMA3_DVT_dNONE,\r
1242 EDMA3_DVT_dNONE));\r
1243 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1244 \r
1245 /* If parameter checking is enabled... */\r
1246 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1247 if(((lCh > EDMA3_DRV_LOG_CH_MAX_VAL)\r
1248 || ((hEdma == NULL) || (currPaRAMFieldVal == NULL)))\r
1249 || ((paRAMField < EDMA3_DRV_PARAM_FIELD_OPT)\r
1250 || (paRAMField > EDMA3_DRV_PARAM_FIELD_CCNT)))\r
1251 {\r
1252 result = EDMA3_DRV_E_INVALID_PARAM;\r
1253 }\r
1254 #endif\r
1255 \r
1256 if (result == EDMA3_DRV_SOK)\r
1257 {\r
1258 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
1259 drvObject = drvInst->pDrvObjectHandle;\r
1260 \r
1261 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
1262 {\r
1263 result = EDMA3_DRV_E_INVALID_PARAM;\r
1264 }\r
1265 }\r
1266 \r
1267 if (result == EDMA3_DRV_SOK)\r
1268 {\r
1269 paRAMId = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh].paRAMId;\r
1270 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
1271 \r
1272 if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))\r
1273 {\r
1274 result = EDMA3_DRV_E_INVALID_PARAM;\r
1275 }\r
1276 }\r
1277 \r
1278 if (result == EDMA3_DRV_SOK)\r
1279 {\r
1280 switch (paRAMField)\r
1281 {\r
1282 case EDMA3_DRV_PARAM_FIELD_OPT:\r
1283 *currPaRAMFieldVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_OPT));\r
1284 break;\r
1285 \r
1286 case EDMA3_DRV_PARAM_FIELD_SRCADDR:\r
1287 *currPaRAMFieldVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC));\r
1288 break;\r
1289 \r
1290 case EDMA3_DRV_PARAM_FIELD_ACNT:\r
1291 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));\r
1292 paramEntryVal &= 0x0000FFFFu;\r
1293 *currPaRAMFieldVal = paramEntryVal;\r
1294 break;\r
1295 \r
1296 case EDMA3_DRV_PARAM_FIELD_BCNT:\r
1297 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_ACNT_BCNT));\r
1298 paramEntryVal = paramEntryVal >> 0x10u;\r
1299 *currPaRAMFieldVal = paramEntryVal;\r
1300 break;\r
1301 \r
1302 case EDMA3_DRV_PARAM_FIELD_DESTADDR:\r
1303 *currPaRAMFieldVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_DST));\r
1304 break;\r
1305 \r
1306 case EDMA3_DRV_PARAM_FIELD_SRCBIDX:\r
1307 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));\r
1308 paramEntryVal &= 0x0000FFFFu;\r
1309 *currPaRAMFieldVal = paramEntryVal;\r
1310 break;\r
1311 \r
1312 case EDMA3_DRV_PARAM_FIELD_DESTBIDX:\r
1313 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_BIDX));\r
1314 paramEntryVal = paramEntryVal >> 0x10u;\r
1315 *currPaRAMFieldVal = paramEntryVal;\r
1316 break;\r
1317 \r
1318 case EDMA3_DRV_PARAM_FIELD_LINKADDR:\r
1319 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));\r
1320 paramEntryVal &= 0x0000FFFFu;\r
1321 *currPaRAMFieldVal = paramEntryVal;\r
1322 break;\r
1323 \r
1324 case EDMA3_DRV_PARAM_FIELD_BCNTRELOAD:\r
1325 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_LINK_BCNTRLD));\r
1326 paramEntryVal = paramEntryVal >> 0x10u;\r
1327 *currPaRAMFieldVal = paramEntryVal;\r
1328 break;\r
1329 \r
1330 case EDMA3_DRV_PARAM_FIELD_SRCCIDX:\r
1331 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));\r
1332 paramEntryVal &= 0x0000FFFFu;\r
1333 *currPaRAMFieldVal = paramEntryVal;\r
1334 break;\r
1335 \r
1336 case EDMA3_DRV_PARAM_FIELD_DESTCIDX:\r
1337 paramEntryVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_SRC_DST_CIDX));\r
1338 paramEntryVal = paramEntryVal >> 0x10u;\r
1339 *currPaRAMFieldVal = paramEntryVal;\r
1340 break;\r
1341 \r
1342 case EDMA3_DRV_PARAM_FIELD_CCNT:\r
1343 *currPaRAMFieldVal = (unsigned int)(*((&globalRegs->PARAMENTRY [paRAMId].OPT) + (unsigned)EDMA3_DRV_PARAM_ENTRY_CCNT));\r
1344 break;\r
1345 \r
1346 default:\r
1347 break;\r
1348 }\r
1349 }\r
1350 \r
1351 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1352 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1353 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
1354 EDMA3_DVT_dCOUNTER,\r
1355 EDMA3_DVT_dNONE,\r
1356 EDMA3_DVT_dNONE));\r
1357 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1358 \r
1359 return result;\r
1360 }\r
1361 \r
1362 \r
1363 /**\r
1364 * \brief Sets EDMA TC priority\r
1365 *\r
1366 * User can program the priority of the Event Queues at a system-wide level.\r
1367 * This means that the user can set the priority of an IO initiated by either\r
1368 * of the TCs (Transfer Ctrllers) relative to IO initiated by the other bus\r
1369 * masters on the device (ARM, DSP, USB, etc)\r
1370 *\r
1371 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
1372 * \param evtQPriObj [IN] Priority of the Event Queues\r
1373 *\r
1374 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
1375 *\r
1376 * \note This function disables the global interrupts while modifying\r
1377 * the global CC Registers, to make it re-entrant.\r
1378 */\r
1379 EDMA3_DRV_Result EDMA3_DRV_setEvtQPriority (EDMA3_DRV_Handle hEdma,\r
1380 const EDMA3_DRV_EvtQuePriority *evtQPriObj)\r
1381 {\r
1382 unsigned int intState;\r
1383 EDMA3_DRV_Instance *drvInst = NULL;\r
1384 EDMA3_DRV_Object *drvObject = NULL;\r
1385 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
1386 unsigned int evtQNum = 0;\r
1387 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
1388 \r
1389 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1390 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1391 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
1392 EDMA3_DVT_dCOUNTER,\r
1393 EDMA3_DVT_dNONE,\r
1394 EDMA3_DVT_dNONE));\r
1395 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1396 \r
1397 /* If parameter checking is enabled... */\r
1398 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1399 if ((hEdma == NULL) || (evtQPriObj== NULL))\r
1400 {\r
1401 result = EDMA3_DRV_E_INVALID_PARAM;\r
1402 }\r
1403 #endif\r
1404 \r
1405 /* Check if the parameters are OK. */\r
1406 if (EDMA3_DRV_SOK == result)\r
1407 {\r
1408 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
1409 drvObject = drvInst->pDrvObjectHandle;\r
1410 \r
1411 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
1412 {\r
1413 result = EDMA3_DRV_E_INVALID_PARAM;\r
1414 }\r
1415 else\r
1416 {\r
1417 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
1418 \r
1419 /* If parameter checking is enabled... */\r
1420 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1421 /* check event queue priority first*/\r
1422 while (evtQNum < drvObject->gblCfgParams.numEvtQueue)\r
1423 {\r
1424 if (evtQPriObj->evtQPri[evtQNum] > EDMA3_DRV_QPRIORITY_MAX_VAL)\r
1425 {\r
1426 result = EDMA3_DRV_E_INVALID_PARAM;\r
1427 break;\r
1428 }\r
1429 evtQNum++;\r
1430 }\r
1431 #endif\r
1432 \r
1433 if (result == EDMA3_DRV_SOK)\r
1434 {\r
1435 edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT, &intState);\r
1436 \r
1437 /* Set TC Priority among system-wide bus-masters and Queue Watermark Level */\r
1438 evtQNum = 0;\r
1439 while (evtQNum < drvObject->gblCfgParams.numEvtQueue)\r
1440 {\r
1441 globalRegs->QUEPRI = globalRegs->QUEPRI & (unsigned int)EDMA3_RM_QUEPRI_CLR_MASK(evtQNum);\r
1442 globalRegs->QUEPRI |= EDMA3_RM_QUEPRI_SET_MASK(evtQNum, evtQPriObj->evtQPri[evtQNum]);\r
1443 \r
1444 evtQNum++;\r
1445 }\r
1446 \r
1447 edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT, intState);\r
1448 }\r
1449 }\r
1450 }\r
1451 \r
1452 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1453 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1454 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
1455 EDMA3_DVT_dCOUNTER,\r
1456 EDMA3_DVT_dNONE,\r
1457 EDMA3_DVT_dNONE));\r
1458 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1459 \r
1460 return result;\r
1461 }\r
1462 \r
1463 \r
1464 \r
1465 /**\r
1466 * \brief Associate Channel to Event Queue\r
1467 *\r
1468 *\r
1469 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
1470 * \param channelId [IN] Logical Channel to which the Event\r
1471 * Queue is to be mapped\r
1472 * \param eventQ [IN] The Event Queue which is to be mapped\r
1473 * to the DMA channel\r
1474 *\r
1475 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
1476 *\r
1477 * \note There should not be any data transfer going on\r
1478 * while setting the mapping. Results could be unpredictable.\r
1479 *\r
1480 * This function disables the global interrupts while modifying\r
1481 * the global CC Registers, to make it re-entrant.\r
1482 */\r
1483 EDMA3_DRV_Result EDMA3_DRV_mapChToEvtQ(EDMA3_DRV_Handle hEdma,\r
1484 unsigned int channelId,\r
1485 EDMA3_RM_EventQueue eventQ)\r
1486 {\r
1487 EDMA3_DRV_Instance *drvInst = NULL;\r
1488 EDMA3_DRV_Object *drvObject = NULL;\r
1489 unsigned int intState;\r
1490 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
1491 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
1492 \r
1493 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1494 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1495 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
1496 EDMA3_DVT_dCOUNTER,\r
1497 EDMA3_DVT_dNONE,\r
1498 EDMA3_DVT_dNONE));\r
1499 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1500 \r
1501 /* If parameter checking is enabled... */\r
1502 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1503 if (hEdma == NULL)\r
1504 {\r
1505 result = EDMA3_DRV_E_INVALID_PARAM;\r
1506 }\r
1507 #endif\r
1508 \r
1509 if (result == EDMA3_DRV_SOK)\r
1510 {\r
1511 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
1512 drvObject = drvInst->pDrvObjectHandle;\r
1513 \r
1514 if (drvObject == NULL)\r
1515 {\r
1516 result = EDMA3_DRV_E_INVALID_PARAM;\r
1517 }\r
1518 }\r
1519 \r
1520 if (result == EDMA3_DRV_SOK)\r
1521 {\r
1522 if (drvObject->gblCfgParams.globalRegs == NULL)\r
1523 {\r
1524 result = EDMA3_DRV_E_INVALID_PARAM;\r
1525 }\r
1526 }\r
1527 \r
1528 if (result == EDMA3_DRV_SOK)\r
1529 {\r
1530 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
1531 \r
1532 /* If parameter checking is enabled... */\r
1533 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1534 /* Check the event queue */\r
1535 if (eventQ >= drvObject->gblCfgParams.numEvtQueue)\r
1536 {\r
1537 result = EDMA3_DRV_E_INVALID_PARAM;\r
1538 }\r
1539 #endif\r
1540 }\r
1541 \r
1542 if (result == EDMA3_DRV_SOK)\r
1543 {\r
1544 if (channelId <= EDMA3_DRV_DMA_CH_MAX_VAL)\r
1545 {\r
1546 /* DMA channel */\r
1547 edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT, &intState);\r
1548 \r
1549 globalRegs->DMAQNUM[channelId >> 3u] &=\r
1550 EDMA3_DRV_DMAQNUM_CLR_MASK(channelId);\r
1551 globalRegs->DMAQNUM[channelId >> 3u] |=\r
1552 EDMA3_DRV_DMAQNUM_SET_MASK(channelId, eventQ);\r
1553 \r
1554 edma3OsProtectExit(EDMA3_OS_PROTECT_INTERRUPT,intState);\r
1555 }\r
1556 else\r
1557 {\r
1558 if ((channelId >= EDMA3_DRV_QDMA_CH_MIN_VAL)\r
1559 && (channelId <= EDMA3_DRV_QDMA_CH_MAX_VAL))\r
1560 {\r
1561 /* QDMA channel */\r
1562 edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT, &intState);\r
1563 \r
1564 globalRegs->QDMAQNUM &=\r
1565 EDMA3_DRV_QDMAQNUM_CLR_MASK(channelId-EDMA3_DRV_QDMA_CH_MIN_VAL);\r
1566 globalRegs->QDMAQNUM |=\r
1567 EDMA3_DRV_QDMAQNUM_SET_MASK(channelId-EDMA3_DRV_QDMA_CH_MIN_VAL, eventQ);\r
1568 \r
1569 edma3OsProtectExit(EDMA3_OS_PROTECT_INTERRUPT,intState);\r
1570 }\r
1571 else\r
1572 {\r
1573 /* API valid for DMA/QDMA channel only, return error... */\r
1574 result = EDMA3_DRV_E_INVALID_PARAM;\r
1575 }\r
1576 }\r
1577 }\r
1578 \r
1579 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1580 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1581 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
1582 EDMA3_DVT_dCOUNTER,\r
1583 EDMA3_DVT_dNONE,\r
1584 EDMA3_DVT_dNONE));\r
1585 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1586 \r
1587 return result;\r
1588 }\r
1589 \r
1590 \r
1591 /**\r
1592 * \brief Get the Event Queue mapped to the specified DMA/QDMA channel.\r
1593 *\r
1594 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
1595 * \param channelId [IN] Logical Channel whose associated\r
1596 * Event Queue is needed\r
1597 * \param mappedEvtQ [IN/OUT] The Event Queue which is mapped\r
1598 * to the DMA/QDMA channel\r
1599 *\r
1600 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
1601 *\r
1602 * \note This function is re-entrant.\r
1603 */\r
1604 EDMA3_DRV_Result EDMA3_DRV_getMapChToEvtQ (EDMA3_DRV_Handle hEdma,\r
1605 unsigned int channelId,\r
1606 unsigned int *mappedEvtQ)\r
1607 {\r
1608 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
1609 EDMA3_DRV_Instance *drvInst = NULL;\r
1610 EDMA3_DRV_Object *drvObject = NULL;\r
1611 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
1612 \r
1613 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1614 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1615 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
1616 EDMA3_DVT_dCOUNTER,\r
1617 EDMA3_DVT_dNONE,\r
1618 EDMA3_DVT_dNONE));\r
1619 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1620 \r
1621 /* If parameter checking is enabled... */\r
1622 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1623 if (((hEdma == NULL) || (mappedEvtQ == NULL))\r
1624 || (channelId > EDMA3_DRV_LOG_CH_MAX_VAL))\r
1625 {\r
1626 result = EDMA3_DRV_E_INVALID_PARAM;\r
1627 }\r
1628 #endif\r
1629 \r
1630 /* Check if the parameters are OK. */\r
1631 if (EDMA3_DRV_SOK == result)\r
1632 {\r
1633 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
1634 drvObject = drvInst->pDrvObjectHandle;\r
1635 \r
1636 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
1637 {\r
1638 result = EDMA3_DRV_E_INVALID_PARAM;\r
1639 }\r
1640 else\r
1641 {\r
1642 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
1643 \r
1644 if (channelId <= EDMA3_DRV_DMA_CH_MAX_VAL)\r
1645 {\r
1646 *mappedEvtQ = ((globalRegs->DMAQNUM[channelId >> 3u])\r
1647 & (~(EDMA3_DRV_DMAQNUM_CLR_MASK(channelId))))\r
1648 >> ((channelId%8u)*4u);\r
1649 }\r
1650 else\r
1651 {\r
1652 if ((channelId >= EDMA3_DRV_QDMA_CH_MIN_VAL)\r
1653 &&(channelId <= EDMA3_DRV_QDMA_CH_MAX_VAL))\r
1654 {\r
1655 *mappedEvtQ = ((globalRegs->QDMAQNUM)\r
1656 & (~(EDMA3_DRV_QDMAQNUM_CLR_MASK(channelId -EDMA3_DRV_QDMA_CH_MIN_VAL))))\r
1657 >> (channelId*4u);\r
1658 }\r
1659 else\r
1660 {\r
1661 /* Only valid for DMA/QDMA channel, return error... */\r
1662 result = EDMA3_DRV_E_INVALID_PARAM;\r
1663 }\r
1664 }\r
1665 }\r
1666 }\r
1667 \r
1668 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1669 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1670 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
1671 EDMA3_DVT_dCOUNTER,\r
1672 EDMA3_DVT_dNONE,\r
1673 EDMA3_DVT_dNONE));\r
1674 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1675 \r
1676 return result;\r
1677 }\r
1678 \r
1679 \r
1680 \r
1681 /**\r
1682 * \brief Set the Channel Controller (CC) Register value\r
1683 *\r
1684 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
1685 * \param regOffset [IN] CC Register offset whose value needs to be set\r
1686 * \param newRegValue [IN] New CC Register Value\r
1687 *\r
1688 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
1689 *\r
1690 * \note This function is non re-entrant for users using the same\r
1691 * EDMA handle i.e. working on the same shadow region.\r
1692 * Before modifying a register, it tries to acquire a semaphore\r
1693 * (Driver instance specific), to protect simultaneous\r
1694 * modification of the same register by two different users.\r
1695 * After the successful change, it releases the semaphore.\r
1696 * For users working on different shadow regions, thus different\r
1697 * EDMA handles, this function is re-entrant.\r
1698 */\r
1699 EDMA3_DRV_Result EDMA3_DRV_setCCRegister (EDMA3_DRV_Handle hEdma,\r
1700 unsigned int regOffset,\r
1701 unsigned int newRegValue)\r
1702 {\r
1703 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
1704 EDMA3_DRV_Instance *drvInst = NULL;\r
1705 EDMA3_DRV_Object *drvObject = NULL;\r
1706 volatile unsigned int regPhyAddr = 0x0u;\r
1707 \r
1708 \r
1709 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1710 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1711 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
1712 EDMA3_DVT_dCOUNTER,\r
1713 EDMA3_DVT_dNONE,\r
1714 EDMA3_DVT_dNONE));\r
1715 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1716 \r
1717 \r
1718 /* If parameter checking is enabled... */\r
1719 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1720 if ((hEdma == NULL) || ((regOffset % 4u) != 0))\r
1721 {\r
1722 result = EDMA3_DRV_E_INVALID_PARAM;\r
1723 }\r
1724 #endif\r
1725 \r
1726 /* Check if the parameters are OK. */\r
1727 if (EDMA3_DRV_SOK == result)\r
1728 {\r
1729 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
1730 drvObject = drvInst->pDrvObjectHandle;\r
1731 \r
1732 if (drvObject == NULL)\r
1733 {\r
1734 result = EDMA3_DRV_E_INVALID_PARAM;\r
1735 }\r
1736 else\r
1737 {\r
1738 if (drvObject->gblCfgParams.globalRegs != NULL)\r
1739 {\r
1740 /**\r
1741 * Take the instance specific semaphore, to prevent simultaneous\r
1742 * access to the shared resources.\r
1743 */\r
1744 result = edma3OsSemTake(drvInst->drvSemHandle,\r
1745 EDMA3_OSSEM_NO_TIMEOUT);\r
1746 \r
1747 if (EDMA3_DRV_SOK == result)\r
1748 {\r
1749 /* Semaphore taken successfully, modify the registers. */\r
1750 regPhyAddr = (unsigned int)(drvObject->gblCfgParams.globalRegs) + regOffset;\r
1751 \r
1752 *(unsigned int *)regPhyAddr = newRegValue;\r
1753 \r
1754 /* Return the semaphore back */\r
1755 result = edma3OsSemGive(drvInst->drvSemHandle);\r
1756 }\r
1757 }\r
1758 }\r
1759 }\r
1760 \r
1761 \r
1762 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1763 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1764 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
1765 EDMA3_DVT_dCOUNTER,\r
1766 EDMA3_DVT_dNONE,\r
1767 EDMA3_DVT_dNONE));\r
1768 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1769 \r
1770 \r
1771 return result;\r
1772 }\r
1773 \r
1774 \r
1775 \r
1776 \r
1777 /**\r
1778 * \brief Get the Channel Controller (CC) Register value\r
1779 *\r
1780 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
1781 * \param regOffset [IN] CC Register offset whose value is needed\r
1782 * \param regValue [IN/OUT] CC Register Value\r
1783 *\r
1784 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
1785 *\r
1786 * \note This function is re-entrant.\r
1787 */\r
1788 EDMA3_DRV_Result EDMA3_DRV_getCCRegister ( EDMA3_DRV_Handle hEdma,\r
1789 unsigned int regOffset,\r
1790 unsigned int *regValue)\r
1791 {\r
1792 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
1793 EDMA3_DRV_Instance *drvInst = NULL;\r
1794 EDMA3_DRV_Object *drvObject = NULL;\r
1795 volatile unsigned int regPhyAddr = 0x0u;\r
1796 \r
1797 \r
1798 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1799 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1800 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
1801 EDMA3_DVT_dCOUNTER,\r
1802 EDMA3_DVT_dNONE,\r
1803 EDMA3_DVT_dNONE));\r
1804 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1805 \r
1806 \r
1807 /* If parameter checking is enabled... */\r
1808 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1809 if (((hEdma == NULL) || (regValue == NULL))\r
1810 || ((regOffset % 4u) != 0))\r
1811 {\r
1812 result = EDMA3_DRV_E_INVALID_PARAM;\r
1813 }\r
1814 #endif\r
1815 \r
1816 /* Check if the parameters are OK. */\r
1817 if (EDMA3_DRV_SOK == result)\r
1818 {\r
1819 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
1820 drvObject = drvInst->pDrvObjectHandle;\r
1821 \r
1822 if (drvObject == NULL)\r
1823 {\r
1824 result = EDMA3_DRV_E_INVALID_PARAM;\r
1825 }\r
1826 else\r
1827 {\r
1828 if (drvObject->gblCfgParams.globalRegs != NULL)\r
1829 {\r
1830 regPhyAddr = (unsigned int)(drvObject->gblCfgParams.globalRegs) + regOffset;\r
1831 \r
1832 *regValue = *(unsigned int *)regPhyAddr;\r
1833 }\r
1834 }\r
1835 }\r
1836 \r
1837 \r
1838 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1839 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1840 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
1841 EDMA3_DVT_dCOUNTER,\r
1842 EDMA3_DVT_dNONE,\r
1843 EDMA3_DVT_dNONE));\r
1844 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1845 \r
1846 \r
1847 return result;\r
1848 }\r
1849 \r
1850 \r
1851 \r
1852 /**\r
1853 * \brief Wait for a transfer completion interrupt to occur and clear it.\r
1854 *\r
1855 * This is a blocking function that returns when the IPR/IPRH bit corresponding\r
1856 * to the tccNo specified, is SET. It clears the corresponding bit while\r
1857 * returning also.\r
1858 *\r
1859 * This function waits for the specific bit indefinitely in a tight loop, with\r
1860 * out any delay in between. USE IT CAUTIOUSLY.\r
1861 *\r
1862 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
1863 * \param tccNo [IN] TCC, specific to which the function\r
1864 * waits on a IPR/IPRH bit.\r
1865 *\r
1866 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
1867 *\r
1868 * \note This function is re-entrant for different tccNo.\r
1869 */\r
1870 EDMA3_DRV_Result EDMA3_DRV_waitAndClearTcc (EDMA3_DRV_Handle hEdma,\r
1871 unsigned int tccNo)\r
1872 {\r
1873 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
1874 EDMA3_DRV_Instance *drvInst = NULL;\r
1875 EDMA3_DRV_Object *drvObject = NULL;\r
1876 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
1877 volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;\r
1878 unsigned int tccBitMask = 0x0u;\r
1879 \r
1880 \r
1881 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1882 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1883 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
1884 EDMA3_DVT_dCOUNTER,\r
1885 EDMA3_DVT_dNONE,\r
1886 EDMA3_DVT_dNONE));\r
1887 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1888 \r
1889 \r
1890 /* If parameter checking is enabled... */\r
1891 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1892 if (hEdma == NULL)\r
1893 {\r
1894 result = EDMA3_DRV_E_INVALID_PARAM;\r
1895 }\r
1896 #endif\r
1897 \r
1898 /* Check if the parameters are OK. */\r
1899 if (EDMA3_DRV_SOK == result)\r
1900 {\r
1901 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
1902 drvObject = drvInst->pDrvObjectHandle;\r
1903 \r
1904 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
1905 {\r
1906 result = EDMA3_DRV_E_INVALID_PARAM;\r
1907 }\r
1908 else\r
1909 {\r
1910 /* If parameter checking is enabled... */\r
1911 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
1912 if (tccNo >= drvObject->gblCfgParams.numTccs)\r
1913 {\r
1914 result = EDMA3_DRV_E_INVALID_PARAM;\r
1915 }\r
1916 #endif\r
1917 \r
1918 /* Check if the parameters are OK. */\r
1919 if (EDMA3_DRV_SOK == result)\r
1920 {\r
1921 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
1922 shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)\r
1923 (&globalRegs->SHADOW[drvInst->regionId]);\r
1924 \r
1925 \r
1926 if (shadowRegs != NULL)\r
1927 {\r
1928 if(tccNo < 32u)\r
1929 {\r
1930 tccBitMask = (1u << tccNo);\r
1931 \r
1932 /* Check the status of the IPR[tccNo] bit. */\r
1933 while (FALSE == (shadowRegs->IPR & tccBitMask))\r
1934 {\r
1935 /* Transfer not yet completed, bit not SET */\r
1936 }\r
1937 \r
1938 /**\r
1939 * Bit found SET, transfer is completed,\r
1940 * clear the pending interrupt and return.\r
1941 */\r
1942 shadowRegs->ICR = tccBitMask;\r
1943 }\r
1944 else\r
1945 {\r
1946 tccBitMask = (1u << (tccNo - 32u));\r
1947 \r
1948 /* Check the status of the IPRH[tccNo-32] bit. */\r
1949 while (FALSE == (shadowRegs->IPRH & tccBitMask))\r
1950 {\r
1951 /* Transfer not yet completed, bit not SET */\r
1952 }\r
1953 \r
1954 /**\r
1955 * Bit found SET, transfer is completed,\r
1956 * clear the pending interrupt and return.\r
1957 */\r
1958 shadowRegs->ICRH = tccBitMask;\r
1959 }\r
1960 }\r
1961 }\r
1962 }\r
1963 }\r
1964 \r
1965 \r
1966 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
1967 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
1968 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
1969 EDMA3_DVT_dCOUNTER,\r
1970 EDMA3_DVT_dNONE,\r
1971 EDMA3_DVT_dNONE));\r
1972 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
1973 \r
1974 \r
1975 return result;\r
1976 }\r
1977 \r
1978 \r
1979 /**\r
1980 * \brief Returns the status of a previously initiated transfer.\r
1981 *\r
1982 * This is a non-blocking function that returns the status of a previously\r
1983 * initiated transfer, based on the IPR/IPRH bit. This bit corresponds to\r
1984 * the tccNo specified by the user. It clears the corresponding bit, if SET,\r
1985 * while returning also.\r
1986 *\r
1987 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
1988 * \param tccNo [IN] TCC, specific to which the function\r
1989 * checks the status of the IPR/IPRH bit.\r
1990 * \param tccStatus [IN/OUT] Status of the transfer is returned here.\r
1991 * Returns "TRUE" if the transfer has\r
1992 * completed (IPR/IPRH bit SET),\r
1993 * "FALSE" if the transfer has not completed\r
1994 * successfully (IPR/IPRH bit NOT SET).\r
1995 *\r
1996 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
1997 *\r
1998 * \note This function is re-entrant for different tccNo.\r
1999 */\r
2000 EDMA3_DRV_Result EDMA3_DRV_checkAndClearTcc (EDMA3_DRV_Handle hEdma,\r
2001 unsigned int tccNo,\r
2002 unsigned short *tccStatus)\r
2003 {\r
2004 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
2005 EDMA3_DRV_Instance *drvInst = NULL;\r
2006 EDMA3_DRV_Object *drvObject = NULL;\r
2007 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
2008 volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;\r
2009 unsigned int tccBitMask = 0x0u;\r
2010 \r
2011 \r
2012 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
2013 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
2014 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
2015 EDMA3_DVT_dCOUNTER,\r
2016 EDMA3_DVT_dNONE,\r
2017 EDMA3_DVT_dNONE));\r
2018 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
2019 \r
2020 \r
2021 /* If parameter checking is enabled... */\r
2022 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
2023 if ((hEdma == NULL) || (tccStatus == NULL))\r
2024 {\r
2025 result = EDMA3_DRV_E_INVALID_PARAM;\r
2026 }\r
2027 #endif\r
2028 \r
2029 /* Check if the parameters are OK. */\r
2030 if (EDMA3_DRV_SOK == result)\r
2031 {\r
2032 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
2033 drvObject = drvInst->pDrvObjectHandle;\r
2034 \r
2035 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
2036 {\r
2037 result = EDMA3_DRV_E_INVALID_PARAM;\r
2038 }\r
2039 else\r
2040 {\r
2041 /* If parameter checking is enabled... */\r
2042 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
2043 if (tccNo >= drvObject->gblCfgParams.numTccs)\r
2044 {\r
2045 result = EDMA3_DRV_E_INVALID_PARAM;\r
2046 }\r
2047 #endif\r
2048 \r
2049 /* Check if the parameters are OK. */\r
2050 if (EDMA3_DRV_SOK == result)\r
2051 {\r
2052 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
2053 shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)\r
2054 (&globalRegs->SHADOW[drvInst->regionId]);\r
2055 \r
2056 /* Reset the tccStatus */\r
2057 *tccStatus = FALSE;\r
2058 \r
2059 if (shadowRegs != NULL)\r
2060 {\r
2061 if(tccNo < 32u)\r
2062 {\r
2063 tccBitMask = (1u << tccNo);\r
2064 \r
2065 /* Check the status of the IPR[tccNo] bit. */\r
2066 if ((shadowRegs->IPR & tccBitMask) != FALSE)\r
2067 {\r
2068 /* Transfer completed, bit found SET */\r
2069 *tccStatus = TRUE;\r
2070 \r
2071 /* Clear the pending interrupt also. */\r
2072 shadowRegs->ICR = tccBitMask;\r
2073 }\r
2074 }\r
2075 else\r
2076 {\r
2077 tccBitMask = (1u << (tccNo - 32u));\r
2078 \r
2079 /* Check the status of the IPRH[tccNo-32] bit. */\r
2080 if ((shadowRegs->IPRH & tccBitMask) != FALSE)\r
2081 {\r
2082 /* Transfer completed, bit found SET */\r
2083 *tccStatus = TRUE;\r
2084 \r
2085 /* Clear the pending interrupt also. */\r
2086 shadowRegs->ICRH = tccBitMask;\r
2087 }\r
2088 }\r
2089 }\r
2090 }\r
2091 }\r
2092 }\r
2093 \r
2094 \r
2095 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
2096 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
2097 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
2098 EDMA3_DVT_dCOUNTER,\r
2099 EDMA3_DVT_dNONE,\r
2100 EDMA3_DVT_dNONE));\r
2101 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
2102 \r
2103 \r
2104 return result;\r
2105 }\r
2106 \r
2107 \r
2108 \r
2109 /**\r
2110 * \brief Get the PaRAM Set Physical Address associated with a logical channel\r
2111 *\r
2112 * This function returns the PaRAM Set Phy Address (unsigned 32 bits).\r
2113 * The returned address could be used by the advanced users to program the\r
2114 * PaRAM Set directly without using any APIs.\r
2115 *\r
2116 * Least significant 16 bits of this address could be used to program\r
2117 * the LINK field in the PaRAM Set.\r
2118 * Users which program the LINK field directly SHOULD use this API\r
2119 * to get the associated PaRAM Set address with the LINK channel.\r
2120 *\r
2121 *\r
2122 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
2123 * \param lCh [IN] Logical Channel for which the PaRAM set\r
2124 * physical address is required\r
2125 * \param paramPhyAddr [IN/OUT] PaRAM Set physical address is returned\r
2126 * here.\r
2127 *\r
2128 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
2129 *\r
2130 * \note This function is re-entrant.\r
2131 */\r
2132 EDMA3_DRV_Result EDMA3_DRV_getPaRAMPhyAddr(EDMA3_DRV_Handle hEdma,\r
2133 unsigned int lCh,\r
2134 unsigned int *paramPhyAddr)\r
2135 {\r
2136 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
2137 EDMA3_DRV_Instance *drvInst = NULL;\r
2138 EDMA3_DRV_Object *drvObject = NULL;\r
2139 int paRAMId = 0;\r
2140 volatile EDMA3_CCRL_Regs *globalRegs = NULL;\r
2141 \r
2142 \r
2143 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
2144 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
2145 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
2146 EDMA3_DVT_dCOUNTER,\r
2147 EDMA3_DVT_dNONE,\r
2148 EDMA3_DVT_dNONE));\r
2149 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
2150 \r
2151 \r
2152 /* If parameter checking is enabled... */\r
2153 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
2154 if (((lCh > EDMA3_DRV_LOG_CH_MAX_VAL) || (hEdma == NULL))\r
2155 || (paramPhyAddr == NULL))\r
2156 {\r
2157 result = EDMA3_DRV_E_INVALID_PARAM;\r
2158 }\r
2159 #endif\r
2160 \r
2161 /* Check if the parameters are OK. */\r
2162 if (EDMA3_DRV_SOK == result)\r
2163 {\r
2164 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
2165 drvObject = drvInst->pDrvObjectHandle;\r
2166 \r
2167 if ((drvObject == NULL) || (drvObject->gblCfgParams.globalRegs == NULL))\r
2168 {\r
2169 result = EDMA3_DRV_E_INVALID_PARAM;\r
2170 }\r
2171 else\r
2172 {\r
2173 globalRegs = (volatile EDMA3_CCRL_Regs *)(drvObject->gblCfgParams.globalRegs);\r
2174 paRAMId = edma3DrvChBoundRes[drvObject->phyCtrllerInstId][lCh].paRAMId;\r
2175 \r
2176 if ((paRAMId < 0) || (paRAMId >= drvObject->gblCfgParams.numPaRAMSets))\r
2177 {\r
2178 result = EDMA3_DRV_E_INVALID_PARAM;\r
2179 }\r
2180 else\r
2181 {\r
2182 *paramPhyAddr = (unsigned int)&(globalRegs->PARAMENTRY [paRAMId].OPT);\r
2183 }\r
2184 }\r
2185 }\r
2186 \r
2187 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
2188 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
2189 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
2190 EDMA3_DVT_dCOUNTER,\r
2191 EDMA3_DVT_dNONE,\r
2192 EDMA3_DVT_dNONE));\r
2193 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
2194 \r
2195 return result;\r
2196 \r
2197 }\r
2198 \r
2199 \r
2200 \r
2201 /**\r
2202 * \brief EDMA3 Driver IOCTL\r
2203 *\r
2204 * This function provides IOCTL functionality for EDMA3 Driver.\r
2205 *\r
2206 * \param hEdma [IN] Handle to the EDMA Driver Instance\r
2207 * \param cmd [IN] IOCTL command to be performed\r
2208 * \param cmdArg [IN/OUT] IOCTL command argument (if any)\r
2209 * \param param [IN/OUT] Device/Cmd specific argument\r
2210 *\r
2211 * \return EDMA3_DRV_SOK or EDMA3_DRV Error Code\r
2212 */\r
2213 EDMA3_DRV_Result EDMA3_DRV_Ioctl(\r
2214 EDMA3_DRV_Handle hEdma,\r
2215 EDMA3_DRV_IoctlCmd cmd,\r
2216 void *cmdArg,\r
2217 void *param\r
2218 )\r
2219 {\r
2220 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
2221 EDMA3_DRV_Instance *drvInst = NULL;\r
2222 \r
2223 /* To remove CCS warnings */\r
2224 (void)param;\r
2225 \r
2226 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
2227 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
2228 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,\r
2229 EDMA3_DVT_dCOUNTER,\r
2230 EDMA3_DVT_dNONE,\r
2231 EDMA3_DVT_dNONE));\r
2232 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
2233 \r
2234 \r
2235 /* If parameter checking is enabled... */\r
2236 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
2237 if (hEdma == NULL)\r
2238 {\r
2239 result = EDMA3_DRV_E_INVALID_PARAM;\r
2240 }\r
2241 \r
2242 if ((cmd <= EDMA3_DRV_IOCTL_MIN_IOCTL)\r
2243 || (cmd >= EDMA3_DRV_IOCTL_MAX_IOCTL))\r
2244 {\r
2245 result = EDMA3_DRV_E_INVALID_PARAM;\r
2246 }\r
2247 #endif\r
2248 \r
2249 if (result == EDMA3_DRV_SOK)\r
2250 {\r
2251 drvInst = (EDMA3_DRV_Instance *)hEdma;\r
2252 \r
2253 if (drvInst == NULL)\r
2254 {\r
2255 result = EDMA3_DRV_E_INVALID_PARAM;\r
2256 }\r
2257 }\r
2258 \r
2259 if (result == EDMA3_DRV_SOK)\r
2260 {\r
2261 switch (cmd)\r
2262 {\r
2263 case EDMA3_DRV_IOCTL_SET_PARAM_CLEAR_OPTION:\r
2264 {\r
2265 result = EDMA3_RM_Ioctl (drvInst->resMgrInstance, EDMA3_RM_IOCTL_SET_PARAM_CLEAR_OPTION, cmdArg, param);\r
2266 \r
2267 break;\r
2268 }\r
2269 \r
2270 case EDMA3_DRV_IOCTL_GET_PARAM_CLEAR_OPTION:\r
2271 {\r
2272 if (NULL == cmdArg)\r
2273 {\r
2274 result = EDMA3_DRV_E_INVALID_PARAM;\r
2275 }\r
2276 else\r
2277 {\r
2278 result = EDMA3_RM_Ioctl (drvInst->resMgrInstance, EDMA3_RM_IOCTL_GET_PARAM_CLEAR_OPTION, cmdArg, param);\r
2279 }\r
2280 \r
2281 break;\r
2282 }\r
2283 \r
2284 default:\r
2285 /* You passed invalid IOCTL cmd */\r
2286 result = EDMA3_DRV_E_INVALID_PARAM;\r
2287 }\r
2288 }\r
2289 \r
2290 \r
2291 #ifdef EDMA3_INSTRUMENTATION_ENABLED\r
2292 EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",\r
2293 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,\r
2294 EDMA3_DVT_dCOUNTER,\r
2295 EDMA3_DVT_dNONE,\r
2296 EDMA3_DVT_dNONE));\r
2297 #endif /* EDMA3_INSTRUMENTATION_ENABLED */\r
2298 \r
2299 return result;\r
2300 \r
2301 }\r
2302 \r
2303 \r
2304 \r
2305 /**\r
2306 * \brief Return the previously opened EDMA3 Driver Instance handle\r
2307 *\r
2308 * This API is used to return the previously opened EDMA3 Driver's\r
2309 * Instance Handle (region specific), which could be used to call other\r
2310 * EDMA3 Driver APIs. Since EDMA3 Driver does not allow multiple instances,\r
2311 * for a single shadow region, this API is provided. This API is meant\r
2312 * for users who DO NOT want to / could not open a new Driver Instance and\r
2313 * hence re-use the existing Driver Instance to allocate EDMA3 resources\r
2314 * and use various other EDMA3 Driver APIs.\r
2315 *\r
2316 * In case the Driver Instance is not yet opened, NULL is returned as the\r
2317 * function return value whereas EDMA3_DRV_E_INST_NOT_OPENED is returned\r
2318 * in the errorCode.\r
2319 *\r
2320 * \param phyCtrllerInstId [IN] EDMA3 Controller Instance Id (Hardware\r
2321 * instance id, starting from 0).\r
2322 * \param regionId [IN] Shadow Region id for which the previously\r
2323 * opened driver's instance handle is\r
2324 * required.\r
2325 * \param errorCode [OUT] Error code while returning Driver Instance\r
2326 * Handle.\r
2327 *\r
2328 * \return EDMA3_DRV_Handle : If successful, this API will return the\r
2329 * driver's instance handle.\r
2330 *\r
2331 * \note 1) This API returns the previously opened EDMA3 Driver's Instance\r
2332 * handle. The instance, if exists, could have been opened by some other\r
2333 * user (most probably) or may be by the same user calling this API. If\r
2334 * it was opened by some other user, then that user can very well close\r
2335 * this instance anytime, without even knowing that the same instance\r
2336 * handle is being used by other users as well. In that case, the\r
2337 * handle becomes INVALID and user has to open a valid driver\r
2338 * instance for his/her use.\r
2339 *\r
2340 * 2) This function is re-entrant.\r
2341 */\r
2342 EDMA3_DRV_Handle EDMA3_DRV_getInstHandle(unsigned int phyCtrllerInstId,\r
2343 EDMA3_RM_RegionId regionId,\r
2344 EDMA3_DRV_Result *errorCode)\r
2345 {\r
2346 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
2347 EDMA3_DRV_Object *drvObject = NULL;\r
2348 EDMA3_DRV_Instance *drvInstanceHandle = NULL;\r
2349 \r
2350 /* If parameter checking is enabled... */\r
2351 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
2352 if ((phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)\r
2353 || (errorCode == NULL))\r
2354 {\r
2355 result = EDMA3_DRV_E_INVALID_PARAM;\r
2356 }\r
2357 #endif\r
2358 \r
2359 if (EDMA3_DRV_SOK == result)\r
2360 {\r
2361 drvObject = &drvObj[phyCtrllerInstId];\r
2362 \r
2363 if (NULL == drvObject)\r
2364 {\r
2365 result = EDMA3_DRV_E_INVALID_PARAM;\r
2366 }\r
2367 \r
2368 /* If parameter checking is enabled... */\r
2369 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE\r
2370 /* Check regionId. */\r
2371 if (regionId >= drvObject->gblCfgParams.numRegions)\r
2372 {\r
2373 result = EDMA3_DRV_E_INVALID_PARAM;\r
2374 }\r
2375 #endif\r
2376 }\r
2377 \r
2378 if (EDMA3_DRV_SOK == result)\r
2379 {\r
2380 /* If the driver instance is already opened for this specific region,\r
2381 * return it, else return an error.\r
2382 */\r
2383 drvInstanceHandle = &drvInstance[phyCtrllerInstId][regionId];\r
2384 \r
2385 if (NULL == drvInstanceHandle->pDrvObjectHandle)\r
2386 {\r
2387 /* Instance not opened yet!!! */\r
2388 drvInstanceHandle = NULL;\r
2389 result = EDMA3_DRV_E_INST_NOT_OPENED;\r
2390 }\r
2391 }\r
2392 \r
2393 *errorCode = result;\r
2394 return (EDMA3_DRV_Handle)drvInstanceHandle;\r
2395 }\r
2396 \r
2397 \r
2398 /* End of File */\r