[keystone-rtos/edma3_lld.git] / packages / ti / sdo / edma3 / rm / sample / src / platforms / sample_omapl138_arm_int_reg.c
1 /*
2 * sample_omapl138_int_reg.c
3 *
4 * Platform specific interrupt registration and un-registration routines.
5 *
6 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
7 *
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 *
13 * Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 *
16 * Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the
19 * distribution.
20 *
21 * Neither the name of Texas Instruments Incorporated nor the names of
22 * its contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 */
39 #include <ti/sysbios/knl/Semaphore.h>
40 #include <ti/sysbios/hal/Hwi.h>
42 #include <ti/sdo/edma3/rm/sample/bios6_edma3_rm_sample.h>
44 /**
45 * EDMA3 TC ISRs which need to be registered with the underlying OS by the user
46 * (Not all TC error ISRs need to be registered, register only for the
47 * available Transfer Controllers).
48 */
49 void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(unsigned int arg) =
50 {
51 &lisrEdma3TC0ErrHandler0,
52 &lisrEdma3TC1ErrHandler0,
53 &lisrEdma3TC2ErrHandler0,
54 &lisrEdma3TC3ErrHandler0,
55 &lisrEdma3TC4ErrHandler0,
56 &lisrEdma3TC5ErrHandler0,
57 &lisrEdma3TC6ErrHandler0,
58 &lisrEdma3TC7ErrHandler0,
59 };
61 extern unsigned int ccXferCompInt[][EDMA3_MAX_REGIONS];
62 extern unsigned int ccErrorInt[];
63 extern unsigned int tcErrorInt[][EDMA3_MAX_TC];
64 extern unsigned int numEdma3Tc[];
66 /**
67 * Variables which will be used internally for referring the hardware interrupt
68 * for various EDMA3 interrupts.
69 */
70 extern unsigned int hwIntXferComp[];
71 extern unsigned int hwIntCcErr[];
72 extern unsigned int hwIntTcErr[];
74 extern unsigned int dsp_num;
75 /* This variable has to be used as an extern */
76 unsigned int gpp_num = 0;
78 Hwi_Handle hwiCCXferCompInt;
79 Hwi_Handle hwiCCErrInt;
80 Hwi_Handle hwiTCErrInt[EDMA3_MAX_TC];
82 /** To Register the ISRs with the underlying OS, if required. */
83 void registerEdma3Interrupts (unsigned int edma3Id)
84 {
85 static UInt32 cookie = 0;
86 unsigned int numTc = 0;
87 Hwi_Params hwiParams;
89 /* Disabling the global interrupts */
90 cookie = Hwi_disable();
92 /* Initialize the HWI parameters with user specified values */
93 Hwi_Params_init(&hwiParams);
95 /* argument for the ISR */
96 hwiParams.arg = edma3Id;
97 /* set the priority ID */
98 hwiParams.priority = hwIntXferComp[edma3Id];
100 hwiCCXferCompInt = Hwi_create( ccXferCompInt[edma3Id][gpp_num],
101 (&lisrEdma3ComplHandler0),
102 (const Hwi_Params *) (&hwiParams),
103 NULL);
104 /* Initialize the HWI parameters with user specified values */
105 Hwi_Params_init(&hwiParams);
106 /* argument for the ISR */
107 hwiParams.arg = edma3Id;
108 /* set the priority ID */
109 hwiParams.priority = hwIntCcErr[edma3Id];
111 hwiCCErrInt = Hwi_create( ccErrorInt[edma3Id],
112 (&lisrEdma3CCErrHandler0),
113 (const Hwi_Params *) (&hwiParams),
114 NULL);
116 while (numTc < numEdma3Tc[edma3Id])
117 {
118 /* Initialize the HWI parameters with user specified values */
119 Hwi_Params_init(&hwiParams);
120 /* argument for the ISR */
121 hwiParams.arg = edma3Id;
122 /* set the priority ID */
123 hwiParams.priority = hwIntTcErr[edma3Id];
125 hwiTCErrInt[numTc] = Hwi_create( tcErrorInt[edma3Id][numTc],
126 (ptrEdma3TcIsrHandler[numTc]),
127 (const Hwi_Params *) (&hwiParams),
128 NULL);
129 numTc++;
130 }
131 /* Restore interrupts */
132 Hwi_restore(cookie);
133 }
135 /** To Unregister the ISRs with the underlying OS, if previously registered. */
136 void unregisterEdma3Interrupts (unsigned int edma3Id)
137 {
138 static UInt32 cookie = 0;
139 unsigned int numTc = 0;
141 /* Disabling the global interrupts */
142 cookie = Hwi_disable();
144 Hwi_delete(&hwiCCXferCompInt);
145 Hwi_delete(&hwiCCErrInt);
146 while (numTc < numEdma3Tc[edma3Id])
147 {
148 Hwi_delete(&hwiTCErrInt[numTc]);
149 numTc++;
150 }
151 /* Restore interrupts */
152 Hwi_restore(cookie);
153 }