misrac fix for 4.2.0 (PRSDK-3354)
[keystone-rtos/edma3_lld.git] / packages / ti / sdo / edma3 / rm / src / edma3resmgr.c
1 /*
2  * edma3resmgr.c
3  *
4  * EDMA3 Controller Resource Manager Interface Implementation
5  *
6  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
7  *
8  *
9  *  Redistribution and use in source and binary forms, with or without
10  *  modification, are permitted provided that the following conditions
11  *  are met:
12  *
13  *    Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  *
16  *    Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the
19  *    distribution.
20  *
21  *    Neither the name of Texas Instruments Incorporated nor the names of
22  *    its contributors may be used to endorse or promote products derived
23  *    from this software without specific prior written permission.
24  *
25  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37 */
39 /* Resource Manager Internal Header Files */
40 #include <ti/sdo/edma3/rm/src/edma3resmgr.h>
42 /* Instrumentation Header File */
43 #ifdef EDMA3_INSTRUMENTATION_ENABLED
44 #include <ti/sdo/edma3/rm/src/edma3_log.h>
45 #endif
47 /* For assert() */
48 /**
49  * Define NDEBUG to ignore assert().
50  * NDEBUG should be defined before including assert.h header file.
51  */
52 #include <assert.h>
55 /* Global Defines, need to re-compile if values are changed */
56 /*---------------------------------------------------------------------------*/
57 /**
58  * \brief EDMA3 Resource Manager behaviour of clearing CC ERROR interrupts.
59  *         This macro controls the driver to enable/disable clearing of error
60  *         status of all channels.
61  *
62  *         On disabling this (with value 0x0), the channels owned by the region
63  *         is cleared and its expected that some other entity is responsible for
64  *         clearing the error status for channels not owned.
65  *
66  *         Its recomended that this flag is a positive value, to ensure that
67  *         error flags are cleared for all the channels.
68  */
69 #define EDMA3_RM_RES_CLEAR_ERROR_STATUS_FOR_ALL_CHANNELS (TRUE)
71 /**
72  * \brief EDMA3 Resource Manager retry count to check the pending interrupts inside ISR.
73  *         This macro controls the driver to check the pending interrupt for
74  *         'n' number of times.
75  *         Minumum value is 1.
76  */
77 #define EDMA3_RM_COMPL_HANDLER_RETRY_COUNT (10U)
79 /**
80  * \brief EDMA3 Resource Manager retry count to check the pending CC Error Interrupt inside ISR
81  *         This macro controls the driver to check the pending CC Error
82  *         interrupt for 'n' number of times.
83  *         Minumum value is 1.
84  */
85 #define EDMA3_RM_CCERR_HANDLER_RETRY_COUNT (10U)
89 /* Externel Variables */
90 /*---------------------------------------------------------------------------*/
91 /**
92  * Maximum Resource Manager Instances supported by the EDMA3 Package.
93  */
94 extern const uint32_t EDMA3_MAX_RM_INSTANCES;
97 #ifndef GENERIC
98 /**
99  * \brief Static Configuration structure for EDMA3
100  * controller, to provide Global SoC specific Information.
101  *
102  * This configuration info can also be provided by the user at run-time,
103  * while calling EDMA3_RM_create (). If not provided at run-time,
104  * this info will be taken from the config file "edma3_<PLATFORM_NAME>_cfg.c",
105  * for the specified platform.
106  */
107 extern EDMA3_RM_GblConfigParams edma3GblCfgParams [EDMA3_MAX_EDMA3_INSTANCES];
109 /**
110  * \brief Default Static Region Specific Configuration structure for
111  * EDMA3 controller, to provide region specific Information.
112  */
113 extern EDMA3_RM_InstanceInitConfig defInstInitConfig [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
115 #endif
118 /**
119  * \brief Region Specific Configuration structure for
120  * EDMA3 controller, to provide region specific Information.
121  *
122  * This configuration info can also be provided by the user at run-time,
123  * while calling EDMA3_RM_open (). If not provided at run-time,
124  * this info will be taken from the config file "edma3_<PLATFORM_NAME>_cfg.c",
125  * for the specified platform.
126  */
127 #ifdef BUILD_C6XDSP
128 extern far EDMA3_RM_InstanceInitConfig *userInitConfig;
129 extern far EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;
130 #else
131 extern EDMA3_RM_InstanceInitConfig *userInitConfig;
132 extern EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;
133 #endif
135 /**
136  * Handles of EDMA3 Resource Manager Instances.
137  *
138  * Used to maintain information of the EDMA3 RM Instances
139  * for each HW controller.
140  * There could be a maximum of EDMA3_MAX_RM_INSTANCES instances per
141  * EDMA3 HW.
142  */
143 #ifdef BUILD_C6XDSP
144 extern far EDMA3_RM_Instance *resMgrInstance;
145 extern far EDMA3_RM_Instance *ptrRMIArray;
146 #else
147 extern EDMA3_RM_Instance *ptrRMIArray;
148 extern EDMA3_RM_Instance *resMgrInstance;
150 #endif
151 /** Max of DMA Channels */
152 uint32_t edma3_dma_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
153 /** Min of Link Channels */
154 uint32_t edma3_link_ch_min_val[EDMA3_MAX_EDMA3_INSTANCES];
155 /** Max of Link Channels */
156 uint32_t edma3_link_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
157 /** Min of QDMA Channels */
158 uint32_t edma3_qdma_ch_min_val[EDMA3_MAX_EDMA3_INSTANCES];
159 /** Max of QDMA Channels */
160 uint32_t edma3_qdma_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
161 /** Max of Logical Channels */
162 uint32_t edma3_log_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
164 /* Globals */
165 /*---------------------------------------------------------------------------*/
166 /**
167  * \brief EDMA3 Resource Manager Objects, tied to each EDMA3 HW Controller.
168  *
169  * Typically one RM object will cater to one EDMA3 HW controller
170  * and will have all the global config information.
171  */
172 #ifdef BUILD_C6XDSP
173 #pragma DATA_SECTION(resMgrObj, ".fardata:.edma3Globals");
174 #endif
175 EDMA3_RM_Obj resMgrObj[EDMA3_MAX_EDMA3_INSTANCES];
178 /**
179  * Global Array to store the mapping between DMA channels and Interrupt
180  * channels i.e. TCCs.
181  * DMA channel X can use any TCC Y. Transfer completion
182  * interrupt will occur on the TCC Y (IPR/IPRH Register, bit Y), but error
183  * interrupt will occur on DMA channel X (EMR/EMRH register, bit X). In that
184  * scenario, this DMA channel <-> TCC mapping will be used to point to
185  * the correct callback function.
186  */
187 #ifdef BUILD_C6XDSP
188 #pragma DATA_SECTION(edma3DmaChTccMapping, ".fardata:.edma3Globals");
189 #endif
190 static uint32_t edma3DmaChTccMapping [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_DMA_CH];
193 /**
194  * Global Array to store the mapping between QDMA channels and Interrupt
195  * channels i.e. TCCs.
196  * QDMA channel X can use any TCC Y. Transfer completion
197  * interrupt will occur on the TCC Y (IPR/IPRH Register, bit Y), but error
198  * interrupt will occur on QDMA channel X (QEMR register, bit X). In that
199  * scenario, this QDMA channel <-> TCC mapping will be used to point to
200  * the correct callback function.
201  */
202 #ifdef BUILD_C6XDSP
203 #pragma DATA_SECTION(edma3QdmaChTccMapping, ".fardata:.edma3Globals");
204 #endif
205 static uint32_t edma3QdmaChTccMapping [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_QDMA_CH];
208 /**
209  * Global Array to maintain the Callback details registered
210  * against a particular TCC. Used to call the callback
211  * functions linked to the particular channel.
212  */
213 #ifdef BUILD_C6XDSP
214 #pragma DATA_SECTION(edma3IntrParams, ".fardata:.edma3Globals");
215 #endif
216 static EDMA3_RM_TccCallbackParams edma3IntrParams [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_TCC];
219 /** edma3RegionId will be updated ONCE using the parameter regionId passed to
220  * the EDMA3_RM_open() function, for the Master RM instance (one who
221  * configures the Global Registers).
222  * This global variable will be used within the Interrupt handlers to know
223  * which shadow region registers to access. All other interrupts coming
224  * from other shadow regions will not be handled.
225  */
226 #ifdef BUILD_C6XDSP
227 #pragma DATA_SECTION(edma3RegionId, ".fardata:.edma3Globals");
228 #endif
229 static EDMA3_RM_RegionId edma3RegionId = EDMA3_MAX_REGIONS;
231 /** masterExists[] will be updated when the Master RM Instance modifies the
232  * Global EDMA3 configuration registers. It is used to prevent any other
233  * Master RM Instance creation.
234  * masterExists[] is per EDMA3 hardware, hence it is created
235  * as an array.
236  */
237 #ifdef BUILD_C6XDSP
238 #pragma DATA_SECTION(masterExists, ".fardata:.edma3Globals");
239 #endif
240 static uint32_t masterExists [EDMA3_MAX_EDMA3_INSTANCES] = {FALSE,FALSE,FALSE,FALSE,FALSE};
242 /**
243  * Number of PaRAM Sets actually present on the SoC. This will be updated
244  * while creating the Resource Manager Object.
245  */
246 #ifdef BUILD_C6XDSP
247 #pragma DATA_SECTION(edma3NumPaRAMSets, ".fardata:.edma3Globals");
248 #endif
249 uint32_t edma3NumPaRAMSets = EDMA3_MAX_PARAM_SETS;
252 /**
253  * The list of Interrupt Channels which get allocated while requesting the
254  * TCC. It will be used while checking the IPR/IPRH bits in the RM ISR.
255  */
256 #ifdef BUILD_C6XDSP
257 #pragma DATA_SECTION(allocatedTCCs, ".fardata:.edma3Globals");
258 #endif
259 static uint32_t allocatedTCCs[EDMA3_MAX_EDMA3_INSTANCES][2U] =
260                                                                                         {
261                                                                                         {0x0U, 0x0U},
262                                                                                         {0x0U, 0x0U},
263                                                                                         {0x0U, 0x0U},
264                                             {0x0U, 0x0U},
265                                             {0x0U, 0x0U},
266                                                                                         };
269 /**
270  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
271  * and stored in this array. It will be referenced in
272  * EDMA3_RM_allocContiguousResource () to look for contiguous resources.
273  */
274 #ifdef BUILD_C6XDSP
275 #pragma DATA_SECTION(contiguousDmaRes, ".fardata:.edma3Globals");
276 #endif
277 static uint32_t contiguousDmaRes[EDMA3_MAX_DMA_CHAN_DWRDS] = {0x0U, 0x0U};
279 /**
280  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
281  * and stored in this array. It will be referenced in
282  * EDMA3_RM_allocContiguousResource () to look for contiguous resources.
283  */
284 #ifdef BUILD_C6XDSP
285 #pragma DATA_SECTION(contiguousQdmaRes, ".fardata:.edma3Globals");
286 #endif
287 static uint32_t contiguousQdmaRes[EDMA3_MAX_QDMA_CHAN_DWRDS] = {0x0U};
289 /**
290  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
291  * and stored in this array. It will be referenced in
292  * EDMA3_RM_allocContiguousResource () to look for contiguous resources.
293  */
294 #ifdef BUILD_C6XDSP
295 #pragma DATA_SECTION(contiguousTccRes, ".fardata:.edma3Globals");
296 #endif
297 static uint32_t contiguousTccRes[EDMA3_MAX_TCC_DWRDS] = {0x0U, 0x0U};
299 /**
300  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
301  * and stored in this array. It will be referenced in
302  * EDMA3_RM_allocContiguousResource () to look for contiguous resources.
303  */
304 #ifdef BUILD_C6XDSP
305 #pragma DATA_SECTION(contiguousParamRes, ".fardata:.edma3Globals");
306 #endif
307 static uint32_t contiguousParamRes[EDMA3_MAX_PARAM_DWRDS];
310 /**
311  * \brief Resources bound to a Channel
312  *
313  * When a request for a channel is made, the resources PaRAM Set and TCC
314  * get bound to that channel. This information is needed internally by the
315  * resource manager, when a request is made to free the channel,
316  * to free up the channel-associated resources.
317  */
318 #ifdef BUILD_C6XDSP
319 #pragma DATA_SECTION(edma3RmChBoundRes, ".fardata:.edma3Globals");
320 #endif
321 static EDMA3_RM_ChBoundResources edma3RmChBoundRes [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_LOGICAL_CH];
323 /**
324  * Used to reset the Internal EDMA3 Resource Manager Data Structures for the first time.
325  */
326 #ifdef BUILD_C6XDSP
327 #pragma DATA_SECTION(rmInitDone, ".fardata:.edma3Globals");
328 #endif
329  static uint16_t rmInitDone = FALSE;
331 /*---------------------------------------------------------------------------*/
333 /* Local functions prototypes */
334 /*---------------------------------------------------------------------------*/
335 /** EDMA3 Instance 0 Completion Handler Interrupt Service Routine */
336 void lisrEdma3ComplHandler0(uint32_t edma3InstanceId);
337 /** EDMA3 Instance 0 CC Error Interrupt Service Routine */
338 void lisrEdma3CCErrHandler0(uint32_t edma3InstanceId);
339 /**
340  * EDMA3 Instance 0 TC[0-7] Error Interrupt Service Routines
341  * for a maximum of 8 TCs (Transfer Controllers).
342  */
343 void lisrEdma3TC0ErrHandler0(uint32_t edma3InstanceId);
344 void lisrEdma3TC1ErrHandler0(uint32_t edma3InstanceId);
345 void lisrEdma3TC2ErrHandler0(uint32_t edma3InstanceId);
346 void lisrEdma3TC3ErrHandler0(uint32_t edma3InstanceId);
347 void lisrEdma3TC4ErrHandler0(uint32_t edma3InstanceId);
348 void lisrEdma3TC5ErrHandler0(uint32_t edma3InstanceId);
349 void lisrEdma3TC6ErrHandler0(uint32_t edma3InstanceId);
350 void lisrEdma3TC7ErrHandler0(uint32_t edma3InstanceId);
353 /** Interrupt Handler for the Transfer Completion interrupt */
354 static void edma3ComplHandler (const EDMA3_RM_Obj *rmObj);
355 /** Interrupt Handler for the Channel Controller Error interrupt */
356 static void edma3CCErrHandler (const EDMA3_RM_Obj *rmObj);
357 /** Interrupt Handler for the Transfer Controller Error interrupt */
358 static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, uint32_t tcNum);
361 /** Local MemZero function */
362 void edma3MemZero(void *dst, uint32_t len);
363 /** Local MemCpy function */
364 void edma3MemCpy(void *dst, const void *src, uint32_t len);
365 /* Local MemCopy function to copy Param Set ONLY */
366 void edma3ParamCpy(volatile void *dst, const volatile void *src);
368 /** Initialization of the Global region registers of the EDMA3 Controller */
369 static void edma3GlobalRegionInit (uint32_t phyCtrllerInstId, uint32_t numDmaChannels);
370 /** Initialization of the Shadow region registers of the EDMA3 Controller */
371 static void edma3ShadowRegionInit (const EDMA3_RM_Instance *pRMInstance);
375 /* Internal functions for contiguous resource allocation */
376 /**
377  * Finds a particular bit ('0' or '1') in the particular word from 'start'.
378  * If found, returns the position, else return -1.
379  */
380 static int32_t findBitInWord (int32_t source, uint32_t start, uint16_t bit);
382 /**
383  * Finds a particular bit ('0' or '1') in the specified resources' array
384  * from 'start' to 'end'. If found, returns the position, else return -1.
385  */
386 static int32_t findBit (EDMA3_RM_ResType resType,
387                             uint32_t start,
388                             uint32_t end,
389                             uint16_t bit);
391 /**
392  * If successful, this function returns EDMA3_RM_SOK and the position
393  * of first available resource in 'positionRes'. Else returns error.
394  */
395 static EDMA3_RM_Result allocAnyContigRes(EDMA3_RM_ResType resType,
396                                     uint32_t numResources,
397                                     uint32_t *positionRes);
399 /**
400  * Starting from 'firstResIdObj', this function makes the next 'numResources'
401  * Resources non-available for future. Also, it does some global resisters'
402  * setting also.
403  */
404 static EDMA3_RM_Result gblChngAllocContigRes(EDMA3_RM_Instance *rmInstance,
405                         const EDMA3_RM_ResDesc *firstResIdObj,
406                                         uint32_t numResources);
408 /*---------------------------------------------------------------------------*/
410 EDMA3_RM_Result EDMA3_RM_create (uint32_t phyCtrllerInstId,
411                                 const EDMA3_RM_GblConfigParams *gblCfgParams,
412                                 const void *miscParam)
413     {
414     uint32_t count = 0U;
415     EDMA3_RM_Result result = EDMA3_RM_SOK;
416     const EDMA3_RM_MiscParam *miscOpt = (const EDMA3_RM_MiscParam *)miscParam;
418 #ifdef GENERIC
419     /* GENERIC libraries don't come with a default confifguration, always 
420        needs to be supplied with a parameter */ 
421     if (gblCfgParams == NULL)
422         {
423         result = EDMA3_RM_E_INVALID_PARAM;
424         }
425 #endif
427     /**
428      * We are NOT checking 'gblCfgParams' for NULL.
429      * If user has passed NULL, default config info will be
430      * taken from config file.
431      * 'param' is also not being checked because it could be
432      * NULL also.
433      */
435     /* If parameter checking is enabled... */
436 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
437     if (phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
438         {
439         result = EDMA3_RM_E_INVALID_PARAM;
440         }
441 #endif
443         /* Check if the parameters are OK. */
444     if (EDMA3_RM_SOK == result)
445         {
446         /* Initialize the global variables for the first time */
447         if (FALSE == rmInitDone)
448             {
449                     edma3MemZero((void *)&(resMgrObj[0U]),
450                     sizeof(resMgrObj));
451                     edma3MemZero((void *)(&(edma3IntrParams[0U][0U])),
452                     sizeof(edma3IntrParams));
453             rmInitDone = TRUE;
454             }
456         /* Initialization has been done */
457         if (resMgrObj[phyCtrllerInstId].state != EDMA3_RM_DELETED)
458             {
459             result = EDMA3_RM_E_OBJ_NOT_DELETED;
460             }
461         else
462             {
463             /**
464               * Check whether user has passed the Global Config Info.
465               * If yes, copy it to the driver data structures. Else, use the
466               * info from the config file edma3Cfg.c
467               */
468 #ifndef GENERIC
469             if (NULL == gblCfgParams)
470                 {
471                 /* Take info from the specific config file */
472                 edma3MemCpy((void *)(&resMgrObj[phyCtrllerInstId].gblCfgParams),
473                                             (const void *)(&edma3GblCfgParams[phyCtrllerInstId]),
474                                             sizeof (EDMA3_RM_GblConfigParams));
475                 }
476             else
477                 {
478 #endif
479                 /* User passed the info, save it in the RM object first */
480                 edma3MemCpy((void *)(&resMgrObj[phyCtrllerInstId].gblCfgParams),
481                                             (const void *)(gblCfgParams),
482                                             sizeof (EDMA3_RM_GblConfigParams));
483 #ifndef GENERIC
484                 }
485 #endif
488             /**
489               * Check whether DMA channel to PaRAM Set mapping exists or not.
490               * If it does not exist, set the mapping array as 1-to-1 mapped.
491               */
492             if (FALSE == resMgrObj[phyCtrllerInstId].gblCfgParams.dmaChPaRAMMapExists)
493                 {
494                 for (count = 0U; count < resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels; count++)
495                     {
496                     resMgrObj[phyCtrllerInstId].gblCfgParams.dmaChannelPaRAMMap[count] = count;
497                     }
498                 }
501             /**
502              * Update the actual number of PaRAM sets and
503              * Initialize Boundary Values for Logical Channel Ranges.
504              */
505             edma3NumPaRAMSets = resMgrObj[phyCtrllerInstId].gblCfgParams.numPaRAMSets;
506                         edma3_dma_ch_max_val[phyCtrllerInstId] = resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels - 1U;
507                         edma3_link_ch_min_val[phyCtrllerInstId] = edma3_dma_ch_max_val[phyCtrllerInstId] + 1U;
508                         edma3_link_ch_max_val[phyCtrllerInstId] = edma3_link_ch_min_val[phyCtrllerInstId] + (resMgrObj[phyCtrllerInstId].gblCfgParams.numPaRAMSets - 1U);
509                         edma3_qdma_ch_min_val[phyCtrllerInstId] = edma3_link_ch_max_val[phyCtrllerInstId] + 1U;
510                         edma3_qdma_ch_max_val[phyCtrllerInstId] = edma3_qdma_ch_min_val[phyCtrllerInstId] + (resMgrObj[phyCtrllerInstId].gblCfgParams.numQdmaChannels - 1U);
511                         edma3_log_ch_max_val[phyCtrllerInstId] = edma3_qdma_ch_max_val[phyCtrllerInstId];
513             resMgrObj[phyCtrllerInstId].phyCtrllerInstId = phyCtrllerInstId;
514             resMgrObj[phyCtrllerInstId].state = EDMA3_RM_CREATED;
515             resMgrObj[phyCtrllerInstId].numOpens = 0U;
517             /* Make all the RM instances for this EDMA3 HW NULL */
518             for (count = 0U; count < EDMA3_MAX_RM_INSTANCES; count++)
519                 {
520                 edma3MemZero((void *)((EDMA3_RM_Instance *)(ptrRMIArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + count),
521                             sizeof(EDMA3_RM_Instance));
523                 /* Also make this data structure NULL */
524                 edma3MemZero((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + count),
525                             sizeof(EDMA3_RM_InstanceInitConfig));
526                 }
528             /* Initialize the global edma3DmaChTccMapping array with EDMA3_MAX_TCC */
529             for (  count = 0U;
530                     count < resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels;
531                     count++
532                 )
533                 {
534                 edma3DmaChTccMapping[phyCtrllerInstId][count] = EDMA3_MAX_TCC;
535                 }
537             /* Initialize the global edma3QdmaChTccMapping array with EDMA3_MAX_TCC */
538             for (   count = 0U;
539                     count < resMgrObj[phyCtrllerInstId].gblCfgParams.numQdmaChannels;
540                     count++
541                 )
542                 {
543                 edma3QdmaChTccMapping[phyCtrllerInstId][count] = EDMA3_MAX_TCC;
544                 }
546             /* Reset edma3RmChBoundRes Array*/
547             for (count = 0U; count < EDMA3_MAX_LOGICAL_CH; count++)
548                 {
549                 edma3RmChBoundRes[phyCtrllerInstId][count].paRAMId = -1;
550                 edma3RmChBoundRes[phyCtrllerInstId][count].tcc = EDMA3_MAX_TCC;
551                 }
553             /* Make the contiguousParamRes array NULL */
554             edma3MemZero((void *)(&(contiguousParamRes[0U])),
555                 sizeof(contiguousParamRes));
558             /**
559              * Check the misc configuration options structure.
560              * Check whether the global registers' initialization
561              * is required or not.
562              * It is required ONLY if RM is running on the Master Processor.
563              */
564             if (NULL != miscOpt)
565                 {
566                 if (miscOpt->isSlave == FALSE)
567                     {
568                     /* It is a master. */
569                     edma3GlobalRegionInit(phyCtrllerInstId, (resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels));
570                     }
571                 }
572             else
573                 {
574                 /* By default, global registers will be initialized. */
575                 edma3GlobalRegionInit(phyCtrllerInstId, (resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels));
576                 }
577             }
578         }
580     return result;
581     }
583 EDMA3_RM_Result EDMA3_RM_delete (uint32_t phyCtrllerInstId,
584                                                 const void *param)
585     {
586     EDMA3_RM_Result result = EDMA3_RM_SOK;
588     /* If parameter checking is enabled... */
589 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
590     if (phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
591         {
592         result = EDMA3_RM_E_INVALID_PARAM;
593         }
594 #endif
596         /* Check if the parameters are OK. */
597         if (EDMA3_RM_SOK == result)
598         {
599         /**
600          * If number of RM Instances is 0, then state should be
601          * EDMA3_RM_CLOSED OR EDMA3_RM_CREATED.
602          */
603         if ((0 == resMgrObj[phyCtrllerInstId].numOpens)
604             && ((resMgrObj[phyCtrllerInstId].state != EDMA3_RM_CLOSED)
605             && (resMgrObj[phyCtrllerInstId].state != EDMA3_RM_CREATED)))
606             {
607             result = EDMA3_RM_E_OBJ_NOT_CLOSED;
608             }
609         else
610             {
611             /**
612              * If number of RM Instances is NOT 0, then this function
613              * SHOULD NOT be called by anybody.
614              */
615             if (0 != resMgrObj[phyCtrllerInstId].numOpens)
616                 {
617                 result = EDMA3_RM_E_INVALID_STATE;
618                 }
619             else
620                 {
621                 /** Change state to EDMA3_RM_DELETED */
622                 resMgrObj[phyCtrllerInstId].state = EDMA3_RM_DELETED;
624                 /* Reset the Allocated TCCs Array also. */
625                 allocatedTCCs[phyCtrllerInstId][0U] = 0x0U;
626                 allocatedTCCs[phyCtrllerInstId][1U] = 0x0U;
628                 /* Also, reset the RM Object Global Config Info */
629                 edma3MemZero((void *)&(resMgrObj[phyCtrllerInstId].gblCfgParams),
630                          sizeof(EDMA3_RM_GblConfigParams));
631                 }
632             }
633         }
635     return result;
636     }
638 EDMA3_RM_Handle EDMA3_RM_open (uint32_t phyCtrllerInstId,
639                                 const EDMA3_RM_Param *initParam,
640                                 EDMA3_RM_Result *errorCode)
641     {
642     uint32_t intState           = 0U;
643     uint32_t resMgrIdx          = 0U;
644     EDMA3_RM_Result result          = EDMA3_RM_SOK;
645     EDMA3_RM_Obj *rmObj             = NULL;
646     EDMA3_RM_Instance *rmInstance   = NULL;
647     EDMA3_RM_Instance *temp_ptr_rm_inst   = NULL;
648     EDMA3_RM_Handle retVal          = NULL;
649     uint32_t dmaChDwrds = 0U;
650     uint32_t paramSetDwrds = 0U;
651     uint32_t tccDwrds = 0U;
652     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
654 #ifdef GENERIC
655     /* GENERIC libraries don't come with a default confifguration, always 
656        needs to be supplied with a parameter */ 
657     if ((initParam == NULL) || (initParam->rmInstInitConfig == NULL))
658         {
659         result = EDMA3_RM_E_INVALID_PARAM;
660         }
661 #endif
664         /* If parameter checking is enabled... */
665 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
666         if (((initParam == NULL)
667                 || (phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES))
668         || (errorCode == NULL))
669         {
670         result = EDMA3_RM_E_INVALID_PARAM;
671         }
672 #endif
674         /* Check if the parameters are OK. */
675         if (EDMA3_RM_SOK == result)
676         {
677         /* Check whether the semaphore handle is null or not */
678         if (NULL == initParam->rmSemHandle)
679             {
680             result = EDMA3_RM_E_INVALID_PARAM;
681             }
682         else
683             {
684             rmObj = &resMgrObj[phyCtrllerInstId];
685             if  (
686                 (NULL == rmObj)
687                 || (initParam->regionId >=
688                         resMgrObj[phyCtrllerInstId].gblCfgParams.numRegions)
689                 )
690                 {
691                 result = EDMA3_RM_E_INVALID_PARAM;
692                 }
693             else
694                 {
695                 edma3OsProtectEntry (phyCtrllerInstId,
696                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
697                                                                         &intState);
699                 /** Check state of RM Object.
700                   * If no RM instance is opened and this is the first one,
701                   * then state should be created/closed.
702                   */
703                 if ((rmObj->numOpens == 0) &&
704                     ((rmObj->state != EDMA3_RM_CREATED) &&
705                     (rmObj->state != EDMA3_RM_CLOSED)))
706                     {
707                     result = EDMA3_RM_E_INVALID_STATE;
708                     edma3OsProtectExit (phyCtrllerInstId,
709                                                                                 (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
710                                                                                 intState);
711                     }
712                 else
713                     {
714                     /**
715                      * If num of instances opened is more than 0 and less than
716                      *  max allowed, then state should be opened.
717                      */
718                     if (((rmObj->numOpens > 0) &&
719                             (rmObj->numOpens < EDMA3_MAX_RM_INSTANCES))
720                         && (rmObj->state != EDMA3_RM_OPENED))
721                         {
722                         result = EDMA3_RM_E_INVALID_STATE;
723                             edma3OsProtectExit (phyCtrllerInstId,
724                                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
725                                                                                         intState);
726                         }
727                     else
728                         {
729                         /* Check if max opens have passed */
730                         if (rmObj->numOpens >= EDMA3_MAX_RM_INSTANCES)
731                             {
732                             result = EDMA3_RM_E_MAX_RM_INST_OPENED;
733                                     edma3OsProtectExit (phyCtrllerInstId,
734                                                                                                 (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
735                                                                                                 intState);
736                             }
737                         }
738                     }
739                 }
740             }
741         }
743     if (EDMA3_RM_SOK == result)
744         {
745         /*
746         * Check whether the RM instance is Master or not.
747         * If it is master, check whether a master already exists
748         * or not. There should NOT be more than 1 master.
749         * Return error code if master already exists
750         */
751         if ((TRUE == masterExists[phyCtrllerInstId]) && (TRUE == initParam->isMaster))
752             {
753             /* No two masters should exist, return error */
754             result = EDMA3_RM_E_RM_MASTER_ALREADY_EXISTS;
755             edma3OsProtectExit (phyCtrllerInstId,
756                                                                 (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
757                                                                 intState);
758             }
759         else
760             {
761             /* Create Res Mgr Instance */
762             for (resMgrIdx = 0U; resMgrIdx < EDMA3_MAX_RM_INSTANCES; resMgrIdx++)
763                 {
764                 temp_ptr_rm_inst = ((EDMA3_RM_Instance *)(ptrRMIArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx);
766                 if (NULL != temp_ptr_rm_inst)
767                     {
768                     if (NULL == temp_ptr_rm_inst->pResMgrObjHandle)
769                         {
770                         /* Handle to the EDMA3 HW Object */
771                         temp_ptr_rm_inst->pResMgrObjHandle = rmObj;
772                         /* Handle of the Res Mgr Instance */
773                         rmInstance = temp_ptr_rm_inst;
775                         /* Also make this data structure NULL, just for safety. */
776                         edma3MemZero((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx),
777                                     sizeof(EDMA3_RM_InstanceInitConfig));
779                         break;
780                         }
781                     }
782                 }
784             /* Check whether a RM instance has been created or not */
785             if (NULL == rmInstance)
786                 {
787                 result = EDMA3_RM_E_MAX_RM_INST_OPENED;
788                 edma3OsProtectExit (phyCtrllerInstId,
789                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
790                                                                         intState);
791                 }
792             else
793                 {
794                 /* Copy the InitPaRAM first */
795                 edma3MemCpy((void *)(&rmInstance->initParam),
796                                             (const void *)(initParam),
797                                             sizeof (EDMA3_RM_Param));
799                 if (rmObj->gblCfgParams.globalRegs != NULL)
800                     {
801                     globalRegs = (volatile EDMA3_CCRL_Regs *)
802                                             (rmObj->gblCfgParams.globalRegs);
803                     rmInstance->shadowRegs = (EDMA3_CCRL_ShadowRegs *)
804                         &(globalRegs->SHADOW[rmInstance->initParam.regionId]);
806                     /* copy the instance specific semaphore handle */
807                     rmInstance->initParam.rmSemHandle = initParam->rmSemHandle;
809                     /**
810                     * Check whether user has passed information about resources
811                     * owned and reserved by this instance. This is region specific
812                     * information. If he has not passed, dafault static config info will be taken
813                     * from the config file edma3Cfg.c, according to the regionId specified.
814                     *
815                     * resMgrIdx specifies the RM instance number created just now.
816                     * Use it to populate the userInitConfig [].
817                     */
818 #ifndef GENERIC
819                     if (NULL == initParam->rmInstInitConfig)
820                         {
821                         /* Take the info from the specific config file */
822                         edma3MemCpy((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx),
823                                 (const void *)(&defInstInitConfig[phyCtrllerInstId][initParam->regionId]),
824                                 sizeof (EDMA3_RM_InstanceInitConfig));
825                         }
826                     else
827                         {
828 #endif
829                         /* User has passed the region specific info. */
830                         edma3MemCpy((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx),
831                                 (const void *)(initParam->rmInstInitConfig),
832                                 sizeof (EDMA3_RM_InstanceInitConfig));
833 #ifndef GENERIC
834                         }
835 #endif
837                     rmInstance->initParam.rmInstInitConfig =
838                                 ((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx);
840                     dmaChDwrds = rmObj->gblCfgParams.numDmaChannels / (uint32_t)32U;
841                                         if (dmaChDwrds == 0)
842                                                 {
843                                                 /* In case DMA channels are < 32 */
844                                                 dmaChDwrds = 1U;
845                                                 }
847                     paramSetDwrds = rmObj->gblCfgParams.numPaRAMSets / (uint32_t)32U;
848                                         if (paramSetDwrds == 0)
849                                                 {
850                                                 /* In case PaRAM Sets are < 32 */
851                                                 paramSetDwrds = 1U;
852                                                 }
854                     tccDwrds = rmObj->gblCfgParams.numTccs / (uint32_t)32U;
855                                         if (tccDwrds == 0)
856                                                 {
857                                                 /* In case TCCs are < 32 */
858                                                 tccDwrds = 1U;
859                                                 }
861                     for (resMgrIdx = 0U; resMgrIdx < dmaChDwrds; ++resMgrIdx)
862                         {
863                         rmInstance->avlblDmaChannels[resMgrIdx]
864                             = rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resMgrIdx];
865                         }
867                     rmInstance->avlblQdmaChannels[0U]
868                         = rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0U];
870                     for (resMgrIdx = 0U; resMgrIdx < paramSetDwrds; ++resMgrIdx)
871                         {
872                         rmInstance->avlblPaRAMSets[resMgrIdx]
873                             = rmInstance->initParam.rmInstInitConfig->ownPaRAMSets[resMgrIdx];
874                         }
876                     for (resMgrIdx = 0U; resMgrIdx < tccDwrds; ++resMgrIdx)
877                         {
878                         rmInstance->avlblTccs [resMgrIdx]
879                             = rmInstance->initParam.rmInstInitConfig->ownTccs[resMgrIdx];
880                         }
882                     /*
883                      * Mark the PaRAM Sets corresponding to DMA channels as RESERVED.
884                      * For e.g. on a platform where only 32 DMA channels exist,
885                      * mark the first 32 PaRAM Sets as reserved. These param sets
886                      * will not be returned in case user requests for ANY link
887                      * channel.
888                      */
889                     for (resMgrIdx = 0U; resMgrIdx < rmObj->gblCfgParams.numDmaChannels; ++resMgrIdx)
890                         {
891                         rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets[resMgrIdx/32U] |= ((uint32_t)1U<<(resMgrIdx%32U));
892                         }
894                     /*
895                     * If the EDMA RM instance is MASTER (ie. initParam->isMaster
896                     * is TRUE), save the region ID.
897                     * Only this shadow region will receive the
898                     * EDMA3 interrupts, if enabled.
899                     */
900                     if (TRUE == initParam->isMaster)
901                         {
902                         /* Store the region id to use it in the ISRs */
903                         edma3RegionId = rmInstance->initParam.regionId;
904                         masterExists[phyCtrllerInstId] = TRUE;
905                         }
907                     if (TRUE == initParam->regionInitEnable)
908                         {
909                         edma3ShadowRegionInit (rmInstance);
910                         }
912                     /**
913                      * By default, PaRAM Sets allocated using this RM Instance
914                      * will get cleared during their allocation.
915                      * User can stop their clearing by calling specific IOCTL
916                      * command.
917                      */
918                     rmInstance->paramInitRequired = TRUE;
921                     /**
922                      * By default, during the EDMA3_RM_allocLogicalChannel (),
923                      * global EDMA3 registers (DCHMAP/QCHMAP) and the allocated
924                      * PaRAM Set will be programmed accordingly, for users using this
925                      * RM Instance.
926                      * User can stop their pre-programming by calling
927                      * EDMA3_RM_IOCTL_SET_GBL_REG_MODIFY_OPTION
928                      * IOCTL command.
929                      */
930                     rmInstance->regModificationRequired = TRUE;
933                     if (EDMA3_RM_SOK == result)
934                         {
935                         rmObj->state = EDMA3_RM_OPENED;
936                         /* Increase the Instance count */
937                         resMgrObj[phyCtrllerInstId].numOpens++;
938                         retVal = rmInstance;
939                         }
940                     }
941                 else
942                     {
943                     result = EDMA3_RM_E_INVALID_PARAM;
944                     }
946                 edma3OsProtectExit (phyCtrllerInstId,
947                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
948                                                                         intState);
949                 }
950             }
951         }
953     if(errorCode != NULL)
954     {
955         *errorCode = result;
956     }
957     return (EDMA3_RM_Handle)retVal;
958     }
960 EDMA3_RM_Result EDMA3_RM_close (EDMA3_RM_Handle hEdmaResMgr,
961                                     const void *param)
962     {
963     EDMA3_RM_Result result = EDMA3_RM_SOK;
964     uint32_t intState = 0U;
965     uint32_t resMgrIdx = 0U;
966     EDMA3_RM_Obj *rmObj             = NULL;
967     EDMA3_RM_Instance *rmInstance   = NULL;
968     uint32_t dmaChDwrds;
969     uint32_t paramSetDwrds;
970     uint32_t tccDwrds;
972         /* If parameter checking is enabled... */
973 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
974     if (NULL == hEdmaResMgr)
975         {
976         result = EDMA3_RM_E_INVALID_PARAM;
977         }
978 #endif
980         /* Check if the parameters are OK. */
981         if (EDMA3_RM_SOK == result)
982         {
983         rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
984         rmObj = rmInstance->pResMgrObjHandle;
986         if (rmObj == NULL)
987             {
988             result = (EDMA3_RM_E_INVALID_PARAM);
989             }
990         else
991             {
992             /* Check state of driver, state should be opened */
993             if (rmObj->state != EDMA3_RM_OPENED)
994                 {
995                 result = (EDMA3_RM_E_OBJ_NOT_OPENED);
996                 }
997             else
998                 {
999                 dmaChDwrds = rmObj->gblCfgParams.numDmaChannels / (uint32_t)32U;
1000                 paramSetDwrds = rmObj->gblCfgParams.numPaRAMSets / (uint32_t)32U;
1001                 tccDwrds = rmObj->gblCfgParams.numTccs / (uint32_t)32U;
1003                 /* Set the instance config as NULL*/
1004                 for (resMgrIdx = 0U; resMgrIdx < dmaChDwrds; ++resMgrIdx)
1005                     {
1006                     rmInstance->avlblDmaChannels[resMgrIdx] = 0x0U;
1007                     }
1008                 for (resMgrIdx = 0U; resMgrIdx < paramSetDwrds; ++resMgrIdx)
1009                     {
1010                     rmInstance->avlblPaRAMSets[resMgrIdx] = 0x0U;
1011                     }
1012                 rmInstance->avlblQdmaChannels[0U] = 0x0U;
1013                 for (resMgrIdx = 0U; resMgrIdx < tccDwrds; ++resMgrIdx)
1014                     {
1015                     rmInstance->avlblTccs[resMgrIdx] = 0x0U;
1016                     }
1018                 /**
1019                  * If this is the Master Instance, reset the static variable
1020                  * 'masterExists[]'.
1021                  */
1022                 if (TRUE == rmInstance->initParam.isMaster)
1023                     {
1024                     masterExists[rmObj->phyCtrllerInstId] = FALSE;
1025                     edma3RegionId = EDMA3_MAX_REGIONS;
1026                     }
1028                 /* Reset the Initparam for this RM Instance */
1029                 edma3MemZero((void *)&(rmInstance->initParam),
1030                                             sizeof(EDMA3_RM_Param));
1032                 /* Critical section starts */
1033                 edma3OsProtectEntry (rmObj->phyCtrllerInstId,
1034                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1035                                                         &intState);
1037                 /* Decrease the Number of Opens */
1038                 --rmObj->numOpens;
1039                 if (0 == rmObj->numOpens)
1040                     {
1041                     edma3MemZero((void *)&(edma3RmChBoundRes[rmObj->phyCtrllerInstId][0]),
1042                                             sizeof(edma3RmChBoundRes[rmObj->phyCtrllerInstId]));
1044                     rmObj->state = EDMA3_RM_CLOSED;
1045                     }
1047                 /* Critical section ends */
1048                 edma3OsProtectExit (rmObj->phyCtrllerInstId,
1049                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1050                                                         intState);
1052                 rmInstance->pResMgrObjHandle = NULL;
1053                 rmInstance->shadowRegs = NULL;
1054                 rmInstance = NULL;
1055                 }
1056             }
1057         }
1059     return result;
1060     }
1062 EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
1063                                         EDMA3_RM_ResDesc *resObj)
1064     {
1065     EDMA3_RM_Instance *rmInstance = NULL;
1066     EDMA3_RM_Obj *rmObj = NULL;
1067     EDMA3_RM_Result result = EDMA3_RM_SOK;
1068     EDMA3_RM_Result semResult = EDMA3_RM_SOK;
1069     uint32_t avlblIdx = 0U;
1070     uint32_t resIdClr = 0x0;
1071     uint32_t resIdSet = 0x0;
1072     uint32_t resId;
1073     volatile EDMA3_CCRL_Regs *gblRegs = NULL;
1074         uint32_t  mapXbarEvtToChanFlag = FALSE;
1075         uint32_t xBarEvtBeforeMap = 0;
1076         uint32_t edma3Id;
1077         
1078 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1079     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1080                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1081                 EDMA3_DVT_dCOUNTER,
1082                 EDMA3_DVT_dNONE,
1083                 EDMA3_DVT_dNONE));
1084 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1086         /* If parameter checking is enabled... */
1087 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
1088     if ((hEdmaResMgr == NULL) || (resObj == NULL))
1089         {
1090         result = (EDMA3_RM_E_INVALID_PARAM);
1091         }
1092 #endif
1094         /* Check if the parameters are OK. */
1095         if (EDMA3_RM_SOK == result)
1096         {
1097         rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
1098         rmObj = rmInstance->pResMgrObjHandle;
1100         if ((rmObj == NULL) ||
1101             (rmObj->gblCfgParams.globalRegs == NULL))
1102             {
1103             result = (EDMA3_RM_E_INVALID_PARAM);
1104             }
1105         else
1106             {
1107             gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
1108             edma3Id = rmObj->phyCtrllerInstId;
1109             resId = resObj->resId;
1111             resIdClr = (uint32_t)(~((uint32_t)1U << (resId%32U)));
1112             resIdSet = (1U << (resId%32U));
1114             if ( rmInstance->mapXbarToChan != NULL)
1115                 {
1116                 xBarEvtBeforeMap = resId;
1117                 if ((resId > rmObj->gblCfgParams.numDmaChannels) &&
1118                     (resId != EDMA3_RM_RES_ANY) &&
1119                         (resObj->type == EDMA3_RM_RES_DMA_CHANNEL))
1120                     {
1121                     result = rmInstance->mapXbarToChan(xBarEvtBeforeMap, 
1122                                         &resObj->resId, 
1123                                         &rmInstance->rmXbarToEvtMapConfig);
1124                                 if (EDMA3_RM_SOK == result)
1125                                         {
1126                                 resId = resObj->resId;
1127                                         mapXbarEvtToChanFlag = TRUE;
1128                                         }
1129                     }
1130                 }
1132             if (result == EDMA3_RM_SOK)
1133                 {
1134                     /**
1135                       * Take the instance specific semaphore, to prevent simultaneous
1136                       * access to the shared resources.
1137                       */
1138                     semResult = edma3OsSemTake(rmInstance->initParam.rmSemHandle,
1139                                             EDMA3_OSSEM_NO_TIMEOUT);
1140                     if (EDMA3_RM_SOK == semResult)
1141                         {
1142                         switch (resObj->type)
1143                             {
1144                             case EDMA3_RM_RES_DMA_CHANNEL :
1145                                     {
1146                                     if (resId == EDMA3_RM_RES_ANY)
1147                                         {
1148                                         for (avlblIdx=0U;
1149                                              avlblIdx <
1150                                                     rmObj->gblCfgParams.numDmaChannels;
1151                                              ++avlblIdx)
1152                                             {
1153                                             if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[avlblIdx/32U])
1154                                                   &
1155                                                   (rmInstance->avlblDmaChannels[avlblIdx/32U])
1156                                                   &
1157                                                   ~(rmInstance->initParam.rmInstInitConfig->resvdDmaChannels[avlblIdx/32U])
1158                                                   &
1159                                                   ((uint32_t)1U << (avlblIdx%32U))) != FALSE)
1160                                                 {
1161                                                 /*
1162                                                  * Match found.
1163                                                  * A resource which is owned by this instance of the
1164                                                  * Resource Manager and which is presently available
1165                                                  * and which has not been reserved - is found.
1166                                                  */
1167                                                 resObj->resId = avlblIdx;
1168                                                 /*
1169                                                  * Mark the 'match found' resource as "Not Available"
1170                                                  * for future requests
1171                                                  */
1172                                         rmInstance->avlblDmaChannels[avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
1173         
1174                                                 /**
1175                                                  * Check if the register modification flag is
1176                                                  * set or not.
1177                                                  */
1178                                                 if (TRUE == rmInstance->regModificationRequired)
1179                                                     {
1180                                                     /**
1181                                                      * Enable the DMA channel in the
1182                                                      * DRAE/DRAEH registers also.
1183                                                      */
1184                                                     if (avlblIdx < 32U)
1185                                                         {
1186                                                         gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1187                                                             |= ((uint32_t)0x1U << avlblIdx);
1188                                                         }
1189                                                     else
1190                                                         {
1191                                                         gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1192                                                             |= ((uint32_t)0x1U << (avlblIdx - 32U));
1193                                                         }
1194                                                     }
1195         
1196                                                 result = EDMA3_RM_SOK;
1197                                                 break;
1198                                                 }
1199                                             }
1200                                         /*
1201                                          * If none of the owned resources of this type is available
1202                                          * then report "All Resources of this type not available" error
1203                                          */
1204                                         if (avlblIdx == rmObj->gblCfgParams.numDmaChannels)
1205                                             {
1206                                             result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
1207                                             }
1208                                         }
1209                                     else
1210                                         {
1211                                         if (resId < rmObj->gblCfgParams.numDmaChannels)
1212                                             {
1213                                             /*
1214                                              * Check if specified resource is owned
1215                                              * by this instance of the resource manager
1216                                              */
1217                                             if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resId/32U])&(resIdSet))!=FALSE)
1218                                                {
1219                                                 /* Now check if specified resource is available presently*/
1220                                                 if (((rmInstance->avlblDmaChannels[resId/32U])&(resIdSet))!=FALSE)
1221                                                     {
1222                                                     /*
1223                                                      * Mark the specified channel as "Not Available"
1224                                                      * for future requests
1225                                                      */
1226                                                     rmInstance->avlblDmaChannels[resId/32U] &= resIdClr;
1227         
1228                                                     /**
1229                                                      * Check if the register modification flag is
1230                                                      * set or not.
1231                                                      */
1232                                                     if (TRUE == rmInstance->regModificationRequired)
1233                                                         {
1234                                                         if (resId < 32U)
1235                                                             {
1236                                                             rmInstance->shadowRegs->EECR = (1UL << resId);
1237         
1238                                                             /**
1239                                                              * Enable the DMA channel in the
1240                                                              * DRAE registers also.
1241                                                              */
1242                                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1243                                                                 |= ((uint32_t)0x1U << resId);
1244                                                             }
1245                                                         else
1246                                                             {
1247                                                             rmInstance->shadowRegs->EECRH = (1UL << resId);
1248         
1249                                                             /**
1250                                                              * Enable the DMA channel in the
1251                                                              * DRAEH registers also.
1252                                                              */
1253                                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1254                                                                 |= ((uint32_t)0x1U << (resId - 32U));
1255                                                             }
1256                                                         }
1257         
1258                                                     result = EDMA3_RM_SOK;
1259                                                     }
1260                                                 else
1261                                                     {
1262                                                     /* Specified resource is owned but is already booked */
1263                                                     result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
1264                                                     }
1265                                                 }
1266                                             else
1267                                                 {
1268                                                 /*
1269                                                  * Specified resource is not owned by this instance
1270                                                  * of the Resource Manager
1271                                                  */
1272                                                 result = EDMA3_RM_E_RES_NOT_OWNED;
1273                                                 }
1274                                             }
1275                                         else
1276                                             {
1277                                             result = EDMA3_RM_E_INVALID_PARAM;
1278                                             }
1279                                         }
1280                                 }
1281                                 break;
1282         
1283                             case EDMA3_RM_RES_QDMA_CHANNEL :
1284                                 {
1285                                 if (resId == EDMA3_RM_RES_ANY)
1286                                     {
1287                                     for (avlblIdx=0U; avlblIdx<rmObj->gblCfgParams.numQdmaChannels; ++avlblIdx)
1288                                         {
1289                                         if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[avlblIdx/32U])
1290                                                   &
1291                                                   (rmInstance->avlblQdmaChannels[avlblIdx/32U])
1292                                                   &
1293                                                   ~(rmInstance->initParam.rmInstInitConfig->resvdQdmaChannels[avlblIdx/32U])
1294                                                   &
1295                                                   ((uint32_t)1U << (avlblIdx%32U))) != FALSE)
1296                                             {
1297                                             resObj->resId = avlblIdx;
1298                                     rmInstance->avlblQdmaChannels[avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
1299         
1300                                             /**
1301                                              * Check if the register modification flag is
1302                                              * set or not.
1303                                              */
1304                                             if (TRUE == rmInstance->regModificationRequired)
1305                                                 {
1306                                                 /**
1307                                                  * Enable the QDMA channel in the
1308                                                  * QRAE register also.
1309                                                  */
1310                                                 gblRegs->QRAE[rmInstance->initParam.regionId]
1311                                                     |= ((uint32_t)0x1U << avlblIdx);
1312                                                 }
1313         
1314                                             result = EDMA3_RM_SOK;
1315                                             break;
1316                                             }
1317                                         }
1318                                     /*
1319                                      * If none of the owned resources of this type is available
1320                                      * then report "All Resources of this type not available" error
1321                                      */
1322                                     if (avlblIdx == rmObj->gblCfgParams.numQdmaChannels)
1323                                         {
1324                                         result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
1325                                         }
1326                                     }
1327                                 else
1328                                     {
1329                                     if (resId < rmObj->gblCfgParams.numQdmaChannels)
1330                                         {
1331                                         if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels [resId/32U])&(resIdSet))!=FALSE)
1332                                             {
1333                                             if (((rmInstance->avlblQdmaChannels [resId/32U])&(resIdSet))!=FALSE)
1334                                                 {
1335                                                 rmInstance->avlblQdmaChannels [resId/32U] &= resIdClr;
1336         
1337                                                 /**
1338                                                  * Check if the register modification flag is
1339                                                  * set or not.
1340                                                  */
1341                                                 if (TRUE == rmInstance->regModificationRequired)
1342                                                     {
1343                                                     /**
1344                                                      * Enable the QDMA channel in the
1345                                                      * QRAE register also.
1346                                                      */
1347                                                     gblRegs->QRAE[rmInstance->initParam.regionId]
1348                                                         |= ((uint32_t)0x1U << resId);
1349                                                     }
1350         
1351                                                 result = EDMA3_RM_SOK;
1352                                                 }
1353                                             else
1354                                                 {
1355                                                 /* Specified resource is owned but is already booked */
1356                                                 result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
1357                                                }
1358                                             }
1359                                         else
1360                                             {
1361                                             /*
1362                                              * Specified resource is not owned by this instance
1363                                              * of the Resource Manager
1364                                              */
1365                                             result = EDMA3_RM_E_RES_NOT_OWNED;
1366                                             }
1367                                         }
1368                                     else
1369                                         {
1370                                         result = EDMA3_RM_E_INVALID_PARAM;
1371                                         }
1372                                     }
1373                                 }
1374                                 break;
1375         
1376                             case EDMA3_RM_RES_TCC :
1377                                 {
1378                                 if (resId == EDMA3_RM_RES_ANY)
1379                                     {
1380                                     for (avlblIdx=0U; avlblIdx<rmObj->gblCfgParams.numTccs; ++avlblIdx)
1381                                         {
1382                                         if (((rmInstance->initParam.rmInstInitConfig->ownTccs [avlblIdx/32U])
1383                                             & (rmInstance->avlblTccs [avlblIdx/32U])
1384                                             & ~(rmInstance->initParam.rmInstInitConfig->resvdTccs [avlblIdx/32U])
1385                                             & ((uint32_t)1U << (avlblIdx%32U)))!=FALSE)
1386                                             {
1387                                             resObj->resId = avlblIdx;
1388                                     rmInstance->avlblTccs [avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
1389         
1390                                             /**
1391                                              * Check if the register modification flag is
1392                                              * set or not.
1393                                              */
1394                                             if (TRUE == rmInstance->regModificationRequired)
1395                                                 {
1396                                                 /**
1397                                                  * Enable the Interrupt channel in the
1398                                                  * DRAE/DRAEH registers also.
1399                                                  * Also, If the region id coming from this
1400                                                  * RM instance is same as the Master RM
1401                                                  * Instance's region id, only then we will be
1402                                                  * getting the interrupts on the same side.
1403                                                  * So save the TCC in the allocatedTCCs[] array.
1404                                                  */
1405                                                 if (avlblIdx < 32U)
1406                                                     {
1407                                                     gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1408                                                         |= ((uint32_t)0x1U << avlblIdx);
1409         
1410                                                     /**
1411                                                      * Do not modify this global array if the register
1412                                                      * modificatio flag is not set.
1413                                                      * Reason being is based on this flag, the IPR/ICR
1414                                                      * or error bit is cleared in the completion or
1415                                                      * error handler ISR.
1416                                                      */
1417                                                     if (edma3RegionId == rmInstance->initParam.regionId)
1418                                                         {
1419                                                         allocatedTCCs[edma3Id][0U] |= ((uint32_t)0x1U << avlblIdx);
1420                                                         }
1421                                                     }
1422                                                 else
1423                                                     {
1424                                                     gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1425                                                         |= ((uint32_t)0x1U << (avlblIdx - 32U));
1426         
1427                                                     /**
1428                                                      * Do not modify this global array if the register
1429                                                      * modificatio flag is not set.
1430                                                      * Reason being is based on this flag, the IPR/ICR
1431                                                      * or error bit is cleared in the completion or
1432                                                      * error handler ISR.
1433                                                      */
1434                                                     if (edma3RegionId == rmInstance->initParam.regionId)
1435                                                         {
1436                                                         allocatedTCCs[edma3Id][1U] |= ((uint32_t)0x1U << (avlblIdx - 32U));
1437                                                         }
1438                                                     }
1439                                                 }
1440         
1441         
1442                                             result = EDMA3_RM_SOK;
1443                                             break;
1444                                             }
1445                                         }
1446                                     /*
1447                                      * If none of the owned resources of this type is available
1448                                      * then report "All Resources of this type not available" error
1449                                      */
1450                                     if ( avlblIdx == rmObj->gblCfgParams.numTccs)
1451                                         {
1452                                         result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
1453                                         }
1454                                     }
1455                                 else
1456                                     {
1457                                     if (resId < rmObj->gblCfgParams.numTccs)
1458                                         {
1459                                         if (((rmInstance->initParam.rmInstInitConfig->ownTccs [resId/32U])&(resIdSet))!=FALSE)
1460                                             {
1461                                             if (((rmInstance->avlblTccs [resId/32U])&(resIdSet))!=FALSE)
1462                                                 {
1463                                                 rmInstance->avlblTccs [resId/32U] &= resIdClr;
1464         
1465                                                 /**
1466                                                  * Check if the register modification flag is
1467                                                  * set or not.
1468                                                  */
1469                                                 if (TRUE == rmInstance->regModificationRequired)
1470                                                     {
1471                                                     /**
1472                                                      * Enable the Interrupt channel in the
1473                                                      * DRAE/DRAEH registers also.
1474                                                      * Also, If the region id coming from this
1475                                                      * RM instance is same as the Master RM
1476                                                      * Instance's region id, only then we will be
1477                                                      * getting the interrupts on the same side.
1478                                                      * So save the TCC in the allocatedTCCs[] array.
1479                                                      */
1480                                                     if (resId < 32U)
1481                                                         {
1482                                                         gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1483                                                             |= ((uint32_t)0x1U << resId);
1484         
1485                                                         /**
1486                                                          * Do not modify this global array if the register
1487                                                          * modificatio flag is not set.
1488                                                          * Reason being is based on this flag, the IPR/ICR
1489                                                          * or error bit is cleared in the completion or
1490                                                          * error handler ISR.
1491                                                          */
1492                                                         if (edma3RegionId == rmInstance->initParam.regionId)
1493                                                             {
1494                                                             allocatedTCCs[edma3Id][0U] |= ((uint32_t)0x1U << resId);
1495                                                             }
1496                                                         }
1497                                                     else
1498                                                         {
1499                                                         gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1500                                                             |= ((uint32_t)0x1U << (resId - 32U));
1501         
1502                                                         /**
1503                                                          * Do not modify this global array if the register
1504                                                          * modificatio flag is not set.
1505                                                          * Reason being is based on this flag, the IPR/ICR
1506                                                          * or error bit is cleared in the completion or
1507                                                          * error handler ISR.
1508                                                          */
1509                                                         if (edma3RegionId == rmInstance->initParam.regionId)
1510                                                             {
1511                                                             allocatedTCCs[edma3Id][1U] |= ((uint32_t)0x1U << (resId - 32U));
1512                                                             }
1513                                                         }
1514                                                     }
1515         
1516                                                 result = EDMA3_RM_SOK;
1517                                                 }
1518                                             else
1519                                                 {
1520                                                 /* Specified resource is owned but is already booked */
1521                                                 result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
1522                                                 }
1523                                             }
1524                                         else
1525                                             {
1526                                             /*
1527                                              * Specified resource is not owned by this instance
1528                                              * of the Resource Manager
1529                                              */
1530                                             result = EDMA3_RM_E_RES_NOT_OWNED;
1531                                             }
1532                                         }
1533                                     else
1534                                         {
1535                                         result = EDMA3_RM_E_INVALID_PARAM;
1536                                         }
1537                                     }
1538                                 }
1539                                 break;
1540         
1541                             case EDMA3_RM_RES_PARAM_SET :
1542                                 {
1543                                 if (resId == EDMA3_RM_RES_ANY)
1544                                     {
1545                                     for (avlblIdx=0U; avlblIdx<rmObj->gblCfgParams.numPaRAMSets; ++avlblIdx)
1546                                         {
1547                                         if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [avlblIdx/32U])
1548                                               &
1549                                               (rmInstance->avlblPaRAMSets [avlblIdx/32U])
1550                                               &
1551                                               ~(rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets [avlblIdx/32U])
1552                                               &
1553                                               ((uint32_t)1U << (avlblIdx%32U)))!=FALSE)
1554                                             {
1555                                             resObj->resId = avlblIdx;
1556                                     rmInstance->avlblPaRAMSets [avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
1557         
1558                                             /**
1559                                              * Also, make the actual PARAM Set NULL, checking the flag
1560                                              * whether it is required or not.
1561                                              */
1562                                             if ((TRUE == rmInstance->regModificationRequired)
1563                                                 && (TRUE == rmInstance->paramInitRequired))
1564                                                 {
1565                                                 edma3MemZero((void *)(&gblRegs->PARAMENTRY[avlblIdx]),
1566                                                             sizeof(gblRegs->PARAMENTRY[avlblIdx]));
1567                                                 }
1568         
1569                                             result = EDMA3_RM_SOK;
1570                                             break;
1571                                             }
1572                                         }
1573                                     /*
1574                                      * If none of the owned resources of this type is available
1575                                      * then report "All Resources of this type not available" error
1576                                      */
1577                                     if ( avlblIdx == rmObj->gblCfgParams.numPaRAMSets)
1578                                         {
1579                                         result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
1580                                         }
1581                                     }
1582                                 else
1583                                     {
1584                                     if (resId < rmObj->gblCfgParams.numPaRAMSets)
1585                                         {
1586                                         if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [resId/32U])&(resIdSet))!=FALSE)
1587                                             {
1588                                             if (((rmInstance->avlblPaRAMSets [resId/32U])&(resIdSet)) !=FALSE)
1589                                                 {
1590                                                 rmInstance->avlblPaRAMSets [resId/32U] &= resIdClr;
1591         
1592                                                 /**
1593                                                  * Also, make the actual PARAM Set NULL, checking the flag
1594                                                  * whether it is required or not.
1595                                                  */
1596                                                 if ((TRUE == rmInstance->regModificationRequired)
1597                                                     && (TRUE == rmInstance->paramInitRequired))
1598                                                     {
1599                                                     edma3MemZero((void *)(&gblRegs->PARAMENTRY[resId]),
1600                                                                 sizeof(gblRegs->PARAMENTRY[resId]));
1601                                                     }
1602         
1603                                                 result = EDMA3_RM_SOK;
1604                                                 }
1605                                             else
1606                                                 {
1607                                                 /* Specified resource is owned but is already booked */
1608                                                 result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
1609                                                 }
1610                                             }
1611                                         else
1612                                             {
1613                                             /*
1614                                              * Specified resource is not owned by this instance
1615                                              * of the Resource Manager
1616                                              */
1617                                             result = EDMA3_RM_E_RES_NOT_OWNED;
1618                                             }
1619                                         }
1620                                     else
1621                                         {
1622                                         result = EDMA3_RM_E_INVALID_PARAM;
1623                                         }
1624                                     }
1625                                 }
1626                                 break;
1627         
1628                             default:
1629                                     result = EDMA3_RM_E_INVALID_PARAM;
1630                                 break;
1631                             }
1632         
1633                         /* Return the semaphore back */
1634                         semResult = edma3OsSemGive(rmInstance->initParam.rmSemHandle);
1635                         }
1636                     }
1637            }
1638         }
1640     /**
1641      * Check the Resource Allocation Result 'result' first. If Resource
1642      * Allocation has resulted in an error, return it (having more priority than
1643      * semResult.
1644      * Else, return semResult.
1645      */
1646      if (EDMA3_RM_SOK == result)
1647         {
1648         /**
1649         * Resource Allocation successful, return semResult for returning
1650         * semaphore.
1651         */
1652         result = semResult;
1653         if ((rmInstance->configScrMapXbarToEvt != NULL) && 
1654             (mapXbarEvtToChanFlag == TRUE))
1655             {
1656             rmInstance->configScrMapXbarToEvt(xBarEvtBeforeMap, resObj->resId);
1657             }
1658         }
1660 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1661     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1662                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1663                 EDMA3_DVT_dCOUNTER,
1664                 EDMA3_DVT_dNONE,
1665                 EDMA3_DVT_dNONE));
1666 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1668     return result;
1669     }
1671 EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
1672                             const EDMA3_RM_ResDesc *resObj)
1673     {
1674     EDMA3_RM_Instance *rmInstance = NULL;
1675     EDMA3_RM_Obj *rmObj = NULL;
1676     EDMA3_RM_Result result = EDMA3_RM_SOK;
1677     EDMA3_RM_Result semResult = EDMA3_RM_SOK;
1678     uint32_t resId;
1679     uint32_t resIdSet = 0x0;
1680     volatile EDMA3_CCRL_Regs *gblRegs = NULL;
1681         uint32_t edma3Id;
1682         
1683 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1684     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1685                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1686                 EDMA3_DVT_dCOUNTER,
1687                 EDMA3_DVT_dNONE,
1688                 EDMA3_DVT_dNONE));
1689 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1691         /* If parameter checking is enabled... */
1692 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
1693     if ((hEdmaResMgr == NULL) || (resObj == NULL))
1694         {
1695         result = EDMA3_RM_E_INVALID_PARAM;
1696         }
1697 #endif
1699         /* Check if the parameters are OK. */
1700         if (EDMA3_RM_SOK == result)
1701         {
1702         rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
1703         rmObj = rmInstance->pResMgrObjHandle;
1705         if ((rmObj == NULL) ||
1706             (rmObj->gblCfgParams.globalRegs == NULL))
1707             {
1708             result = EDMA3_RM_E_INVALID_PARAM;
1709             }
1710         else
1711             {
1712             gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
1713             edma3Id = rmObj->phyCtrllerInstId;
1714             resId = resObj->resId;
1716             resIdSet = 1U << (resId%32U);
1718             /**
1719               * Take the instance specific semaphore, to prevent simultaneous
1720               * access to the shared resources.
1721               */
1722             semResult = edma3OsSemTake(rmInstance->initParam.rmSemHandle,
1723                                     EDMA3_OSSEM_NO_TIMEOUT);
1725             if (EDMA3_RM_SOK == semResult)
1726                 {
1727                 switch (resObj->type)
1728                     {
1729                     case EDMA3_RM_RES_DMA_CHANNEL :
1730                         {
1731                         if (resId < rmObj->gblCfgParams.numDmaChannels)
1732                             {
1733                             if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels [resId/32U]) & (resIdSet))!=FALSE)
1734                                 {
1735                                 if (((~(rmInstance->avlblDmaChannels[resId/32U]))&(resIdSet))!=FALSE)
1736                                     {
1737                                     /*
1738                                      * Mark the specified channel as "Available"
1739                                      * for future requests
1740                                      */
1741                                     rmInstance->avlblDmaChannels[resId/32U] |= resIdSet;
1743                                     /**
1744                                      * Check if the register modification flag is
1745                                      * set or not.
1746                                      */
1747                                     if (TRUE == rmInstance->regModificationRequired)
1748                                         {
1749                                         /**
1750                                          * DMA Channel is freed.
1751                                          * Reset the bit specific to the DMA channel
1752                                          * in the DRAE/DRAEH register also.
1753                                          */
1754                                         if (resId < 32U)
1755                                             {
1756                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1757                                                             &= (~((uint32_t)0x1U << resId));
1758                                             }
1759                                         else
1760                                             {
1761                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1762                                                             &= (~((uint32_t)0x1U << (resId-32U)));
1763                                             }
1764                                         }
1766                                     result = EDMA3_RM_SOK;
1767                                     }
1768                                 else
1769                                     {
1770                                     result = EDMA3_RM_E_RES_ALREADY_FREE;
1771                                     }
1772                                 }
1773                             else
1774                                 {
1775                                 /*
1776                                  * Specified resource is not owned by this instance
1777                                  * of the Resource Manager
1778                                  */
1779                                 result = EDMA3_RM_E_RES_NOT_OWNED;
1780                                 }
1781                             }
1782                         else
1783                             {
1784                             result = EDMA3_RM_E_INVALID_PARAM;
1785                             }
1786                         }
1787                         break;
1789                     case EDMA3_RM_RES_QDMA_CHANNEL :
1790                         {
1791                         if (resId < rmObj->gblCfgParams.numQdmaChannels)
1792                             {
1793                             if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels [resId/32U]) & (resIdSet))!=FALSE)
1794                                 {
1795                                 if (((~(rmInstance->avlblQdmaChannels [resId/32U])) & (resIdSet))!=FALSE)
1796                                     {
1797                                     rmInstance->avlblQdmaChannels [resId/32U] |= resIdSet;
1799                                     /**
1800                                      * Check if the register modification flag is
1801                                      * set or not.
1802                                      */
1803                                     if (TRUE == rmInstance->regModificationRequired)
1804                                         {
1805                                         /**
1806                                          * QDMA Channel is freed.
1807                                          * Reset the bit specific to the QDMA channel
1808                                          * in the QRAE register also.
1809                                          */
1810                                         gblRegs->QRAE[rmInstance->initParam.regionId]
1811                                                         &= (~((uint32_t)0x1U << resId));
1812                                         }
1814                                     result = EDMA3_RM_SOK;
1815                                     }
1816                                 else
1817                                     {
1818                                     result = EDMA3_RM_E_RES_ALREADY_FREE;
1819                                     }
1820                                 }
1821                             else
1822                                 {
1823                                 /*
1824                                  * Specified resource is not owned by this instance
1825                                  * of the Resource Manager
1826                                  */
1827                                 result = EDMA3_RM_E_RES_NOT_OWNED;
1828                                 }
1829                             }
1830                         else
1831                             {
1832                             result = EDMA3_RM_E_INVALID_PARAM;
1833                             }
1834                         }
1835                         break;
1837                     case EDMA3_RM_RES_TCC :
1838                         {
1839                         if (resId < rmObj->gblCfgParams.numTccs)
1840                             {
1841                             if (((rmInstance->initParam.rmInstInitConfig->ownTccs [resId/32U]) & (resIdSet))!=FALSE)
1842                                 {
1843                                 if (((~(rmInstance->avlblTccs [resId/32U])) & (resIdSet))!=FALSE)
1844                                     {
1845                                     rmInstance->avlblTccs [resId/32U] |= resIdSet;
1847                                     /**
1848                                      * Check if the register modification flag is
1849                                      * set or not.
1850                                      */
1851                                     if (TRUE == rmInstance->regModificationRequired)
1852                                         {
1853                                         /**
1854                                          * Interrupt Channel is freed.
1855                                          * Reset the bit specific to the Interrupt
1856                                          * channel in the DRAE/DRAEH register also.
1857                                          * Also, if we have earlier saved this
1858                                          * TCC in allocatedTCCs[] array,
1859                                          * remove it from there too.
1860                                          */
1861                                         if (resId < 32U)
1862                                             {
1863                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1864                                                             &= (~((uint32_t)0x1U << resId));
1866                                             if (edma3RegionId == rmInstance->initParam.regionId)
1867                                                 {
1868                                                 allocatedTCCs[edma3Id][0U] &= (~((uint32_t)0x1U << resId));
1869                                                 }
1870                                             }
1871                                         else
1872                                             {
1873                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1874                                                             &= (~((uint32_t)0x1U << (resId-32U)));
1876                                             if (edma3RegionId == rmInstance->initParam.regionId)
1877                                                 {
1878                                                 allocatedTCCs[edma3Id][1U] &= (~((uint32_t)0x1U << (resId -32U)));
1879                                                 }
1880                                             }
1881                                         }
1883                                     result = EDMA3_RM_SOK;
1884                                     }
1885                                 else
1886                                     {
1887                                     result = EDMA3_RM_E_RES_ALREADY_FREE;
1888                                     }
1889                                 }
1890                             else
1891                                 {
1892                                 /*
1893                                  * Specified resource is not owned by this instance
1894                                  * of the Resource Manager
1895                                  */
1896                                 result = EDMA3_RM_E_RES_NOT_OWNED;
1897                                 }
1898                             }
1899                         else
1900                             {
1901                             result = EDMA3_RM_E_INVALID_PARAM;
1902                             }
1903                         }
1904                         break;
1906                     case EDMA3_RM_RES_PARAM_SET :
1907                         {
1908                         if (resId < rmObj->gblCfgParams.numPaRAMSets)
1909                             {
1910                             if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [resId/32U])&(resIdSet))!=FALSE)
1911                                 {
1912                                 if (((~(rmInstance->avlblPaRAMSets [resId/32U]))&(resIdSet))!=FALSE)
1913                                     {
1914                                     rmInstance->avlblPaRAMSets [resId/32U] |= resIdSet;
1916                                     result = EDMA3_RM_SOK;
1917                                     }
1918                                 else
1919                                     {
1920                                     result = EDMA3_RM_E_RES_ALREADY_FREE;
1921                                     }
1922                                 }
1923                             else
1924                                 {
1925                                 /*
1926                                  * Specified resource is not owned by this instance
1927                                  * of the Resource Manager
1928                                  */
1929                                 result = EDMA3_RM_E_RES_NOT_OWNED;
1930                                 }
1931                             }
1932                         else
1933                             {
1934                             result = EDMA3_RM_E_INVALID_PARAM;
1935                             }
1936                         }
1937                         break;
1939                     default:
1940                         result = EDMA3_RM_E_INVALID_PARAM;
1941                         break;
1942                     }
1943                 semResult = edma3OsSemGive(rmInstance->initParam.rmSemHandle);
1944                 }
1945             }
1946         }
1948         /**
1949          * Check the Free Resource Result 'result' first. If Free Resource
1950          * has resulted in an error, return it (having more priority than
1951          * semResult.
1952          * Else, return semResult.
1953          */
1954          if (EDMA3_RM_SOK == result)
1955             {
1956             /**
1957             * Free Resource successful, return semResult for returning
1958             * semaphore.
1959             */
1960             result = semResult;
1961         }
1963 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1964     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1965                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1966                 EDMA3_DVT_dCOUNTER,
1967                 EDMA3_DVT_dNONE,
1968                 EDMA3_DVT_dNONE));
1969 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1971     return result;
1972     }
1974 EDMA3_RM_Result EDMA3_RM_allocLogicalChannel(EDMA3_RM_Handle hEdmaResMgr,
1975                             EDMA3_RM_ResDesc *lChObj,
1976                             uint32_t *pParam,
1977                             uint32_t *pTcc)
1978     {
1979     EDMA3_RM_ResDesc *chObj;
1980     EDMA3_RM_ResDesc resObj;
1981     EDMA3_RM_Result result = EDMA3_RM_SOK;
1982     EDMA3_RM_Instance *rmInstance = NULL;
1983     EDMA3_RM_Obj *rmObj = NULL;
1984     uint32_t mappedPaRAMId=0U;
1985     uint32_t mappedTcc = EDMA3_RM_CH_NO_TCC_MAP;
1986     int32_t paRAMId = (int32_t)EDMA3_RM_RES_ANY;
1987     volatile EDMA3_CCRL_Regs *gblRegs = NULL;
1988     uint32_t qdmaChId = EDMA3_MAX_PARAM_SETS;
1989         uint32_t edma3Id;
1991 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1992     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1993                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1994                 EDMA3_DVT_dCOUNTER,
1995                 EDMA3_DVT_dNONE,
1996                 EDMA3_DVT_dNONE));
1997 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1999         /* If parameter checking is enabled... */
2000 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
2001     if ((lChObj == NULL) || (hEdmaResMgr == NULL))
2002         {
2003         result = EDMA3_RM_E_INVALID_PARAM;
2004         }
2005 #endif
2007         /* Check if the parameters are OK. */
2008         if (EDMA3_RM_SOK == result)
2009         {
2010         chObj = lChObj;
2012         if ((chObj->type == EDMA3_RM_RES_DMA_CHANNEL)
2013             || (chObj->type == EDMA3_RM_RES_QDMA_CHANNEL))
2014             {
2015             /**
2016              * If the request is for a DMA or QDMA channel, check the
2017              * pParam and pTcc objects also.
2018              * For the Link channel request, they could be NULL.
2019              */
2020                         /* If parameter checking is enabled... */
2021 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
2022             if ((pParam == NULL) || (pTcc == NULL))
2023                 {
2024                 result = EDMA3_RM_E_INVALID_PARAM;
2025                 }
2026 #endif
2027             }
2028         }
2030     if (result == EDMA3_RM_SOK)
2031         {
2032         rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
2034         if (rmInstance == NULL)
2035             {
2036             result = EDMA3_RM_E_INVALID_PARAM;
2037             }
2038         }
2040     if (result == EDMA3_RM_SOK)
2041         {
2042         rmObj = rmInstance->pResMgrObjHandle;
2044         if (rmObj == NULL)
2045             {
2046             result = EDMA3_RM_E_INVALID_PARAM;
2047             }
2048         else
2049             {
2050             if (rmObj->gblCfgParams.globalRegs == NULL)
2051                 {
2052                 result = EDMA3_RM_E_INVALID_PARAM;
2053                 }
2054             }
2055         }
2057     if (result == EDMA3_RM_SOK)
2058         {
2059         edma3Id = rmObj->phyCtrllerInstId;
2060         gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
2062         switch (chObj->type)
2063             {
2064             case EDMA3_RM_RES_DMA_CHANNEL:
2065                 {
2066                 if ((chObj->resId == EDMA3_RM_DMA_CHANNEL_ANY)
2067                     || (chObj->resId == EDMA3_RM_RES_ANY))
2068                     {
2069                     /* Request for ANY DMA channel. */
2070                     resObj.type = EDMA3_RM_RES_DMA_CHANNEL;
2071                     resObj.resId = EDMA3_RM_RES_ANY;
2072                     result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2074                     if (result == EDMA3_RM_SOK)
2075                         {
2076                         /* DMA channel allocated successfully. */
2077                         chObj->resId = resObj.resId;
2079                         /**
2080                          * Check the PaRAM Set user has specified for this DMA channel.
2081                          * Two cases exist:
2082                          * a) DCHMAP exists: Any PaRAM Set can be used
2083                          * b) DCHMAP does not exist: Should not be possible
2084                          * only if the channel allocated (ANY) and PaRAM requested
2085                          * are same.
2086                          */
2087                         if ((*pParam) == EDMA3_RM_PARAM_ANY)
2088                             {
2089                             /* User specified ANY PaRAM Set; Check the mapping. */
2090                             mappedPaRAMId = rmObj->gblCfgParams.dmaChannelPaRAMMap[resObj.resId];
2091                             if (mappedPaRAMId != EDMA3_RM_CH_NO_PARAM_MAP)
2092                                 {
2093                                 /** If some PaRAM set is statically mapped to the returned
2094                                 * channel number, use that.
2095                                 */
2096                                 paRAMId = (int32_t)mappedPaRAMId;
2097                                 }
2098                             }
2099                         else
2100                             {
2101                             /* User specified some PaRAM Set; check that can be used or not. */
2102                             if (TRUE == rmObj->gblCfgParams.dmaChPaRAMMapExists)
2103                                 {
2104                                 paRAMId = (int32_t)(*pParam);
2105                                 }
2106                             else
2107                                 {
2108                                 /**
2109                                  * Channel mapping does not exist. If the PaRAM Set requested
2110                                  * is the same as dma channel allocated (coincidentally), it is fine.
2111                                  * Else return error.
2112                                  */
2113                                 if ((*pParam) != (resObj.resId))
2114                                     {
2115                                     result = EDMA3_RM_E_INVALID_PARAM;
2117                                     /**
2118                                      * Free the previously allocated DMA channel also.
2119                                      */
2120                                     EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2121                                     }
2122                                 else
2123                                     {
2124                                     paRAMId = (int32_t)(*pParam);
2125                                     }
2126                                 }
2127                             }
2129                         mappedTcc = rmObj->gblCfgParams.dmaChannelTccMap[resObj.resId];
2130                         }
2131                     }
2132                 else
2133                     {
2134                     if (chObj->resId <= edma3_dma_ch_max_val[edma3Id])
2135                         {
2136                         /* Request for a specific DMA channel */
2137                         resObj.type = EDMA3_RM_RES_DMA_CHANNEL;
2138                         resObj.resId = chObj->resId;
2139                         result = EDMA3_RM_allocResource(hEdmaResMgr,
2140                                         (EDMA3_RM_ResDesc *)&resObj);
2142                         if (result == EDMA3_RM_SOK)
2143                             {
2144                             /**
2145                              * Check the PaRAM Set user has specified for this DMA channel.
2146                              * Two cases exist:
2147                              * a) DCHMAP exists: Any PaRAM Set can be used
2148                              * b) DCHMAP does not exist: Should not be possible
2149                              * only if the channel allocated (ANY) and PaRAM requested
2150                              * are same.
2151                              */
2152                             if ((*pParam) == EDMA3_RM_PARAM_ANY)
2153                                 {
2154                                 /* User specified ANY PaRAM Set; Check the mapping. */
2155                                 mappedPaRAMId = rmObj->gblCfgParams.dmaChannelPaRAMMap[resObj.resId];
2156                                 if (mappedPaRAMId != EDMA3_RM_CH_NO_PARAM_MAP)
2157                                     {
2158                                     /** If some PaRAM set is statically mapped to the returned
2159                                     * channel number, use that.
2160                                     */
2161                                     paRAMId = (int32_t)mappedPaRAMId;
2162                                     }
2163                                 }
2164                             else
2165                                 {
2166                                 /* User specified some PaRAM Set; check that can be used or not. */
2167                                 if (TRUE == rmObj->gblCfgParams.dmaChPaRAMMapExists)
2168                                     {
2169                                     paRAMId = (int32_t)(*pParam);
2170                                     }
2171                                 else
2172                                     {
2173                                     /**
2174                                      * Channel mapping does not exist. If the PaRAM Set requested
2175                                      * is the same as dma channel allocated (coincidentally), it is fine.
2176                                      * Else return error.
2177                                      */
2178                                     if ((*pParam) != (resObj.resId))
2179                                         {
2180                                         result = EDMA3_RM_E_INVALID_PARAM;
2182                                         /**
2183                                          * Free the previously allocated DMA channel also.
2184                                          */
2185                                         EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2186                                         }
2187                                     else
2188                                         {
2189                                         paRAMId = (int32_t)(*pParam);
2190                                         }
2191                                     }
2192                                 }
2194                             mappedTcc = rmObj->gblCfgParams.dmaChannelTccMap[chObj->resId];
2195                             }
2196                         }
2197                     else
2198                         {
2199                         result = EDMA3_RM_E_INVALID_PARAM;
2200                         }
2201                     }
2202                 }
2203                 break;
2206             case EDMA3_RM_RES_QDMA_CHANNEL:
2207                 {
2208                 if ((chObj->resId == EDMA3_RM_QDMA_CHANNEL_ANY)
2209                     || (chObj->resId == EDMA3_RM_RES_ANY))
2210                     {
2211                     /* First request for any available QDMA channel */
2212                     resObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
2213                     resObj.resId = EDMA3_RM_RES_ANY;
2214                     result = EDMA3_RM_allocResource(hEdmaResMgr,
2215                                     (EDMA3_RM_ResDesc *)&resObj);
2217                     if (result == EDMA3_RM_SOK)
2218                         {
2219                         /* Return the actual QDMA channel id. */
2220                         chObj->resId = resObj.resId;
2222                         /* Save the Logical-QDMA channel id for future use. */
2223                         qdmaChId = resObj.resId + edma3_qdma_ch_min_val[edma3Id];
2225                         /**
2226                          * Check the PaRAM Set user has specified for this QDMA channel.
2227                          * If he has specified any particular PaRAM Set, use that.
2228                          */
2229                         if ((*pParam) != EDMA3_RM_PARAM_ANY)
2230                             {
2231                             /* User specified ANY PaRAM Set; Check the mapping. */
2232                             paRAMId = (int32_t)(*pParam);
2233                             }
2234                         }
2235                     }
2236                 else
2237                     {
2238                     if (chObj->resId < rmObj->gblCfgParams.numQdmaChannels)
2239                         {
2240                         /* Request for a specific QDMA channel */
2241                         resObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
2242                         resObj.resId = chObj->resId;
2243                         result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2245                         if (result == EDMA3_RM_SOK)
2246                             {
2247                             /* Save the Logical-QDMA channel id for future use. */
2248                             qdmaChId = chObj->resId + edma3_qdma_ch_min_val[edma3Id];
2250                             /**
2251                              * Check the PaRAM Set user has specified for this QDMA channel.
2252                              * If he has specified any particular PaRAM Set, use that.
2253                              */
2254                             if ((*pParam) != EDMA3_RM_PARAM_ANY)
2255                                 {
2256                                 /* User specified ANY PaRAM Set; Check the mapping. */
2257                                 paRAMId = (int32_t)(*pParam);
2258                                 }
2259                             }
2260                         }
2261                     else
2262                         {
2263                         result = EDMA3_RM_E_INVALID_PARAM;
2264                         }
2265                     }
2266                 }
2267                 break;
2269             case EDMA3_RM_RES_PARAM_SET:
2270                     {
2271                     /* Request for a LINK channel. */
2272                     if ((chObj->resId == EDMA3_RM_PARAM_ANY)
2273                         || (chObj->resId == EDMA3_RM_RES_ANY))
2274                         {
2275                         /* Request for ANY LINK channel. */
2276                         paRAMId = (int32_t)EDMA3_RM_RES_ANY;
2277                         }
2278                     else
2279                         {
2280                         if (chObj->resId < edma3NumPaRAMSets)
2281                             {
2282                             /* Request for a Specific LINK channel. */
2283                             paRAMId = (int32_t)(chObj->resId);
2284                             }
2285                         else
2286                             {
2287                             result = EDMA3_RM_E_INVALID_PARAM;
2288                             }
2289                         }
2291                     if (result == EDMA3_RM_SOK)
2292                         {
2293                         /* Try to allocate the link channel */
2294                         resObj.type = EDMA3_RM_RES_PARAM_SET;
2295                         resObj.resId = (uint32_t)paRAMId;
2296                         result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2298                         if (result == EDMA3_RM_SOK)
2299                             {
2300                             uint32_t linkCh = edma3_link_ch_min_val[edma3Id];
2302                             /* Return the actual PaRAM Id. */
2303                             chObj->resId = resObj.resId;
2305                             /*
2306                             * Search for the next Link channel place-holder available,
2307                             * starting from EDMA3_RM_LINK_CH_MIN_VAL.
2308                             * It will be used for future operations on the Link channel.
2309                             */
2310                             while ((edma3RmChBoundRes[rmObj->phyCtrllerInstId][linkCh].paRAMId != -1)
2311                                         && (linkCh <= edma3_link_ch_max_val[edma3Id]))
2312                                 {
2313                                 /* Move to the next place-holder. */
2314                                 linkCh++;
2315                                 }
2317                             /* Verify the returned handle, it should lie in the correct range */
2318                             if (linkCh > edma3_link_ch_max_val[edma3Id])
2319                                 {
2320                                 result = EDMA3_RM_E_INVALID_PARAM;
2322                                 /* Free the PaRAM Set now. */
2323                                 resObj.type = EDMA3_RM_RES_PARAM_SET;
2324                                 resObj.resId = chObj->resId;
2325                                 result = EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2326                                 }
2327                             else
2328                                 {
2329                                 /* Save the PaRAM Id for the Link Channel. */
2330                                 edma3RmChBoundRes[rmObj->phyCtrllerInstId][linkCh].paRAMId = (int32_t)(chObj->resId);
2332                                 /**
2333                                  * Remove any linking. Before doing that, check
2334                                  * whether it is permitted or not.
2335                                  */
2336                                 if (TRUE == rmInstance->regModificationRequired)
2337                                     {
2338                                     *((&gblRegs->PARAMENTRY[chObj->resId].OPT)
2339                                             + (uint32_t)EDMA3_RM_PARAM_ENTRY_LINK_BCNTRLD) = 0xFFFFU;
2340                                     }
2341                                 }
2342                             }
2343                         }
2344                     }
2345                     break;
2347             default:
2348                     {
2349                         result = EDMA3_RM_E_INVALID_PARAM;
2350                         break;
2351                     }
2352             }
2353         }
2356     if (result == EDMA3_RM_SOK)
2357         {
2358         /**
2359          * For DMA/QDMA channels, we still have to allocate more resources like
2360          * TCC, PaRAM Set etc.
2361          * For Link channel, only the PaRAMSet is required and that has been
2362          * allocated so no further operations required.
2363          */
2365         /* Further resources' allocation for DMA channel. */
2366         if (chObj->type == EDMA3_RM_RES_DMA_CHANNEL)
2367             {
2368             /* First allocate a PaRAM Set */
2369             resObj.type = EDMA3_RM_RES_PARAM_SET;
2370             /* Use the saved param id now. */
2371             resObj.resId = (uint32_t)paRAMId;
2372             result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2373             if (result == EDMA3_RM_SOK)
2374                 {
2375                 /**
2376                  * PaRAM Set allocation succeeded.
2377                  * Save the PaRAM Set first.
2378                  */
2379                 *pParam = resObj.resId;
2380                 edma3RmChBoundRes[rmObj->phyCtrllerInstId][chObj->resId].paRAMId = (int32_t)(resObj.resId);
2382                 /* Allocate the TCC now. */
2383                 resObj.type = EDMA3_RM_RES_TCC;
2384                 if ((*pTcc) == EDMA3_RM_TCC_ANY)
2385                     {
2386                     if (mappedTcc == EDMA3_RM_CH_NO_TCC_MAP)
2387                         {
2388                         resObj.resId = EDMA3_RM_RES_ANY;
2389                         }
2390                     else
2391                         {
2392                         resObj.resId = mappedTcc;
2393                         }
2394                     }
2395                 else
2396                     {
2397                     resObj.resId = *pTcc;
2398                     }
2400                 result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2401                 if (result == EDMA3_RM_SOK)
2402                     {
2403                      /* TCC allocation succeeded. Save it first. */
2404                     *pTcc = resObj.resId;
2405                      edma3RmChBoundRes[rmObj->phyCtrllerInstId][chObj->resId].tcc = resObj.resId;
2407                     /**
2408                      * Check first whether the global registers and the allocated
2409                      * PaRAM Set can be modified or not. If yes, do the needful.
2410                      * Else leave this for the user.
2411                      */
2412                     if (TRUE == rmInstance->regModificationRequired)
2413                         {
2414                         /* Set TCC of the allocated Param Set. */
2415                         gblRegs->PARAMENTRY[*pParam].OPT  &= EDMA3_RM_OPT_TCC_CLR_MASK;
2416                         gblRegs->PARAMENTRY[*pParam].OPT |= EDMA3_RM_OPT_TCC_SET_MASK(*pTcc);
2418                         /**
2419                          * Do the mapping between DMA channel and PaRAM Set.
2420                          * Do this for the EDMA3 Controllers which have a register for mapping
2421                          * DMA Channel to a particular PaRAM Set.
2422                          */
2423                         if (TRUE == rmObj->gblCfgParams.dmaChPaRAMMapExists)
2424                             {
2425                             gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
2427                             /* Map Parameter RAM Set Number for specified channelId */
2428                             gblRegs->DCHMAP[chObj->resId] &= EDMA3_RM_DCH_PARAM_CLR_MASK;
2429                             gblRegs->DCHMAP[chObj->resId] |= EDMA3_RM_DCH_PARAM_SET_MASK(*pParam);
2430                             }
2432                         /* Remove any linking */
2433                         *((&gblRegs->PARAMENTRY[*pParam].OPT)
2434                                 + (uint32_t)EDMA3_RM_PARAM_ENTRY_LINK_BCNTRLD) = 0xFFFFU;
2435                         }
2436                     }
2437                 else
2438                     {
2439                     /**
2440                      * TCC allocation failed, free the previously allocated
2441                      * PaRAM Set and DMA channel.
2442                      */
2443                     resObj.type = EDMA3_RM_RES_PARAM_SET;
2444                     resObj.resId = *pParam;
2445                     EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2447                     /* Reset the book-keeping data structure also. */
2448                     edma3RmChBoundRes[rmObj->phyCtrllerInstId][chObj->resId].paRAMId = -1;
2450                     resObj.type = chObj->type;
2451                     resObj.resId = chObj->resId;
2452                     EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2453                     }
2454                 }
2455             else
2456                 {
2457                 /**
2458                  * PaRAM Set allocation failed, free the previously allocated
2459                  * DMA channel also.
2460                  */
2461                 resObj.type = chObj->type;
2462                 resObj.resId = chObj->resId;
2463                 EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2464                 }
2465             }
2468         /* Further resources' allocation for QDMA channel. */
2469         if (chObj->type == EDMA3_RM_RES_QDMA_CHANNEL)
2470             {
2471             /* First allocate a PaRAM Set */
2472             resObj.type = EDMA3_RM_RES_PARAM_SET;
2473             /* Use the saved param id now. */
2474             resObj.resId = (uint32_t)paRAMId;
2475             result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2476             if (result == EDMA3_RM_SOK)
2477                 {
2478                 /**
2479                  * PaRAM Set allocation succeeded.
2480                  * Save the PaRAM Set first.
2481                  */
2482                 *pParam = resObj.resId;
2483                 edma3RmChBoundRes[rmObj->phyCtrllerInstId][qdmaChId].paRAMId = (int32_t)(resObj.resId);
2485                 /* Allocate the TCC now. */
2486                 resObj.type = EDMA3_RM_RES_TCC;
2487                 if ((*pTcc) == EDMA3_RM_TCC_ANY)
2488                     {
2489                     if (mappedTcc == EDMA3_RM_CH_NO_TCC_MAP)
2490                         {
2491                         resObj.resId = EDMA3_RM_RES_ANY;
2492                         }
2493                     else
2494                         {
2495                         resObj.resId = mappedTcc;
2496                         }
2497                     }
2498                 else
2499                     {
2500                     resObj.resId = *pTcc;
2501                     }
2503                 result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2504                 if (result == EDMA3_RM_SOK)
2505                     {
2506                      /* TCC allocation succeeded. Save it first. */
2507                     *pTcc = resObj.resId;
2508                      edma3RmChBoundRes[rmObj->phyCtrllerInstId][qdmaChId].tcc = resObj.resId;
2510                     /**
2511                      * Check first whether the global registers and the allocated