Misra C Fixes
[keystone-rtos/edma3_lld.git] / packages / ti / sdo / edma3 / rm / src / edma3resmgr.c
1 /*
2  * edma3resmgr.c
3  *
4  * EDMA3 Controller Resource Manager Interface Implementation
5  *
6  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
7  *
8  *
9  *  Redistribution and use in source and binary forms, with or without
10  *  modification, are permitted provided that the following conditions
11  *  are met:
12  *
13  *    Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  *
16  *    Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the
19  *    distribution.
20  *
21  *    Neither the name of Texas Instruments Incorporated nor the names of
22  *    its contributors may be used to endorse or promote products derived
23  *    from this software without specific prior written permission.
24  *
25  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37 */
39 /* Resource Manager Internal Header Files */
40 #include <ti/sdo/edma3/rm/src/edma3resmgr.h>
42 /* Instrumentation Header File */
43 #ifdef EDMA3_INSTRUMENTATION_ENABLED
44 #include <ti/sdo/edma3/rm/src/edma3_log.h>
45 #endif
47 /* For assert() */
48 /**
49  * Define NDEBUG to ignore assert().
50  * NDEBUG should be defined before including assert.h header file.
51  */
52 #include <assert.h>
55 /* Global Defines, need to re-compile if values are changed */
56 /*---------------------------------------------------------------------------*/
57 /**
58  * \brief EDMA3 Resource Manager behaviour of clearing CC ERROR interrupts.
59  *         This macro controls the driver to enable/disable clearing of error
60  *         status of all channels.
61  *
62  *         On disabling this (with value 0x0), the channels owned by the region
63  *         is cleared and its expected that some other entity is responsible for
64  *         clearing the error status for channels not owned.
65  *
66  *         Its recomended that this flag is a positive value, to ensure that
67  *         error flags are cleared for all the channels.
68  */
69 #define EDMA3_RM_RES_CLEAR_ERROR_STATUS_FOR_ALL_CHANNELS (TRUE)
71 /**
72  * \brief EDMA3 Resource Manager retry count to check the pending interrupts inside ISR.
73  *         This macro controls the driver to check the pending interrupt for
74  *         'n' number of times.
75  *         Minumum value is 1.
76  */
77 #define EDMA3_RM_COMPL_HANDLER_RETRY_COUNT (10U)
79 /**
80  * \brief EDMA3 Resource Manager retry count to check the pending CC Error Interrupt inside ISR
81  *         This macro controls the driver to check the pending CC Error
82  *         interrupt for 'n' number of times.
83  *         Minumum value is 1.
84  */
85 #define EDMA3_RM_CCERR_HANDLER_RETRY_COUNT (10U)
89 /* Externel Variables */
90 /*---------------------------------------------------------------------------*/
91 /**
92  * Maximum Resource Manager Instances supported by the EDMA3 Package.
93  */
94 extern const uint32_t EDMA3_MAX_RM_INSTANCES;
97 #ifndef GENERIC
98 /**
99  * \brief Static Configuration structure for EDMA3
100  * controller, to provide Global SoC specific Information.
101  *
102  * This configuration info can also be provided by the user at run-time,
103  * while calling EDMA3_RM_create (). If not provided at run-time,
104  * this info will be taken from the config file "edma3_<PLATFORM_NAME>_cfg.c",
105  * for the specified platform.
106  */
107 extern EDMA3_RM_GblConfigParams edma3GblCfgParams [EDMA3_MAX_EDMA3_INSTANCES];
109 /**
110  * \brief Default Static Region Specific Configuration structure for
111  * EDMA3 controller, to provide region specific Information.
112  */
113 extern EDMA3_RM_InstanceInitConfig defInstInitConfig [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
115 #endif
118 /**
119  * \brief Region Specific Configuration structure for
120  * EDMA3 controller, to provide region specific Information.
121  *
122  * This configuration info can also be provided by the user at run-time,
123  * while calling EDMA3_RM_open (). If not provided at run-time,
124  * this info will be taken from the config file "edma3_<PLATFORM_NAME>_cfg.c",
125  * for the specified platform.
126  */
127 #ifdef BUILD_C6XDSP
128 extern far EDMA3_RM_InstanceInitConfig *userInitConfig;
129 extern far EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;
130 #else
131 extern EDMA3_RM_InstanceInitConfig *userInitConfig;
132 extern EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;
133 #endif
135 /**
136  * Handles of EDMA3 Resource Manager Instances.
137  *
138  * Used to maintain information of the EDMA3 RM Instances
139  * for each HW controller.
140  * There could be a maximum of EDMA3_MAX_RM_INSTANCES instances per
141  * EDMA3 HW.
142  */
143 #ifdef BUILD_C6XDSP
144 extern far EDMA3_RM_Instance *resMgrInstance;
145 extern far EDMA3_RM_Instance *ptrRMIArray;
146 #else
147 extern EDMA3_RM_Instance *ptrRMIArray;
148 extern EDMA3_RM_Instance *resMgrInstance;
150 #endif
151 /** Max of DMA Channels */
152 uint32_t edma3_dma_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
153 /** Min of Link Channels */
154 uint32_t edma3_link_ch_min_val[EDMA3_MAX_EDMA3_INSTANCES];
155 /** Max of Link Channels */
156 uint32_t edma3_link_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
157 /** Min of QDMA Channels */
158 uint32_t edma3_qdma_ch_min_val[EDMA3_MAX_EDMA3_INSTANCES];
159 /** Max of QDMA Channels */
160 uint32_t edma3_qdma_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
161 /** Max of Logical Channels */
162 uint32_t edma3_log_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
164 /* Globals */
165 /*---------------------------------------------------------------------------*/
166 /**
167  * \brief EDMA3 Resource Manager Objects, tied to each EDMA3 HW Controller.
168  *
169  * Typically one RM object will cater to one EDMA3 HW controller
170  * and will have all the global config information.
171  */
172 #ifdef BUILD_C6XDSP
173 #pragma DATA_SECTION(resMgrObj, ".fardata:.edma3Globals");
174 #endif
175 EDMA3_RM_Obj resMgrObj[EDMA3_MAX_EDMA3_INSTANCES];
178 /**
179  * Global Array to store the mapping between DMA channels and Interrupt
180  * channels i.e. TCCs.
181  * DMA channel X can use any TCC Y. Transfer completion
182  * interrupt will occur on the TCC Y (IPR/IPRH Register, bit Y), but error
183  * interrupt will occur on DMA channel X (EMR/EMRH register, bit X). In that
184  * scenario, this DMA channel <-> TCC mapping will be used to point to
185  * the correct callback function.
186  */
187 #ifdef BUILD_C6XDSP
188 #pragma DATA_SECTION(edma3DmaChTccMapping, ".fardata:.edma3Globals");
189 #endif
190 static uint32_t edma3DmaChTccMapping [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_DMA_CH];
193 /**
194  * Global Array to store the mapping between QDMA channels and Interrupt
195  * channels i.e. TCCs.
196  * QDMA channel X can use any TCC Y. Transfer completion
197  * interrupt will occur on the TCC Y (IPR/IPRH Register, bit Y), but error
198  * interrupt will occur on QDMA channel X (QEMR register, bit X). In that
199  * scenario, this QDMA channel <-> TCC mapping will be used to point to
200  * the correct callback function.
201  */
202 #ifdef BUILD_C6XDSP
203 #pragma DATA_SECTION(edma3QdmaChTccMapping, ".fardata:.edma3Globals");
204 #endif
205 static uint32_t edma3QdmaChTccMapping [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_QDMA_CH];
208 /**
209  * Global Array to maintain the Callback details registered
210  * against a particular TCC. Used to call the callback
211  * functions linked to the particular channel.
212  */
213 #ifdef BUILD_C6XDSP
214 #pragma DATA_SECTION(edma3IntrParams, ".fardata:.edma3Globals");
215 #endif
216 static EDMA3_RM_TccCallbackParams edma3IntrParams [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_TCC];
219 /** edma3RegionId will be updated ONCE using the parameter regionId passed to
220  * the EDMA3_RM_open() function, for the Master RM instance (one who
221  * configures the Global Registers).
222  * This global variable will be used within the Interrupt handlers to know
223  * which shadow region registers to access. All other interrupts coming
224  * from other shadow regions will not be handled.
225  */
226 #ifdef BUILD_C6XDSP
227 #pragma DATA_SECTION(edma3RegionId, ".fardata:.edma3Globals");
228 #endif
229 static EDMA3_RM_RegionId edma3RegionId = EDMA3_MAX_REGIONS;
231 /** masterExists[] will be updated when the Master RM Instance modifies the
232  * Global EDMA3 configuration registers. It is used to prevent any other
233  * Master RM Instance creation.
234  * masterExists[] is per EDMA3 hardware, hence it is created
235  * as an array.
236  */
237 #ifdef BUILD_C6XDSP
238 #pragma DATA_SECTION(masterExists, ".fardata:.edma3Globals");
239 #endif
240 static uint32_t masterExists [EDMA3_MAX_EDMA3_INSTANCES] = {FALSE,FALSE,FALSE,FALSE,FALSE};
242 /**
243  * Number of PaRAM Sets actually present on the SoC. This will be updated
244  * while creating the Resource Manager Object.
245  */
246 #ifdef BUILD_C6XDSP
247 #pragma DATA_SECTION(edma3NumPaRAMSets, ".fardata:.edma3Globals");
248 #endif
249 uint32_t edma3NumPaRAMSets = EDMA3_MAX_PARAM_SETS;
252 /**
253  * The list of Interrupt Channels which get allocated while requesting the
254  * TCC. It will be used while checking the IPR/IPRH bits in the RM ISR.
255  */
256 #ifdef BUILD_C6XDSP
257 #pragma DATA_SECTION(allocatedTCCs, ".fardata:.edma3Globals");
258 #endif
259 static uint32_t allocatedTCCs[EDMA3_MAX_EDMA3_INSTANCES][2U] =
260                                                                                         {
261                                                                                         {0x0U, 0x0U},
262                                                                                         {0x0U, 0x0U},
263                                                                                         {0x0U, 0x0U},
264                                             {0x0U, 0x0U},
265                                             {0x0U, 0x0U},
266                                                                                         };
269 /**
270  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
271  * and stored in this array. It will be referenced in
272  * EDMA3_RM_allocContiguousResource () to look for contiguous resources.
273  */
274 #ifdef BUILD_C6XDSP
275 #pragma DATA_SECTION(contiguousDmaRes, ".fardata:.edma3Globals");
276 #endif
277 static uint32_t contiguousDmaRes[EDMA3_MAX_DMA_CHAN_DWRDS] = {0x0U, 0x0U};
279 /**
280  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
281  * and stored in this array. It will be referenced in
282  * EDMA3_RM_allocContiguousResource () to look for contiguous resources.
283  */
284 #ifdef BUILD_C6XDSP
285 #pragma DATA_SECTION(contiguousQdmaRes, ".fardata:.edma3Globals");
286 #endif
287 static uint32_t contiguousQdmaRes[EDMA3_MAX_QDMA_CHAN_DWRDS] = {0x0U};
289 /**
290  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
291  * and stored in this array. It will be referenced in
292  * EDMA3_RM_allocContiguousResource () to look for contiguous resources.
293  */
294 #ifdef BUILD_C6XDSP
295 #pragma DATA_SECTION(contiguousTccRes, ".fardata:.edma3Globals");
296 #endif
297 static uint32_t contiguousTccRes[EDMA3_MAX_TCC_DWRDS] = {0x0U, 0x0U};
299 /**
300  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
301  * and stored in this array. It will be referenced in
302  * EDMA3_RM_allocContiguousResource () to look for contiguous resources.
303  */
304 #ifdef BUILD_C6XDSP
305 #pragma DATA_SECTION(contiguousParamRes, ".fardata:.edma3Globals");
306 #endif
307 static uint32_t contiguousParamRes[EDMA3_MAX_PARAM_DWRDS];
310 /**
311  * \brief Resources bound to a Channel
312  *
313  * When a request for a channel is made, the resources PaRAM Set and TCC
314  * get bound to that channel. This information is needed internally by the
315  * resource manager, when a request is made to free the channel,
316  * to free up the channel-associated resources.
317  */
318 #ifdef BUILD_C6XDSP
319 #pragma DATA_SECTION(edma3RmChBoundRes, ".fardata:.edma3Globals");
320 #endif
321 static EDMA3_RM_ChBoundResources edma3RmChBoundRes [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_LOGICAL_CH];
323 /**
324  * Used to reset the Internal EDMA3 Resource Manager Data Structures for the first time.
325  */
326 #ifdef BUILD_C6XDSP
327 #pragma DATA_SECTION(rmInitDone, ".fardata:.edma3Globals");
328 #endif
329  static uint16_t rmInitDone = FALSE;
331 /*---------------------------------------------------------------------------*/
333 /* Local functions prototypes */
334 /*---------------------------------------------------------------------------*/
335 /** EDMA3 Instance 0 Completion Handler Interrupt Service Routine */
336 void lisrEdma3ComplHandler0(uint32_t edma3InstanceId);
337 /** EDMA3 Instance 0 CC Error Interrupt Service Routine */
338 void lisrEdma3CCErrHandler0(uint32_t edma3InstanceId);
339 /**
340  * EDMA3 Instance 0 TC[0-7] Error Interrupt Service Routines
341  * for a maximum of 8 TCs (Transfer Controllers).
342  */
343 void lisrEdma3TC0ErrHandler0(uint32_t edma3InstanceId);
344 void lisrEdma3TC1ErrHandler0(uint32_t edma3InstanceId);
345 void lisrEdma3TC2ErrHandler0(uint32_t edma3InstanceId);
346 void lisrEdma3TC3ErrHandler0(uint32_t edma3InstanceId);
347 void lisrEdma3TC4ErrHandler0(uint32_t edma3InstanceId);
348 void lisrEdma3TC5ErrHandler0(uint32_t edma3InstanceId);
349 void lisrEdma3TC6ErrHandler0(uint32_t edma3InstanceId);
350 void lisrEdma3TC7ErrHandler0(uint32_t edma3InstanceId);
353 /** Interrupt Handler for the Transfer Completion interrupt */
354 static void edma3ComplHandler (const EDMA3_RM_Obj *rmObj);
355 /** Interrupt Handler for the Channel Controller Error interrupt */
356 static void edma3CCErrHandler (const EDMA3_RM_Obj *rmObj);
357 /** Interrupt Handler for the Transfer Controller Error interrupt */
358 static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, uint32_t tcNum);
361 /** Local MemZero function */
362 void edma3MemZero(void *dst, uint32_t len);
363 /** Local MemCpy function */
364 void edma3MemCpy(void *dst, const void *src, uint32_t len);
365 /* Local MemCopy function to copy Param Set ONLY */
366 void edma3ParamCpy(volatile void *dst, const volatile void *src);
368 /** Initialization of the Global region registers of the EDMA3 Controller */
369 static void edma3GlobalRegionInit (uint32_t phyCtrllerInstId, uint32_t numDmaChannels);
370 /** Initialization of the Shadow region registers of the EDMA3 Controller */
371 static void edma3ShadowRegionInit (const EDMA3_RM_Instance *pRMInstance);
375 /* Internal functions for contiguous resource allocation */
376 /**
377  * Finds a particular bit ('0' or '1') in the particular word from 'start'.
378  * If found, returns the position, else return -1.
379  */
380 static int32_t findBitInWord (int32_t source, uint32_t start, uint16_t bit);
382 /**
383  * Finds a particular bit ('0' or '1') in the specified resources' array
384  * from 'start' to 'end'. If found, returns the position, else return -1.
385  */
386 static int32_t findBit (EDMA3_RM_ResType resType,
387                             uint32_t start,
388                             uint32_t end,
389                             uint16_t bit);
391 /**
392  * If successful, this function returns EDMA3_RM_SOK and the position
393  * of first available resource in 'positionRes'. Else returns error.
394  */
395 static EDMA3_RM_Result allocAnyContigRes(EDMA3_RM_ResType resType,
396                                     uint32_t numResources,
397                                     uint32_t *positionRes);
399 /**
400  * Starting from 'firstResIdObj', this function makes the next 'numResources'
401  * Resources non-available for future. Also, it does some global resisters'
402  * setting also.
403  */
404 static EDMA3_RM_Result gblChngAllocContigRes(EDMA3_RM_Instance *rmInstance,
405                         const EDMA3_RM_ResDesc *firstResIdObj,
406                                         uint32_t numResources);
408 /*---------------------------------------------------------------------------*/
410 EDMA3_RM_Result EDMA3_RM_create (uint32_t phyCtrllerInstId,
411                                 const EDMA3_RM_GblConfigParams *gblCfgParams,
412                                 const void *miscParam)
413     {
414     uint32_t count = 0U;
415     EDMA3_RM_Result result = EDMA3_RM_SOK;
416     const EDMA3_RM_MiscParam *miscOpt = (const EDMA3_RM_MiscParam *)miscParam;
418 #ifdef GENERIC
419     /* GENERIC libraries don't come with a default confifguration, always 
420        needs to be supplied with a parameter */ 
421     if (gblCfgParams == NULL)
422         {
423         result = EDMA3_RM_E_INVALID_PARAM;
424         }
425 #endif
427     /**
428      * We are NOT checking 'gblCfgParams' for NULL.
429      * If user has passed NULL, default config info will be
430      * taken from config file.
431      * 'param' is also not being checked because it could be
432      * NULL also.
433      */
435     /* If parameter checking is enabled... */
436 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
437     if (phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
438         {
439         result = EDMA3_RM_E_INVALID_PARAM;
440         }
441 #endif
443         /* Check if the parameters are OK. */
444     if (EDMA3_RM_SOK == result)
445         {
446         /* Initialize the global variables for the first time */
447         if (FALSE == rmInitDone)
448             {
449             edma3MemZero((void *)&(resMgrObj[count]),
450                                 sizeof(resMgrObj));
451             edma3MemZero((void *)(&(edma3IntrParams[0U])),
452                 sizeof(edma3IntrParams));
454             rmInitDone = TRUE;
455             }
457         /* Initialization has been done */
458         if (resMgrObj[phyCtrllerInstId].state != EDMA3_RM_DELETED)
459             {
460             result = EDMA3_RM_E_OBJ_NOT_DELETED;
461             }
462         else
463             {
464             /**
465               * Check whether user has passed the Global Config Info.
466               * If yes, copy it to the driver data structures. Else, use the
467               * info from the config file edma3Cfg.c
468               */
469 #ifndef GENERIC
470             if (NULL == gblCfgParams)
471                 {
472                 /* Take info from the specific config file */
473                 edma3MemCpy((void *)(&resMgrObj[phyCtrllerInstId].gblCfgParams),
474                                             (const void *)(&edma3GblCfgParams[phyCtrllerInstId]),
475                                             sizeof (EDMA3_RM_GblConfigParams));
476                 }
477             else
478                 {
479 #endif
480                 /* User passed the info, save it in the RM object first */
481                 edma3MemCpy((void *)(&resMgrObj[phyCtrllerInstId].gblCfgParams),
482                                             (const void *)(gblCfgParams),
483                                             sizeof (EDMA3_RM_GblConfigParams));
484 #ifndef GENERIC
485                 }
486 #endif
489             /**
490               * Check whether DMA channel to PaRAM Set mapping exists or not.
491               * If it does not exist, set the mapping array as 1-to-1 mapped.
492               */
493             if (FALSE == resMgrObj[phyCtrllerInstId].gblCfgParams.dmaChPaRAMMapExists)
494                 {
495                 for (count = 0U; count < resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels; count++)
496                     {
497                     resMgrObj[phyCtrllerInstId].gblCfgParams.dmaChannelPaRAMMap[count] = count;
498                     }
499                 }
502             /**
503              * Update the actual number of PaRAM sets and
504              * Initialize Boundary Values for Logical Channel Ranges.
505              */
506             edma3NumPaRAMSets = resMgrObj[phyCtrllerInstId].gblCfgParams.numPaRAMSets;
507                         edma3_dma_ch_max_val[phyCtrllerInstId] = resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels - 1U;
508                         edma3_link_ch_min_val[phyCtrllerInstId] = edma3_dma_ch_max_val[phyCtrllerInstId] + 1U;
509                         edma3_link_ch_max_val[phyCtrllerInstId] = edma3_link_ch_min_val[phyCtrllerInstId] + (resMgrObj[phyCtrllerInstId].gblCfgParams.numPaRAMSets - 1U);
510                         edma3_qdma_ch_min_val[phyCtrllerInstId] = edma3_link_ch_max_val[phyCtrllerInstId] + 1U;
511                         edma3_qdma_ch_max_val[phyCtrllerInstId] = edma3_qdma_ch_min_val[phyCtrllerInstId] + (resMgrObj[phyCtrllerInstId].gblCfgParams.numQdmaChannels - 1U);
512                         edma3_log_ch_max_val[phyCtrllerInstId] = edma3_qdma_ch_max_val[phyCtrllerInstId];
514             resMgrObj[phyCtrllerInstId].phyCtrllerInstId = phyCtrllerInstId;
515             resMgrObj[phyCtrllerInstId].state = EDMA3_RM_CREATED;
516             resMgrObj[phyCtrllerInstId].numOpens = 0U;
518             /* Make all the RM instances for this EDMA3 HW NULL */
519             for (count = 0U; count < EDMA3_MAX_RM_INSTANCES; count++)
520                 {
521                 edma3MemZero((void *)((EDMA3_RM_Instance *)(ptrRMIArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + count),
522                             sizeof(EDMA3_RM_Instance));
524                 /* Also make this data structure NULL */
525                 edma3MemZero((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + count),
526                             sizeof(EDMA3_RM_InstanceInitConfig));
527                 }
529             /* Initialize the global edma3DmaChTccMapping array with EDMA3_MAX_TCC */
530             for (  count = 0U;
531                     count < resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels;
532                     count++
533                 )
534                 {
535                 edma3DmaChTccMapping[phyCtrllerInstId][count] = EDMA3_MAX_TCC;
536                 }
538             /* Initialize the global edma3QdmaChTccMapping array with EDMA3_MAX_TCC */
539             for (   count = 0U;
540                     count < resMgrObj[phyCtrllerInstId].gblCfgParams.numQdmaChannels;
541                     count++
542                 )
543                 {
544                 edma3QdmaChTccMapping[phyCtrllerInstId][count] = EDMA3_MAX_TCC;
545                 }
547             /* Reset edma3RmChBoundRes Array*/
548             for (count = 0U; count < EDMA3_MAX_LOGICAL_CH; count++)
549                 {
550                 edma3RmChBoundRes[phyCtrllerInstId][count].paRAMId = -1;
551                 edma3RmChBoundRes[phyCtrllerInstId][count].tcc = EDMA3_MAX_TCC;
552                 }
554             /* Make the contiguousParamRes array NULL */
555             edma3MemZero((void *)(&(contiguousParamRes[0U])),
556                 sizeof(contiguousParamRes));
559             /**
560              * Check the misc configuration options structure.
561              * Check whether the global registers' initialization
562              * is required or not.
563              * It is required ONLY if RM is running on the Master Processor.
564              */
565             if (NULL != miscOpt)
566                 {
567                 if (miscOpt->isSlave == FALSE)
568                     {
569                     /* It is a master. */
570                     edma3GlobalRegionInit(phyCtrllerInstId, (resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels));
571                     }
572                 }
573             else
574                 {
575                 /* By default, global registers will be initialized. */
576                 edma3GlobalRegionInit(phyCtrllerInstId, (resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels));
577                 }
578             }
579         }
581     return result;
582     }
584 EDMA3_RM_Result EDMA3_RM_delete (uint32_t phyCtrllerInstId,
585                                                 const void *param)
586     {
587     EDMA3_RM_Result result = EDMA3_RM_SOK;
589     /* If parameter checking is enabled... */
590 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
591     if (phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
592         {
593         result = EDMA3_RM_E_INVALID_PARAM;
594         }
595 #endif
597         /* Check if the parameters are OK. */
598         if (EDMA3_RM_SOK == result)
599         {
600         /**
601          * If number of RM Instances is 0, then state should be
602          * EDMA3_RM_CLOSED OR EDMA3_RM_CREATED.
603          */
604         if ((0 == resMgrObj[phyCtrllerInstId].numOpens)
605             && ((resMgrObj[phyCtrllerInstId].state != EDMA3_RM_CLOSED)
606             && (resMgrObj[phyCtrllerInstId].state != EDMA3_RM_CREATED)))
607             {
608             result = EDMA3_RM_E_OBJ_NOT_CLOSED;
609             }
610         else
611             {
612             /**
613              * If number of RM Instances is NOT 0, then this function
614              * SHOULD NOT be called by anybody.
615              */
616             if (0 != resMgrObj[phyCtrllerInstId].numOpens)
617                 {
618                 result = EDMA3_RM_E_INVALID_STATE;
619                 }
620             else
621                 {
622                 /** Change state to EDMA3_RM_DELETED */
623                 resMgrObj[phyCtrllerInstId].state = EDMA3_RM_DELETED;
625                 /* Reset the Allocated TCCs Array also. */
626                 allocatedTCCs[phyCtrllerInstId][0U] = 0x0U;
627                 allocatedTCCs[phyCtrllerInstId][1U] = 0x0U;
629                 /* Also, reset the RM Object Global Config Info */
630                 edma3MemZero((void *)&(resMgrObj[phyCtrllerInstId].gblCfgParams),
631                          sizeof(EDMA3_RM_GblConfigParams));
632                 }
633             }
634         }
636     return result;
637     }
639 EDMA3_RM_Handle EDMA3_RM_open (uint32_t phyCtrllerInstId,
640                                 const EDMA3_RM_Param *initParam,
641                                 EDMA3_RM_Result *errorCode)
642     {
643     uint32_t intState           = 0U;
644     uint32_t resMgrIdx          = 0U;
645     EDMA3_RM_Result result          = EDMA3_RM_SOK;
646     EDMA3_RM_Obj *rmObj             = NULL;
647     EDMA3_RM_Instance *rmInstance   = NULL;
648     EDMA3_RM_Instance *temp_ptr_rm_inst   = NULL;
649     EDMA3_RM_Handle retVal          = NULL;
650     uint32_t dmaChDwrds = 0U;
651     uint32_t paramSetDwrds = 0U;
652     uint32_t tccDwrds = 0U;
653     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
655 #ifdef GENERIC
656     /* GENERIC libraries don't come with a default confifguration, always 
657        needs to be supplied with a parameter */ 
658     if ((initParam == NULL) || (initParam->rmInstInitConfig == NULL))
659         {
660         result = EDMA3_RM_E_INVALID_PARAM;
661         }
662 #endif
665         /* If parameter checking is enabled... */
666 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
667         if (((initParam == NULL)
668                 || (phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES))
669         || (errorCode == NULL))
670         {
671         result = EDMA3_RM_E_INVALID_PARAM;
672         }
673 #endif
675         /* Check if the parameters are OK. */
676         if (EDMA3_RM_SOK == result)
677         {
678         /* Check whether the semaphore handle is null or not */
679         if (NULL == initParam->rmSemHandle)
680             {
681             result = EDMA3_RM_E_INVALID_PARAM;
682             }
683         else
684             {
685             rmObj = &resMgrObj[phyCtrllerInstId];
686             if  (
687                 (NULL == rmObj)
688                 || (initParam->regionId >=
689                         resMgrObj[phyCtrllerInstId].gblCfgParams.numRegions)
690                 )
691                 {
692                 result = EDMA3_RM_E_INVALID_PARAM;
693                 }
694             else
695                 {
696                 edma3OsProtectEntry (phyCtrllerInstId,
697                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
698                                                                         &intState);
700                 /** Check state of RM Object.
701                   * If no RM instance is opened and this is the first one,
702                   * then state should be created/closed.
703                   */
704                 if ((rmObj->numOpens == 0) &&
705                     ((rmObj->state != EDMA3_RM_CREATED) &&
706                     (rmObj->state != EDMA3_RM_CLOSED)))
707                     {
708                     result = EDMA3_RM_E_INVALID_STATE;
709                     edma3OsProtectExit (phyCtrllerInstId,
710                                                                                 (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
711                                                                                 intState);
712                     }
713                 else
714                     {
715                     /**
716                      * If num of instances opened is more than 0 and less than
717                      *  max allowed, then state should be opened.
718                      */
719                     if (((rmObj->numOpens > 0) &&
720                             (rmObj->numOpens < EDMA3_MAX_RM_INSTANCES))
721                         && (rmObj->state != EDMA3_RM_OPENED))
722                         {
723                         result = EDMA3_RM_E_INVALID_STATE;
724                             edma3OsProtectExit (phyCtrllerInstId,
725                                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
726                                                                                         intState);
727                         }
728                     else
729                         {
730                         /* Check if max opens have passed */
731                         if (rmObj->numOpens >= EDMA3_MAX_RM_INSTANCES)
732                             {
733                             result = EDMA3_RM_E_MAX_RM_INST_OPENED;
734                                     edma3OsProtectExit (phyCtrllerInstId,
735                                                                                                 (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
736                                                                                                 intState);
737                             }
738                         }
739                     }
740                 }
741             }
742         }
744     if (EDMA3_RM_SOK == result)
745         {
746         /*
747         * Check whether the RM instance is Master or not.
748         * If it is master, check whether a master already exists
749         * or not. There should NOT be more than 1 master.
750         * Return error code if master already exists
751         */
752         if ((TRUE == masterExists[phyCtrllerInstId]) && (TRUE == initParam->isMaster))
753             {
754             /* No two masters should exist, return error */
755             result = EDMA3_RM_E_RM_MASTER_ALREADY_EXISTS;
756             edma3OsProtectExit (phyCtrllerInstId,
757                                                                 (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
758                                                                 intState);
759             }
760         else
761             {
762             /* Create Res Mgr Instance */
763             for (resMgrIdx = 0U; resMgrIdx < EDMA3_MAX_RM_INSTANCES; resMgrIdx++)
764                 {
765                 temp_ptr_rm_inst = ((EDMA3_RM_Instance *)(ptrRMIArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx);
767                 if (NULL != temp_ptr_rm_inst)
768                     {
769                     if (NULL == temp_ptr_rm_inst->pResMgrObjHandle)
770                         {
771                         /* Handle to the EDMA3 HW Object */
772                         temp_ptr_rm_inst->pResMgrObjHandle = rmObj;
773                         /* Handle of the Res Mgr Instance */
774                         rmInstance = temp_ptr_rm_inst;
776                         /* Also make this data structure NULL, just for safety. */
777                         edma3MemZero((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx),
778                                     sizeof(EDMA3_RM_InstanceInitConfig));
780                         break;
781                         }
782                     }
783                 }
785             /* Check whether a RM instance has been created or not */
786             if (NULL == rmInstance)
787                 {
788                 result = EDMA3_RM_E_MAX_RM_INST_OPENED;
789                 edma3OsProtectExit (phyCtrllerInstId,
790                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
791                                                                         intState);
792                 }
793             else
794                 {
795                 /* Copy the InitPaRAM first */
796                 edma3MemCpy((void *)(&rmInstance->initParam),
797                                             (const void *)(initParam),
798                                             sizeof (EDMA3_RM_Param));
800                 if (rmObj->gblCfgParams.globalRegs != NULL)
801                     {
802                     globalRegs = (volatile EDMA3_CCRL_Regs *)
803                                             (rmObj->gblCfgParams.globalRegs);
804                     rmInstance->shadowRegs = (EDMA3_CCRL_ShadowRegs *)
805                         &(globalRegs->SHADOW[rmInstance->initParam.regionId]);
807                     /* copy the instance specific semaphore handle */
808                     rmInstance->initParam.rmSemHandle = initParam->rmSemHandle;
810                     /**
811                     * Check whether user has passed information about resources
812                     * owned and reserved by this instance. This is region specific
813                     * information. If he has not passed, dafault static config info will be taken
814                     * from the config file edma3Cfg.c, according to the regionId specified.
815                     *
816                     * resMgrIdx specifies the RM instance number created just now.
817                     * Use it to populate the userInitConfig [].
818                     */
819 #ifndef GENERIC
820                     if (NULL == initParam->rmInstInitConfig)
821                         {
822                         /* Take the info from the specific config file */
823                         edma3MemCpy((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx),
824                                 (const void *)(&defInstInitConfig[phyCtrllerInstId][initParam->regionId]),
825                                 sizeof (EDMA3_RM_InstanceInitConfig));
826                         }
827                     else
828                         {
829 #endif
830                         /* User has passed the region specific info. */
831                         edma3MemCpy((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx),
832                                 (const void *)(initParam->rmInstInitConfig),
833                                 sizeof (EDMA3_RM_InstanceInitConfig));
834 #ifndef GENERIC
835                         }
836 #endif
838                     rmInstance->initParam.rmInstInitConfig =
839                                 ((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx);
841                     dmaChDwrds = rmObj->gblCfgParams.numDmaChannels / (uint32_t)32U;
842                                         if (dmaChDwrds == 0)
843                                                 {
844                                                 /* In case DMA channels are < 32 */
845                                                 dmaChDwrds = 1U;
846                                                 }
848                     paramSetDwrds = rmObj->gblCfgParams.numPaRAMSets / (uint32_t)32U;
849                                         if (paramSetDwrds == 0)
850                                                 {
851                                                 /* In case PaRAM Sets are < 32 */
852                                                 paramSetDwrds = 1U;
853                                                 }
855                     tccDwrds = rmObj->gblCfgParams.numTccs / (uint32_t)32U;
856                                         if (tccDwrds == 0)
857                                                 {
858                                                 /* In case TCCs are < 32 */
859                                                 tccDwrds = 1U;
860                                                 }
862                     for (resMgrIdx = 0U; resMgrIdx < dmaChDwrds; ++resMgrIdx)
863                         {
864                         rmInstance->avlblDmaChannels[resMgrIdx]
865                             = rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resMgrIdx];
866                         }
868                     rmInstance->avlblQdmaChannels[0U]
869                         = rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0U];
871                     for (resMgrIdx = 0U; resMgrIdx < paramSetDwrds; ++resMgrIdx)
872                         {
873                         rmInstance->avlblPaRAMSets[resMgrIdx]
874                             = rmInstance->initParam.rmInstInitConfig->ownPaRAMSets[resMgrIdx];
875                         }
877                     for (resMgrIdx = 0U; resMgrIdx < tccDwrds; ++resMgrIdx)
878                         {
879                         rmInstance->avlblTccs [resMgrIdx]
880                             = rmInstance->initParam.rmInstInitConfig->ownTccs[resMgrIdx];
881                         }
883                     /*
884                      * Mark the PaRAM Sets corresponding to DMA channels as RESERVED.
885                      * For e.g. on a platform where only 32 DMA channels exist,
886                      * mark the first 32 PaRAM Sets as reserved. These param sets
887                      * will not be returned in case user requests for ANY link
888                      * channel.
889                      */
890                     for (resMgrIdx = 0U; resMgrIdx < rmObj->gblCfgParams.numDmaChannels; ++resMgrIdx)
891                         {
892                         rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets[resMgrIdx/32U] |= ((uint32_t)1U<<(resMgrIdx%32U));
893                         }
895                     /*
896                     * If the EDMA RM instance is MASTER (ie. initParam->isMaster
897                     * is TRUE), save the region ID.
898                     * Only this shadow region will receive the
899                     * EDMA3 interrupts, if enabled.
900                     */
901                     if (TRUE == initParam->isMaster)
902                         {
903                         /* Store the region id to use it in the ISRs */
904                         edma3RegionId = rmInstance->initParam.regionId;
905                         masterExists[phyCtrllerInstId] = TRUE;
906                         }
908                     if (TRUE == initParam->regionInitEnable)
909                         {
910                         edma3ShadowRegionInit (rmInstance);
911                         }
913                     /**
914                      * By default, PaRAM Sets allocated using this RM Instance
915                      * will get cleared during their allocation.
916                      * User can stop their clearing by calling specific IOCTL
917                      * command.
918                      */
919                     rmInstance->paramInitRequired = TRUE;
922                     /**
923                      * By default, during the EDMA3_RM_allocLogicalChannel (),
924                      * global EDMA3 registers (DCHMAP/QCHMAP) and the allocated
925                      * PaRAM Set will be programmed accordingly, for users using this
926                      * RM Instance.
927                      * User can stop their pre-programming by calling
928                      * EDMA3_RM_IOCTL_SET_GBL_REG_MODIFY_OPTION
929                      * IOCTL command.
930                      */
931                     rmInstance->regModificationRequired = TRUE;
934                     if (EDMA3_RM_SOK == result)
935                         {
936                         rmObj->state = EDMA3_RM_OPENED;
937                         /* Increase the Instance count */
938                         resMgrObj[phyCtrllerInstId].numOpens++;
939                         retVal = rmInstance;
940                         }
941                     }
942                 else
943                     {
944                     result = EDMA3_RM_E_INVALID_PARAM;
945                     }
947                 edma3OsProtectExit (phyCtrllerInstId,
948                                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
949                                                                         intState);
950                 }
951             }
952         }
954     *errorCode = result;
955     return (EDMA3_RM_Handle)retVal;
956     }
958 EDMA3_RM_Result EDMA3_RM_close (EDMA3_RM_Handle hEdmaResMgr,
959                                     const void *param)
960     {
961     EDMA3_RM_Result result = EDMA3_RM_SOK;
962     uint32_t intState = 0U;
963     uint32_t resMgrIdx = 0U;
964     EDMA3_RM_Obj *rmObj             = NULL;
965     EDMA3_RM_Instance *rmInstance   = NULL;
966     uint32_t dmaChDwrds;
967     uint32_t paramSetDwrds;
968     uint32_t tccDwrds;
970         /* If parameter checking is enabled... */
971 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
972     if (NULL == hEdmaResMgr)
973         {
974         result = EDMA3_RM_E_INVALID_PARAM;
975         }
976 #endif
978         /* Check if the parameters are OK. */
979         if (EDMA3_RM_SOK == result)
980         {
981         rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
982         rmObj = rmInstance->pResMgrObjHandle;
984         if (rmObj == NULL)
985             {
986             result = (EDMA3_RM_E_INVALID_PARAM);
987             }
988         else
989             {
990             /* Check state of driver, state should be opened */
991             if (rmObj->state != EDMA3_RM_OPENED)
992                 {
993                 result = (EDMA3_RM_E_OBJ_NOT_OPENED);
994                 }
995             else
996                 {
997                 dmaChDwrds = rmObj->gblCfgParams.numDmaChannels / (uint32_t)32U;
998                 paramSetDwrds = rmObj->gblCfgParams.numPaRAMSets / (uint32_t)32U;
999                 tccDwrds = rmObj->gblCfgParams.numTccs / (uint32_t)32U;
1001                 /* Set the instance config as NULL*/
1002                 for (resMgrIdx = 0U; resMgrIdx < dmaChDwrds; ++resMgrIdx)
1003                     {
1004                     rmInstance->avlblDmaChannels[resMgrIdx] = 0x0U;
1005                     }
1006                 for (resMgrIdx = 0U; resMgrIdx < paramSetDwrds; ++resMgrIdx)
1007                     {
1008                     rmInstance->avlblPaRAMSets[resMgrIdx] = 0x0U;
1009                     }
1010                 rmInstance->avlblQdmaChannels[0U] = 0x0U;
1011                 for (resMgrIdx = 0U; resMgrIdx < tccDwrds; ++resMgrIdx)
1012                     {
1013                     rmInstance->avlblTccs[resMgrIdx] = 0x0U;
1014                     }
1016                 /**
1017                  * If this is the Master Instance, reset the static variable
1018                  * 'masterExists[]'.
1019                  */
1020                 if (TRUE == rmInstance->initParam.isMaster)
1021                     {
1022                     masterExists[rmObj->phyCtrllerInstId] = FALSE;
1023                     edma3RegionId = EDMA3_MAX_REGIONS;
1024                     }
1026                 /* Reset the Initparam for this RM Instance */
1027                 edma3MemZero((void *)&(rmInstance->initParam),
1028                                             sizeof(EDMA3_RM_Param));
1030                 /* Critical section starts */
1031                 edma3OsProtectEntry (rmObj->phyCtrllerInstId,
1032                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1033                                                         &intState);
1035                 /* Decrease the Number of Opens */
1036                 --rmObj->numOpens;
1037                 if (0 == rmObj->numOpens)
1038                     {
1039                     edma3MemZero((void *)&(edma3RmChBoundRes[rmObj->phyCtrllerInstId]),
1040                                             sizeof(edma3RmChBoundRes[rmObj->phyCtrllerInstId]));
1042                     rmObj->state = EDMA3_RM_CLOSED;
1043                     }
1045                 /* Critical section ends */
1046                 edma3OsProtectExit (rmObj->phyCtrllerInstId,
1047                                                         (int32_t)EDMA3_OS_PROTECT_INTERRUPT,
1048                                                         intState);
1050                 rmInstance->pResMgrObjHandle = NULL;
1051                 rmInstance->shadowRegs = NULL;
1052                 rmInstance = NULL;
1053                 }
1054             }
1055         }
1057     return result;
1058     }
1060 EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
1061                                         EDMA3_RM_ResDesc *resObj)
1062     {
1063     EDMA3_RM_Instance *rmInstance = NULL;
1064     EDMA3_RM_Obj *rmObj = NULL;
1065     EDMA3_RM_Result result = EDMA3_RM_SOK;
1066     EDMA3_RM_Result semResult = EDMA3_RM_SOK;
1067     uint32_t avlblIdx = 0U;
1068     uint32_t resIdClr = 0x0;
1069     uint32_t resIdSet = 0x0;
1070     uint32_t resId;
1071     volatile EDMA3_CCRL_Regs *gblRegs = NULL;
1072         uint32_t  mapXbarEvtToChanFlag = FALSE;
1073         uint32_t xBarEvtBeforeMap = 0;
1074         uint32_t edma3Id;
1075         
1076 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1077     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1078                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1079                 EDMA3_DVT_dCOUNTER,
1080                 EDMA3_DVT_dNONE,
1081                 EDMA3_DVT_dNONE));
1082 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1084         /* If parameter checking is enabled... */
1085 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
1086     if ((hEdmaResMgr == NULL) || (resObj == NULL))
1087         {
1088         result = (EDMA3_RM_E_INVALID_PARAM);
1089         }
1090 #endif
1092         /* Check if the parameters are OK. */
1093         if (EDMA3_RM_SOK == result)
1094         {
1095         rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
1096         rmObj = rmInstance->pResMgrObjHandle;
1098         if ((rmObj == NULL) ||
1099             (rmObj->gblCfgParams.globalRegs == NULL))
1100             {
1101             result = (EDMA3_RM_E_INVALID_PARAM);
1102             }
1103         else
1104             {
1105             gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
1106             edma3Id = rmObj->phyCtrllerInstId;
1107             resId = resObj->resId;
1109             resIdClr = (uint32_t)(~((uint32_t)1U << (resId%32U)));
1110             resIdSet = (1U << (resId%32U));
1112             if ( rmInstance->mapXbarToChan != NULL)
1113                 {
1114                 xBarEvtBeforeMap = resId;
1115                 if ((resId > rmObj->gblCfgParams.numDmaChannels) &&
1116                     (resId != EDMA3_RM_RES_ANY) &&
1117                         (resObj->type == EDMA3_RM_RES_DMA_CHANNEL))
1118                     {
1119                     result = rmInstance->mapXbarToChan(xBarEvtBeforeMap, 
1120                                         &resObj->resId, 
1121                                         &rmInstance->rmXbarToEvtMapConfig);
1122                                 if (EDMA3_RM_SOK == result)
1123                                         {
1124                                 resId = resObj->resId;
1125                                         mapXbarEvtToChanFlag = TRUE;
1126                                         }
1127                     }
1128                 }
1130             if (result == EDMA3_RM_SOK)
1131                 {
1132                     /**
1133                       * Take the instance specific semaphore, to prevent simultaneous
1134                       * access to the shared resources.
1135                       */
1136                     semResult = edma3OsSemTake(rmInstance->initParam.rmSemHandle,
1137                                             EDMA3_OSSEM_NO_TIMEOUT);
1138                     if (EDMA3_RM_SOK == semResult)
1139                         {
1140                         switch (resObj->type)
1141                             {
1142                             case EDMA3_RM_RES_DMA_CHANNEL :
1143                                     {
1144                                     if (resId == EDMA3_RM_RES_ANY)
1145                                         {
1146                                         for (avlblIdx=0U;
1147                                              avlblIdx <
1148                                                     rmObj->gblCfgParams.numDmaChannels;
1149                                              ++avlblIdx)
1150                                             {
1151                                             if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[avlblIdx/32U])
1152                                                   &
1153                                                   (rmInstance->avlblDmaChannels[avlblIdx/32U])
1154                                                   &
1155                                                   ~(rmInstance->initParam.rmInstInitConfig->resvdDmaChannels[avlblIdx/32U])
1156                                                   &
1157                                                   ((uint32_t)1U << (avlblIdx%32U))) != FALSE)
1158                                                 {
1159                                                 /*
1160                                                  * Match found.
1161                                                  * A resource which is owned by this instance of the
1162                                                  * Resource Manager and which is presently available
1163                                                  * and which has not been reserved - is found.
1164                                                  */
1165                                                 resObj->resId = avlblIdx;
1166                                                 /*
1167                                                  * Mark the 'match found' resource as "Not Available"
1168                                                  * for future requests
1169                                                  */
1170                                         rmInstance->avlblDmaChannels[avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
1171         
1172                                                 /**
1173                                                  * Check if the register modification flag is
1174                                                  * set or not.
1175                                                  */
1176                                                 if (TRUE == rmInstance->regModificationRequired)
1177                                                     {
1178                                                     /**
1179                                                      * Enable the DMA channel in the
1180                                                      * DRAE/DRAEH registers also.
1181                                                      */
1182                                                     if (avlblIdx < 32U)
1183                                                         {
1184                                                         gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1185                                                             |= ((uint32_t)0x1U << avlblIdx);
1186                                                         }
1187                                                     else
1188                                                         {
1189                                                         gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1190                                                             |= ((uint32_t)0x1U << (avlblIdx - 32U));
1191                                                         }
1192                                                     }
1193         
1194                                                 result = EDMA3_RM_SOK;
1195                                                 break;
1196                                                 }
1197                                             }
1198                                         /*
1199                                          * If none of the owned resources of this type is available
1200                                          * then report "All Resources of this type not available" error
1201                                          */
1202                                         if (avlblIdx == rmObj->gblCfgParams.numDmaChannels)
1203                                             {
1204                                             result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
1205                                             }
1206                                         }
1207                                     else
1208                                         {
1209                                         if (resId < rmObj->gblCfgParams.numDmaChannels)
1210                                             {
1211                                             /*
1212                                              * Check if specified resource is owned
1213                                              * by this instance of the resource manager
1214                                              */
1215                                             if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resId/32U])&(resIdSet))!=FALSE)
1216                                                {
1217                                                 /* Now check if specified resource is available presently*/
1218                                                 if (((rmInstance->avlblDmaChannels[resId/32U])&(resIdSet))!=FALSE)
1219                                                     {
1220                                                     /*
1221                                                      * Mark the specified channel as "Not Available"
1222                                                      * for future requests
1223                                                      */
1224                                                     rmInstance->avlblDmaChannels[resId/32U] &= resIdClr;
1225         
1226                                                     /**
1227                                                      * Check if the register modification flag is
1228                                                      * set or not.
1229                                                      */
1230                                                     if (TRUE == rmInstance->regModificationRequired)
1231                                                         {
1232                                                         if (resId < 32U)
1233                                                             {
1234                                                             rmInstance->shadowRegs->EECR = (1UL << resId);
1235         
1236                                                             /**
1237                                                              * Enable the DMA channel in the
1238                                                              * DRAE registers also.
1239                                                              */
1240                                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1241                                                                 |= ((uint32_t)0x1U << resId);
1242                                                             }
1243                                                         else
1244                                                             {
1245                                                             rmInstance->shadowRegs->EECRH = (1UL << resId);
1246         
1247                                                             /**
1248                                                              * Enable the DMA channel in the
1249                                                              * DRAEH registers also.
1250                                                              */
1251                                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1252                                                                 |= ((uint32_t)0x1U << (resId - 32U));
1253                                                             }
1254                                                         }
1255         
1256                                                     result = EDMA3_RM_SOK;
1257                                                     }
1258                                                 else
1259                                                     {
1260                                                     /* Specified resource is owned but is already booked */
1261                                                     result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
1262                                                     }
1263                                                 }
1264                                             else
1265                                                 {
1266                                                 /*
1267                                                  * Specified resource is not owned by this instance
1268                                                  * of the Resource Manager
1269                                                  */
1270                                                 result = EDMA3_RM_E_RES_NOT_OWNED;
1271                                                 }
1272                                             }
1273                                         else
1274                                             {
1275                                             result = EDMA3_RM_E_INVALID_PARAM;
1276                                             }
1277                                         }
1278                                 }
1279                                 break;
1280         
1281                             case EDMA3_RM_RES_QDMA_CHANNEL :
1282                                 {
1283                                 if (resId == EDMA3_RM_RES_ANY)
1284                                     {
1285                                     for (avlblIdx=0U; avlblIdx<rmObj->gblCfgParams.numQdmaChannels; ++avlblIdx)
1286                                         {
1287                                         if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[avlblIdx/32U])
1288                                                   &
1289                                                   (rmInstance->avlblQdmaChannels[avlblIdx/32U])
1290                                                   &
1291                                                   ~(rmInstance->initParam.rmInstInitConfig->resvdQdmaChannels[avlblIdx/32U])
1292                                                   &
1293                                                   ((uint32_t)1U << (avlblIdx%32U))) != FALSE)
1294                                             {
1295                                             resObj->resId = avlblIdx;
1296                                     rmInstance->avlblQdmaChannels[avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
1297         
1298                                             /**
1299                                              * Check if the register modification flag is
1300                                              * set or not.
1301                                              */
1302                                             if (TRUE == rmInstance->regModificationRequired)
1303                                                 {
1304                                                 /**
1305                                                  * Enable the QDMA channel in the
1306                                                  * QRAE register also.
1307                                                  */
1308                                                 gblRegs->QRAE[rmInstance->initParam.regionId]
1309                                                     |= ((uint32_t)0x1U << avlblIdx);
1310                                                 }
1311         
1312                                             result = EDMA3_RM_SOK;
1313                                             break;
1314                                             }
1315                                         }
1316                                     /*
1317                                      * If none of the owned resources of this type is available
1318                                      * then report "All Resources of this type not available" error
1319                                      */
1320                                     if (avlblIdx == rmObj->gblCfgParams.numQdmaChannels)
1321                                         {
1322                                         result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
1323                                         }
1324                                     }
1325                                 else
1326                                     {
1327                                     if (resId < rmObj->gblCfgParams.numQdmaChannels)
1328                                         {
1329                                         if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels [resId/32U])&(resIdSet))!=FALSE)
1330                                             {
1331                                             if (((rmInstance->avlblQdmaChannels [resId/32U])&(resIdSet))!=FALSE)
1332                                                 {
1333                                                 rmInstance->avlblQdmaChannels [resId/32U] &= resIdClr;
1334         
1335                                                 /**
1336                                                  * Check if the register modification flag is
1337                                                  * set or not.
1338                                                  */
1339                                                 if (TRUE == rmInstance->regModificationRequired)
1340                                                     {
1341                                                     /**
1342                                                      * Enable the QDMA channel in the
1343                                                      * QRAE register also.
1344                                                      */
1345                                                     gblRegs->QRAE[rmInstance->initParam.regionId]
1346                                                         |= ((uint32_t)0x1U << resId);
1347                                                     }
1348         
1349                                                 result = EDMA3_RM_SOK;
1350                                                 }
1351                                             else
1352                                                 {
1353                                                 /* Specified resource is owned but is already booked */
1354                                                 result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
1355                                                }
1356                                             }
1357                                         else
1358                                             {
1359                                             /*
1360                                              * Specified resource is not owned by this instance
1361                                              * of the Resource Manager
1362                                              */
1363                                             result = EDMA3_RM_E_RES_NOT_OWNED;
1364                                             }
1365                                         }
1366                                     else
1367                                         {
1368                                         result = EDMA3_RM_E_INVALID_PARAM;
1369                                         }
1370                                     }
1371                                 }
1372                                 break;
1373         
1374                             case EDMA3_RM_RES_TCC :
1375                                 {
1376                                 if (resId == EDMA3_RM_RES_ANY)
1377                                     {
1378                                     for (avlblIdx=0U; avlblIdx<rmObj->gblCfgParams.numTccs; ++avlblIdx)
1379                                         {
1380                                         if (((rmInstance->initParam.rmInstInitConfig->ownTccs [avlblIdx/32U])
1381                                             & (rmInstance->avlblTccs [avlblIdx/32U])
1382                                             & ~(rmInstance->initParam.rmInstInitConfig->resvdTccs [avlblIdx/32U])
1383                                             & ((uint32_t)1U << (avlblIdx%32U)))!=FALSE)
1384                                             {
1385                                             resObj->resId = avlblIdx;
1386                                     rmInstance->avlblTccs [avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
1387         
1388                                             /**
1389                                              * Check if the register modification flag is
1390                                              * set or not.
1391                                              */
1392                                             if (TRUE == rmInstance->regModificationRequired)
1393                                                 {
1394                                                 /**
1395                                                  * Enable the Interrupt channel in the
1396                                                  * DRAE/DRAEH registers also.
1397                                                  * Also, If the region id coming from this
1398                                                  * RM instance is same as the Master RM
1399                                                  * Instance's region id, only then we will be
1400                                                  * getting the interrupts on the same side.
1401                                                  * So save the TCC in the allocatedTCCs[] array.
1402                                                  */
1403                                                 if (avlblIdx < 32U)
1404                                                     {
1405                                                     gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1406                                                         |= ((uint32_t)0x1U << avlblIdx);
1407         
1408                                                     /**
1409                                                      * Do not modify this global array if the register
1410                                                      * modificatio flag is not set.
1411                                                      * Reason being is based on this flag, the IPR/ICR
1412                                                      * or error bit is cleared in the completion or
1413                                                      * error handler ISR.
1414                                                      */
1415                                                     if (edma3RegionId == rmInstance->initParam.regionId)
1416                                                         {
1417                                                         allocatedTCCs[edma3Id][0U] |= ((uint32_t)0x1U << avlblIdx);
1418                                                         }
1419                                                     }
1420                                                 else
1421                                                     {
1422                                                     gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1423                                                         |= ((uint32_t)0x1U << (avlblIdx - 32U));
1424         
1425                                                     /**
1426                                                      * Do not modify this global array if the register
1427                                                      * modificatio flag is not set.
1428                                                      * Reason being is based on this flag, the IPR/ICR
1429                                                      * or error bit is cleared in the completion or
1430                                                      * error handler ISR.
1431                                                      */
1432                                                     if (edma3RegionId == rmInstance->initParam.regionId)
1433                                                         {
1434                                                         allocatedTCCs[edma3Id][1U] |= ((uint32_t)0x1U << (avlblIdx - 32U));
1435                                                         }
1436                                                     }
1437                                                 }
1438         
1439         
1440                                             result = EDMA3_RM_SOK;
1441                                             break;
1442                                             }
1443                                         }
1444                                     /*
1445                                      * If none of the owned resources of this type is available
1446                                      * then report "All Resources of this type not available" error
1447                                      */
1448                                     if ( avlblIdx == rmObj->gblCfgParams.numTccs)
1449                                         {
1450                                         result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
1451                                         }
1452                                     }
1453                                 else
1454                                     {
1455                                     if (resId < rmObj->gblCfgParams.numTccs)
1456                                         {
1457                                         if (((rmInstance->initParam.rmInstInitConfig->ownTccs [resId/32U])&(resIdSet))!=FALSE)
1458                                             {
1459                                             if (((rmInstance->avlblTccs [resId/32U])&(resIdSet))!=FALSE)
1460                                                 {
1461                                                 rmInstance->avlblTccs [resId/32U] &= resIdClr;
1462         
1463                                                 /**
1464                                                  * Check if the register modification flag is
1465                                                  * set or not.
1466                                                  */
1467                                                 if (TRUE == rmInstance->regModificationRequired)
1468                                                     {
1469                                                     /**
1470                                                      * Enable the Interrupt channel in the
1471                                                      * DRAE/DRAEH registers also.
1472                                                      * Also, If the region id coming from this
1473                                                      * RM instance is same as the Master RM
1474                                                      * Instance's region id, only then we will be
1475                                                      * getting the interrupts on the same side.
1476                                                      * So save the TCC in the allocatedTCCs[] array.
1477                                                      */
1478                                                     if (resId < 32U)
1479                                                         {
1480                                                         gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1481                                                             |= ((uint32_t)0x1U << resId);
1482         
1483                                                         /**
1484                                                          * Do not modify this global array if the register
1485                                                          * modificatio flag is not set.
1486                                                          * Reason being is based on this flag, the IPR/ICR
1487                                                          * or error bit is cleared in the completion or
1488                                                          * error handler ISR.
1489                                                          */
1490                                                         if (edma3RegionId == rmInstance->initParam.regionId)
1491                                                             {
1492                                                             allocatedTCCs[edma3Id][0U] |= ((uint32_t)0x1U << resId);
1493                                                             }
1494                                                         }
1495                                                     else
1496                                                         {
1497                                                         gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1498                                                             |= ((uint32_t)0x1U << (resId - 32U));
1499         
1500                                                         /**
1501                                                          * Do not modify this global array if the register
1502                                                          * modificatio flag is not set.
1503                                                          * Reason being is based on this flag, the IPR/ICR
1504                                                          * or error bit is cleared in the completion or
1505                                                          * error handler ISR.
1506                                                          */
1507                                                         if (edma3RegionId == rmInstance->initParam.regionId)
1508                                                             {
1509                                                             allocatedTCCs[edma3Id][1U] |= ((uint32_t)0x1U << (resId - 32U));
1510                                                             }
1511                                                         }
1512                                                     }
1513         
1514                                                 result = EDMA3_RM_SOK;
1515                                                 }
1516                                             else
1517                                                 {
1518                                                 /* Specified resource is owned but is already booked */
1519                                                 result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
1520                                                 }
1521                                             }
1522                                         else
1523                                             {
1524                                             /*
1525                                              * Specified resource is not owned by this instance
1526                                              * of the Resource Manager
1527                                              */
1528                                             result = EDMA3_RM_E_RES_NOT_OWNED;
1529                                             }
1530                                         }
1531                                     else
1532                                         {
1533                                         result = EDMA3_RM_E_INVALID_PARAM;
1534                                         }
1535                                     }
1536                                 }
1537                                 break;
1538         
1539                             case EDMA3_RM_RES_PARAM_SET :
1540                                 {
1541                                 if (resId == EDMA3_RM_RES_ANY)
1542                                     {
1543                                     for (avlblIdx=0U; avlblIdx<rmObj->gblCfgParams.numPaRAMSets; ++avlblIdx)
1544                                         {
1545                                         if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [avlblIdx/32U])
1546                                               &
1547                                               (rmInstance->avlblPaRAMSets [avlblIdx/32U])
1548                                               &
1549                                               ~(rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets [avlblIdx/32U])
1550                                               &
1551                                               ((uint32_t)1U << (avlblIdx%32U)))!=FALSE)
1552                                             {
1553                                             resObj->resId = avlblIdx;
1554                                     rmInstance->avlblPaRAMSets [avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
1555         
1556                                             /**
1557                                              * Also, make the actual PARAM Set NULL, checking the flag
1558                                              * whether it is required or not.
1559                                              */
1560                                             if ((TRUE == rmInstance->regModificationRequired)
1561                                                 && (TRUE == rmInstance->paramInitRequired))
1562                                                 {
1563                                                 edma3MemZero((void *)(&gblRegs->PARAMENTRY[avlblIdx]),
1564                                                             sizeof(gblRegs->PARAMENTRY[avlblIdx]));
1565                                                 }
1566         
1567                                             result = EDMA3_RM_SOK;
1568                                             break;
1569                                             }
1570                                         }
1571                                     /*
1572                                      * If none of the owned resources of this type is available
1573                                      * then report "All Resources of this type not available" error
1574                                      */
1575                                     if ( avlblIdx == rmObj->gblCfgParams.numPaRAMSets)
1576                                         {
1577                                         result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
1578                                         }
1579                                     }
1580                                 else
1581                                     {
1582                                     if (resId < rmObj->gblCfgParams.numPaRAMSets)
1583                                         {
1584                                         if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [resId/32U])&(resIdSet))!=FALSE)
1585                                             {
1586                                             if (((rmInstance->avlblPaRAMSets [resId/32U])&(resIdSet)) !=FALSE)
1587                                                 {
1588                                                 rmInstance->avlblPaRAMSets [resId/32U] &= resIdClr;
1589         
1590                                                 /**
1591                                                  * Also, make the actual PARAM Set NULL, checking the flag
1592                                                  * whether it is required or not.
1593                                                  */
1594                                                 if ((TRUE == rmInstance->regModificationRequired)
1595                                                     && (TRUE == rmInstance->paramInitRequired))
1596                                                     {
1597                                                     edma3MemZero((void *)(&gblRegs->PARAMENTRY[resId]),
1598                                                                 sizeof(gblRegs->PARAMENTRY[resId]));
1599                                                     }
1600         
1601                                                 result = EDMA3_RM_SOK;
1602                                                 }
1603                                             else
1604                                                 {
1605                                                 /* Specified resource is owned but is already booked */
1606                                                 result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
1607                                                 }
1608                                             }
1609                                         else
1610                                             {
1611                                             /*
1612                                              * Specified resource is not owned by this instance
1613                                              * of the Resource Manager
1614                                              */
1615                                             result = EDMA3_RM_E_RES_NOT_OWNED;
1616                                             }
1617                                         }
1618                                     else
1619                                         {
1620                                         result = EDMA3_RM_E_INVALID_PARAM;
1621                                         }
1622                                     }
1623                                 }
1624                                 break;
1625         
1626                             default:
1627                                     result = EDMA3_RM_E_INVALID_PARAM;
1628                                 break;
1629                             }
1630         
1631                         /* Return the semaphore back */
1632                         semResult = edma3OsSemGive(rmInstance->initParam.rmSemHandle);
1633                         }
1634                     }
1635            }
1636         }
1638     /**
1639      * Check the Resource Allocation Result 'result' first. If Resource
1640      * Allocation has resulted in an error, return it (having more priority than
1641      * semResult.
1642      * Else, return semResult.
1643      */
1644      if (EDMA3_RM_SOK == result)
1645         {
1646         /**
1647         * Resource Allocation successful, return semResult for returning
1648         * semaphore.
1649         */
1650         result = semResult;
1651         if ((rmInstance->configScrMapXbarToEvt != NULL) && 
1652             (mapXbarEvtToChanFlag == TRUE))
1653             {
1654             rmInstance->configScrMapXbarToEvt(xBarEvtBeforeMap, resObj->resId);
1655             }
1656         }
1658 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1659     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1660                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1661                 EDMA3_DVT_dCOUNTER,
1662                 EDMA3_DVT_dNONE,
1663                 EDMA3_DVT_dNONE));
1664 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1666     return result;
1667     }
1669 EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
1670                             const EDMA3_RM_ResDesc *resObj)
1671     {
1672     EDMA3_RM_Instance *rmInstance = NULL;
1673     EDMA3_RM_Obj *rmObj = NULL;
1674     EDMA3_RM_Result result = EDMA3_RM_SOK;
1675     EDMA3_RM_Result semResult = EDMA3_RM_SOK;
1676     uint32_t resId;
1677     uint32_t resIdSet = 0x0;
1678     volatile EDMA3_CCRL_Regs *gblRegs = NULL;
1679         uint32_t edma3Id;
1680         
1681 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1682     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1683                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1684                 EDMA3_DVT_dCOUNTER,
1685                 EDMA3_DVT_dNONE,
1686                 EDMA3_DVT_dNONE));
1687 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1689         /* If parameter checking is enabled... */
1690 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
1691     if ((hEdmaResMgr == NULL) || (resObj == NULL))
1692         {
1693         result = EDMA3_RM_E_INVALID_PARAM;
1694         }
1695 #endif
1697         /* Check if the parameters are OK. */
1698         if (EDMA3_RM_SOK == result)
1699         {
1700         rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
1701         rmObj = rmInstance->pResMgrObjHandle;
1703         if ((rmObj == NULL) ||
1704             (rmObj->gblCfgParams.globalRegs == NULL))
1705             {
1706             result = EDMA3_RM_E_INVALID_PARAM;
1707             }
1708         else
1709             {
1710             gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
1711             edma3Id = rmObj->phyCtrllerInstId;
1712             resId = resObj->resId;
1714             resIdSet = 1U << (resId%32U);
1716             /**
1717               * Take the instance specific semaphore, to prevent simultaneous
1718               * access to the shared resources.
1719               */
1720             semResult = edma3OsSemTake(rmInstance->initParam.rmSemHandle,
1721                                     EDMA3_OSSEM_NO_TIMEOUT);
1723             if (EDMA3_RM_SOK == semResult)
1724                 {
1725                 switch (resObj->type)
1726                     {
1727                     case EDMA3_RM_RES_DMA_CHANNEL :
1728                         {
1729                         if (resId < rmObj->gblCfgParams.numDmaChannels)
1730                             {
1731                             if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels [resId/32U]) & (resIdSet))!=FALSE)
1732                                 {
1733                                 if (((~(rmInstance->avlblDmaChannels[resId/32U]))&(resIdSet))!=FALSE)
1734                                     {
1735                                     /*
1736                                      * Mark the specified channel as "Available"
1737                                      * for future requests
1738                                      */
1739                                     rmInstance->avlblDmaChannels[resId/32U] |= resIdSet;
1741                                     /**
1742                                      * Check if the register modification flag is
1743                                      * set or not.
1744                                      */
1745                                     if (TRUE == rmInstance->regModificationRequired)
1746                                         {
1747                                         /**
1748                                          * DMA Channel is freed.
1749                                          * Reset the bit specific to the DMA channel
1750                                          * in the DRAE/DRAEH register also.
1751                                          */
1752                                         if (resId < 32U)
1753                                             {
1754                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1755                                                             &= (~((uint32_t)0x1U << resId));
1756                                             }
1757                                         else
1758                                             {
1759                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1760                                                             &= (~((uint32_t)0x1U << (resId-32U)));
1761                                             }
1762                                         }
1764                                     result = EDMA3_RM_SOK;
1765                                     }
1766                                 else
1767                                     {
1768                                     result = EDMA3_RM_E_RES_ALREADY_FREE;
1769                                     }
1770                                 }
1771                             else
1772                                 {
1773                                 /*
1774                                  * Specified resource is not owned by this instance
1775                                  * of the Resource Manager
1776                                  */
1777                                 result = EDMA3_RM_E_RES_NOT_OWNED;
1778                                 }
1779                             }
1780                         else
1781                             {
1782                             result = EDMA3_RM_E_INVALID_PARAM;
1783                             }
1784                         }
1785                         break;
1787                     case EDMA3_RM_RES_QDMA_CHANNEL :
1788                         {
1789                         if (resId < rmObj->gblCfgParams.numQdmaChannels)
1790                             {
1791                             if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels [resId/32U]) & (resIdSet))!=FALSE)
1792                                 {
1793                                 if (((~(rmInstance->avlblQdmaChannels [resId/32U])) & (resIdSet))!=FALSE)
1794                                     {
1795                                     rmInstance->avlblQdmaChannels [resId/32U] |= resIdSet;
1797                                     /**
1798                                      * Check if the register modification flag is
1799                                      * set or not.
1800                                      */
1801                                     if (TRUE == rmInstance->regModificationRequired)
1802                                         {
1803                                         /**
1804                                          * QDMA Channel is freed.
1805                                          * Reset the bit specific to the QDMA channel
1806                                          * in the QRAE register also.
1807                                          */
1808                                         gblRegs->QRAE[rmInstance->initParam.regionId]
1809                                                         &= (~((uint32_t)0x1U << resId));
1810                                         }
1812                                     result = EDMA3_RM_SOK;
1813                                     }
1814                                 else
1815                                     {
1816                                     result = EDMA3_RM_E_RES_ALREADY_FREE;
1817                                     }
1818                                 }
1819                             else
1820                                 {
1821                                 /*
1822                                  * Specified resource is not owned by this instance
1823                                  * of the Resource Manager
1824                                  */
1825                                 result = EDMA3_RM_E_RES_NOT_OWNED;
1826                                 }
1827                             }
1828                         else
1829                             {
1830                             result = EDMA3_RM_E_INVALID_PARAM;
1831                             }
1832                         }
1833                         break;
1835                     case EDMA3_RM_RES_TCC :
1836                         {
1837                         if (resId < rmObj->gblCfgParams.numTccs)
1838                             {
1839                             if (((rmInstance->initParam.rmInstInitConfig->ownTccs [resId/32U]) & (resIdSet))!=FALSE)
1840                                 {
1841                                 if (((~(rmInstance->avlblTccs [resId/32U])) & (resIdSet))!=FALSE)
1842                                     {
1843                                     rmInstance->avlblTccs [resId/32U] |= resIdSet;
1845                                     /**
1846                                      * Check if the register modification flag is
1847                                      * set or not.
1848                                      */
1849                                     if (TRUE == rmInstance->regModificationRequired)
1850                                         {
1851                                         /**
1852                                          * Interrupt Channel is freed.
1853                                          * Reset the bit specific to the Interrupt
1854                                          * channel in the DRAE/DRAEH register also.
1855                                          * Also, if we have earlier saved this
1856                                          * TCC in allocatedTCCs[] array,
1857                                          * remove it from there too.
1858                                          */
1859                                         if (resId < 32U)
1860                                             {
1861                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAE
1862                                                             &= (~((uint32_t)0x1U << resId));
1864                                             if (edma3RegionId == rmInstance->initParam.regionId)
1865                                                 {
1866                                                 allocatedTCCs[edma3Id][0U] &= (~((uint32_t)0x1U << resId));
1867                                                 }
1868                                             }
1869                                         else
1870                                             {
1871                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
1872                                                             &= (~((uint32_t)0x1U << (resId-32U)));
1874                                             if (edma3RegionId == rmInstance->initParam.regionId)
1875                                                 {
1876                                                 allocatedTCCs[edma3Id][1U] &= (~((uint32_t)0x1U << (resId -32U)));
1877                                                 }
1878                                             }
1879                                         }
1881                                     result = EDMA3_RM_SOK;
1882                                     }
1883                                 else
1884                                     {
1885                                     result = EDMA3_RM_E_RES_ALREADY_FREE;
1886                                     }
1887                                 }
1888                             else
1889                                 {
1890                                 /*
1891                                  * Specified resource is not owned by this instance
1892                                  * of the Resource Manager
1893                                  */
1894                                 result = EDMA3_RM_E_RES_NOT_OWNED;
1895                                 }
1896                             }
1897                         else
1898                             {
1899                             result = EDMA3_RM_E_INVALID_PARAM;
1900                             }
1901                         }
1902                         break;
1904                     case EDMA3_RM_RES_PARAM_SET :
1905                         {
1906                         if (resId < rmObj->gblCfgParams.numPaRAMSets)
1907                             {
1908                             if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [resId/32U])&(resIdSet))!=FALSE)
1909                                 {
1910                                 if (((~(rmInstance->avlblPaRAMSets [resId/32U]))&(resIdSet))!=FALSE)
1911                                     {
1912                                     rmInstance->avlblPaRAMSets [resId/32U] |= resIdSet;
1914                                     result = EDMA3_RM_SOK;
1915                                     }
1916                                 else
1917                                     {
1918                                     result = EDMA3_RM_E_RES_ALREADY_FREE;
1919                                     }
1920                                 }
1921                             else
1922                                 {
1923                                 /*
1924                                  * Specified resource is not owned by this instance
1925                                  * of the Resource Manager
1926                                  */
1927                                 result = EDMA3_RM_E_RES_NOT_OWNED;
1928                                 }
1929                             }
1930                         else
1931                             {
1932                             result = EDMA3_RM_E_INVALID_PARAM;
1933                             }
1934                         }
1935                         break;
1937                     default:
1938                         result = EDMA3_RM_E_INVALID_PARAM;
1939                         break;
1940                     }
1941                 semResult = edma3OsSemGive(rmInstance->initParam.rmSemHandle);
1942                 }
1943             }
1944         }
1946         /**
1947          * Check the Free Resource Result 'result' first. If Free Resource
1948          * has resulted in an error, return it (having more priority than
1949          * semResult.
1950          * Else, return semResult.
1951          */
1952          if (EDMA3_RM_SOK == result)
1953             {
1954             /**
1955             * Free Resource successful, return semResult for returning
1956             * semaphore.
1957             */
1958             result = semResult;
1959         }
1961 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1962     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1963                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_END,
1964                 EDMA3_DVT_dCOUNTER,
1965                 EDMA3_DVT_dNONE,
1966                 EDMA3_DVT_dNONE));
1967 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1969     return result;
1970     }
1972 EDMA3_RM_Result EDMA3_RM_allocLogicalChannel(EDMA3_RM_Handle hEdmaResMgr,
1973                             EDMA3_RM_ResDesc *lChObj,
1974                             uint32_t *pParam,
1975                             uint32_t *pTcc)
1976     {
1977     EDMA3_RM_ResDesc *chObj;
1978     EDMA3_RM_ResDesc resObj;
1979     EDMA3_RM_Result result = EDMA3_RM_SOK;
1980     EDMA3_RM_Instance *rmInstance = NULL;
1981     EDMA3_RM_Obj *rmObj = NULL;
1982     uint32_t mappedPaRAMId=0U;
1983     uint32_t mappedTcc = EDMA3_RM_CH_NO_TCC_MAP;
1984     int32_t paRAMId = (int32_t)EDMA3_RM_RES_ANY;
1985     volatile EDMA3_CCRL_Regs *gblRegs = NULL;
1986     uint32_t qdmaChId = EDMA3_MAX_PARAM_SETS;
1987         uint32_t edma3Id;
1989 #ifdef EDMA3_INSTRUMENTATION_ENABLED
1990     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
1991                 EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
1992                 EDMA3_DVT_dCOUNTER,
1993                 EDMA3_DVT_dNONE,
1994                 EDMA3_DVT_dNONE));
1995 #endif /* EDMA3_INSTRUMENTATION_ENABLED */
1997         /* If parameter checking is enabled... */
1998 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
1999     if ((lChObj == NULL) || (hEdmaResMgr == NULL))
2000         {
2001         result = EDMA3_RM_E_INVALID_PARAM;
2002         }
2003 #endif
2005         /* Check if the parameters are OK. */
2006         if (EDMA3_RM_SOK == result)
2007         {
2008         chObj = lChObj;
2010         if ((chObj->type == EDMA3_RM_RES_DMA_CHANNEL)
2011             || (chObj->type == EDMA3_RM_RES_QDMA_CHANNEL))
2012             {
2013             /**
2014              * If the request is for a DMA or QDMA channel, check the
2015              * pParam and pTcc objects also.
2016              * For the Link channel request, they could be NULL.
2017              */
2018                         /* If parameter checking is enabled... */
2019 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
2020             if ((pParam == NULL) || (pTcc == NULL))
2021                 {
2022                 result = EDMA3_RM_E_INVALID_PARAM;
2023                 }
2024 #endif
2025             }
2026         }
2028     if (result == EDMA3_RM_SOK)
2029         {
2030         rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
2032         if (rmInstance == NULL)
2033             {
2034             result = EDMA3_RM_E_INVALID_PARAM;
2035             }
2036         }
2038     if (result == EDMA3_RM_SOK)
2039         {
2040         rmObj = rmInstance->pResMgrObjHandle;
2042         if (rmObj == NULL)
2043             {
2044             result = EDMA3_RM_E_INVALID_PARAM;
2045             }
2046         else
2047             {
2048             if (rmObj->gblCfgParams.globalRegs == NULL)
2049                 {
2050                 result = EDMA3_RM_E_INVALID_PARAM;
2051                 }
2052             }
2053         }
2055     if (result == EDMA3_RM_SOK)
2056         {
2057         edma3Id = rmObj->phyCtrllerInstId;
2058         gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
2060         switch (chObj->type)
2061             {
2062             case EDMA3_RM_RES_DMA_CHANNEL:
2063                 {
2064                 if ((chObj->resId == EDMA3_RM_DMA_CHANNEL_ANY)
2065                     || (chObj->resId == EDMA3_RM_RES_ANY))
2066                     {
2067                     /* Request for ANY DMA channel. */
2068                     resObj.type = EDMA3_RM_RES_DMA_CHANNEL;
2069                     resObj.resId = EDMA3_RM_RES_ANY;
2070                     result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2072                     if (result == EDMA3_RM_SOK)
2073                         {
2074                         /* DMA channel allocated successfully. */
2075                         chObj->resId = resObj.resId;
2077                         /**
2078                          * Check the PaRAM Set user has specified for this DMA channel.
2079                          * Two cases exist:
2080                          * a) DCHMAP exists: Any PaRAM Set can be used
2081                          * b) DCHMAP does not exist: Should not be possible
2082                          * only if the channel allocated (ANY) and PaRAM requested
2083                          * are same.
2084                          */
2085                         if ((*pParam) == EDMA3_RM_PARAM_ANY)
2086                             {
2087                             /* User specified ANY PaRAM Set; Check the mapping. */
2088                             mappedPaRAMId = rmObj->gblCfgParams.dmaChannelPaRAMMap[resObj.resId];
2089                             if (mappedPaRAMId != EDMA3_RM_CH_NO_PARAM_MAP)
2090                                 {
2091                                 /** If some PaRAM set is statically mapped to the returned
2092                                 * channel number, use that.
2093                                 */
2094                                 paRAMId = (int32_t)mappedPaRAMId;
2095                                 }
2096                             }
2097                         else
2098                             {
2099                             /* User specified some PaRAM Set; check that can be used or not. */
2100                             if (TRUE == rmObj->gblCfgParams.dmaChPaRAMMapExists)
2101                                 {
2102                                 paRAMId = (int32_t)(*pParam);
2103                                 }
2104                             else
2105                                 {
2106                                 /**
2107                                  * Channel mapping does not exist. If the PaRAM Set requested
2108                                  * is the same as dma channel allocated (coincidentally), it is fine.
2109                                  * Else return error.
2110                                  */
2111                                 if ((*pParam) != (resObj.resId))
2112                                     {
2113                                     result = EDMA3_RM_E_INVALID_PARAM;
2115                                     /**
2116                                      * Free the previously allocated DMA channel also.
2117                                      */
2118                                     EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2119                                     }
2120                                 else
2121                                     {
2122                                     paRAMId = (int32_t)(*pParam);
2123                                     }
2124                                 }
2125                             }
2127                         mappedTcc = rmObj->gblCfgParams.dmaChannelTccMap[resObj.resId];
2128                         }
2129                     }
2130                 else
2131                     {
2132                     if (chObj->resId <= edma3_dma_ch_max_val[edma3Id])
2133                         {
2134                         /* Request for a specific DMA channel */
2135                         resObj.type = EDMA3_RM_RES_DMA_CHANNEL;
2136                         resObj.resId = chObj->resId;
2137                         result = EDMA3_RM_allocResource(hEdmaResMgr,
2138                                         (EDMA3_RM_ResDesc *)&resObj);
2140                         if (result == EDMA3_RM_SOK)
2141                             {
2142                             /**
2143                              * Check the PaRAM Set user has specified for this DMA channel.
2144                              * Two cases exist:
2145                              * a) DCHMAP exists: Any PaRAM Set can be used
2146                              * b) DCHMAP does not exist: Should not be possible
2147                              * only if the channel allocated (ANY) and PaRAM requested
2148                              * are same.
2149                              */
2150                             if ((*pParam) == EDMA3_RM_PARAM_ANY)
2151                                 {
2152                                 /* User specified ANY PaRAM Set; Check the mapping. */
2153                                 mappedPaRAMId = rmObj->gblCfgParams.dmaChannelPaRAMMap[resObj.resId];
2154                                 if (mappedPaRAMId != EDMA3_RM_CH_NO_PARAM_MAP)
2155                                     {
2156                                     /** If some PaRAM set is statically mapped to the returned
2157                                     * channel number, use that.
2158                                     */
2159                                     paRAMId = (int32_t)mappedPaRAMId;
2160                                     }
2161                                 }
2162                             else
2163                                 {
2164                                 /* User specified some PaRAM Set; check that can be used or not. */
2165                                 if (TRUE == rmObj->gblCfgParams.dmaChPaRAMMapExists)
2166                                     {
2167                                     paRAMId = (int32_t)(*pParam);
2168                                     }
2169                                 else
2170                                     {
2171                                     /**
2172                                      * Channel mapping does not exist. If the PaRAM Set requested
2173                                      * is the same as dma channel allocated (coincidentally), it is fine.
2174                                      * Else return error.
2175                                      */
2176                                     if ((*pParam) != (resObj.resId))
2177                                         {
2178                                         result = EDMA3_RM_E_INVALID_PARAM;
2180                                         /**
2181                                          * Free the previously allocated DMA channel also.
2182                                          */
2183                                         EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2184                                         }
2185                                     else
2186                                         {
2187                                         paRAMId = (int32_t)(*pParam);
2188                                         }
2189                                     }
2190                                 }
2192                             mappedTcc = rmObj->gblCfgParams.dmaChannelTccMap[chObj->resId];
2193                             }
2194                         }
2195                     else
2196                         {
2197                         result = EDMA3_RM_E_INVALID_PARAM;
2198                         }
2199                     }
2200                 }
2201                 break;
2204             case EDMA3_RM_RES_QDMA_CHANNEL:
2205                 {
2206                 if ((chObj->resId == EDMA3_RM_QDMA_CHANNEL_ANY)
2207                     || (chObj->resId == EDMA3_RM_RES_ANY))
2208                     {
2209                     /* First request for any available QDMA channel */
2210                     resObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
2211                     resObj.resId = EDMA3_RM_RES_ANY;
2212                     result = EDMA3_RM_allocResource(hEdmaResMgr,
2213                                     (EDMA3_RM_ResDesc *)&resObj);
2215                     if (result == EDMA3_RM_SOK)
2216                         {
2217                         /* Return the actual QDMA channel id. */
2218                         chObj->resId = resObj.resId;
2220                         /* Save the Logical-QDMA channel id for future use. */
2221                         qdmaChId = resObj.resId + edma3_qdma_ch_min_val[edma3Id];
2223                         /**
2224                          * Check the PaRAM Set user has specified for this QDMA channel.
2225                          * If he has specified any particular PaRAM Set, use that.
2226                          */
2227                         if ((*pParam) != EDMA3_RM_PARAM_ANY)
2228                             {
2229                             /* User specified ANY PaRAM Set; Check the mapping. */
2230                             paRAMId = (int32_t)(*pParam);
2231                             }
2232                         }
2233                     }
2234                 else
2235                     {
2236                     if (chObj->resId < rmObj->gblCfgParams.numQdmaChannels)
2237                         {
2238                         /* Request for a specific QDMA channel */
2239                         resObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
2240                         resObj.resId = chObj->resId;
2241                         result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2243                         if (result == EDMA3_RM_SOK)
2244                             {
2245                             /* Save the Logical-QDMA channel id for future use. */
2246                             qdmaChId = chObj->resId + edma3_qdma_ch_min_val[edma3Id];
2248                             /**
2249                              * Check the PaRAM Set user has specified for this QDMA channel.
2250                              * If he has specified any particular PaRAM Set, use that.
2251                              */
2252                             if ((*pParam) != EDMA3_RM_PARAM_ANY)
2253                                 {
2254                                 /* User specified ANY PaRAM Set; Check the mapping. */
2255                                 paRAMId = (int32_t)(*pParam);
2256                                 }
2257                             }
2258                         }
2259                     else
2260                         {
2261                         result = EDMA3_RM_E_INVALID_PARAM;
2262                         }
2263                     }
2264                 }
2265                 break;
2267             case EDMA3_RM_RES_PARAM_SET:
2268                     {
2269                     /* Request for a LINK channel. */
2270                     if ((chObj->resId == EDMA3_RM_PARAM_ANY)
2271                         || (chObj->resId == EDMA3_RM_RES_ANY))
2272                         {
2273                         /* Request for ANY LINK channel. */
2274                         paRAMId = (int32_t)EDMA3_RM_RES_ANY;
2275                         }
2276                     else
2277                         {
2278                         if (chObj->resId < edma3NumPaRAMSets)
2279                             {
2280                             /* Request for a Specific LINK channel. */
2281                             paRAMId = (int32_t)(chObj->resId);
2282                             }
2283                         else
2284                             {
2285                             result = EDMA3_RM_E_INVALID_PARAM;
2286                             }
2287                         }
2289                     if (result == EDMA3_RM_SOK)
2290                         {
2291                         /* Try to allocate the link channel */
2292                         resObj.type = EDMA3_RM_RES_PARAM_SET;
2293                         resObj.resId = (uint32_t)paRAMId;
2294                         result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2296                         if (result == EDMA3_RM_SOK)
2297                             {
2298                             uint32_t linkCh = edma3_link_ch_min_val[edma3Id];
2300                             /* Return the actual PaRAM Id. */
2301                             chObj->resId = resObj.resId;
2303                             /*
2304                             * Search for the next Link channel place-holder available,
2305                             * starting from EDMA3_RM_LINK_CH_MIN_VAL.
2306                             * It will be used for future operations on the Link channel.
2307                             */
2308                             while ((edma3RmChBoundRes[rmObj->phyCtrllerInstId][linkCh].paRAMId != -1)
2309                                         && (linkCh <= edma3_link_ch_max_val[edma3Id]))
2310                                 {
2311                                 /* Move to the next place-holder. */
2312                                 linkCh++;
2313                                 }
2315                             /* Verify the returned handle, it should lie in the correct range */
2316                             if (linkCh > edma3_link_ch_max_val[edma3Id])
2317                                 {
2318                                 result = EDMA3_RM_E_INVALID_PARAM;
2320                                 /* Free the PaRAM Set now. */
2321                                 resObj.type = EDMA3_RM_RES_PARAM_SET;
2322                                 resObj.resId = chObj->resId;
2323                                 result = EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2324                                 }
2325                             else
2326                                 {
2327                                 /* Save the PaRAM Id for the Link Channel. */
2328                                 edma3RmChBoundRes[rmObj->phyCtrllerInstId][linkCh].paRAMId = (int32_t)(chObj->resId);
2330                                 /**
2331                                  * Remove any linking. Before doing that, check
2332                                  * whether it is permitted or not.
2333                                  */
2334                                 if (TRUE == rmInstance->regModificationRequired)
2335                                     {
2336                                     *((&gblRegs->PARAMENTRY[chObj->resId].OPT)
2337                                             + (uint32_t)EDMA3_RM_PARAM_ENTRY_LINK_BCNTRLD) = 0xFFFFU;
2338                                     }
2339                                 }
2340                             }
2341                         }
2342                     }
2343                     break;
2345             default:
2346                     {
2347                         result = EDMA3_RM_E_INVALID_PARAM;
2348                         break;
2349                     }
2350             }
2351         }
2354     if (result == EDMA3_RM_SOK)
2355         {
2356         /**
2357          * For DMA/QDMA channels, we still have to allocate more resources like
2358          * TCC, PaRAM Set etc.
2359          * For Link channel, only the PaRAMSet is required and that has been
2360          * allocated so no further operations required.
2361          */
2363         /* Further resources' allocation for DMA channel. */
2364         if (chObj->type == EDMA3_RM_RES_DMA_CHANNEL)
2365             {
2366             /* First allocate a PaRAM Set */
2367             resObj.type = EDMA3_RM_RES_PARAM_SET;
2368             /* Use the saved param id now. */
2369             resObj.resId = (uint32_t)paRAMId;
2370             result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2371             if (result == EDMA3_RM_SOK)
2372                 {
2373                 /**
2374                  * PaRAM Set allocation succeeded.
2375                  * Save the PaRAM Set first.
2376                  */
2377                 *pParam = resObj.resId;
2378                 edma3RmChBoundRes[rmObj->phyCtrllerInstId][chObj->resId].paRAMId = (int32_t)(resObj.resId);
2380                 /* Allocate the TCC now. */
2381                 resObj.type = EDMA3_RM_RES_TCC;
2382                 if ((*pTcc) == EDMA3_RM_TCC_ANY)
2383                     {
2384                     if (mappedTcc == EDMA3_RM_CH_NO_TCC_MAP)
2385                         {
2386                         resObj.resId = EDMA3_RM_RES_ANY;
2387                         }
2388                     else
2389                         {
2390                         resObj.resId = mappedTcc;
2391                         }
2392                     }
2393                 else
2394                     {
2395                     resObj.resId = *pTcc;
2396                     }
2398                 result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2399                 if (result == EDMA3_RM_SOK)
2400                     {
2401                      /* TCC allocation succeeded. Save it first. */
2402                     *pTcc = resObj.resId;
2403                      edma3RmChBoundRes[rmObj->phyCtrllerInstId][chObj->resId].tcc = resObj.resId;
2405                     /**
2406                      * Check first whether the global registers and the allocated
2407                      * PaRAM Set can be modified or not. If yes, do the needful.
2408                      * Else leave this for the user.
2409                      */
2410                     if (TRUE == rmInstance->regModificationRequired)
2411                         {
2412                         /* Set TCC of the allocated Param Set. */
2413                         gblRegs->PARAMENTRY[*pParam].OPT  &= EDMA3_RM_OPT_TCC_CLR_MASK;
2414                         gblRegs->PARAMENTRY[*pParam].OPT |= EDMA3_RM_OPT_TCC_SET_MASK(*pTcc);
2416                         /**
2417                          * Do the mapping between DMA channel and PaRAM Set.
2418                          * Do this for the EDMA3 Controllers which have a register for mapping
2419                          * DMA Channel to a particular PaRAM Set.
2420                          */
2421                         if (TRUE == rmObj->gblCfgParams.dmaChPaRAMMapExists)
2422                             {
2423                             gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
2425                             /* Map Parameter RAM Set Number for specified channelId */
2426                             gblRegs->DCHMAP[chObj->resId] &= EDMA3_RM_DCH_PARAM_CLR_MASK;
2427                             gblRegs->DCHMAP[chObj->resId] |= EDMA3_RM_DCH_PARAM_SET_MASK(*pParam);
2428                             }
2430                         /* Remove any linking */
2431                         *((&gblRegs->PARAMENTRY[*pParam].OPT)
2432                                 + (uint32_t)EDMA3_RM_PARAM_ENTRY_LINK_BCNTRLD) = 0xFFFFU;
2433                         }
2434                     }
2435                 else
2436                     {
2437                     /**
2438                      * TCC allocation failed, free the previously allocated
2439                      * PaRAM Set and DMA channel.
2440                      */
2441                     resObj.type = EDMA3_RM_RES_PARAM_SET;
2442                     resObj.resId = *pParam;
2443                     EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2445                     /* Reset the book-keeping data structure also. */
2446                     edma3RmChBoundRes[rmObj->phyCtrllerInstId][chObj->resId].paRAMId = -1;
2448                     resObj.type = chObj->type;
2449                     resObj.resId = chObj->resId;
2450                     EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2451                     }
2452                 }
2453             else
2454                 {
2455                 /**
2456                  * PaRAM Set allocation failed, free the previously allocated
2457                  * DMA channel also.
2458                  */
2459                 resObj.type = chObj->type;
2460                 resObj.resId = chObj->resId;
2461                 EDMA3_RM_freeResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2462                 }
2463             }
2466         /* Further resources' allocation for QDMA channel. */
2467         if (chObj->type == EDMA3_RM_RES_QDMA_CHANNEL)
2468             {
2469             /* First allocate a PaRAM Set */
2470             resObj.type = EDMA3_RM_RES_PARAM_SET;
2471             /* Use the saved param id now. */
2472             resObj.resId = (uint32_t)paRAMId;
2473             result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2474             if (result == EDMA3_RM_SOK)
2475                 {
2476                 /**
2477                  * PaRAM Set allocation succeeded.
2478                  * Save the PaRAM Set first.
2479                  */
2480                 *pParam = resObj.resId;
2481                 edma3RmChBoundRes[rmObj->phyCtrllerInstId][qdmaChId].paRAMId = (int32_t)(resObj.resId);
2483                 /* Allocate the TCC now. */
2484                 resObj.type = EDMA3_RM_RES_TCC;
2485                 if ((*pTcc) == EDMA3_RM_TCC_ANY)
2486                     {
2487                     if (mappedTcc == EDMA3_RM_CH_NO_TCC_MAP)
2488                         {
2489                         resObj.resId = EDMA3_RM_RES_ANY;
2490                         }
2491                     else
2492                         {
2493                         resObj.resId = mappedTcc;
2494                         }
2495                     }
2496                 else
2497                     {
2498                     resObj.resId = *pTcc;
2499                     }
2501                 result = EDMA3_RM_allocResource(hEdmaResMgr, (EDMA3_RM_ResDesc *)&resObj);
2502                 if (result == EDMA3_RM_SOK)
2503                     {
2504                      /* TCC allocation succeeded. Save it first. */
2505                     *pTcc = resObj.resId;
2506                      edma3RmChBoundRes[rmObj->phyCtrllerInstId][qdmaChId].tcc = resObj.resId;
2508                     /**
2509                      * Check first whether the global registers and the allocated
2510                      * PaRAM Set can be modified or not. If yes, do the needful.
2511                      * Else leave this for the user.<