Misra C Fix:DRA72X Files

[keystone-rtos/edma3_lld.git] / packages / ti / sdo / edma3 / drv / sample / src / platforms / sample_dra72x_arm_int_reg.c

diff --git a/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_dra72x_arm_int_reg.c b/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_dra72x_arm_int_reg.c
index 05c4f2e5efeac70e4afea027dbec622472ca598f..7e627a8233c93e47531789c18243708182c5f515 100644 (file)
--- a/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_dra72x_arm_int_reg.c
+++ b/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_dra72x_arm_int_reg.c
@@ -62,28 +62,28 @@ void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(uint32_t arg) =
                                                 (void (*)(uint32_t))&lisrEdma3TC7ErrHandler0,
                                                 };
 
-extern unsigned int ccXferCompInt[][EDMA3_MAX_REGIONS];
-extern unsigned int ccErrorInt[];
-extern unsigned int tcErrorInt[][EDMA3_MAX_TC];
-extern unsigned int numEdma3Tc[];
-extern unsigned int ccXferCompIntXbarInstNo[][EDMA3_MAX_REGIONS];
-extern unsigned int ccCompEdmaXbarIndex[][EDMA3_MAX_REGIONS];
-extern unsigned int ccErrorIntXbarInstNo[];
-extern unsigned int ccErrEdmaXbarIndex[];
-extern unsigned int tcErrorIntXbarInstNo[][EDMA3_MAX_TC];
-extern unsigned int tcErrEdmaXbarIndex[][EDMA3_MAX_TC];
+extern uint32_t ccXferCompInt[][EDMA3_MAX_REGIONS];
+extern uint32_t ccErrorInt[];
+extern uint32_t tcErrorInt[][EDMA3_MAX_TC];
+extern uint32_t numEdma3Tc[];
+extern uint32_t ccXferCompIntXbarInstNo[][EDMA3_MAX_REGIONS];
+extern uint32_t ccCompEdmaXbarIndex[][EDMA3_MAX_REGIONS];
+extern uint32_t ccErrorIntXbarInstNo[];
+extern uint32_t ccErrEdmaXbarIndex[];
+extern uint32_t tcErrorIntXbarInstNo[][EDMA3_MAX_TC];
+extern uint32_t tcErrEdmaXbarIndex[][EDMA3_MAX_TC];
 
 /**
  * Variables which will be used internally for referring the hardware interrupt
  * for various EDMA3 interrupts.
  */
-extern unsigned int hwIntXferComp[];
-extern unsigned int hwIntCcErr[];
-extern unsigned int hwIntTcErr[];
+extern uint32_t hwIntXferComp[];
+extern uint32_t hwIntCcErr[];
+extern uint32_t hwIntTcErr[];
 
-extern unsigned int dsp_num;
+extern uint32_t dsp_num;
 /* This variable has to be used as an extern */
-unsigned int gpp_num = 0;
+uint32_t gpp_num = 0;
 
 Hwi_Handle hwiCCXferCompInt;
 Hwi_Handle hwiCCErrInt;
@@ -99,35 +99,35 @@ typedef struct  {
 
 typedef volatile CSL_IntmuxRegs     *CSL_IntmuxRegsOvly;
 
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK (0x00FF0000u)
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT (0x00000010u)
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_RESETVAL (0x00000000u)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK (0x00FF0000U)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT (0x00000010U)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_RESETVAL (0x00000000U)
 
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK (0x000000FFu)
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_SHIFT (0x00000000u)
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_RESETVAL (0x00000000u)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK (0x000000FFU)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_SHIFT (0x00000000U)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_RESETVAL (0x00000000U)
 
 
-#define EDMA3_MAX_CROSS_BAR_EVENTS_DRA72X (127u)
-#define EDMA3_NUM_TCC                     (64u)
+#define EDMA3_MAX_CROSS_BAR_EVENTS_DRA72X (127U)
+#define EDMA3_NUM_TCC                     (64U)
 
 #define EDMA3_EVENT_MUX_REG_BASE_ADDR               (0x4a002c78)
 /*
  * Forward decleration
  */
-EDMA3_DRV_Result sampleMapXbarEvtToChan (unsigned int eventNum,
-                 unsigned int *chanNum,
+EDMA3_DRV_Result sampleMapXbarEvtToChan (uint32_t eventNum,
+                 uint32_t *chanNum,
                  const EDMA3_DRV_GblXbarToChanConfigParams * edmaGblXbarConfig);
-EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum,
-                                  unsigned int chanNum);
+EDMA3_DRV_Result sampleConfigScr (uint32_t eventNum,
+                                  uint32_t chanNum);
 
-void Edma3MemProtectionHandler(unsigned int edma3InstanceId);
+void Edma3MemProtectionHandler(uint32_t edma3InstanceId);
 
 /**  To Register the ISRs with the underlying OS, if required. */
-void registerEdma3Interrupts (unsigned int edma3Id)
+void registerEdma3Interrupts (uint32_t edma3Id)
     {
     static UInt32 cookie = 0;
-    unsigned int numTc = 0;
+    uint32_t numTc = 0;
 
     /*
      * Skip these interrupt xbar configuration.
@@ -217,10 +217,10 @@ void registerEdma3Interrupts (unsigned int edma3Id)
     }
 
 /**  To Unregister the ISRs with the underlying OS, if previously registered. */
-void unregisterEdma3Interrupts (unsigned int edma3Id)
+void unregisterEdma3Interrupts (uint32_t edma3Id)
     {
        static UInt32 cookie = 0;
-    unsigned int numTc = 0;
+    uint32_t numTc = 0;
 
     /* Disabling the global interrupts */
     cookie = Hwi_disable();
@@ -244,13 +244,13 @@ void unregisterEdma3Interrupts (unsigned int edma3Id)
  *
  * \return  EDMA3_DRV_SOK if success, else error code
  */
-EDMA3_DRV_Result sampleMapXbarEvtToChan (unsigned int eventNum,
-                 unsigned int *chanNum,
+EDMA3_DRV_Result sampleMapXbarEvtToChan (uint32_t eventNum,
+                 uint32_t *chanNum,
                  const EDMA3_DRV_GblXbarToChanConfigParams * edmaGblXbarConfig)
        {
     EDMA3_DRV_Result edma3Result = EDMA3_DRV_E_INVALID_PARAM;
-    unsigned int xbarEvtNum = 0;
-    int          edmaChanNum = 0;
+    uint32_t xbarEvtNum = 0;
+    int32_t          edmaChanNum = 0;
 
        if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_DRA72X) &&
                (chanNum != NULL) &&
@@ -276,13 +276,13 @@ EDMA3_DRV_Result sampleMapXbarEvtToChan (unsigned int eventNum,
  *
  * \return  EDMA3_DRV_SOK if success, else error code
  */
-EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum,
-                                  unsigned int chanNum)
+EDMA3_DRV_Result sampleConfigScr (uint32_t eventNum,
+                                  uint32_t chanNum)
        {
     EDMA3_DRV_Result edma3Result = EDMA3_DRV_SOK;
-    unsigned int scrChanOffset = 0;
-    unsigned int scrRegOffset  = 0;
-    unsigned int xBarEvtNum    = 0;
+    uint32_t scrChanOffset = 0;
+    uint32_t scrRegOffset  = 0;
+    uint32_t xBarEvtNum    = 0;
     CSL_IntmuxRegsOvly scrEvtMux = (CSL_IntmuxRegsOvly)(EDMA3_EVENT_MUX_REG_BASE_ADDR);
 
 
@@ -317,7 +317,7 @@ EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum,
        }
 
 EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma,
-                                   unsigned int edma3Id)
+                                   uint32_t edma3Id)
     {
     EDMA3_DRV_Result retVal = EDMA3_DRV_SOK;
     const EDMA3_DRV_GblXbarToChanConfigParams *sampleXbarToChanConfig =
@@ -333,7 +333,7 @@ EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma,
     return retVal;
     }
 
-void Edma3MemProtectionHandler(unsigned int edma3InstanceId)
+void Edma3MemProtectionHandler(uint32_t edma3InstanceId)
     {
     printf("memory Protection error");
     }