[keystone-rtos/edma3_lld.git] / packages / ti / sdo / edma3 / drv / sample / src / platforms / sample_dra72x_arm_int_reg.c
diff --git a/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_dra72x_arm_int_reg.c b/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_dra72x_arm_int_reg.c
index e2cdaf56bc54af8ff8dfa4c50b50180ce727a63f..8fbd9e58e6d22d382acad50c25f81cf41013cce8 100644 (file)
*/
void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(uint32_t arg) =
{
- (void (*)(uint32_t))&lisrEdma3TC0ErrHandler0,
- (void (*)(uint32_t))&lisrEdma3TC1ErrHandler0,
- (void (*)(uint32_t))&lisrEdma3TC2ErrHandler0,
- (void (*)(uint32_t))&lisrEdma3TC3ErrHandler0,
- (void (*)(uint32_t))&lisrEdma3TC4ErrHandler0,
- (void (*)(uint32_t))&lisrEdma3TC5ErrHandler0,
- (void (*)(uint32_t))&lisrEdma3TC6ErrHandler0,
- (void (*)(uint32_t))&lisrEdma3TC7ErrHandler0,
+ &lisrEdma3TC0ErrHandler0,
+ &lisrEdma3TC1ErrHandler0,
+ &lisrEdma3TC2ErrHandler0,
+ &lisrEdma3TC3ErrHandler0,
+ &lisrEdma3TC4ErrHandler0,
+ &lisrEdma3TC5ErrHandler0,
+ &lisrEdma3TC6ErrHandler0,
+ &lisrEdma3TC7ErrHandler0,
};
-extern unsigned int ccXferCompInt[][EDMA3_MAX_REGIONS];
-extern unsigned int ccErrorInt[];
-extern unsigned int tcErrorInt[][EDMA3_MAX_TC];
-extern unsigned int numEdma3Tc[];
-extern unsigned int ccXferCompIntXbarInstNo[][EDMA3_MAX_REGIONS];
-extern unsigned int ccCompEdmaXbarIndex[][EDMA3_MAX_REGIONS];
-extern unsigned int ccErrorIntXbarInstNo[];
-extern unsigned int ccErrEdmaXbarIndex[];
-extern unsigned int tcErrorIntXbarInstNo[][EDMA3_MAX_TC];
-extern unsigned int tcErrEdmaXbarIndex[][EDMA3_MAX_TC];
+extern uint32_t ccXferCompInt[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
+extern uint32_t ccErrorInt[EDMA3_MAX_EDMA3_INSTANCES];
+extern uint32_t tcErrorInt[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_TC];
+extern uint32_t numEdma3Tc[EDMA3_MAX_EDMA3_INSTANCES];
+extern uint32_t ccXferCompIntXbarInstNo[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
+extern uint32_t ccCompEdmaXbarIndex[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
+extern uint32_t ccErrorIntXbarInstNo[EDMA3_MAX_EDMA3_INSTANCES];
+extern uint32_t ccErrEdmaXbarIndex[EDMA3_MAX_EDMA3_INSTANCES];
+extern uint32_t tcErrorIntXbarInstNo[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_TC];
+extern uint32_t tcErrEdmaXbarIndex[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_TC];
/**
* Variables which will be used internally for referring the hardware interrupt
* for various EDMA3 interrupts.
*/
-extern unsigned int hwIntXferComp[];
-extern unsigned int hwIntCcErr[];
-extern unsigned int hwIntTcErr[];
+extern uint32_t hwIntXferComp[EDMA3_MAX_EDMA3_INSTANCES];
+extern uint32_t hwIntCcErr[EDMA3_MAX_EDMA3_INSTANCES];
+extern uint32_t hwIntTcErr[EDMA3_MAX_EDMA3_INSTANCES];
-extern unsigned int dsp_num;
+extern uint32_t dsp_num;
/* This variable has to be used as an extern */
-unsigned int gpp_num = 0;
+uint32_t gpp_num = 0;
Hwi_Handle hwiCCXferCompInt;
Hwi_Handle hwiCCErrInt;
Hwi_Handle hwiTCErrInt[EDMA3_MAX_TC];
/* External Instance Specific Configuration Structure */
-extern EDMA3_DRV_GblXbarToChanConfigParams
- sampleXbarChanInitConfig[][EDMA3_MAX_REGIONS];
+extern EDMA3_DRV_GblXbarToChanConfigParams
+ sampleXbarChanInitConfig[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
typedef struct {
volatile Uint32 TPCC_EVTMUX[32];
typedef volatile CSL_IntmuxRegs *CSL_IntmuxRegsOvly;
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK (0x00FF0000u)
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT (0x00000010u)
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_RESETVAL (0x00000000u)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK (0x00FF0000U)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT (0x00000010U)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_RESETVAL (0x00000000U)
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK (0x000000FFu)
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_SHIFT (0x00000000u)
-#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_RESETVAL (0x00000000u)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK (0x000000FFU)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_SHIFT (0x00000000U)
+#define CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_RESETVAL (0x00000000U)
-#define EDMA3_MAX_CROSS_BAR_EVENTS_TI814X (127u)
-#define EDMA3_NUM_TCC (64u)
+#define EDMA3_MAX_CROSS_BAR_EVENTS_DRA72X (127U)
+#define EDMA3_NUM_TCC (64U)
#define EDMA3_EVENT_MUX_REG_BASE_ADDR (0x4a002c78)
/*
* Forward decleration
*/
-EDMA3_DRV_Result sampleMapXbarEvtToChan (unsigned int eventNum,
- unsigned int *chanNum,
+EDMA3_DRV_Result sampleMapXbarEvtToChan (uint32_t eventNum,
+ uint32_t *chanNum,
const EDMA3_DRV_GblXbarToChanConfigParams * edmaGblXbarConfig);
-EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum,
- unsigned int chanNum);
+EDMA3_DRV_Result sampleConfigScr (uint32_t eventNum,
+ uint32_t chanNum);
-void Edma3MemProtectionHandler(unsigned int edma3InstanceId);
+EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma,
+ uint32_t edma3Id);
/** To Register the ISRs with the underlying OS, if required. */
-void registerEdma3Interrupts (unsigned int edma3Id)
+void registerEdma3Interrupts (uint32_t edma3Id);
+/** To Unregister the ISRs with the underlying OS, if previously registered. */
+void unregisterEdma3Interrupts (uint32_t edma3Id);
+
+void Edma3MemProtectionHandler(uint32_t edma3InstanceId);
+
+/** To Register the ISRs with the underlying OS, if required. */
+void registerEdma3Interrupts (uint32_t edma3Id)
{
static UInt32 cookie = 0;
- unsigned int numTc = 0;
+ uint32_t numTc = 0;
/*
* Skip these interrupt xbar configuration.
* if it is accessing EVE internal edma instance ie edma3id = 2 and dsp_num = 1.
*/
- if (edma3Id != 2 && dsp_num != 1)
+ if ((edma3Id != 2U) && (dsp_num != 1U))
{
IntXbar_connect(ccXferCompIntXbarInstNo[edma3Id][dsp_num], ccCompEdmaXbarIndex[edma3Id][dsp_num]);
IntXbar_connect(ccErrorIntXbarInstNo[edma3Id], ccErrEdmaXbarIndex[edma3Id]);
/* argument for the ISR */
hwiParams.arg = edma3Id;
/* set the priority ID */
- //hwiParams.priority = hwIntXferComp[edma3Id];
-
+ /* hwiParams.priority = hwIntXferComp[edma3Id]; */
+
hwiCCXferCompInt = Hwi_create( ccXferCompInt[edma3Id][dsp_num],
((Hwi_FuncPtr)&lisrEdma3ComplHandler0),
(const Hwi_Params *) (&hwiParams),
&eb);
- if (TRUE == Error_check(&eb))
+ if ((bool)TRUE == Error_check(&eb))
{
System_printf("HWI Create Failed\n",Error_getCode(&eb));
}
/* argument for the ISR */
hwiParams.arg = edma3Id;
/* set the priority ID */
- //hwiParams.priority = hwIntCcErr[edma3Id];
-
+ /* hwiParams.priority = hwIntCcErr[edma3Id]; */
+
hwiCCErrInt = Hwi_create( ccErrorInt[edma3Id],
((Hwi_FuncPtr)&lisrEdma3CCErrHandler0),
(const Hwi_Params *) (&hwiParams),
&eb);
- if (TRUE == Error_check(&eb))
+ if ((bool)TRUE == Error_check(&eb))
{
System_printf("HWI Create Failed\n",Error_getCode(&eb));
}
/* argument for the ISR */
hwiParams.arg = edma3Id;
/* set the priority ID */
- //hwiParams.priority = hwIntTcErr[edma3Id];
-
+ /* hwiParams.priority = hwIntTcErr[edma3Id]; */
+
hwiTCErrInt[numTc] = Hwi_create( tcErrorInt[edma3Id][numTc],
- (ptrEdma3TcIsrHandler[numTc]),
+ (Hwi_FuncPtr)(ptrEdma3TcIsrHandler[numTc]),
(const Hwi_Params *) (&hwiParams),
&eb);
- if (TRUE == Error_check(&eb))
+ if ((bool)TRUE == Error_check(&eb))
{
System_printf("HWI Create Failed\n",Error_getCode(&eb));
}
}
/** To Unregister the ISRs with the underlying OS, if previously registered. */
-void unregisterEdma3Interrupts (unsigned int edma3Id)
+void unregisterEdma3Interrupts (uint32_t edma3Id)
{
- static UInt32 cookie = 0;
- unsigned int numTc = 0;
+ static UInt32 cookiee = 0;
+ uint32_t numTc = 0;
/* Disabling the global interrupts */
- cookie = Hwi_disable();
+ cookiee = Hwi_disable();
Hwi_delete(&hwiCCXferCompInt);
Hwi_delete(&hwiCCErrInt);
numTc++;
}
/* Restore interrupts */
- Hwi_restore(cookie);
+ Hwi_restore(cookiee);
}
/**
*
* \return EDMA3_DRV_SOK if success, else error code
*/
-EDMA3_DRV_Result sampleMapXbarEvtToChan (unsigned int eventNum,
- unsigned int *chanNum,
+EDMA3_DRV_Result sampleMapXbarEvtToChan (uint32_t eventNum,
+ uint32_t *chanNum,
const EDMA3_DRV_GblXbarToChanConfigParams * edmaGblXbarConfig)
{
EDMA3_DRV_Result edma3Result = EDMA3_DRV_E_INVALID_PARAM;
- unsigned int xbarEvtNum = 0;
- int edmaChanNum = 0;
+ uint32_t xbarEvtNum = 0;
+ int32_t edmaChanNum = 0;
- if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_TI814X) &&
+ if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_DRA72X) &&
(chanNum != NULL) &&
(edmaGblXbarConfig != NULL))
{
*
* \return EDMA3_DRV_SOK if success, else error code
*/
-EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum,
- unsigned int chanNum)
+EDMA3_DRV_Result sampleConfigScr (uint32_t eventNum,
+ uint32_t chanNum)
{
EDMA3_DRV_Result edma3Result = EDMA3_DRV_SOK;
- unsigned int scrChanOffset = 0;
- unsigned int scrRegOffset = 0;
- unsigned int xBarEvtNum = 0;
+ uint32_t scrChanOffset = 0;
+ uint32_t scrRegOffset = 0;
+ uint32_t xBarEvtNum = 0;
CSL_IntmuxRegsOvly scrEvtMux = (CSL_IntmuxRegsOvly)(EDMA3_EVENT_MUX_REG_BASE_ADDR);
- if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_TI814X) &&
+ if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_DRA72X) &&
(chanNum < EDMA3_NUM_TCC))
{
- scrRegOffset = chanNum / 2;
- scrChanOffset = chanNum - (scrRegOffset * 2);
- xBarEvtNum = (eventNum - EDMA3_NUM_TCC) + 1;
-
+ scrRegOffset = chanNum / 2U;
+ scrChanOffset = chanNum - (scrRegOffset * 2U);
+ xBarEvtNum = eventNum + 1U;
+
switch(scrChanOffset)
{
case 0:
scrEvtMux->TPCC_EVTMUX[scrRegOffset] |=
(xBarEvtNum & CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK);
break;
- case 1:
+ case 1U:
scrEvtMux->TPCC_EVTMUX[scrRegOffset] |=
((xBarEvtNum << CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT) &
(CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK));
}
EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma,
- unsigned int edma3Id)
+ uint32_t edma3Id)
{
EDMA3_DRV_Result retVal = EDMA3_DRV_SOK;
const EDMA3_DRV_GblXbarToChanConfigParams *sampleXbarToChanConfig =
&(sampleXbarChanInitConfig[edma3Id][dsp_num]);
+ uint32_t sampleMapXbarEvtToChanTemp = (uint32_t)&sampleMapXbarEvtToChan;
+ uint32_t sampleConfigScrTemp = (uint32_t)&sampleConfigScr;
if (hEdma != NULL)
{
retVal = EDMA3_DRV_initXbarEventMap(hEdma,
sampleXbarToChanConfig,
- (EDMA3_DRV_mapXbarEvtToChan)&sampleMapXbarEvtToChan,
- (EDMA3_DRV_xbarConfigScr)&sampleConfigScr);
+ (EDMA3_DRV_mapXbarEvtToChan)sampleMapXbarEvtToChanTemp,
+ (EDMA3_DRV_xbarConfigScr)sampleConfigScrTemp);
}
return retVal;
}
-void Edma3MemProtectionHandler(unsigned int edma3InstanceId)
+void Edma3MemProtectionHandler(uint32_t edma3InstanceId)
{
+#ifdef EDMA3_DRV_DEBUG
+ /* Added to fix Misra C error */
printf("memory Protection error");
+#endif
}