]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - keystone-rtos/edma3_lld.git/blobdiff - packages/ti/sdo/edma3/rm/sample/src/platforms/sample_dra72x_arm_int_reg.c
Misra C Fixes: DRA72x Files
[keystone-rtos/edma3_lld.git] / packages / ti / sdo / edma3 / rm / sample / src / platforms / sample_dra72x_arm_int_reg.c
index 88276f5ce2b9705c2be407956249e884c671e807..0f6b426d80a38f503ee759c9f16e134de1cc7a46 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * sample_tda2xx_int_reg.c
+ * sample_dra72x_int_reg.c
  *
  * Platform specific interrupt registration and un-registration routines.
  *
   */
 void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(uint32_t arg) =
                                                 {
-                                                (void (*)(uint32_t))&lisrEdma3TC0ErrHandler0,
-                                                (void (*)(uint32_t))&lisrEdma3TC1ErrHandler0,
-                                                (void (*)(uint32_t))&lisrEdma3TC2ErrHandler0,
-                                                (void (*)(uint32_t))&lisrEdma3TC3ErrHandler0,
-                                                (void (*)(uint32_t))&lisrEdma3TC4ErrHandler0,
-                                                (void (*)(uint32_t))&lisrEdma3TC5ErrHandler0,
-                                                (void (*)(uint32_t))&lisrEdma3TC6ErrHandler0,
-                                                (void (*)(uint32_t))&lisrEdma3TC7ErrHandler0,
+                                                &lisrEdma3TC0ErrHandler0,
+                                                &lisrEdma3TC1ErrHandler0,
+                                                &lisrEdma3TC2ErrHandler0,
+                                                &lisrEdma3TC3ErrHandler0,
+                                                &lisrEdma3TC4ErrHandler0,
+                                                &lisrEdma3TC5ErrHandler0,
+                                                &lisrEdma3TC6ErrHandler0,
+                                                &lisrEdma3TC7ErrHandler0,
                                                 };
 
-extern uint32_t ccXferCompInt[][EDMA3_MAX_REGIONS];
-extern uint32_t ccErrorInt[];
-extern uint32_t tcErrorInt[][EDMA3_MAX_TC];
-extern uint32_t numEdma3Tc[];
+extern uint32_t ccXferCompInt[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
+extern uint32_t ccErrorInt[EDMA3_MAX_EDMA3_INSTANCES];
+extern uint32_t tcErrorInt[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_TC];
+extern uint32_t numEdma3Tc[EDMA3_MAX_EDMA3_INSTANCES];
 
 /**
  * Variables which will be used internally for referring the hardware interrupt
  * for various EDMA3 interrupts.
  */
-extern uint32_t hwIntXferComp[];
-extern uint32_t hwIntCcErr[];
-extern uint32_t hwIntTcErr[];
+extern uint32_t hwIntXferComp[EDMA3_MAX_EDMA3_INSTANCES];
+extern uint32_t hwIntCcErr[EDMA3_MAX_EDMA3_INSTANCES];
+extern uint32_t hwIntTcErr[EDMA3_MAX_EDMA3_INSTANCES];
 
 extern uint32_t dsp_num;
 /* This variable has to be used as an extern */
@@ -82,8 +82,8 @@ Hwi_Handle hwiCCErrInt;
 Hwi_Handle hwiTCErrInt[EDMA3_MAX_TC];
 
 /* External Instance Specific Configuration Structure */
-extern EDMA3_DRV_GblXbarToChanConfigParams
-                                                               sampleXbarChanInitConfig[][EDMA3_MAX_REGIONS];
+extern EDMA3_DRV_GblXbarToChanConfigParams 
+                                                               sampleXbarChanInitConfig[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
 
 typedef struct  {
     volatile Uint32 TPCC_EVTMUX[32];
@@ -115,6 +115,17 @@ EDMA3_DRV_Result sampleConfigScr (uint32_t eventNum,
 
 void Edma3MemProtectionHandler(uint32_t edma3InstanceId);
 
+/**  To Register the ISRs with the underlying OS, if required. */
+void registerEdma3Interrupts (uint32_t edma3Id);
+
+/**  To Unregister the ISRs with the underlying OS, if previously registered. */
+void unregisterEdma3Interrupts (uint32_t edma3Id);
+
+EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma, 
+                                   uint32_t edma3Id);
+                                   
+void Edma3MemProtectionHandler(uint32_t edma3InstanceId);
+
 /**  To Register the ISRs with the underlying OS, if required. */
 void registerEdma3Interrupts (uint32_t edma3Id)
     {
@@ -141,7 +152,7 @@ void registerEdma3Interrupts (uint32_t edma3Id)
                                        ((Hwi_FuncPtr)&lisrEdma3ComplHandler0),
                                        (const Hwi_Params *) (&hwiParams),
                                        &eb);
-    if (TRUE == Error_check(&eb))
+    if ((bool)TRUE == Error_check(&eb))
     {
         System_printf("HWI Create Failed\n",Error_getCode(&eb));
     }
@@ -158,7 +169,7 @@ void registerEdma3Interrupts (uint32_t edma3Id)
                 (const Hwi_Params *) (&hwiParams),
                 &eb);
 
-    if (TRUE == Error_check(&eb))
+    if ((bool)TRUE == Error_check(&eb))
     {
         System_printf("HWI Create Failed\n",Error_getCode(&eb));
     }
@@ -176,7 +187,7 @@ void registerEdma3Interrupts (uint32_t edma3Id)
                     (ptrEdma3TcIsrHandler[numTc]),
                     (const Hwi_Params *) (&hwiParams),
                     &eb);
-        if (TRUE == Error_check(&eb))
+        if ((bool)TRUE == Error_check(&eb))
         {
             System_printf("HWI Create Failed\n",Error_getCode(&eb));
         }
@@ -212,11 +223,11 @@ void registerEdma3Interrupts (uint32_t edma3Id)
 /**  To Unregister the ISRs with the underlying OS, if previously registered. */
 void unregisterEdma3Interrupts (uint32_t edma3Id)
     {
-       static UInt32 cookie = 0;
+       static UInt32 cookiee = 0;
     uint32_t numTc = 0;
 
     /* Disabling the global interrupts */
-    cookie = Hwi_disable();
+    cookiee = Hwi_disable();
 
     Hwi_delete(&hwiCCXferCompInt);
     Hwi_delete(&hwiCCErrInt);
@@ -226,7 +237,7 @@ void unregisterEdma3Interrupts (uint32_t edma3Id)
         numTc++;
        }
     /* Restore interrupts */
-    Hwi_restore(cookie);
+    Hwi_restore(cookiee);
     }
 
 /**
@@ -282,17 +293,17 @@ EDMA3_DRV_Result sampleConfigScr (uint32_t eventNum,
        if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_DRA72X) &&
                (chanNum < EDMA3_NUM_TCC))
                {
-               scrRegOffset = chanNum / 2;
-               scrChanOffset = chanNum - (scrRegOffset * 2);
-               xBarEvtNum = eventNum + 1;
-
+               scrRegOffset = chanNum / 2U;
+               scrChanOffset = chanNum - (scrRegOffset * 2U);
+               xBarEvtNum = eventNum + 1U;
+               
                switch(scrChanOffset)
                        {
                        case 0:
                                scrEvtMux->TPCC_EVTMUX[scrRegOffset] |=
                                        (xBarEvtNum & CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK);
                                break;
-                       case 1:
+                       case 1U:
                                scrEvtMux->TPCC_EVTMUX[scrRegOffset] |=
                                        ((xBarEvtNum << CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT) &
                                        (CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK));
@@ -328,5 +339,8 @@ EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma,
 
 void Edma3MemProtectionHandler(uint32_t edma3InstanceId)
     {
+#ifdef EDMA3_RM_DEBUG
+    /*  Added to fix Misra C error */
     printf("memory Protection error");
+#endif
     }