diff --git a/packages/ti/sdo/edma3/rm/src/edma3resmgr.c b/packages/ti/sdo/edma3/rm/src/edma3resmgr.c
-/*******************************************************************************
-**+--------------------------------------------------------------------------+**
-**| **** |**
-**| **** |**
-**| ******o*** |**
-**| ********_///_**** |**
-**| ***** /_//_/ **** |**
-**| ** ** (__/ **** |**
-**| ********* |**
-**| **** |**
-**| *** |**
-**| |**
-**| Copyright (c) 1998-2006 Texas Instruments Incorporated |**
-**| ALL RIGHTS RESERVED |**
-**| |**
-**| Permission is hereby granted to licensees of Texas Instruments |**
-**| Incorporated (TI) products to use this computer program for the sole |**
-**| purpose of implementing a licensee product based on TI products. |**
-**| No other rights to reproduce, use, or disseminate this computer |**
-**| program, whether in part or in whole, are granted. |**
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-**| connected with the use of this program. |**
-**| |**
-**+--------------------------------------------------------------------------+**
-*******************************************************************************/
-
-/** \file edma3resmgr.c
- \brief EDMA3 Controller Resource Manager Interface Implementation
-
- This file contains Resource Manager Implementation for the EDMA3 Controller.
-
- (C) Copyright 2006, Texas Instruments, Inc
-
- */
+/*
+ * edma3resmgr.c
+ *
+ * EDMA3 Controller Resource Manager Interface Implementation
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
/* Resource Manager Internal Header Files */
#include <ti/sdo/edma3/rm/src/edma3resmgr.h>
extern const unsigned int EDMA3_MAX_RM_INSTANCES;
+#ifndef GENERIC
/**
* \brief Static Configuration structure for EDMA3
* controller, to provide Global SoC specific Information.
*/
extern EDMA3_RM_InstanceInitConfig defInstInitConfig [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];
+#endif
+
/**
* \brief Region Specific Configuration structure for
extern EDMA3_RM_Instance *resMgrInstance;
extern EDMA3_RM_Instance *ptrRMIArray;
-
+/** Max of DMA Channels */
+unsigned int edma3_dma_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
+/** Min of Link Channels */
+unsigned int edma3_link_ch_min_val[EDMA3_MAX_EDMA3_INSTANCES];
+/** Max of Link Channels */
+unsigned int edma3_link_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
+/** Min of QDMA Channels */
+unsigned int edma3_qdma_ch_min_val[EDMA3_MAX_EDMA3_INSTANCES];
+/** Max of QDMA Channels */
+unsigned int edma3_qdma_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
+/** Max of Logical Channels */
+unsigned int edma3_log_ch_max_val[EDMA3_MAX_EDMA3_INSTANCES];
/* Globals */
/*---------------------------------------------------------------------------*/
* scenario, this DMA channel <-> TCC mapping will be used to point to
* the correct callback function.
*/
-static unsigned int edma3DmaChTccMapping [EDMA3_MAX_DMA_CH];
+static unsigned int edma3DmaChTccMapping [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_DMA_CH];
/**
* scenario, this QDMA channel <-> TCC mapping will be used to point to
* the correct callback function.
*/
-static unsigned int edma3QdmaChTccMapping [EDMA3_MAX_QDMA_CH];
+static unsigned int edma3QdmaChTccMapping [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_QDMA_CH];
/**
* against a particular TCC. Used to call the callback
* functions linked to the particular channel.
*/
-static EDMA3_RM_TccCallbackParams edma3IntrParams [EDMA3_MAX_TCC];
+static EDMA3_RM_TccCallbackParams edma3IntrParams [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_TCC];
/** edma3RegionId will be updated ONCE using the parameter regionId passed to
*/
static EDMA3_RM_RegionId edma3RegionId = EDMA3_MAX_REGIONS;
-/** masterExists will be updated when the Master RM Instance modifies the
+/** masterExists[] will be updated when the Master RM Instance modifies the
* Global EDMA3 configuration registers. It is used to prevent any other
* Master RM Instance creation.
+ * masterExists[] is per EDMA3 hardware, hence it is created
+ * as an array.
*/
-static unsigned short masterExists = FALSE;
+static unsigned int masterExists [EDMA3_MAX_EDMA3_INSTANCES] = {FALSE,FALSE,FALSE};
/**
* Number of PaRAM Sets actually present on the SoC. This will be updated
* The list of Interrupt Channels which get allocated while requesting the
* TCC. It will be used while checking the IPR/IPRH bits in the RM ISR.
*/
-static unsigned int allocatedTCCs[2u] = {0x0u, 0x0u};
+static unsigned int allocatedTCCs[EDMA3_MAX_EDMA3_INSTANCES][2u] =
+ {
+ {0x0u, 0x0u},
+ {0x0u, 0x0u},
+ {0x0u, 0x0u},
+ };
/**
static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, unsigned int tcNum);
-/** Local MemSet function */
-void edma3MemSet(void *dst, unsigned char data, unsigned int len);
+/** Local MemZero function */
+void edma3MemZero(void *dst, unsigned int len);
/** Local MemCpy function */
void edma3MemCpy(void *dst, const void *src, unsigned int len);
/* Local MemCopy function to copy Param Set ONLY */
/*---------------------------------------------------------------------------*/
-/**\fn EDMA3_RM_Result EDMA3_RM_create (unsigned int phyCtrllerInstId,
- * const EDMA3_RM_GblConfigParams *gblCfgParams,
- * const void *miscParam)
- * \brief Create EDMA3 Resource Manager Object
- *
- * This API is used to create the EDMA3 Resource Manager Object. It should be
- * called only ONCE for each EDMA3 hardware instance.
- *
- * Init-time Configuration structure for EDMA3 hardware is provided to pass the
- * SoC specific information. This configuration information could be provided
- * by the user at init-time. In case user doesn't provide it, this information
- * could be taken from the SoC specific configuration file
- * edma3_<SOC_NAME>_cfg.c, in case it is available.
- *
- * This API clears the error specific registers (EMCR/EMCRh, QEMCR, CCERRCLR)
- * and sets the TCs priorities and Event Queues' watermark levels, if the 'miscParam'
- * argument is NULL. User can avoid these registers' programming (in some specific
- * use cases) by SETTING the 'isSlave' field of 'EDMA3_RM_MiscParam' configuration
- * structure and passing this structure as the third argument (miscParam).
- *
- * After successful completion of this API, Resource Manager Object's state
- * changes to EDMA3_RM_CREATED from EDMA3_RM_DELETED.
- *
- * \param phyCtrllerInstId [IN] EDMA3 Controller Instance Id
- * (Hardware instance id, starting from 0).
- * \param gblCfgParams [IN] SoC specific configuration structure for the
- * EDMA3 Hardware.
- * \param miscParam [IN] Misc configuration options provided in the
- * structure 'EDMA3_RM_MiscParam'.
- * For default options, user can pass NULL
- * in this argument.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- */
EDMA3_RM_Result EDMA3_RM_create (unsigned int phyCtrllerInstId,
const EDMA3_RM_GblConfigParams *gblCfgParams,
const void *miscParam)
static unsigned short rmInitDone = FALSE;
const EDMA3_RM_MiscParam *miscOpt = (const EDMA3_RM_MiscParam *)miscParam;
+#ifdef GENERIC
+ /* GENERIC libraries don't come with a default confifguration, always
+ needs to be supplied with a parameter */
+ if (gblCfgParams == NULL)
+ {
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+#endif
+
/**
* We are NOT checking 'gblCfgParams' for NULL.
* If user has passed NULL, default config info will be
/* Initialize the global variables for the first time */
if (FALSE == rmInitDone)
{
- edma3MemSet((void *)&(resMgrObj[count]) , 0x00u,
- sizeof(resMgrObj));
+ edma3MemZero((void *)&(resMgrObj[count]),
+ sizeof(resMgrObj));
+ edma3MemZero((void *)(&(edma3IntrParams[0u])),
+ sizeof(edma3IntrParams));
+
rmInitDone = TRUE;
}
* If yes, copy it to the driver data structures. Else, use the
* info from the config file edma3Cfg.c
*/
+#ifndef GENERIC
if (NULL == gblCfgParams)
{
/* Take info from the specific config file */
}
else
{
+#endif
/* User passed the info, save it in the RM object first */
edma3MemCpy((void *)(&resMgrObj[phyCtrllerInstId].gblCfgParams),
(const void *)(gblCfgParams),
sizeof (EDMA3_RM_GblConfigParams));
+#ifndef GENERIC
}
+#endif
/**
/**
- * Update the actual number of PaRAM sets.
+ * Update the actual number of PaRAM sets and
+ * Initialize Boundary Values for Logical Channel Ranges.
*/
edma3NumPaRAMSets = resMgrObj[phyCtrllerInstId].gblCfgParams.numPaRAMSets;
+ edma3_dma_ch_max_val[phyCtrllerInstId] = resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels - 1u;
+ edma3_link_ch_min_val[phyCtrllerInstId] = edma3_dma_ch_max_val[phyCtrllerInstId] + 1u;
+ edma3_link_ch_max_val[phyCtrllerInstId] = edma3_link_ch_min_val[phyCtrllerInstId] + resMgrObj[phyCtrllerInstId].gblCfgParams.numPaRAMSets - 1u;
+ edma3_qdma_ch_min_val[phyCtrllerInstId] = edma3_link_ch_max_val[phyCtrllerInstId] + 1u;
+ edma3_qdma_ch_max_val[phyCtrllerInstId] = edma3_qdma_ch_min_val[phyCtrllerInstId] + resMgrObj[phyCtrllerInstId].gblCfgParams.numQdmaChannels - 1u;
+ edma3_log_ch_max_val[phyCtrllerInstId] = edma3_qdma_ch_max_val[phyCtrllerInstId];
resMgrObj[phyCtrllerInstId].phyCtrllerInstId = phyCtrllerInstId;
resMgrObj[phyCtrllerInstId].state = EDMA3_RM_CREATED;
/* Make all the RM instances for this EDMA3 HW NULL */
for (count = 0u; count < EDMA3_MAX_RM_INSTANCES; count++)
{
- edma3MemSet((void *)((EDMA3_RM_Instance *)(ptrRMIArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + count),
- 0x00u,
+ edma3MemZero((void *)((EDMA3_RM_Instance *)(ptrRMIArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + count),
sizeof(EDMA3_RM_Instance));
/* Also make this data structure NULL */
- edma3MemSet((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + count),
- 0x00u,
+ edma3MemZero((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + count),
sizeof(EDMA3_RM_InstanceInitConfig));
}
count++
)
{
- edma3DmaChTccMapping[count] = EDMA3_MAX_TCC;
+ edma3DmaChTccMapping[phyCtrllerInstId][count] = EDMA3_MAX_TCC;
}
/* Initialize the global edma3QdmaChTccMapping array with EDMA3_MAX_TCC */
count++
)
{
- edma3QdmaChTccMapping[count] = EDMA3_MAX_TCC;
+ edma3QdmaChTccMapping[phyCtrllerInstId][count] = EDMA3_MAX_TCC;
}
- /* Make the global edma3IntrParams array for interrupts NULL */
- edma3MemSet((void *)(&(edma3IntrParams[0u])), 0x00u,
- sizeof(edma3IntrParams));
-
-
/* Reset edma3RmChBoundRes Array*/
for (count = 0u; count < EDMA3_MAX_LOGICAL_CH; count++)
{
}
/* Make the contiguousParamRes array NULL */
- edma3MemSet((void *)(&(contiguousParamRes[0u])), 0x00u,
+ edma3MemZero((void *)(&(contiguousParamRes[0u])),
sizeof(contiguousParamRes));
return result;
}
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_delete (unsigned int phyCtrllerInstId,
- * const void *param)
- * \brief Delete EDMA3 Resource Manager Object
- *
- * This API is used to delete the EDMA3 RM Object. It should be called
- * once for each EDMA3 hardware instance, ONLY after closing all the
- * previously opened EDMA3 RM Instances.
- *
- * After successful completion of this API, Resource Manager Object's state
- * changes to EDMA3_RM_DELETED.
- *
- * \param phyCtrllerInstId [IN] EDMA3 Phy Controller Instance Id (Hardware
- * instance id, starting from 0).
- * \param param [IN] For possible future use.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- */
EDMA3_RM_Result EDMA3_RM_delete (unsigned int phyCtrllerInstId,
const void *param)
{
resMgrObj[phyCtrllerInstId].state = EDMA3_RM_DELETED;
/* Reset the Allocated TCCs Array also. */
- allocatedTCCs[0u] = 0x0u;
- allocatedTCCs[1u] = 0x0u;
+ allocatedTCCs[phyCtrllerInstId][0u] = 0x0u;
+ allocatedTCCs[phyCtrllerInstId][1u] = 0x0u;
/* Also, reset the RM Object Global Config Info */
- edma3MemSet((void *)&(resMgrObj[phyCtrllerInstId].gblCfgParams),
- 0x00u,
+ edma3MemZero((void *)&(resMgrObj[phyCtrllerInstId].gblCfgParams),
sizeof(EDMA3_RM_GblConfigParams));
}
}
return result;
}
-
-/**\fn EDMA3_RM_Handle EDMA3_RM_open (unsigned int phyCtrllerInstId,
- * const EDMA3_RM_Param *initParam,
- * EDMA3_RM_Result *errorCode)
- * \brief Open EDMA3 Resource Manager Instance
- *
- * This API is used to open an EDMA3 Resource Manager Instance. It could be
- * called multiple times, for each possible EDMA3 shadow region. Maximum
- * EDMA3_MAX_RM_INSTANCES instances are allowed for each EDMA3 hardware
- * instance.
- *
- * Also, only ONE Master Resource Manager Instance is permitted. This master
- * instance (and hence the region to which it belongs) will only receive the
- * EDMA3 interrupts, if enabled.
- *
- * User could pass the instance specific configuration structure
- * (initParam->rmInstInitConfig) as a part of the 'initParam' structure,
- * during init-time. In case user doesn't provide it, this information could
- * be taken from the SoC specific configuration file edma3_<SOC_NAME>_cfg.c,
- * in case it is available.
- *
- * \param phyCtrllerInstId [IN] EDMA3 Controller Instance Id (Hardware
- * instance id, starting from 0).
- * \param initParam [IN] Used to Initialize the Resource Manager
- * Instance (Master or Slave).
- * \param errorCode [OUT] Error code while opening RM instance.
- *
- * \return Handle to the opened Resource Manager instance Or NULL in case of
- * error.
- *
- * \note This function disables the global interrupts (by calling API
- * edma3OsProtectEntry with protection level
- * EDMA3_OS_PROTECT_INTERRUPT) while modifying the global RM data
- * structures, to make it re-entrant.
- */
EDMA3_RM_Handle EDMA3_RM_open (unsigned int phyCtrllerInstId,
const EDMA3_RM_Param *initParam,
EDMA3_RM_Result *errorCode)
unsigned int paramSetDwrds = 0u;
unsigned int tccDwrds = 0u;
volatile EDMA3_CCRL_Regs *globalRegs = NULL;
- unsigned int mappedPaRAMId;
+
+#ifdef GENERIC
+ /* GENERIC libraries don't come with a default confifguration, always
+ needs to be supplied with a parameter */
+ if ((initParam == NULL) || (initParam->rmInstInitConfig == NULL))
+ {
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+#endif
+
/* If parameter checking is enabled... */
#ifndef EDMA3_RM_PARAM_CHECK_DISABLE
}
else
{
- edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT, &intState);
+ edma3OsProtectEntry (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ &intState);
/** Check state of RM Object.
* If no RM instance is opened and this is the first one,
(rmObj->state != EDMA3_RM_CLOSED)))
{
result = EDMA3_RM_E_INVALID_STATE;
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT, intState);
+ edma3OsProtectExit (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ intState);
}
else
{
&& (rmObj->state != EDMA3_RM_OPENED))
{
result = EDMA3_RM_E_INVALID_STATE;
- edma3OsProtectExit(EDMA3_OS_PROTECT_INTERRUPT,intState);
+ edma3OsProtectExit (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ intState);
}
else
{
if (rmObj->numOpens >= EDMA3_MAX_RM_INSTANCES)
{
result = EDMA3_RM_E_MAX_RM_INST_OPENED;
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT,
- intState);
+ edma3OsProtectExit (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ intState);
}
}
}
* or not. There should NOT be more than 1 master.
* Return error code if master already exists
*/
- if ((TRUE == masterExists) && (TRUE == initParam->isMaster))
+ if ((TRUE == masterExists[phyCtrllerInstId]) && (TRUE == initParam->isMaster))
{
/* No two masters should exist, return error */
result = EDMA3_RM_E_RM_MASTER_ALREADY_EXISTS;
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT, intState);
+ edma3OsProtectExit (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ intState);
}
else
{
rmInstance = temp_ptr_rm_inst;
/* Also make this data structure NULL, just for safety. */
- edma3MemSet((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx),
- 0x00u,
+ edma3MemZero((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx),
sizeof(EDMA3_RM_InstanceInitConfig));
break;
if (NULL == rmInstance)
{
result = EDMA3_RM_E_MAX_RM_INST_OPENED;
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT, intState);
+ edma3OsProtectExit (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ intState);
}
else
{
* resMgrIdx specifies the RM instance number created just now.
* Use it to populate the userInitConfig [].
*/
+#ifndef GENERIC
if (NULL == initParam->rmInstInitConfig)
{
/* Take the info from the specific config file */
}
else
{
+#endif
/* User has passed the region specific info. */
edma3MemCpy((void *)((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx),
(const void *)(initParam->rmInstInitConfig),
sizeof (EDMA3_RM_InstanceInitConfig));
+#ifndef GENERIC
}
+#endif
rmInstance->initParam.rmInstInitConfig =
((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx);
dmaChDwrds = rmObj->gblCfgParams.numDmaChannels / 32u;
+ if (dmaChDwrds == 0)
+ {
+ /* In case DMA channels are < 32 */
+ dmaChDwrds = 1;
+ }
+
paramSetDwrds = rmObj->gblCfgParams.numPaRAMSets / 32u;
+ if (paramSetDwrds == 0)
+ {
+ /* In case PaRAM Sets are < 32 */
+ paramSetDwrds = 1;
+ }
+
tccDwrds = rmObj->gblCfgParams.numTccs / 32u;
+ if (tccDwrds == 0)
+ {
+ /* In case TCCs are < 32 */
+ tccDwrds = 1;
+ }
for (resMgrIdx = 0u; resMgrIdx < dmaChDwrds; ++resMgrIdx)
{
}
/*
- * If mapping exists b/w DMA channel and PaRAM set (i.e. programmable),
- * then mark those PaRAM sets which are mapped to some specific
- * DMA channels as RESERVED. If NO mapping (ie ch 0 is tied to PaRAM 0,
- * ch 1 is tied to PaRAM 1), mark all as RESERVED.
- */
- if (rmObj->gblCfgParams.dmaChPaRAMMapExists == TRUE)
- {
- /* Mapping Exists */
- for (resMgrIdx = 0u; resMgrIdx < rmObj->gblCfgParams.numDmaChannels; ++resMgrIdx)
- {
- mappedPaRAMId = rmObj->gblCfgParams.dmaChannelPaRAMMap[resMgrIdx];
- if (mappedPaRAMId != EDMA3_RM_CH_NO_PARAM_MAP)
- {
- /* Channel is mapped to a particular PaRAM Set, mark it as Reserved. */
- rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets[mappedPaRAMId/32u] |= (1u<<(mappedPaRAMId%32u));
- }
- }
- }
- else
+ * Mark the PaRAM Sets corresponding to DMA channels as RESERVED.
+ * For e.g. on a platform where only 32 DMA channels exist,
+ * mark the first 32 PaRAM Sets as reserved. These param sets
+ * will not be returned in case user requests for ANY link
+ * channel.
+ */
+ for (resMgrIdx = 0u; resMgrIdx < rmObj->gblCfgParams.numDmaChannels; ++resMgrIdx)
{
- /* Mapping Doesnot Exist, PaRAM Sets are 1-to-1 mapped, mark all as Reserved */
- for (resMgrIdx = 0u; resMgrIdx < dmaChDwrds; ++resMgrIdx)
- {
- rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets[resMgrIdx] = 0xFFFFFFFFu;
- }
+ rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets[resMgrIdx/32u] |= (1u<<(resMgrIdx%32u));
}
/*
{
/* Store the region id to use it in the ISRs */
edma3RegionId = rmInstance->initParam.regionId;
- masterExists = TRUE;
+ masterExists[phyCtrllerInstId] = TRUE;
}
if (TRUE == initParam->regionInitEnable)
result = EDMA3_RM_E_INVALID_PARAM;
}
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT, intState);
+ edma3OsProtectExit (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ intState);
}
}
}
return (EDMA3_RM_Handle)retVal;
}
-
-/**\fn EDMA3_RM_Result EDMA3_RM_close (EDMA3_RM_Handle hEdmaResMgr,
- * const void *param)
- * \brief Close EDMA3 Resource Manager Instance
- *
- * This API is used to close a previously opened EDMA3 RM Instance.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param param [IN] For possible future use.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function disables the global interrupts (by calling API
- * edma3OsProtectEntry with protection level
- * EDMA3_OS_PROTECT_INTERRUPT) while modifying the global RM data
- * structures, to make it re-entrant.
- */
EDMA3_RM_Result EDMA3_RM_close (EDMA3_RM_Handle hEdmaResMgr,
const void *param)
{
/**
* If this is the Master Instance, reset the static variable
- * 'masterExists'.
+ * 'masterExists[]'.
*/
if (TRUE == rmInstance->initParam.isMaster)
{
- masterExists = FALSE;
+ masterExists[rmObj->phyCtrllerInstId] = FALSE;
edma3RegionId = EDMA3_MAX_REGIONS;
}
/* Reset the Initparam for this RM Instance */
- edma3MemSet((void *)&(rmInstance->initParam) , 0x00u,
+ edma3MemZero((void *)&(rmInstance->initParam),
sizeof(EDMA3_RM_Param));
/* Critical section starts */
- edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT, &intState);
+ edma3OsProtectEntry (rmObj->phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ &intState);
/* Decrease the Number of Opens */
--rmObj->numOpens;
if (NULL == rmObj->numOpens)
{
- edma3MemSet((void *)&(edma3RmChBoundRes[rmObj->phyCtrllerInstId]), 0x00u,
- sizeof(edma3RmChBoundRes));
+ edma3MemZero((void *)&(edma3RmChBoundRes[rmObj->phyCtrllerInstId]),
+ sizeof(edma3RmChBoundRes[rmObj->phyCtrllerInstId]));
rmObj->state = EDMA3_RM_CLOSED;
}
/* Critical section ends */
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT, intState);
+ edma3OsProtectExit (rmObj->phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ intState);
rmInstance->pResMgrObjHandle = NULL;
rmInstance->shadowRegs = NULL;
return result;
}
-
-/**\fn EDMA3_RM_Result EDMA3_RM_allocResource (EDMA3_RM_Handle hEdmaResMgr,
- * EDMA3_RM_ResDesc *resObj)
- * \brief This API is used to allocate specified EDMA3 Resources like
- * DMA/QDMA channel, PaRAM Set or TCC.
- *
- * Note: To free the resources allocated by this API, user should call
- * EDMA3_RM_freeResource () ONLY to de-allocate all the allocated resources.
- *
- * User can either request a specific resource by passing the resource id
- * in 'resObj->resId' OR request ANY available resource of the type
- * 'resObj->type'.
- *
- * ANY types of resources are those resources when user doesn't care about the
- * actual resource allocated; user just wants a resource of the type specified.
- * One use-case is to perform memory-to-memory data transfer operation. This
- * operation can be performed using any available DMA or QDMA channel.
- * User doesn't need any specific channel for the same.
- *
- * To allocate a specific resource, first this API checks whether that resource
- * is OWNED by the Resource Manager instance. Then it checks the current
- * availability of that resource.
- *
- * To allocate ANY available resource, this API tries to allocate a resource
- * from the pool of (owned && non_reserved && available_right_now) resources.
- *
- * After allocating a DMA/QDMA channel or TCC, the same resource is enabled in
- * the shadow region specific register (DRAE/DRAEH/QRAE).
- *
- * Allocated PaRAM Set is initialized to NULL before this API returns if user
- * has requested for one.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param resObj [IN/OUT] Handle to the resource descriptor
- * object, which needs to be allocated.
- * In case user passes a specific resource
- * Id, resObj value is left unchanged.
- * In case user requests ANY available
- * resource, the allocated resource id is
- * returned in resObj.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function acquires a RM Instance specific semaphore
- * to prevent simultaneous access to the global pool of resources.
- * It is re-entrant, but should not be called from the user callback
- * function (ISR context).
- */
EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_ResDesc *resObj)
{
unsigned int resIdSet = 0x0;
unsigned int resId;
volatile EDMA3_CCRL_Regs *gblRegs = NULL;
-
+ unsigned int mapXbarEvtToChanFlag = FALSE;
+ unsigned int xBarEvtBeforeMap = 0;
+ unsigned int edma3Id;
+
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
- EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
- EDMA3_DVT_dCOUNTER,
- EDMA3_DVT_dNONE,
- EDMA3_DVT_dNONE));
-#endif /* EDMA3_INSTRUMENTATION_ENABLED */
-
- /* If parameter checking is enabled... */
-#ifndef EDMA3_RM_PARAM_CHECK_DISABLE
- if ((hEdmaResMgr == NULL) || (resObj == NULL))
- {
- result = (EDMA3_RM_E_INVALID_PARAM);
- }
-#endif
-
- /* Check if the parameters are OK. */
- if (EDMA3_RM_SOK == result)
- {
- rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
- rmObj = rmInstance->pResMgrObjHandle;
-
- if ((rmObj == NULL) ||
- (rmObj->gblCfgParams.globalRegs == NULL))
- {
- result = (EDMA3_RM_E_INVALID_PARAM);
- }
- else
- {
- gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
-
- resId = resObj->resId;
-
- resIdClr = (unsigned int)(~(1u << (resId%32u)));
- resIdSet = (1u << (resId%32u));
-
- /**
- * Take the instance specific semaphore, to prevent simultaneous
- * access to the shared resources.
- */
- semResult = edma3OsSemTake(rmInstance->initParam.rmSemHandle,
- EDMA3_OSSEM_NO_TIMEOUT);
- if (EDMA3_RM_SOK == semResult)
- {
- switch (resObj->type)
- {
- case EDMA3_RM_RES_DMA_CHANNEL :
- {
- if (resId == EDMA3_RM_RES_ANY)
- {
- for (avlblIdx=0u;
- avlblIdx <
- rmObj->gblCfgParams.numDmaChannels;
- ++avlblIdx)
- {
- if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[avlblIdx/32u])
- &
- (rmInstance->avlblDmaChannels[avlblIdx/32u])
- &
- ~(rmInstance->initParam.rmInstInitConfig->resvdDmaChannels[avlblIdx/32u])
- &
- (1u << (avlblIdx%32u))) != FALSE)
- {
- /*
- * Match found.
- * A resource which is owned by this instance of the
- * Resource Manager and which is presently available
- * and which has not been reserved - is found.
- */
- resObj->resId = avlblIdx;
- /*
- * Mark the 'match found' resource as "Not Available"
- * for future requests
- */
- rmInstance->avlblDmaChannels[avlblIdx/32u] &= (unsigned int)(~(1u << (avlblIdx%32u)));
-
- /**
- * Check if the register modification flag is
- * set or not.
- */
- if (TRUE == rmInstance->regModificationRequired)
- {
- /**
- * Enable the DMA channel in the
- * DRAE/DRAEH registers also.
- */
- if (avlblIdx < 32u)
- {
- gblRegs->DRA[rmInstance->initParam.regionId].DRAE
- |= (0x1u << avlblIdx);
- }
- else
- {
- gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
- |= (0x1u << (avlblIdx - 32u));
- }
- }
-
- result = EDMA3_RM_SOK;
- break;
- }
- }
- /*
- * If none of the owned resources of this type is available
- * then report "All Resources of this type not available" error
- */
- if (avlblIdx == rmObj->gblCfgParams.numDmaChannels)
- {
- result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
- }
- }
- else
- {
- if (resId < rmObj->gblCfgParams.numDmaChannels)
- {
- /*
- * Check if specified resource is owned
- * by this instance of the resource manager
- */
- if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resId/32u])&(resIdSet))!=FALSE)
- {
- /* Now check if specified resource is available presently*/
- if (((rmInstance->avlblDmaChannels[resId/32u])&(resIdSet))!=FALSE)
- {
- /*
- * Mark the specified channel as "Not Available"
- * for future requests
- */
- rmInstance->avlblDmaChannels[resId/32u] &= resIdClr;
-
- /**
- * Check if the register modification flag is
- * set or not.
- */
- if (TRUE == rmInstance->regModificationRequired)
- {
- if (resId < 32u)
- {
- rmInstance->shadowRegs->EECR = (1UL << resId);
-
- /**
- * Enable the DMA channel in the
- * DRAE registers also.
- */
- gblRegs->DRA[rmInstance->initParam.regionId].DRAE
- |= (0x1u << resId);
- }
- else
- {
- rmInstance->shadowRegs->EECRH = (1UL << resId);
-
- /**
- * Enable the DMA channel in the
- * DRAEH registers also.
- */
- gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
- |= (0x1u << (resId - 32u));
- }
- }
-
- result = EDMA3_RM_SOK;
- }
- else
- {
- /* Specified resource is owned but is already booked */
- result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
- }
- }
- else
- {
- /*
- * Specified resource is not owned by this instance
- * of the Resource Manager
- */
- result = EDMA3_RM_E_RES_NOT_OWNED;
- }
- }
- else
- {
- result = EDMA3_RM_E_INVALID_PARAM;
- }
- }
- }
- break;
-
- case EDMA3_RM_RES_QDMA_CHANNEL :
- {
- if (resId == EDMA3_RM_RES_ANY)
- {
- for (avlblIdx=0u; avlblIdx<rmObj->gblCfgParams.numQdmaChannels; ++avlblIdx)
- {
- if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[avlblIdx/32u])
- &
- (rmInstance->avlblQdmaChannels[avlblIdx/32u])
- &
- ~(rmInstance->initParam.rmInstInitConfig->resvdQdmaChannels[avlblIdx/32u])
- &
- (1u << (avlblIdx%32u))) != FALSE)
- {
- resObj->resId = avlblIdx;
- rmInstance->avlblQdmaChannels[avlblIdx/32u] &= (unsigned int)(~(1u << (avlblIdx%32u)));
-
- /**
- * Check if the register modification flag is
- * set or not.
- */
- if (TRUE == rmInstance->regModificationRequired)
- {
- /**
- * Enable the QDMA channel in the
- * QRAE register also.
- */
- gblRegs->QRAE[rmInstance->initParam.regionId]
- |= (0x1u << avlblIdx);
- }
-
- result = EDMA3_RM_SOK;
- break;
- }
- }
- /*
- * If none of the owned resources of this type is available
- * then report "All Resources of this type not available" error
- */
- if (avlblIdx == rmObj->gblCfgParams.numQdmaChannels)
- {
- result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
- }
- }
- else
- {
- if (resId < rmObj->gblCfgParams.numQdmaChannels)
- {
- if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels [resId/32u])&(resIdSet))!=FALSE)
- {
- if (((rmInstance->avlblQdmaChannels [resId/32u])&(resIdSet))!=FALSE)
- {
- rmInstance->avlblQdmaChannels [resId/32u] &= resIdClr;
-
- /**
- * Check if the register modification flag is
- * set or not.
- */
- if (TRUE == rmInstance->regModificationRequired)
- {
- /**
- * Enable the QDMA channel in the
- * QRAE register also.
- */
- gblRegs->QRAE[rmInstance->initParam.regionId]
- |= (0x1u << resId);
- }
-
- result = EDMA3_RM_SOK;
- }
- else
- {
- /* Specified resource is owned but is already booked */
- result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
- }
- }
- else
- {
- /*
- * Specified resource is not owned by this instance
- * of the Resource Manager
- */
- result = EDMA3_RM_E_RES_NOT_OWNED;
- }
- }
- else
- {
- result = EDMA3_RM_E_INVALID_PARAM;
- }
- }
- }
- break;
-
- case EDMA3_RM_RES_TCC :
- {
- if (resId == EDMA3_RM_RES_ANY)
- {
- for (avlblIdx=0u; avlblIdx<rmObj->gblCfgParams.numTccs; ++avlblIdx)
- {
- if (((rmInstance->initParam.rmInstInitConfig->ownTccs [avlblIdx/32u])
- & (rmInstance->avlblTccs [avlblIdx/32u])
- & ~(rmInstance->initParam.rmInstInitConfig->resvdTccs [avlblIdx/32u])
- & (1u << (avlblIdx%32u)))!=FALSE)
- {
- resObj->resId = avlblIdx;
- rmInstance->avlblTccs [avlblIdx/32u] &= (unsigned int)(~(1u << (avlblIdx%32u)));
-
- /**
- * Check if the register modification flag is
- * set or not.
- */
- if (TRUE == rmInstance->regModificationRequired)
- {
- /**
- * Enable the Interrupt channel in the
- * DRAE/DRAEH registers also.
- * Also, If the region id coming from this
- * RM instance is same as the Master RM
- * Instance's region id, only then we will be
- * getting the interrupts on the same side.
- * So save the TCC in the allocatedTCCs[] array.
- */
- if (avlblIdx < 32u)
- {
- gblRegs->DRA[rmInstance->initParam.regionId].DRAE
- |= (0x1u << avlblIdx);
-
- /**
- * Do not modify this global array if the register
- * modificatio flag is not set.
- * Reason being is based on this flag, the IPR/ICR
- * or error bit is cleared in the completion or
- * error handler ISR.
- */
- if (edma3RegionId == rmInstance->initParam.regionId)
- {
- allocatedTCCs[0u] |= (0x1u << avlblIdx);
- }
- }
- else
- {
- gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
- |= (0x1u << (avlblIdx - 32u));
-
- /**
- * Do not modify this global array if the register
- * modificatio flag is not set.
- * Reason being is based on this flag, the IPR/ICR
- * or error bit is cleared in the completion or
- * error handler ISR.
- */
- if (edma3RegionId == rmInstance->initParam.regionId)
- {
- allocatedTCCs[1u] |= (0x1u << (avlblIdx - 32u));
- }
- }
- }
-
-
- result = EDMA3_RM_SOK;
- break;
- }
- }
- /*
- * If none of the owned resources of this type is available
- * then report "All Resources of this type not available" error
- */
- if ( avlblIdx == rmObj->gblCfgParams.numTccs)
- {
- result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
- }
- }
- else
- {
- if (resId < rmObj->gblCfgParams.numTccs)
- {
- if (((rmInstance->initParam.rmInstInitConfig->ownTccs [resId/32u])&(resIdSet))!=FALSE)
- {
- if (((rmInstance->avlblTccs [resId/32u])&(resIdSet))!=FALSE)
- {
- rmInstance->avlblTccs [resId/32u] &= resIdClr;
-
- /**
- * Check if the register modification flag is
- * set or not.
- */
- if (TRUE == rmInstance->regModificationRequired)
- {
- /**
- * Enable the Interrupt channel in the
- * DRAE/DRAEH registers also.
- * Also, If the region id coming from this
- * RM instance is same as the Master RM
- * Instance's region id, only then we will be
- * getting the interrupts on the same side.
- * So save the TCC in the allocatedTCCs[] array.
- */
- if (resId < 32u)
- {
- gblRegs->DRA[rmInstance->initParam.regionId].DRAE
- |= (0x1u << resId);
-
- /**
- * Do not modify this global array if the register
- * modificatio flag is not set.
- * Reason being is based on this flag, the IPR/ICR
- * or error bit is cleared in the completion or
- * error handler ISR.
- */
- if (edma3RegionId == rmInstance->initParam.regionId)
- {
- allocatedTCCs[0u] |= (0x1u << resId);
- }
- }
- else
- {
- gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
- |= (0x1u << (resId - 32u));
-
- /**
- * Do not modify this global array if the register
- * modificatio flag is not set.
- * Reason being is based on this flag, the IPR/ICR
- * or error bit is cleared in the completion or
- * error handler ISR.
- */
- if (edma3RegionId == rmInstance->initParam.regionId)
- {
- allocatedTCCs[1u] |= (0x1u << (resId - 32u));
- }
- }
- }
-
- result = EDMA3_RM_SOK;
- }
- else
- {
- /* Specified resource is owned but is already booked */
- result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
- }
- }
- else
- {
- /*
- * Specified resource is not owned by this instance
- * of the Resource Manager
- */
- result = EDMA3_RM_E_RES_NOT_OWNED;
- }
- }
- else
- {
- result = EDMA3_RM_E_INVALID_PARAM;
- }
- }
- }
- break;
-
- case EDMA3_RM_RES_PARAM_SET :
- {
- if (resId == EDMA3_RM_RES_ANY)
- {
- for (avlblIdx=0u; avlblIdx<rmObj->gblCfgParams.numPaRAMSets; ++avlblIdx)
- {
- if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [avlblIdx/32u])
- &
- (rmInstance->avlblPaRAMSets [avlblIdx/32u])
- &
- ~(rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets [avlblIdx/32u])
- &
- (1u << (avlblIdx%32u)))!=FALSE)
- {
- resObj->resId = avlblIdx;
- rmInstance->avlblPaRAMSets [avlblIdx/32u] &= (unsigned int)(~(1u << (avlblIdx%32u)));
+ EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
+ EDMA3_DVT_dCOUNTER,
+ EDMA3_DVT_dNONE,
+ EDMA3_DVT_dNONE));
+#endif /* EDMA3_INSTRUMENTATION_ENABLED */
- /**
- * Also, make the actual PARAM Set NULL, checking the flag
- * whether it is required or not.
- */
- if ((TRUE == rmInstance->regModificationRequired)
- && (TRUE == rmInstance->paramInitRequired))
- {
- edma3MemSet((void *)(&gblRegs->PARAMENTRY[avlblIdx]),
- 0x00u,
- sizeof(gblRegs->PARAMENTRY[avlblIdx]));
- }
+ /* If parameter checking is enabled... */
+#ifndef EDMA3_RM_PARAM_CHECK_DISABLE
+ if ((hEdmaResMgr == NULL) || (resObj == NULL))
+ {
+ result = (EDMA3_RM_E_INVALID_PARAM);
+ }
+#endif
- result = EDMA3_RM_SOK;
- break;
- }
- }
- /*
- * If none of the owned resources of this type is available
- * then report "All Resources of this type not available" error
- */
- if ( avlblIdx == rmObj->gblCfgParams.numPaRAMSets)
- {
- result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
- }
- }
- else
- {
- if (resId < rmObj->gblCfgParams.numPaRAMSets)
- {
- if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [resId/32u])&(resIdSet))!=FALSE)
- {
- if (((rmInstance->avlblPaRAMSets [resId/32u])&(resIdSet)) !=FALSE)
- {
- rmInstance->avlblPaRAMSets [resId/32u] &= resIdClr;
+ /* Check if the parameters are OK. */
+ if (EDMA3_RM_SOK == result)
+ {
+ rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
+ rmObj = rmInstance->pResMgrObjHandle;
- /**
- * Also, make the actual PARAM Set NULL, checking the flag
- * whether it is required or not.
- */
- if ((TRUE == rmInstance->regModificationRequired)
- && (TRUE == rmInstance->paramInitRequired))
- {
- edma3MemSet((void *)(&gblRegs->PARAMENTRY[resId]),
- 0x00u,
- sizeof(gblRegs->PARAMENTRY[resId]));
- }
+ if ((rmObj == NULL) ||
+ (rmObj->gblCfgParams.globalRegs == NULL))
+ {
+ result = (EDMA3_RM_E_INVALID_PARAM);
+ }
+ else
+ {
+ gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
+ edma3Id = rmObj->phyCtrllerInstId;
+ resId = resObj->resId;
- result = EDMA3_RM_SOK;
- }
- else
- {
- /* Specified resource is owned but is already booked */
- result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
- }
- }
- else
- {
- /*
- * Specified resource is not owned by this instance
- * of the Resource Manager
- */
- result = EDMA3_RM_E_RES_NOT_OWNED;
- }
- }
- else
- {
- result = EDMA3_RM_E_INVALID_PARAM;
- }
- }
- }
- break;
+ resIdClr = (unsigned int)(~(1u << (resId%32u)));
+ resIdSet = (1u << (resId%32u));
- default:
- result = EDMA3_RM_E_INVALID_PARAM;
- break;
+ if ( rmInstance->mapXbarToChan != NULL)
+ {
+ xBarEvtBeforeMap = resId;
+ if ((resId > rmObj->gblCfgParams.numDmaChannels) &&
+ (resId != EDMA3_RM_RES_ANY) &&
+ (resObj->type == EDMA3_RM_RES_DMA_CHANNEL))
+ {
+ result = rmInstance->mapXbarToChan(xBarEvtBeforeMap,
+ &resObj->resId,
+ &rmInstance->rmXbarToEvtMapConfig);
+ if (EDMA3_RM_SOK == result)
+ {
+ resId = resObj->resId;
+ mapXbarEvtToChanFlag = TRUE;
+ }
}
-
- /* Return the semaphore back */
- semResult = edma3OsSemGive(rmInstance->initParam.rmSemHandle);
}
- }
+
+ if (result == EDMA3_RM_SOK)
+ {
+ /**
+ * Take the instance specific semaphore, to prevent simultaneous
+ * access to the shared resources.
+ */
+ semResult = edma3OsSemTake(rmInstance->initParam.rmSemHandle,
+ EDMA3_OSSEM_NO_TIMEOUT);
+ if (EDMA3_RM_SOK == semResult)
+ {
+ switch (resObj->type)
+ {
+ case EDMA3_RM_RES_DMA_CHANNEL :
+ {
+ if (resId == EDMA3_RM_RES_ANY)
+ {
+ for (avlblIdx=0u;
+ avlblIdx <
+ rmObj->gblCfgParams.numDmaChannels;
+ ++avlblIdx)
+ {
+ if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[avlblIdx/32u])
+ &
+ (rmInstance->avlblDmaChannels[avlblIdx/32u])
+ &
+ ~(rmInstance->initParam.rmInstInitConfig->resvdDmaChannels[avlblIdx/32u])
+ &
+ (1u << (avlblIdx%32u))) != FALSE)
+ {
+ /*
+ * Match found.
+ * A resource which is owned by this instance of the
+ * Resource Manager and which is presently available
+ * and which has not been reserved - is found.
+ */
+ resObj->resId = avlblIdx;
+ /*
+ * Mark the 'match found' resource as "Not Available"
+ * for future requests
+ */
+ rmInstance->avlblDmaChannels[avlblIdx/32u] &= (unsigned int)(~(1u << (avlblIdx%32u)));
+
+ /**
+ * Check if the register modification flag is
+ * set or not.
+ */
+ if (TRUE == rmInstance->regModificationRequired)
+ {
+ /**
+ * Enable the DMA channel in the
+ * DRAE/DRAEH registers also.
+ */
+ if (avlblIdx < 32u)
+ {
+ gblRegs->DRA[rmInstance->initParam.regionId].DRAE
+ |= (0x1u << avlblIdx);
+ }
+ else
+ {
+ gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
+ |= (0x1u << (avlblIdx - 32u));
+ }
+ }
+
+ result = EDMA3_RM_SOK;
+ break;
+ }
+ }
+ /*
+ * If none of the owned resources of this type is available
+ * then report "All Resources of this type not available" error
+ */
+ if (avlblIdx == rmObj->gblCfgParams.numDmaChannels)
+ {
+ result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
+ }
+ }
+ else
+ {
+ if (resId < rmObj->gblCfgParams.numDmaChannels)
+ {
+ /*
+ * Check if specified resource is owned
+ * by this instance of the resource manager
+ */
+ if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resId/32u])&(resIdSet))!=FALSE)
+ {
+ /* Now check if specified resource is available presently*/
+ if (((rmInstance->avlblDmaChannels[resId/32u])&(resIdSet))!=FALSE)
+ {
+ /*
+ * Mark the specified channel as "Not Available"
+ * for future requests
+ */
+ rmInstance->avlblDmaChannels[resId/32u] &= resIdClr;
+
+ /**
+ * Check if the register modification flag is
+ * set or not.
+ */
+ if (TRUE == rmInstance->regModificationRequired)
+ {
+ if (resId < 32u)
+ {
+ rmInstance->shadowRegs->EECR = (1UL << resId);
+
+ /**
+ * Enable the DMA channel in the
+ * DRAE registers also.
+ */
+ gblRegs->DRA[rmInstance->initParam.regionId].DRAE
+ |= (0x1u << resId);
+ }
+ else
+ {
+ rmInstance->shadowRegs->EECRH = (1UL << resId);
+
+ /**
+ * Enable the DMA channel in the
+ * DRAEH registers also.
+ */
+ gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
+ |= (0x1u << (resId - 32u));
+ }
+ }
+
+ result = EDMA3_RM_SOK;
+ }
+ else
+ {
+ /* Specified resource is owned but is already booked */
+ result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
+ }
+ }
+ else
+ {
+ /*
+ * Specified resource is not owned by this instance
+ * of the Resource Manager
+ */
+ result = EDMA3_RM_E_RES_NOT_OWNED;
+ }
+ }
+ else
+ {
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+ }
+ }
+ break;
+
+ case EDMA3_RM_RES_QDMA_CHANNEL :
+ {
+ if (resId == EDMA3_RM_RES_ANY)
+ {
+ for (avlblIdx=0u; avlblIdx<rmObj->gblCfgParams.numQdmaChannels; ++avlblIdx)
+ {
+ if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[avlblIdx/32u])
+ &
+ (rmInstance->avlblQdmaChannels[avlblIdx/32u])
+ &
+ ~(rmInstance->initParam.rmInstInitConfig->resvdQdmaChannels[avlblIdx/32u])
+ &
+ (1u << (avlblIdx%32u))) != FALSE)
+ {
+ resObj->resId = avlblIdx;
+ rmInstance->avlblQdmaChannels[avlblIdx/32u] &= (unsigned int)(~(1u << (avlblIdx%32u)));
+
+ /**
+ * Check if the register modification flag is
+ * set or not.
+ */
+ if (TRUE == rmInstance->regModificationRequired)
+ {
+ /**
+ * Enable the QDMA channel in the
+ * QRAE register also.
+ */
+ gblRegs->QRAE[rmInstance->initParam.regionId]
+ |= (0x1u << avlblIdx);
+ }
+
+ result = EDMA3_RM_SOK;
+ break;
+ }
+ }
+ /*
+ * If none of the owned resources of this type is available
+ * then report "All Resources of this type not available" error
+ */
+ if (avlblIdx == rmObj->gblCfgParams.numQdmaChannels)
+ {
+ result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
+ }
+ }
+ else
+ {
+ if (resId < rmObj->gblCfgParams.numQdmaChannels)
+ {
+ if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels [resId/32u])&(resIdSet))!=FALSE)
+ {
+ if (((rmInstance->avlblQdmaChannels [resId/32u])&(resIdSet))!=FALSE)
+ {
+ rmInstance->avlblQdmaChannels [resId/32u] &= resIdClr;
+
+ /**
+ * Check if the register modification flag is
+ * set or not.
+ */
+ if (TRUE == rmInstance->regModificationRequired)
+ {
+ /**
+ * Enable the QDMA channel in the
+ * QRAE register also.
+ */
+ gblRegs->QRAE[rmInstance->initParam.regionId]
+ |= (0x1u << resId);
+ }
+
+ result = EDMA3_RM_SOK;
+ }
+ else
+ {
+ /* Specified resource is owned but is already booked */
+ result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
+ }
+ }
+ else
+ {
+ /*
+ * Specified resource is not owned by this instance
+ * of the Resource Manager
+ */
+ result = EDMA3_RM_E_RES_NOT_OWNED;
+ }
+ }
+ else
+ {
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+ }
+ }
+ break;
+
+ case EDMA3_RM_RES_TCC :
+ {
+ if (resId == EDMA3_RM_RES_ANY)
+ {
+ for (avlblIdx=0u; avlblIdx<rmObj->gblCfgParams.numTccs; ++avlblIdx)
+ {
+ if (((rmInstance->initParam.rmInstInitConfig->ownTccs [avlblIdx/32u])
+ & (rmInstance->avlblTccs [avlblIdx/32u])
+ & ~(rmInstance->initParam.rmInstInitConfig->resvdTccs [avlblIdx/32u])
+ & (1u << (avlblIdx%32u)))!=FALSE)
+ {
+ resObj->resId = avlblIdx;
+ rmInstance->avlblTccs [avlblIdx/32u] &= (unsigned int)(~(1u << (avlblIdx%32u)));
+
+ /**
+ * Check if the register modification flag is
+ * set or not.
+ */
+ if (TRUE == rmInstance->regModificationRequired)
+ {
+ /**
+ * Enable the Interrupt channel in the
+ * DRAE/DRAEH registers also.
+ * Also, If the region id coming from this
+ * RM instance is same as the Master RM
+ * Instance's region id, only then we will be
+ * getting the interrupts on the same side.
+ * So save the TCC in the allocatedTCCs[] array.
+ */
+ if (avlblIdx < 32u)
+ {
+ gblRegs->DRA[rmInstance->initParam.regionId].DRAE
+ |= (0x1u << avlblIdx);
+
+ /**
+ * Do not modify this global array if the register
+ * modificatio flag is not set.
+ * Reason being is based on this flag, the IPR/ICR
+ * or error bit is cleared in the completion or
+ * error handler ISR.
+ */
+ if (edma3RegionId == rmInstance->initParam.regionId)
+ {
+ allocatedTCCs[edma3Id][0u] |= (0x1u << avlblIdx);
+ }
+ }
+ else
+ {
+ gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
+ |= (0x1u << (avlblIdx - 32u));
+
+ /**
+ * Do not modify this global array if the register
+ * modificatio flag is not set.
+ * Reason being is based on this flag, the IPR/ICR
+ * or error bit is cleared in the completion or
+ * error handler ISR.
+ */
+ if (edma3RegionId == rmInstance->initParam.regionId)
+ {
+ allocatedTCCs[edma3Id][1u] |= (0x1u << (avlblIdx - 32u));
+ }
+ }
+ }
+
+
+ result = EDMA3_RM_SOK;
+ break;
+ }
+ }
+ /*
+ * If none of the owned resources of this type is available
+ * then report "All Resources of this type not available" error
+ */
+ if ( avlblIdx == rmObj->gblCfgParams.numTccs)
+ {
+ result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
+ }
+ }
+ else
+ {
+ if (resId < rmObj->gblCfgParams.numTccs)
+ {
+ if (((rmInstance->initParam.rmInstInitConfig->ownTccs [resId/32u])&(resIdSet))!=FALSE)
+ {
+ if (((rmInstance->avlblTccs [resId/32u])&(resIdSet))!=FALSE)
+ {
+ rmInstance->avlblTccs [resId/32u] &= resIdClr;
+
+ /**
+ * Check if the register modification flag is
+ * set or not.
+ */
+ if (TRUE == rmInstance->regModificationRequired)
+ {
+ /**
+ * Enable the Interrupt channel in the
+ * DRAE/DRAEH registers also.
+ * Also, If the region id coming from this
+ * RM instance is same as the Master RM
+ * Instance's region id, only then we will be
+ * getting the interrupts on the same side.
+ * So save the TCC in the allocatedTCCs[] array.
+ */
+ if (resId < 32u)
+ {
+ gblRegs->DRA[rmInstance->initParam.regionId].DRAE
+ |= (0x1u << resId);
+
+ /**
+ * Do not modify this global array if the register
+ * modificatio flag is not set.
+ * Reason being is based on this flag, the IPR/ICR
+ * or error bit is cleared in the completion or
+ * error handler ISR.
+ */
+ if (edma3RegionId == rmInstance->initParam.regionId)
+ {
+ allocatedTCCs[edma3Id][0u] |= (0x1u << resId);
+ }
+ }
+ else
+ {
+ gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
+ |= (0x1u << (resId - 32u));
+
+ /**
+ * Do not modify this global array if the register
+ * modificatio flag is not set.
+ * Reason being is based on this flag, the IPR/ICR
+ * or error bit is cleared in the completion or
+ * error handler ISR.
+ */
+ if (edma3RegionId == rmInstance->initParam.regionId)
+ {
+ allocatedTCCs[edma3Id][1u] |= (0x1u << (resId - 32u));
+ }
+ }
+ }
+
+ result = EDMA3_RM_SOK;
+ }
+ else
+ {
+ /* Specified resource is owned but is already booked */
+ result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
+ }
+ }
+ else
+ {
+ /*
+ * Specified resource is not owned by this instance
+ * of the Resource Manager
+ */
+ result = EDMA3_RM_E_RES_NOT_OWNED;
+ }
+ }
+ else
+ {
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+ }
+ }
+ break;
+
+ case EDMA3_RM_RES_PARAM_SET :
+ {
+ if (resId == EDMA3_RM_RES_ANY)
+ {
+ for (avlblIdx=0u; avlblIdx<rmObj->gblCfgParams.numPaRAMSets; ++avlblIdx)
+ {
+ if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [avlblIdx/32u])
+ &
+ (rmInstance->avlblPaRAMSets [avlblIdx/32u])
+ &
+ ~(rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets [avlblIdx/32u])
+ &
+ (1u << (avlblIdx%32u)))!=FALSE)
+ {
+ resObj->resId = avlblIdx;
+ rmInstance->avlblPaRAMSets [avlblIdx/32u] &= (unsigned int)(~(1u << (avlblIdx%32u)));
+
+ /**
+ * Also, make the actual PARAM Set NULL, checking the flag
+ * whether it is required or not.
+ */
+ if ((TRUE == rmInstance->regModificationRequired)
+ && (TRUE == rmInstance->paramInitRequired))
+ {
+ edma3MemZero((void *)(&gblRegs->PARAMENTRY[avlblIdx]),
+ sizeof(gblRegs->PARAMENTRY[avlblIdx]));
+ }
+
+ result = EDMA3_RM_SOK;
+ break;
+ }
+ }
+ /*
+ * If none of the owned resources of this type is available
+ * then report "All Resources of this type not available" error
+ */
+ if ( avlblIdx == rmObj->gblCfgParams.numPaRAMSets)
+ {
+ result = EDMA3_RM_E_ALL_RES_NOT_AVAILABLE;
+ }
+ }
+ else
+ {
+ if (resId < rmObj->gblCfgParams.numPaRAMSets)
+ {
+ if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [resId/32u])&(resIdSet))!=FALSE)
+ {
+ if (((rmInstance->avlblPaRAMSets [resId/32u])&(resIdSet)) !=FALSE)
+ {
+ rmInstance->avlblPaRAMSets [resId/32u] &= resIdClr;
+
+ /**
+ * Also, make the actual PARAM Set NULL, checking the flag
+ * whether it is required or not.
+ */
+ if ((TRUE == rmInstance->regModificationRequired)
+ && (TRUE == rmInstance->paramInitRequired))
+ {
+ edma3MemZero((void *)(&gblRegs->PARAMENTRY[resId]),
+ sizeof(gblRegs->PARAMENTRY[resId]));
+ }
+
+ result = EDMA3_RM_SOK;
+ }
+ else
+ {
+ /* Specified resource is owned but is already booked */
+ result = EDMA3_RM_E_SPECIFIED_RES_NOT_AVAILABLE;
+ }
+ }
+ else
+ {
+ /*
+ * Specified resource is not owned by this instance
+ * of the Resource Manager
+ */
+ result = EDMA3_RM_E_RES_NOT_OWNED;
+ }
+ }
+ else
+ {
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+ }
+ }
+ break;
+
+ default:
+ result = EDMA3_RM_E_INVALID_PARAM;
+ break;
+ }
+
+ /* Return the semaphore back */
+ semResult = edma3OsSemGive(rmInstance->initParam.rmSemHandle);
+ }
+ }
+ }
}
/**
* Else, return semResult.
*/
if (EDMA3_RM_SOK == result)
- {
- /**
- * Resource Allocation successful, return semResult for returning
- * semaphore.
- */
- result = semResult;
- }
+ {
+ /**
+ * Resource Allocation successful, return semResult for returning
+ * semaphore.
+ */
+ result = semResult;
+ if ((rmInstance->configScrMapXbarToEvt != NULL) &&
+ (mapXbarEvtToChanFlag == TRUE))
+ {
+ rmInstance->configScrMapXbarToEvt(xBarEvtBeforeMap, resObj->resId);
+ }
+ }
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
return result;
}
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
- * const EDMA3_RM_ResDesc *resObj)
- * \brief This API is used to free previously allocated EDMA3 Resources like
- * DMA/QDMA channel, PaRAM Set or TCC.
- *
- * To free a specific resource, first this API checks whether that resource is
- * OWNED by the Resource Manager Instance. Then it checks whether that resource
- * has been allocated by the Resource Manager instance or not.
- *
- * After freeing a DMA/QDMA channel or TCC, the same resource is disabled in
- * the shadow region specific register (DRAE/DRAEH/QRAE).
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param resObj [IN] Handle to the resource descriptor
- * object, which needs to be freed.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function disables the global interrupts to prevent
- * simultaneous access to the global pool of resources.
- * It is re-entrant.
- */
EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
const EDMA3_RM_ResDesc *resObj)
{
unsigned int resId;
unsigned int resIdSet = 0x0;
volatile EDMA3_CCRL_Regs *gblRegs = NULL;
-
+ unsigned int edma3Id;
+
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
EDMA3_DVT_DESC(EDMA3_DVT_eFUNC_START,
else
{
gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
-
+ edma3Id = rmObj->phyCtrllerInstId;
resId = resObj->resId;
resIdSet = 1u << (resId%32u);
- edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT, &intState);
+ edma3OsProtectEntry (rmObj->phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ &intState);
if (EDMA3_RM_SOK == result)
{
if (edma3RegionId == rmInstance->initParam.regionId)
{
- allocatedTCCs[0u] &= (~(0x1u << resId));
+ allocatedTCCs[edma3Id][0u] &= (~(0x1u << resId));
}
}
else
if (edma3RegionId == rmInstance->initParam.regionId)
{
- allocatedTCCs[1u] &= (~(0x1u << (resId -32u)));
+ allocatedTCCs[edma3Id][1u] &= (~(0x1u << (resId -32u)));
}
}
}
}
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT, intState);
+ edma3OsProtectExit (rmObj->phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ intState);
}
}
return result;
}
-
-
-/**
- * \fn EDMA3_RM_Result EDMA3_RM_allocLogicalChannel(EDMA3_RM_Handle
- * hEdmaResMgr, EDMA3_RM_ResDesc *lChObj,
- * unsigned int *pParam, unsigned int *pTcc)
- * \brief Request a DMA/QDMA/Link channel.
- *
- * This API is used to allocate a logical channel (DMA/QDMA/Link) along with
- * the associated resources. For DMA and QDMA channels, TCC and PaRAM Set are
- * also allocated along with the requested channel. For Link channel, ONLY a
- * PaRAM Set is allocated.
- *
- * Note: To free the logical channel allocated by this API, user should call
- * EDMA3_RM_freeLogicalChannel () ONLY to de-allocate all the allocated resources
- * and remove certain mappings.
- *
- * User can request a specific logical channel by passing the channel id in
- * 'lChObj->resId' and channel type in 'lChObj->type'. Note that the channel
- * id is the same as the actual resource id. For e.g. in the case of QDMA
- * channels, valid channel ids are from 0 to 7 only.
- *
- * User can also request ANY available logical channel of the type
- * 'lChObj->type' by specifying 'lChObj->resId' as:
- * a) EDMA3_RM_DMA_CHANNEL_ANY: For DMA channels
- * b) EDMA3_RM_QDMA_CHANNEL_ANY: For QDMA channels, and
- * c) EDMA3_RM_PARAM_ANY: For Link channels. Normally user should use this
- * value to request link channels (PaRAM Sets used for linking purpose
- * only), unless he wants to use some specific link channels (PaRAM Sets)
- * which is also allowed.
- *
- * This API internally uses EDMA3_RM_allocResource () to allocate the desired
- * resources (DMA/QDMA channel, PaRAM Set and TCC).
- *
- * For DMA/QDMA channels, after allocating all the EDMA3 resources, this API
- * sets the TCC field of the OPT PaRAM Word with the allocated TCC.
- *
- * For DMA channel, it also sets the DCHMAP register, if required.
- *
- * For QDMA channel, it sets the QCHMAP register and CCNT as trigger word and
- * enables the QDMA channel by writing to the QEESR register.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param lChObj [IN/OUT] Handle to the requested logical channel
- * object, which needs to be allocated.
- * It could be a specific logical channel
- * or ANY available logical channel of the
- * requested type.
- * In case user passes a specific resource
- * Id, lChObj value is left unchanged. In
- * case user requests ANY available
- * resource, the allocated resource id is
- * returned in lChObj->resId.
- *
- * \param pParam [IN/OUT] PaRAM Set for a particular logical
- * (DMA/QDMA) channel. Not used if user
- * requested for a Link channel.
- * In case user passes a specific PaRAM
- * Set value, pParam value is left
- * unchanged. In case user requests ANY
- * available PaRAM Set, the allocated one
- * is returned in pParam.
- *
- * \param pTcc [IN/OUT] TCC for a particular logical (DMA/QDMA)
- * channel. Not used if user requested for
- * a Link channel.
- * In case user passes a specific TCC
- * value, pTcc value is left unchanged.
- * In case user requests ANY available TCC,
- * the allocated one is returned in pTcc
- *
- * \return EDMA3_RM_SOK or EDMA_RM Error Code
- *
- * \note This function internally calls EDMA3_RM_allocResource (), which
- * acquires a RM Instance specific semaphore to prevent simultaneous
- * access to the global pool of resources. It is re-entrant for unique
- * logical channel values, but SHOULD NOT be called from the user
- * callback function (ISR context).
- */
EDMA3_RM_Result EDMA3_RM_allocLogicalChannel(EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_ResDesc *lChObj,
unsigned int *pParam,
int paRAMId = (int)EDMA3_RM_RES_ANY;
volatile EDMA3_CCRL_Regs *gblRegs = NULL;
unsigned int qdmaChId = EDMA3_MAX_PARAM_SETS;
-
+ unsigned int edma3Id;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
if (result == EDMA3_RM_SOK)
{
+ edma3Id = rmObj->phyCtrllerInstId;
gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
switch (chObj->type)
}
else
{
- if (chObj->resId <= EDMA3_RM_DMA_CH_MAX_VAL)
+ if (chObj->resId <= edma3_dma_ch_max_val[edma3Id])
{
/* Request for a specific DMA channel */
resObj.type = EDMA3_RM_RES_DMA_CHANNEL;
chObj->resId = resObj.resId;
/* Save the Logical-QDMA channel id for future use. */
- qdmaChId = resObj.resId + EDMA3_RM_QDMA_CH_MIN_VAL;
+ qdmaChId = resObj.resId + edma3_qdma_ch_min_val[edma3Id];
/**
* Check the PaRAM Set user has specified for this QDMA channel.
}
else
{
- if (chObj->resId < EDMA3_MAX_QDMA_CH)
+ if (chObj->resId < rmObj->gblCfgParams.numQdmaChannels)
{
/* Request for a specific QDMA channel */
resObj.type = EDMA3_RM_RES_QDMA_CHANNEL;
if (result == EDMA3_RM_SOK)
{
/* Save the Logical-QDMA channel id for future use. */
- qdmaChId = chObj->resId + EDMA3_RM_QDMA_CH_MIN_VAL;
+ qdmaChId = chObj->resId + edma3_qdma_ch_min_val[edma3Id];
/**
* Check the PaRAM Set user has specified for this QDMA channel.
if (result == EDMA3_RM_SOK)
{
- unsigned int linkCh = EDMA3_RM_LINK_CH_MIN_VAL;
+ unsigned int linkCh = edma3_link_ch_min_val[edma3Id];
/* Return the actual PaRAM Id. */
chObj->resId = resObj.resId;
* It will be used for future operations on the Link channel.
*/
while ((edma3RmChBoundRes[rmObj->phyCtrllerInstId][linkCh].paRAMId != -1)
- && (linkCh <= EDMA3_RM_LINK_CH_MAX_VAL))
+ && (linkCh <= edma3_link_ch_max_val[edma3Id]))
{
/* Move to the next place-holder. */
linkCh++;
}
/* Verify the returned handle, it should lie in the correct range */
- if (linkCh > EDMA3_RM_LINK_CH_MAX_VAL)
+ if (linkCh > edma3_link_ch_max_val[edma3Id])
{
result = EDMA3_RM_E_INVALID_PARAM;
return result;
}
-
-/** \fn EDMA3_RM_Result EDMA3_RM_freeLogicalChannel (EDMA3_RM_Handle
- * hEdmaResMgr, EDMA3_RM_ResDesc *lChObj)
- * \brief This API is used to free the specified channel (DMA/QDMA/Link) and
- * its associated resources (PaRAM Set, TCC etc).
- *
- * This API internally uses EDMA3_RM_freeResource () to free the desired
- * resources.
- *
- * For DMA/QDMA channels, it also clears the DCHMAP/QCHMAP registers
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param lChObj [IN] Handle to the logical channel object,
- * which needs to be freed
- *
- * \return EDMA3_RM_SOK or EDMA_RM Error Code
- *
- * \note This is a re-entrant function which internally calls
- * EDMA3_RM_freeResource () for resource de-allocation.
- */
EDMA3_RM_Result EDMA3_RM_freeLogicalChannel (EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_ResDesc *lChObj)
{
unsigned int qdmaChId;
unsigned int dmaChId;
EDMA3_RM_InstanceInitConfig *rmConfig = NULL;
+ unsigned int edma3Id;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
}
else
{
+ edma3Id = rmObj->phyCtrllerInstId;
globalRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
}
}
* So we have to convert it to make the logical
* QDMA channel id first.
*/
- qdmaChId = chObj->resId + EDMA3_RM_QDMA_CH_MIN_VAL;
+ qdmaChId = chObj->resId + edma3_qdma_ch_min_val[edma3Id];
/**
* Validate QDMA channel id first.
if (result == EDMA3_RM_SOK)
{
/* PaRAM Set freed successfully. */
- unsigned int linkCh = EDMA3_RM_LINK_CH_MIN_VAL;
+ unsigned int linkCh = edma3_link_ch_min_val[edma3Id];
/* Reset the Logical-Link channel */
/* Search for the Logical-Link channel first */
- for (linkCh = EDMA3_RM_LINK_CH_MIN_VAL;
- linkCh < EDMA3_RM_LINK_CH_MAX_VAL;
+ for (linkCh = edma3_link_ch_min_val[edma3Id];
+ linkCh < edma3_link_ch_max_val[edma3Id];
linkCh++)
{
if (edma3RmChBoundRes[rmObj->phyCtrllerInstId][linkCh].paRAMId == chObj->resId)
return result;
}
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_mapEdmaChannel (EDMA3_RM_Handle
- * hEdmaResMgr, unsigned int channelId, unsigned int paRAMId)
- * \brief Bind the resources DMA Channel and PaRAM Set. Both the DMA channel
- * and the PaRAM set should be previously allocated. If they are not,
- * this API will result in error.
- *
- * This API sets the DCHMAP register for a specific DMA channel. This register
- * is used to specify the PaRAM Set associated with that particular DMA Channel.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param channelId [IN] Previously allocated DMA Channel on which
- * Transfer will occur.
- * \param paRAMId [IN] Previously allocated PaRAM Set which
- * needs to be associated with the dma channel.
- *
- * \return EDMA3_RM_SOK or EDMA_RM Error Code
- *
- * \note This API is useful only for the EDMA3 Controllers which have a
- * register for mapping a DMA Channel to a particular PaRAM Set
- * (DCHMAP register).
- * On platforms where this feature is not supported, this API
- * returns error code: EDMA3_RM_E_FEATURE_UNSUPPORTED.
- * This function is re-entrant for unique channelId. It is
- * non-re-entrant for same channelId values.
- */
EDMA3_RM_Result EDMA3_RM_mapEdmaChannel (EDMA3_RM_Handle hEdmaResMgr,
unsigned int channelId,
unsigned int paRAMId)
return result;
}
-
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_mapQdmaChannel (EDMA3_RM_Handle
- * hEdmaResMgr, unsigned int channelId,
- * unsigned int paRAMId,
- * EDMA3_RM_QdmaTrigWord trigWord)
- * \brief Bind the resources QDMA Channel and PaRAM Set. Also, Set the
- * trigger word for the QDMA channel. Both the QDMA channel and the PaRAM set
- * should be previously allocated. If they are not, this API will result in error.
- *
- * This API sets the QCHMAP register for a specific QDMA channel. This register
- * is used to specify the PaRAM Set associated with that particular QDMA
- * Channel along with the trigger word.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param channelId [IN] Previously allocated QDMA Channel on which
- * Transfer will occur.
- * \param paRAMId [IN] Previously allocated PaRAM Set, which needs to
- * be associated with channelId
- * \param trigWord [IN] The Trigger Word for the channel.
- * Trigger Word is the word in the PaRAM
- * Register Set which - when written to by CPU
- * -will start the QDMA transfer automatically
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant for unique channelId. It is non-re-entrant
- * for same channelId values.
- */
EDMA3_RM_Result EDMA3_RM_mapQdmaChannel (EDMA3_RM_Handle hEdmaResMgr,
unsigned int channelId,
unsigned int paRAMId,
return result;
}
-
-
-/**
- * \fn EDMA3_RM_Result EDMA3_RM_registerTccCb(EDMA3_RM_Handle hEdmaResMgr,
- * const EDMA3_RM_ResDesc *channelObj, unsigned int tcc,
- * EDMA3_RM_TccCallback tccCb, void *cbData);
- * \brief Register Interrupt / Completion Handler for a given TCC.
- *
- * This function enables the interrupts in IESR/IESRH, only if the callback
- * function provided by the user is NON-NULL. Moreover, if a call-back function
- * is already registered against that TCC, the API fails with the error code
- * EDMA3_RM_E_CALLBACK_ALREADY_REGISTERED. For a NULL callback function,
- * this API returns error.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened
- * EDMA3 Resource Manager Instance
- * \param channelObj [IN] Channel ID and type (DMA or QDMA
- * Channel), allocated earlier, and
- * corresponding to which a callback
- * function needs to be registered
- * against the associated TCC.
- * \param tcc [IN] TCC against which the handler needs to
- * be registered.
- * \param tccCb [IN] The Callback function to be registered
- * against the TCC.
- * \param cbData [IN] Callback data to be passed while calling
- * the callback function.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant for unique tcc values. It is non-
- * re-entrant for same tcc value.
- */
EDMA3_RM_Result EDMA3_RM_registerTccCb(EDMA3_RM_Handle hEdmaResMgr,
const EDMA3_RM_ResDesc *channelObj,
unsigned int tcc,
EDMA3_RM_Instance *rmInstance = NULL;
EDMA3_RM_Obj *rmObj = NULL;
EDMA3_RM_Result result = EDMA3_RM_SOK;
+ unsigned int edma3Id;
+ volatile EDMA3_CCRL_Regs *gblRegs = NULL;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
{
result = EDMA3_RM_E_INVALID_PARAM;
}
+ else
+ {
+ edma3Id = rmObj->phyCtrllerInstId;
+ gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
+ }
+ }
- /* If parameter checking is enabled... */
-#ifndef EDMA3_RM_PARAM_CHECK_DISABLE
- if ((EDMA3_RM_SOK == result) && (tcc >= rmObj->gblCfgParams.numTccs))
+ if (result == EDMA3_RM_SOK)
+ {
+ if ((gblRegs == NULL) || (tcc >= rmObj->gblCfgParams.numTccs))
{
result = EDMA3_RM_E_INVALID_PARAM;
}
-#endif
+ }
- /* Check if the parameters are OK. */
- if (EDMA3_RM_SOK == result)
+ /* Check if the parameters are OK. */
+ if (EDMA3_RM_SOK == result)
+ {
+ /* Check whether the callback has already registered. */
+ if (NULL != edma3IntrParams[edma3Id][tcc].tccCb)
+ {
+ result = EDMA3_RM_E_CALLBACK_ALREADY_REGISTERED;
+ }
+ else
{
- /* Check whether the callback has already registered. */
- if (NULL != edma3IntrParams[tcc].tccCb)
+ /* Store the mapping b/w DMA/QDMA channel and TCC first. */
+ if (channelObj->type == EDMA3_RM_RES_DMA_CHANNEL)
{
- result = EDMA3_RM_E_CALLBACK_ALREADY_REGISTERED;
+ /* DMA channel */
+ if (channelObj->resId < rmObj->gblCfgParams.numDmaChannels)
+ {
+ /* Save the TCC */
+ edma3DmaChTccMapping[edma3Id][channelObj->resId] = tcc;
+ }
+ else
+ {
+ /* Error!!! */
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
}
else
{
- /* Store the mapping b/w DMA/QDMA channel and TCC first. */
- if (channelObj->type == EDMA3_RM_RES_DMA_CHANNEL)
+ if (channelObj->type == EDMA3_RM_RES_QDMA_CHANNEL)
{
- /* DMA channel */
- if (channelObj->resId < rmObj->gblCfgParams.numDmaChannels)
+ /* QDMA channel */
+ if (channelObj->resId < rmObj->gblCfgParams.numQdmaChannels)
{
/* Save the TCC */
- edma3DmaChTccMapping[channelObj->resId] = tcc;
+ edma3QdmaChTccMapping[edma3Id][channelObj->resId] = tcc;
}
else
{
}
else
{
- if (channelObj->type == EDMA3_RM_RES_QDMA_CHANNEL)
- {
- /* QDMA channel */
- if (channelObj->resId < rmObj->gblCfgParams.numQdmaChannels)
- {
- /* Save the TCC */
- edma3QdmaChTccMapping[channelObj->resId] = tcc;
- }
- else
- {
- /* Error!!! */
- result = EDMA3_RM_E_INVALID_PARAM;
- }
- }
- else
- {
- /* Error!!! */
- result = EDMA3_RM_E_INVALID_PARAM;
- }
+ /* Error!!! */
+ result = EDMA3_RM_E_INVALID_PARAM;
}
}
+ }
+ }
- if (EDMA3_RM_SOK == result)
- {
- /**
- * Enable the interrupts in IESR/IESRH, only if the Callback
- * function is NOT NULL.
- */
- if (tcc < 32u)
- {
- rmInstance->shadowRegs->IESR = (1UL << tcc);
- }
- else
- {
- rmInstance->shadowRegs->IESRH = (1UL << (tcc-32u));
- }
+ if (EDMA3_RM_SOK == result)
+ {
- /* Save the callback functions also */
- edma3IntrParams[tcc].cbData = cbData;
- edma3IntrParams[tcc].tccCb = tccCb;
- }
+ /* Enable the interrupts in IESR/IESRH */
+ if (tcc < 32u)
+ {
+ rmInstance->shadowRegs->IESR = (1UL << tcc);
+ }
+ else
+ {
+ rmInstance->shadowRegs->IESRH = (1UL << (tcc-32u));
}
+
+ /* Save the callback functions also */
+ edma3IntrParams[edma3Id][tcc].cbData = cbData;
+ edma3IntrParams[edma3Id][tcc].tccCb = tccCb;
}
#ifdef EDMA3_INSTRUMENTATION_ENABLED
return result;
}
-
-
-
-/**
- * \fn EDMA3_RM_Result EDMA3_RM_unregisterTccCb(EDMA3_RM_Handle
- * hEdmaResMgr, const EDMA3_RM_ResDesc *channelObj);
- * \brief Unregister the previously registered callback function against a
- * DMA/QDMA channel.
- *
- * This function unregisters the previously registered callback function against
- * a DMA/QDMA channel by removing any stored callback function. Moreover, it
- * clears the interrupt enable register (IESR/IESRH) by writing to the IECR/
- * IECRH register, for the TCC associated with that particular channel.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened
- * EDMA3 Resource Manager Instance
- * \param channelObj [IN] Channel ID and type, allocated earlier
- * (DMA or QDMA Channel ONLY), and
- * corresponding to which a TCC is there.
- * Against that TCC, the callback needs
- * to be un-registered.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code.
- *
- * \note This function is re-entrant for unique (channelObj->type +
- * channelObj->resId) combination. It is non-re-entrant for same
- * channelObj Resource.
- */
EDMA3_RM_Result EDMA3_RM_unregisterTccCb(EDMA3_RM_Handle hEdmaResMgr,
const EDMA3_RM_ResDesc *channelObj)
{
EDMA3_RM_Obj *rmObj = NULL;
EDMA3_RM_Result result = EDMA3_RM_SOK;
unsigned int mappedTcc = EDMA3_MAX_TCC;
+ unsigned int edma3Id;
+ volatile EDMA3_CCRL_Regs *gblRegs = NULL;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
if (rmObj == NULL)
{
- result = EDMA3_RM_E_INVALID_PARAM;
- }
- else
- {
- if (channelObj->type == EDMA3_RM_RES_DMA_CHANNEL)
- {
- /* DMA channel */
- if (channelObj->resId < rmObj->gblCfgParams.numDmaChannels)
- {
- /* Save the mapped TCC */
- mappedTcc = edma3DmaChTccMapping[channelObj->resId];
-
- /* Remove the mapping now. */
- edma3DmaChTccMapping[channelObj->resId] = EDMA3_MAX_TCC;
- }
- else
- {
- /* Error!!! */
- result = EDMA3_RM_E_INVALID_PARAM;
- }
- }
- else
- {
- if (channelObj->type == EDMA3_RM_RES_QDMA_CHANNEL)
- {
- /* QDMA channel */
- if (channelObj->resId < rmObj->gblCfgParams.numQdmaChannels)
- {
- /* Save the mapped TCC */
- mappedTcc = edma3QdmaChTccMapping[channelObj->resId];
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+ else
+ {
+ edma3Id = rmObj->phyCtrllerInstId;
+ gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
+ }
+ }
- /* Remove the mapping now. */
- edma3QdmaChTccMapping[channelObj->resId] = EDMA3_MAX_TCC;
- }
- else
- {
- /* Error!!! */
- result = EDMA3_RM_E_INVALID_PARAM;
- }
- }
- else
- {
- /* Error!!! */
- result = EDMA3_RM_E_INVALID_PARAM;
- }
- }
+ if (result == EDMA3_RM_SOK)
+ {
+ if (gblRegs == NULL)
+ {
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+ else
+ {
+ if (channelObj->type == EDMA3_RM_RES_DMA_CHANNEL)
+ {
+ /* DMA channel */
+ if (channelObj->resId < rmObj->gblCfgParams.numDmaChannels)
+ {
+ /* Save the mapped TCC */
+ mappedTcc = edma3DmaChTccMapping[edma3Id][channelObj->resId];
+
+ /* Remove the mapping now. */
+ edma3DmaChTccMapping[edma3Id][channelObj->resId] = EDMA3_MAX_TCC;
+ }
+ else
+ {
+ /* Error!!! */
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+ }
+ else
+ {
+ if (channelObj->type == EDMA3_RM_RES_QDMA_CHANNEL)
+ {
+ /* QDMA channel */
+ if (channelObj->resId < rmObj->gblCfgParams.numQdmaChannels)
+ {
+ /* Save the mapped TCC */
+ mappedTcc = edma3QdmaChTccMapping[edma3Id][channelObj->resId];
+
+ /* Remove the mapping now. */
+ edma3QdmaChTccMapping[edma3Id][channelObj->resId] = EDMA3_MAX_TCC;
+ }
+ else
+ {
+ /* Error!!! */
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+ }
+ else
+ {
+ /* Error!!! */
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+ }
+ }
+ }
- if (EDMA3_RM_SOK == result)
- {
- /* Remove the callback function too */
- if (mappedTcc < 32u)
- {
- rmInstance->shadowRegs->IECR = (1UL << mappedTcc);
- }
- else
- {
- rmInstance->shadowRegs->IECRH = (1UL << (mappedTcc-32u));
- }
+ if (EDMA3_RM_SOK == result)
+ {
- edma3IntrParams[mappedTcc].cbData = NULL;
- edma3IntrParams[mappedTcc].tccCb = NULL;
- }
+ /* Remove the callback function too */
+ if (mappedTcc < 32u)
+ {
+ rmInstance->shadowRegs->IECR = (1UL << mappedTcc);
+ }
+ else
+ {
+ rmInstance->shadowRegs->IECRH = (1UL << (mappedTcc-32u));
}
+
+ edma3IntrParams[edma3Id][mappedTcc].cbData = NULL;
+ edma3IntrParams[edma3Id][mappedTcc].tccCb = NULL;
}
#ifdef EDMA3_INSTRUMENTATION_ENABLED
return result;
}
-
-/**\fn EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle
- * hEdmaResMgr, EDMA3_RM_ResDesc *firstResIdObj,
- * unsigned int numResources)
- * \brief Allocate a contiguous region of specified EDMA3 Resource
- * like DMA channel, QDMA channel, PaRAM Set or TCC.
- *
- * This API is used to allocate a contiguous region of specified EDMA3
- * Resources like DMA channel, QDMA channel, PaRAM Set or TCC.
- *
- * User can specify a particular resource Id to start with and go up to the
- * number of resources requested. The specific resource id to start from could
- * be passed in 'firstResIdObject->resId' and the number of resources requested
- * in 'numResources'.
- *
- * User can also request ANY available resource(s) of the type
- * 'firstResIdObject->type' by specifying 'firstResIdObject->resId' as
- * EDMA3_RM_RES_ANY.
- *
- * ANY types of resources are those resources when user doesn't care about the
- * actual resource allocated; user just wants a resource of the type specified.
- * One use-case is to perform memory-to-memory data transfer operation. This
- * operation can be performed using any available DMA or QDMA channel. User
- * doesn't need any specific channel for the same.
- *
- * To allocate specific contiguous resources, first this API checks whether
- * those requested resources are OWNED by the Resource Manager instance. Then
- * it checks the current availability of those resources.
- *
- * To allocate ANY available contiguous resources, this API tries to allocate
- * resources from the pool of (owned && non_reserved && available_right_now)
- * resources.
- *
- * After allocating DMA/QDMA channels or TCCs, the same resources are enabled in
- * the shadow region specific register (DRAE/DRAEH/QRAE). Allocated PaRAM Sets
- * are initialized to NULL before this API returns.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param firstResIdObj [IN] Handle to the first resource descriptor
- * object, which needs to be allocated.
- * firstResIdObject->resId could be a valid
- * resource id in case user wants to
- * allocate specific resources OR it could
- * be EDMA3_RM_RES_ANY in case user wants
- * only the required number of resources
- * and doesn't care about which resources
- * were allocated.
- * \param numResources [IN] Number of contiguous resources user
- * wants to allocate.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function acquires a RM Instance specific semaphore
- * to prevent simultaneous access to the global pool of resources.
- * It is re-entrant, but should not be called from the user callback
- * function (ISR context).
- */
EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_ResDesc *firstResIdObj,
unsigned int numResources)
volatile EDMA3_CCRL_Regs *gblRegs = NULL;
unsigned int i = 0u;
unsigned int position = 0u;
-
+ unsigned int edma3Id;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
if (EDMA3_RM_SOK == result)
{
- gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
+ edma3Id = rmObj->phyCtrllerInstId;
+ gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
if (rmInstance->initParam.rmSemHandle == NULL)
{
@@ -3970,35 +3634,23 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
rmInstance->avlblTccs[resAllocIdx/32u] &= resIdClr;
/**
- * Enable the Interrupt channel in the
- * DRAE/DRAEH registers also.
- * Also, If the region id coming from this
+ * If the region id coming from this
* RM instance is same as the Master RM
* Instance's region id, only then we will be
* getting the interrupts on the same side.
* So save the TCC in the allocatedTCCs[] array.
*/
- if (resAllocIdx < 32u)
- {
- gblRegs->DRA[rmInstance->initParam.regionId].DRAE
- |= (0x1u << resAllocIdx);
-
- if (edma3RegionId == rmInstance->initParam.regionId)
- {
- allocatedTCCs[0u] |= (0x1u << resAllocIdx);
- }
- }
- else
+ if (edma3RegionId == rmInstance->initParam.regionId)
{
- gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
- |= (0x1u << (resAllocIdx - 32u));
-
- if (edma3RegionId == rmInstance->initParam.regionId)
- {
- allocatedTCCs[1u] |= (0x1u << (resAllocIdx - 32u));
- }
- }
-
+ if (resAllocIdx < 32u)
+ {
+ allocatedTCCs[edma3Id][0u] |= (0x1u << resAllocIdx);
+ }
+ else
+ {
+ allocatedTCCs[edma3Id][1u] |= (0x1u << (resAllocIdx - 32u));
+ }
+ }
result = EDMA3_RM_SOK;
}
else
*/
if (TRUE == rmInstance->paramInitRequired)
{
- edma3MemSet((void *)(&gblRegs->PARAMENTRY[resAllocIdx]),
- 0x00u,
+ edma3MemZero((void *)(&gblRegs->PARAMENTRY[resAllocIdx]),
sizeof(gblRegs->PARAMENTRY[resAllocIdx]));
}
@@ -4223,37 +3874,6 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
return result;
}
-
-
-/**
- * \fn EDMA3_RM_Result EDMA3_RM_freeContiguousResource(EDMA3_RM_Handle
- * hEdmaResMgr, EDMA3_RM_ResDesc *firstResIdObj,
- * unsigned int numResources)
- * \brief Free a contiguous region of specified EDMA3 Resource
- * like DMA channel, QDMA channel, PaRAM Set or TCC, previously allocated.
- *
- * This API frees a contiguous region of specified EDMA3 Resources
- * like DMA channel, QDMA channel, PaRAM Set or TCC, which have been previously
- * allocated. In case of an error during the freeing of any specific resource,
- * user can check the 'firstResIdObj' object to know the last resource id
- * whose freeing has failed. In case of success, there is no need to check this
- * object.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened
- * Resource Manager Instance.
- * \param firstResIdObj [IN/OUT] Handle to the first resource
- * descriptor object, which needs to be
- * freed. In case of an error while
- * freeing any particular resource,
- * the last resource id whose freeing has
- * failed is returned in this resource
- * descriptor object.
- * \param numResources [IN] Number of contiguous resources allocated
- * previously which user wants to release
- *
- * \note This is a re-entrant function which internally calls
- * EDMA3_RM_freeResource() for resource de-allocation.
- */
EDMA3_RM_Result EDMA3_RM_freeContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_ResDesc *firstResIdObj,
unsigned int numResources)
return result;
}
-
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_setCCRegister (EDMA3_RM_Handle hEdmaResMgr,
- * unsigned int regOffset,
- * unsigned int newRegValue)
- * \brief Set the Channel Controller (CC) Register value
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param regOffset [IN] CC Register offset whose value needs to be
- * set. It should be word-aligned.
- * \param newRegValue [IN] New CC Register Value
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is non re-entrant for users using the same
- * Resource Manager handle.
- * Before modifying a register, it tries to acquire a semaphore
- * (RM instance specific), to protect simultaneous
- * modification of the same register by two different users.
- * After the successful change, it releases the semaphore.
- * For users using different RM handles, this function is re-entrant.
- */
EDMA3_RM_Result EDMA3_RM_setCCRegister (EDMA3_RM_Handle hEdmaResMgr,
unsigned int regOffset,
unsigned int newRegValue)
return result;
}
-
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_getCCRegister (EDMA3_RM_Handle hEdmaResMgr,
- * unsigned int regOffset,
- * unsigned int *regValue)
- * \brief Get the Channel Controller (CC) Register value
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param regOffset [IN] CC Register offset whose value is
- * needed. It should be word-aligned.
- * \param regValue [IN/OUT] Fetched CC Register Value
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant.
- */
EDMA3_RM_Result EDMA3_RM_getCCRegister (EDMA3_RM_Handle hEdmaResMgr,
unsigned int regOffset,
unsigned int *regValue)
return result;
}
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_waitAndClearTcc (EDMA3_RM_Handle
- * hEdmaResMgr, unsigned int tccNo)
- * \brief Wait for a transfer completion interrupt to occur and clear it.
- *
- * This is a blocking function that returns when the IPR/IPRH bit corresponding
- * to the tccNo specified, is SET. It clears the corresponding bit while
- * returning also.
- *
- * This function waits for the specific bit indefinitely in a tight loop, with
- * out any delay in between. USE IT CAUTIOUSLY.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param tccNo [IN] TCC, specific to which the function
- * waits on a IPR/IPRH bit.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant for different tccNo.
- *
- */
EDMA3_RM_Result EDMA3_RM_waitAndClearTcc (EDMA3_RM_Handle hEdmaResMgr,
unsigned int tccNo)
{
return result;
}
-
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_checkAndClearTcc (EDMA3_RM_Handle
- * hEdmaResMgr, unsigned int tccNo,
- * unsigned short *tccStatus)
- * \brief Returns the status of a previously initiated transfer.
- *
- * This is a non-blocking function that returns the status of a previously
- * initiated transfer, based on the IPR/IPRH bit. This bit corresponds to
- * the tccNo specified by the user. It clears the corresponding bit, if SET,
- * while returning also.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param tccNo [IN] TCC, specific to which the function
- * checks the status of the IPR/IPRH bit.
- * \param tccStatus [IN/OUT] Status of the transfer is returned here.
- * Returns "TRUE" if the transfer has
- * completed (IPR/IPRH bit SET),
- * "FALSE" if the transfer has not
- * completed successfully (IPR/IPRH bit
- * NOT SET).
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant for different tccNo.
- */
EDMA3_RM_Result EDMA3_RM_checkAndClearTcc (EDMA3_RM_Handle hEdmaResMgr,
unsigned int tccNo,
unsigned short *tccStatus)
return result;
}
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_setPaRAM (EDMA3_RM_Handle hEdmaResMgr,
- * EDMA3_RM_ResDesc *lChObj,
- * const EDMA3_RM_PaRAMRegs *newPaRAM)
- * \brief Copy the user specified PaRAM Set onto the PaRAM Set
- * associated with the logical channel (DMA/QDMA/Link).
- *
- * This API takes a PaRAM Set as input and copies it onto the actual PaRAM Set
- * associated with the logical channel. OPT field of the PaRAM Set is written
- * first and the CCNT field is written last.
- *
- * Caution: It should be used carefully when programming the QDMA channels whose
- * trigger words are not CCNT field.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param lChObj [IN] Logical Channel object for which new
- * PaRAM set is specified. User should pass
- * the resource type and id in this object.
- * \param newPaRAM [IN] PaRAM set to be copied onto existing one
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant for unique lChObj values. It is non-
- * re-entrant for same lChObj value.
- */
EDMA3_RM_Result EDMA3_RM_setPaRAM (EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_ResDesc *lChObj,
const EDMA3_RM_PaRAMRegs *newPaRAM)
int paRAMId = 0u;
unsigned int qdmaChId = 0u;
volatile EDMA3_CCRL_Regs *globalRegs = NULL;
+ unsigned int edma3Id;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
}
}
-
if (result == EDMA3_RM_SOK)
{
+ edma3Id = rmObj->phyCtrllerInstId;
globalRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
switch (lChObj->type)
{
case EDMA3_RM_RES_DMA_CHANNEL:
{
- if (lChObj->resId <= EDMA3_RM_DMA_CH_MAX_VAL)
+ if (lChObj->resId <= edma3_dma_ch_max_val[edma3Id])
{
- paRAMId = edma3RmChBoundRes[rmObj->phyCtrllerInstId][lChObj->resId].paRAMId;
+ paRAMId = edma3RmChBoundRes[edma3Id][lChObj->resId].paRAMId;
}
else
{
{
if (lChObj->resId < EDMA3_MAX_QDMA_CH)
{
- qdmaChId = lChObj->resId + EDMA3_RM_QDMA_CH_MIN_VAL;
- paRAMId = edma3RmChBoundRes[rmObj->phyCtrllerInstId][qdmaChId].paRAMId;
+ qdmaChId = lChObj->resId + edma3_qdma_ch_min_val[edma3Id];
+ paRAMId = edma3RmChBoundRes[edma3Id][qdmaChId].paRAMId;
}
else
{
return result;
}
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_getPaRAM (EDMA3_RM_Handle hEdmaResMgr,
- * EDMA3_RM_ResDesc *lChObj,
- * EDMA3_RM_PaRAMRegs *currPaRAM)
- * \brief Retrieve existing PaRAM set associated with specified logical
- * channel (DMA/QDMA/Link).
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param lChObj [IN] Logical Channel object for which the
- * PaRAM set is requested. User should pass
- * the resource type and id in this object.
- * \param currPaRAM [IN/OUT] User gets the existing PaRAM here.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant.
- */
EDMA3_RM_Result EDMA3_RM_getPaRAM (EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_ResDesc *lChObj,
EDMA3_RM_PaRAMRegs *currPaRAM)
int paRAMId = 0u;
unsigned int qdmaChId = 0u;
volatile EDMA3_CCRL_Regs *globalRegs = NULL;
+ unsigned int edma3Id;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
if (result == EDMA3_RM_SOK)
{
+ edma3Id = rmObj->phyCtrllerInstId;
globalRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
switch (lChObj->type)
{
case EDMA3_RM_RES_DMA_CHANNEL:
{
- if (lChObj->resId <= EDMA3_RM_DMA_CH_MAX_VAL)
+ if (lChObj->resId <= edma3_dma_ch_max_val[edma3Id])
{
paRAMId = edma3RmChBoundRes[rmObj->phyCtrllerInstId][lChObj->resId].paRAMId;
}
{
if (lChObj->resId < EDMA3_MAX_QDMA_CH)
{
- qdmaChId = lChObj->resId + EDMA3_RM_QDMA_CH_MIN_VAL;
+ qdmaChId = lChObj->resId + edma3_qdma_ch_min_val[edma3Id];
paRAMId = edma3RmChBoundRes[rmObj->phyCtrllerInstId][qdmaChId].paRAMId;
}
else
return result;
}
-
-/**\fn EDMA3_RM_Result EDMA3_RM_getPaRAMPhyAddr(EDMA3_RM_Handle
- * hEdmaResMgr, EDMA3_RM_ResDesc *lChObj,
- * unsigned int *paramPhyAddr)
- * \brief Get the PaRAM Set Physical Address associated with a logical channel
- *
- * This function returns the PaRAM Set Phy Address (unsigned 32 bits).
- * The returned address could be used by the advanced users to program the
- * PaRAM Set directly without using any APIs.
- *
- * Least significant 16 bits of this address could be used to program
- * the LINK field in the PaRAM Set.
- * Users which program the LINK field directly SHOULD use this API
- * to get the associated PaRAM Set address with the LINK channel.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param lChObj [IN] Logical Channel object for which the
- * PaRAM set physical address is required.
- * User should pass the resource type and
- * id in this object.
- * \param paramPhyAddr [IN/OUT] PaRAM Set physical address is returned
- * here.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant.
- */
EDMA3_RM_Result EDMA3_RM_getPaRAMPhyAddr(EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_ResDesc *lChObj,
unsigned int *paramPhyAddr)
int paRAMId = 0u;
unsigned int qdmaChId = 0u;
volatile EDMA3_CCRL_Regs *globalRegs = NULL;
+ unsigned int edma3Id;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
if (result == EDMA3_RM_SOK)
{
- globalRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
+ edma3Id = rmObj->phyCtrllerInstId;
+ globalRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
switch (lChObj->type)
{
case EDMA3_RM_RES_DMA_CHANNEL:
{
- if (lChObj->resId <= EDMA3_RM_DMA_CH_MAX_VAL)
+ if (lChObj->resId <= edma3_dma_ch_max_val[edma3Id])
{
- paRAMId = edma3RmChBoundRes[rmObj->phyCtrllerInstId][lChObj->resId].paRAMId;
+ paRAMId = edma3RmChBoundRes[edma3Id][lChObj->resId].paRAMId;
}
else
{
{
if (lChObj->resId < EDMA3_MAX_QDMA_CH)
{
- qdmaChId = lChObj->resId + EDMA3_RM_QDMA_CH_MIN_VAL;
- paRAMId = edma3RmChBoundRes[rmObj->phyCtrllerInstId][qdmaChId].paRAMId;
+ qdmaChId = lChObj->resId + edma3_qdma_ch_min_val[edma3Id];
+ paRAMId = edma3RmChBoundRes[edma3Id][qdmaChId].paRAMId;
}
else
{
}
}
-
-
if (result == EDMA3_RM_SOK)
{
/* Check the param id first. */
return result;
}
-
-/**\fn EDMA3_RM_Result EDMA3_RM_getBaseAddress (EDMA3_RM_Handle
- * hEdmaResMgr, EDMA3_RM_Cntrlr_PhyAddr controllerId,
- * unsigned int *phyAddress)
- * \brief Get the Channel Controller or Transfer Controller (n) Physical
- * Address.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param controllerId [IN] Channel Controller or Transfer
- * Controller (n) for which the physical
- * address is required.
- * \param phyAddress [IN/OUT] Physical address is returned here.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant.
- */
EDMA3_RM_Result EDMA3_RM_getBaseAddress (EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_Cntrlr_PhyAddr controllerId,
unsigned int *phyAddress)
return result;
}
-
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_getGblConfigParams (unsigned int phyCtrllerInstId,
- * EDMA3_RM_GblConfigParams *gblCfgParams)
- * \brief Get the SoC specific configuration structure for the EDMA3 Hardware.
- *
- * This API is used to fetch the global SoC specific configuration structure
- * for the EDMA3 Hardware. It is useful for the user who has not passed
- * this information during EDMA3_RM_create() and taken the default configuration
- * coming along with the package.
- *
- * \param phyCtrllerInstId [IN] EDMA3 Controller Instance Id
- * (Hardware instance id, starting from 0).
- * \param gblCfgParams [IN/OUT] SoC specific configuration structure for the
- * EDMA3 Hardware will be returned here.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant.
- */
EDMA3_RM_Result EDMA3_RM_getGblConfigParams (
unsigned int phyCtrllerInstId,
EDMA3_RM_GblConfigParams *gblCfgParams)
return result;
}
-
-
-/**\fn EDMA3_RM_Result EDMA3_RM_getInstanceInitCfg (EDMA3_RM_Handle hEdmaResMgr,
- * EDMA3_RM_InstanceInitConfig *instanceInitConfig)
- * \brief Get the RM Instance specific configuration structure for different
- * EDMA3 resources' usage (owned resources, reserved resources etc).
- *
- * This API is used to fetch the Resource Manager Instance specific configuration
- * structure, for a specific shadow region. It is useful for the user who has not passed
- * this information during EDMA3_RM_opn() and taken the default configuration
- * coming along with the package. EDMA3 resources, owned and reserved by this RM
- * instance, will be returned from this API.
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param instanceInitConfig [IN/OUT] RM Instance specific configuration
- * structure will be returned here.
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- *
- * \note This function is re-entrant.
- */
EDMA3_RM_Result EDMA3_RM_getInstanceInitCfg (
EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_InstanceInitConfig *instanceInitConfig)
return result;
}
-
-
-/**
- * \brief EDMA3 Resource Manager IOCTL
- *
- * This function provides IOCTL functionality for EDMA3 Resource Manager
- *
- * \param hEdmaResMgr [IN] Handle to the previously opened Resource
- * Manager Instance.
- * \param cmd [IN] IOCTL command to be performed
- * \param cmdArg [IN/OUT] IOCTL command argument (if any)
- * \param param [IN/OUT] Device/Cmd specific argument
- *
- * \return EDMA3_RM_SOK or EDMA3_RM Error Code
- */
EDMA3_RM_Result EDMA3_RM_Ioctl(
EDMA3_RM_Handle hEdmaResMgr,
EDMA3_RM_IoctlCmd cmd,
/* If parameter checking is enabled... */
#ifndef EDMA3_RM_PARAM_CHECK_DISABLE
- if ((regModificationRequired == 0u)
- || (regModificationRequired == 1u))
+ if ((regModificationRequired != 0u)
+ && (regModificationRequired != 1u))
{
/* All other values are invalid. */
result = EDMA3_RM_E_INVALID_PARAM;
}
-
-
/**
* edma3ComplHandler
* \brief Interrupt handler for successful transfer completion.
volatile EDMA3_CCRL_Regs *ptrEdmaccRegs = NULL;
volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
volatile unsigned int pendingIrqs;
+ volatile unsigned int isIPR = 0;
+
unsigned int indexl;
unsigned int indexh;
+ unsigned int edma3Id;
+ unsigned int numTCCs;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
assert (NULL != rmObj);
+ edma3Id = rmObj->phyCtrllerInstId;
+ numTCCs = rmObj->gblCfgParams.numTccs;
ptrEdmaccRegs =
(volatile EDMA3_CCRL_Regs *)rmObj->gblCfgParams.globalRegs;
if (ptrEdmaccRegs != NULL)
indexl = 1u;
indexh = 1u;
- if((shadowRegs->IPR !=0 ) || (shadowRegs->IPRH !=0 ))
+ if (numTCCs > 32)
+ isIPR = shadowRegs->IPR | shadowRegs->IPRH;
+ else
+ isIPR = shadowRegs->IPR;
+
+ if(isIPR)
{
/**
* Since an interrupt has found, we have to make sure that this
* channels are owned by the EDMA3 RM Instances.
*/
- edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION, NULL);
+ edma3OsProtectEntry (edma3Id,
+ EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION,
+ NULL);
/* Loop for EDMA3_RM_COMPL_HANDLER_RETRY_COUNT number of time,
breaks when no pending interrupt is found */
* Choose interrupts coming from our allocated TCCs
* and MASK remaining ones.
*/
- pendingIrqs = (pendingIrqs & allocatedTCCs[0u]);
+ pendingIrqs = (pendingIrqs & allocatedTCCs[edma3Id][0u]);
while (pendingIrqs)
{
* while requesting the TCC, its TCC specific bit
* in the IPR register will NOT be cleared.
*/
- if(edma3IntrParams[indexl].tccCb != NULL)
+ if(edma3IntrParams[edma3Id][indexl].tccCb != NULL)
{
/* here write to ICR to clear the corresponding IPR bits*/
shadowRegs->ICR = (1u << indexl);
- edma3IntrParams[indexl].tccCb (indexl,
+ edma3IntrParams[edma3Id][indexl].tccCb (indexl,
EDMA3_RM_XFER_COMPLETE,
- edma3IntrParams[indexl].cbData);
+ edma3IntrParams[edma3Id][indexl].cbData);
}
}
++indexl;
pendingIrqs >>= 1u;
}
- indexh = 0u;
- pendingIrqs = shadowRegs->IPRH;
-
- /**
- * Choose interrupts coming from our allocated TCCs
- * and MASK remaining ones.
- */
- pendingIrqs = (pendingIrqs & allocatedTCCs[1u]);
-
- while (pendingIrqs)
- {
- /*Process all the pending interrupts*/
- if((pendingIrqs & 1u)==TRUE)
- {
- /**
- * If the user has not given any callback function
- * while requesting the TCC, its TCC specific bit
- * in the IPRH register will NOT be cleared.
- */
- if(edma3IntrParams[32u+indexh].tccCb!=NULL)
- {
- /* here write to ICR to clear the corresponding IPR bits*/
- shadowRegs->ICRH = (1u << indexh);
-
- edma3IntrParams[32u+indexh].tccCb(32u+indexh,
- EDMA3_RM_XFER_COMPLETE,
- edma3IntrParams[32u+indexh].cbData);
- }
- }
- ++indexh;
- pendingIrqs >>= 1u;
- }
+ if(numTCCs > 32)
+ {
+ indexh = 0u;
+ pendingIrqs = shadowRegs->IPRH;
+
+ /**
+ * Choose interrupts coming from our allocated TCCs
+ * and MASK remaining ones.
+ */
+ pendingIrqs = (pendingIrqs & allocatedTCCs[edma3Id][1u]);
+
+ while (pendingIrqs)
+ {
+ /*Process all the pending interrupts*/
+ if((pendingIrqs & 1u)==TRUE)
+ {
+ /**
+ * If the user has not given any callback function
+ * while requesting the TCC, its TCC specific bit
+ * in the IPRH register will NOT be cleared.
+ */
+ if(edma3IntrParams[edma3Id][32u+indexh].tccCb!=NULL)
+ {
+ /* here write to ICR to clear the corresponding IPR bits*/
+ shadowRegs->ICRH = (1u << indexh);
+
+ edma3IntrParams[edma3Id][32u+indexh].tccCb(32u+indexh,
+ EDMA3_RM_XFER_COMPLETE,
+ edma3IntrParams[edma3Id][32u+indexh].cbData);
+ }
+ }
+ ++indexh;
+ pendingIrqs >>= 1u;
+ }
+ }
Cnt++;
}
- indexl = (shadowRegs->IPR & allocatedTCCs[0u]);
- indexh = (shadowRegs->IPRH & allocatedTCCs[1u]);
+ indexl = (shadowRegs->IPR & allocatedTCCs[edma3Id][0u]);
+ if (numTCCs > 32)
+ indexh = (shadowRegs->IPRH & allocatedTCCs[edma3Id][1u]);
if((indexl !=0 ) || (indexh !=0 ))
{
shadowRegs->IEVAL=0x1u;
}
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION, NULL);
+ edma3OsProtectExit (rmObj->phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION,
+ NULL);
}
#ifdef EDMA3_INSTRUMENTATION_ENABLED
#endif /* EDMA3_INSTRUMENTATION_ENABLED */
}
-/* ARGSUSED */
-void lisrEdma3ComplHandler0(unsigned int arg)
+
+void lisrEdma3ComplHandler0(unsigned int edma3InstanceId)
{
/* Invoke Completion Handler ISR */
- edma3ComplHandler(&resMgrObj[0]);
+ edma3ComplHandler(&resMgrObj[edma3InstanceId]);
}
unsigned int index;
unsigned int evtqueNum;
EDMA3_RM_Instance *rm_instance = NULL;
- unsigned int hwId;
+ unsigned int edma3Id;
unsigned int num_rm_instances_opened;
EDMA3_RM_Instance *rmInstance = NULL;
unsigned int ownedDmaError = 0;
assert (rmObj != NULL);
+ edma3Id = rmObj->phyCtrllerInstId;
ptrEdmaccRegs = (volatile EDMA3_CCRL_Regs *)rmObj->gblCfgParams.globalRegs;
if (ptrEdmaccRegs != NULL)
{
shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)&ptrEdmaccRegs->SHADOW[edma3RegionId];
- hwId = rmObj->phyCtrllerInstId;
rmInstance = ((EDMA3_RM_Instance *)(ptrRMIArray)
- + ((rmObj->phyCtrllerInstId)*EDMA3_MAX_RM_INSTANCES)
+ + (edma3Id*EDMA3_MAX_RM_INSTANCES)
+ edma3RegionId);
pendingIrqs = 0u;
|| ((ptrEdmaccRegs->QEMR != 0)
|| (ptrEdmaccRegs->CCERR != 0)))
{
- edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR, NULL);
+ edma3OsProtectEntry (edma3Id,
+ EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR,
+ NULL);
/* Loop for EDMA3_RM_CCERR_HANDLER_RETRY_COUNT number of time,
breaks when no pending interrupt is found */
* channel), fetch the corresponding TCC
* value, mapped to this DMA channel.
*/
- mappedTcc = edma3DmaChTccMapping[index];
+ mappedTcc = edma3DmaChTccMapping[edma3Id][index];
/**
* Ensure that the mapped tcc is valid and the call
shadowRegs->SECR = (1u<<index);
/* Call the callback function if registered earlier. */
- if((edma3IntrParams[mappedTcc].tccCb) != NULL)
+ if((edma3IntrParams[edma3Id][mappedTcc].tccCb) != NULL)
{
- edma3IntrParams[mappedTcc].tccCb (
+ edma3IntrParams[edma3Id][mappedTcc].tccCb (
mappedTcc,
EDMA3_RM_E_CC_DMA_EVT_MISS,
- edma3IntrParams[mappedTcc].cbData
+ edma3IntrParams[edma3Id][mappedTcc].cbData
);
}
}
* channel), fetch the corresponding TCC
* value, mapped to this DMA channel.
*/
- mappedTcc = edma3DmaChTccMapping[32u+index];
+ mappedTcc = edma3DmaChTccMapping[edma3Id][32u+index];
/**
* Ensure that the mapped tcc is valid and the call
shadowRegs->SECRH = (1u<<index);
/* Call the callback function if registered earlier. */
- if((edma3IntrParams[mappedTcc].tccCb) != NULL)
+ if((edma3IntrParams[edma3Id][mappedTcc].tccCb) != NULL)
{
- edma3IntrParams[mappedTcc].tccCb (
+ edma3IntrParams[edma3Id][mappedTcc].tccCb (
mappedTcc,
EDMA3_RM_E_CC_DMA_EVT_MISS,
- edma3IntrParams[mappedTcc].cbData
+ edma3IntrParams[edma3Id][mappedTcc].cbData
);
}
}
* channel), fetch the corresponding TCC
* value, mapped to this QDMA channel.
*/
- mappedTcc = edma3QdmaChTccMapping[index];
+ mappedTcc = edma3QdmaChTccMapping[edma3Id][index];
if (mappedTcc < EDMA3_MAX_TCC)
{
/*Clear any QSER*/
shadowRegs->QSECR = (1u<<index);
- if((edma3IntrParams[mappedTcc].tccCb) != NULL)
+ if((edma3IntrParams[edma3Id][mappedTcc].tccCb) != NULL)
{
- edma3IntrParams[mappedTcc].tccCb (
+ edma3IntrParams[edma3Id][mappedTcc].tccCb (
mappedTcc,
EDMA3_RM_E_CC_QDMA_EVT_MISS,
- edma3IntrParams[mappedTcc].cbData
+ edma3IntrParams[edma3Id][mappedTcc].cbData
);
}
}
* Inform all the RM instances working on this region
* about the error by calling their global callback functions.
*/
- num_rm_instances_opened = resMgrObj[hwId].numOpens;
+ num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
{
/* Check whether the RM instance opened working on this region */
- rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (hwId*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
+ rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
if (NULL != rm_instance)
{
if (rm_instance->initParam.regionId == edma3RegionId)
* Inform all the RM instances working on this region
* about the error by calling their global callback functions.
*/
- num_rm_instances_opened = resMgrObj[hwId].numOpens;
+ num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
{
/* Check whether the RM instance opened working on this region */
- rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (hwId*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
+ rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
if (NULL != rm_instance)
{
if (rm_instance->initParam.regionId == edma3RegionId)
ptrEdmaccRegs->EEVAL=0x1u;
}
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR, NULL);
+ edma3OsProtectExit (rmObj->phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR,
+ NULL);
}
}
#endif /* EDMA3_INSTRUMENTATION_ENABLED */
}
-/* ARGSUSED */
-void lisrEdma3CCErrHandler0(unsigned int arg)
+void lisrEdma3CCErrHandler0(unsigned int edma3InstanceId)
{
/* Invoke CC Error Handler ISR */
- edma3CCErrHandler(&resMgrObj[0]);
+ edma3CCErrHandler(&resMgrObj[edma3InstanceId]);
}
unsigned int tcMemErrRdWr = 0u;
unsigned int resMgrInstIdx = 0u;
EDMA3_RM_Instance *rm_instance = NULL;
- unsigned int hwId;
+ unsigned int edma3Id;
unsigned int num_rm_instances_opened;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
@@ -6329,14 +5729,16 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, unsigned int tcNum)
if (rmObj->gblCfgParams.tcRegs[tcNum] != NULL)
{
tcRegs = (volatile EDMA3_TCRL_Regs *)(rmObj->gblCfgParams.tcRegs[tcNum]);
- hwId = rmObj->phyCtrllerInstId;
+ edma3Id = rmObj->phyCtrllerInstId;
}
if (tcRegs != NULL)
{
if(tcRegs->ERRSTAT != 0)
{
- edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR, &tcNum);
+ edma3OsProtectEntry (rmObj->phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR,
+ &tcNum);
if((tcRegs->ERRSTAT & (1 << EDMA3_TCRL_ERRSTAT_BUSERR_SHIFT))!=NULL)
{
@@ -6353,11 +5755,11 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, unsigned int tcNum)
* Inform all the RM instances working on this region
* about the error by calling their global callback functions.
*/
- num_rm_instances_opened = resMgrObj[hwId].numOpens;
+ num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
{
/* Check whether the RM instance opened working on this region */
- rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (hwId*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
+ rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
if (NULL != rm_instance)
{
if (rm_instance->initParam.regionId == edma3RegionId)
@@ -6385,11 +5787,11 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, unsigned int tcNum)
* Inform all the RM instances working on this region
* about the error by calling their global callback functions.
*/
- num_rm_instances_opened = resMgrObj[hwId].numOpens;
+ num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
{
/* Check whether the RM instance opened working on this region */
- rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (hwId*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
+ rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
if (NULL != rm_instance)
{
if (rm_instance->initParam.regionId == edma3RegionId)
@@ -6417,11 +5819,11 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, unsigned int tcNum)
/* Transfer request (TR) error event. */
if((tcRegs->ERRSTAT & (1 << EDMA3_TCRL_ERRSTAT_TRERR_SHIFT))!=NULL)
{
- num_rm_instances_opened = resMgrObj[hwId].numOpens;
+ num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
{
/* Check whether the RM instance opened working on this region */
- rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (hwId*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
+ rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
if (NULL != rm_instance)
{
if (rm_instance->initParam.regionId == edma3RegionId)
@@ -6447,11 +5849,11 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, unsigned int tcNum)
{
if((tcRegs->ERRSTAT & (1 << EDMA3_TCRL_ERRSTAT_MMRAERR_SHIFT))!=NULL)
{
- num_rm_instances_opened = resMgrObj[hwId].numOpens;
+ num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
{
/* Check whether the RM instance opened working on this region */
- rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (hwId*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
+ rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
if (NULL != rm_instance)
{
if (rm_instance->initParam.regionId == edma3RegionId)
}
}
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR, tcNum);
+ edma3OsProtectExit (rmObj->phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR,
+ tcNum);
}
}
@@ -6495,11 +5899,10 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, unsigned int tcNum)
* ======== lisrEdma3TC0ErrHandler0 ========
* EDMA3 instance 0 TC0 Error Interrupt Service Routine
*/
-/* ARGSUSED */
-void lisrEdma3TC0ErrHandler0(unsigned int arg)
+void lisrEdma3TC0ErrHandler0(unsigned int edma3InstanceId)
{
/* Invoke Error Handler ISR for TC0*/
- edma3TCErrHandler(&resMgrObj[0u], 0u);
+ edma3TCErrHandler(&resMgrObj[edma3InstanceId], 0u);
}
* ======== lisrEdma3TC1ErrHandler0 ========
* EDMA3 instance 0 TC1 Error Interrupt Service Routine
*/
-/* ARGSUSED */
-void lisrEdma3TC1ErrHandler0(unsigned int arg)
+void lisrEdma3TC1ErrHandler0(unsigned int edma3InstanceId)
{
/* Invoke Error Handler ISR for TC1*/
- edma3TCErrHandler(&resMgrObj[0u], 1u);
+ edma3TCErrHandler(&resMgrObj[edma3InstanceId], 1u);
}
/*
* ======== lisrEdma3TC2ErrHandler0 ========
* EDMA3 instance 0 TC2 Error Interrupt Service Routine
*/
-/* ARGSUSED */
-void lisrEdma3TC2ErrHandler0(unsigned int arg)
+void lisrEdma3TC2ErrHandler0(unsigned int edma3InstanceId)
{
/* Invoke Error Handler ISR for TC2*/
- edma3TCErrHandler(&resMgrObj[0u], 2u);
+ edma3TCErrHandler(&resMgrObj[edma3InstanceId], 2u);
}
/*
* ======== lisrEdma3TC3ErrHandler0 ========
* EDMA3 instance 0 TC3 Error Interrupt Service Routine
*/
-/* ARGSUSED */
-void lisrEdma3TC3ErrHandler0(unsigned int arg)
+void lisrEdma3TC3ErrHandler0(unsigned int edma3InstanceId)
{
/* Invoke Error Handler ISR for TC3*/
- edma3TCErrHandler(&resMgrObj[0u], 3u);
+ edma3TCErrHandler(&resMgrObj[edma3InstanceId], 3u);
}
/*
* ======== lisrEdma3TC4ErrHandler0 ========
* EDMA3 instance 0 TC4 Error Interrupt Service Routine
*/
-/* ARGSUSED */
-void lisrEdma3TC4ErrHandler0(unsigned int arg)
+void lisrEdma3TC4ErrHandler0(unsigned int edma3InstanceId)
{
/* Invoke Error Handler ISR for TC4*/
- edma3TCErrHandler(&resMgrObj[0u], 4u);
+ edma3TCErrHandler(&resMgrObj[edma3InstanceId], 4u);
}
* ======== lisrEdma3TC5ErrHandler0 ========
* EDMA3 instance 0 TC5 Error Interrupt Service Routine
*/
-/* ARGSUSED */
-void lisrEdma3TC5ErrHandler0(unsigned int arg)
+void lisrEdma3TC5ErrHandler0(unsigned int edma3InstanceId)
{
/* Invoke Error Handler ISR for TC5*/
- edma3TCErrHandler(&resMgrObj[0u], 5u);
+ edma3TCErrHandler(&resMgrObj[edma3InstanceId], 5u);
}
/*
* EDMA3 instance 0 TC6 Error Interrupt Service Routine
*/
/* ARGSUSED */
-void lisrEdma3TC6ErrHandler0(unsigned int arg)
+void lisrEdma3TC6ErrHandler0(unsigned int edma3InstanceId)
{
/* Invoke Error Handler ISR for TC6*/
- edma3TCErrHandler(&resMgrObj[0u], 6u);
+ edma3TCErrHandler(&resMgrObj[edma3InstanceId], 6u);
}
/*
* ======== lisrEdma3TC7ErrHandler0 ========
* EDMA3 instance 0 TC7 Error Interrupt Service Routine
*/
-/* ARGSUSED */
-void lisrEdma3TC7ErrHandler0(unsigned int arg)
+void lisrEdma3TC7ErrHandler0(unsigned int edma3InstanceId)
{
/* Invoke Error Handler ISR for TC7*/
- edma3TCErrHandler(&resMgrObj[0u], 7u);
+ edma3TCErrHandler(&resMgrObj[edma3InstanceId], 7u);
}
*/
/* 1. Dma Channel (and TCC) <-> Region */
-#ifdef EDMA3_RM_DEBUG
- EDMA3_RM_PRINTF("DRAE=%x\r\n",ptrEdmaccRegs->DRA[regionId].DRAE);
- EDMA3_RM_PRINTF("DRAEH=%x\r\n",ptrEdmaccRegs->DRA[regionId].DRAEH);
-#endif
-
- edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT, &intState);
+ edma3OsProtectEntry (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ &intState);
ptrEdmaccRegs->DRA[regionId].DRAE = 0u;
ptrEdmaccRegs->DRA[regionId].DRAEH = 0u;
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT, intState);
-
-#ifdef EDMA3_RM_DEBUG
- EDMA3_RM_PRINTF("DRAE=%x\r\n",ptrEdmaccRegs->DRA[regionId].DRAE);
- EDMA3_RM_PRINTF("DRAEH=%x\r\n",ptrEdmaccRegs->DRA[regionId].DRAEH);
-#endif
+ edma3OsProtectExit (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ intState);
/* 2. Qdma Channel <-> Region */
-#ifdef EDMA3_RM_DEBUG
- EDMA3_RM_PRINTF("QRAE=%x\r\n",ptrEdmaccRegs->QRAE[regionId]);
-#endif
-
- edma3OsProtectEntry (EDMA3_OS_PROTECT_INTERRUPT, &intState);
+ edma3OsProtectEntry (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ &intState);
ptrEdmaccRegs->QRAE[regionId] = 0u;
- edma3OsProtectExit (EDMA3_OS_PROTECT_INTERRUPT, intState);
-
-#ifdef EDMA3_RM_DEBUG
- EDMA3_RM_PRINTF("QRAE=%x\r\n",ptrEdmaccRegs->QRAE[regionId]);
-#endif
-
+ edma3OsProtectExit (phyCtrllerInstId,
+ EDMA3_OS_PROTECT_INTERRUPT,
+ intState);
}
}
-/** Local MemSet function */
-void edma3MemSet(void *dst, unsigned char data, unsigned int len)
+/** Local MemZero function */
+void edma3MemZero(void *dst, unsigned int len)
{
- unsigned int i=0u;
- unsigned char *ds=NULL;
+ unsigned int i = 0u;
+ unsigned int *ds = NULL;
assert (dst != NULL);
- ds = (unsigned char *)dst;
+ ds = (unsigned int *)dst;
- for( i=0;i<len;i++)
+ for (i = 0 ; i < len/4 ; i++)
{
- *ds=data;
+ *ds = 0x0;
ds++;
}
void edma3MemCpy(void *dst, const void *src, unsigned int len)
{
unsigned int i=0u;
- const unsigned char *sr;
- unsigned char *ds;
+ const unsigned int *sr;
+ unsigned int *ds;
- assert ((src != NULL) && (dst != NULL));
+ assert ((src != NULL) && (dst != NULL) && ((len)%4 == 0));
- sr = (const unsigned char *)src;
- ds = (unsigned char *)dst;
+ sr = (const unsigned int *)src;
+ ds = (unsigned int *)dst;
- for( i=0;i<len;i++)
+ for (i = 0 ; i < len/4 ; i++)
{
- *ds=*sr;
+ *ds = *sr;
ds++;
sr++;
}
* Step d) If result < N, do the whole process again untill you
* reach end. Else you have found enough resources, return success.
*/
- while((found == 0) && (((end-start)+1u) >= numResources))
+ while((found == 0) && (start<=end) && (((end-start)+1u) >= numResources))
{
/* Find first '1' starting from 'start' till 'end'. */
first_one = findBit (resType, start, end, 1u);
unsigned int avlblIdx = 0u;
unsigned int firstResId=0u;
unsigned int lastResId=0u;
+ unsigned int edma3Id;
assert ((rmInstance != NULL) && (firstResIdObj != NULL));
if (EDMA3_RM_SOK == result)
{
+ edma3Id = rmObj->phyCtrllerInstId;
gblRegs = (volatile EDMA3_CCRL_Regs *)(rmObj->gblCfgParams.globalRegs);
if (gblRegs == NULL)
rmInstance->avlblTccs[avlblIdx/32u] &= (unsigned int)(~(1u << (avlblIdx%32u)));
/**
- * Enable the Interrupt channel in the DRAE/DRAEH registers.
- * Also, If the region id coming from this
+ * If the region id coming from this
* RM instance is same as the Master RM
* Instance's region id, only then we will be
* getting the interrupts on the same side.
* So save the TCC in the allocatedTCCs[] array.
*/
- if (avlblIdx < 32u)
- {
- gblRegs->DRA[rmInstance->initParam.regionId].DRAE
- |= (0x1u << avlblIdx);
-
- if (edma3RegionId == rmInstance->initParam.regionId)
- {
- allocatedTCCs[0u] |= (0x1u << avlblIdx);
- }
- }
- else
+ if (edma3RegionId == rmInstance->initParam.regionId)
{
- gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
- |= (0x1u << (avlblIdx - 32u));
-
- if (edma3RegionId == rmInstance->initParam.regionId)
- {
- allocatedTCCs[1u] |= (0x1u << (avlblIdx - 32u));
- }
- }
+ if (avlblIdx < 32u)
+ {
+ allocatedTCCs[edma3Id][0u] |= (0x1u << avlblIdx);
+ }
+ else
+ {
+ allocatedTCCs[edma3Id][1u] |= (0x1u << (avlblIdx - 32u));
+ }
+ }
}
}
break;
*/
if (TRUE == rmInstance->paramInitRequired)
{
- edma3MemSet((void *)(&gblRegs->PARAMENTRY[avlblIdx]),
- 0x00u,
+ edma3MemZero((void *)(&gblRegs->PARAMENTRY[avlblIdx]),
sizeof(gblRegs->PARAMENTRY[avlblIdx]));
}
}
return result;
}
+
+EDMA3_RM_Result EDMA3_RM_initXbarEventMap (EDMA3_RM_Handle hEdmaResMgr,
+ const EDMA3_RM_GblXbarToChanConfigParams * edmaGblXbarConfig,
+ EDMA3_RM_mapXbarEvtToChan mapXbarEvtFunc,
+ EDMA3_RM_xbarConfigScr configXbarScr)
+ {
+ EDMA3_RM_Result result = EDMA3_DRV_SOK;
+ EDMA3_RM_Instance *rmInstance = NULL;
+
+ /* If parameter checking is enabled... */
+#ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
+ if (hEdmaResMgr == NULL)
+ {
+ result = EDMA3_RM_E_INVALID_PARAM;
+ }
+#endif
+
+ /* Check if the parameters are OK. */
+ if (EDMA3_DRV_SOK == result)
+ {
+ rmInstance = (EDMA3_RM_Instance *)hEdmaResMgr;
+
+ if (mapXbarEvtFunc != NULL)
+ {
+ rmInstance->mapXbarToChan = mapXbarEvtFunc;
+ }
+ if (configXbarScr != NULL)
+ {
+ rmInstance->configScrMapXbarToEvt = configXbarScr;
+ }
+ if (edmaGblXbarConfig != NULL)
+ {
+ edma3MemCpy((void *)(&rmInstance->rmXbarToEvtMapConfig),
+ (const void *)(edmaGblXbarConfig),
+ sizeof (EDMA3_RM_GblXbarToChanConfigParams));
+ }
+ }
+
+ return (result);
+ }
+
/* Resource Manager Internal functions - End */
/* End of File */