EMRH register accessed for all devices

Some devices donot have this registers
See IR SDOCM00091866

diff --git a/packages/ti/sdo/edma3/rm/src/edma3resmgr.c b/packages/ti/sdo/edma3/rm/src/edma3resmgr.c
index 1b09d7d494940ce22699542b032699f7c9299fdf..72e81f5b67321f9b2255eeb60759bd255c39e247 100755 (executable)
--- a/packages/ti/sdo/edma3/rm/src/edma3resmgr.c
+++ b/packages/ti/sdo/edma3/rm/src/edma3resmgr.c
@@ -310,7 +310,7 @@ void edma3MemCpy(void *dst, const void *src, uint32_t len);
 void edma3ParamCpy(void *dst, const void *src);
 
 /** Initialization of the Global region registers of the EDMA3 Controller */
-static void edma3GlobalRegionInit (uint32_t phyCtrllerInstId);
+static void edma3GlobalRegionInit (uint32_t phyCtrllerInstId, uint32_t numDmaChannels);
 /** Initialization of the Shadow region registers of the EDMA3 Controller */
 static void edma3ShadowRegionInit (const EDMA3_RM_Instance *pRMInstance);
 
@@ -515,13 +515,13 @@ EDMA3_RM_Result EDMA3_RM_create (uint32_t phyCtrllerInstId,
                 if (miscOpt->isSlave == FALSE)
                     {
                     /* It is a master. */
-                    edma3GlobalRegionInit(phyCtrllerInstId);
+                    edma3GlobalRegionInit(phyCtrllerInstId, (resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels));
                     }
                 }
             else
                 {
                 /* By default, global registers will be initialized. */
-                edma3GlobalRegionInit(phyCtrllerInstId);
+                edma3GlobalRegionInit(phyCtrllerInstId, (resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels));
                 }
             }
         }
@@ -6018,7 +6018,7 @@ void lisrEdma3TC7ErrHandler0(uint32_t edma3InstanceId)
 /*  Resource Manager Internal functions - Start */
 
 /** Initialization of the Global region registers of the EDMA3 Controller */
-static void edma3GlobalRegionInit (uint32_t phyCtrllerInstId)
+static void edma3GlobalRegionInit (uint32_t phyCtrllerInstId, uint32_t numDmaChannels)
     {
     uint32_t evtQNum = 0u;
     volatile EDMA3_CCRL_Regs *ptrEdmaccRegs = NULL;
@@ -6031,7 +6031,11 @@ static void edma3GlobalRegionInit (uint32_t phyCtrllerInstId)
     if (ptrEdmaccRegs != NULL)
         {
         ptrEdmaccRegs->EMCR = EDMA3_RM_SET_ALL_BITS;
-        ptrEdmaccRegs->EMCRH = EDMA3_RM_SET_ALL_BITS;
+        if ( numDmaChannels > 32)
+        {
+                /* Clear the EMCRH only if available channels are more than 32 */
+                ptrEdmaccRegs->EMCRH = EDMA3_RM_SET_ALL_BITS;
+        }
         ptrEdmaccRegs->QEMCR = EDMA3_RM_SET_ALL_BITS;
 
         /*