Misra C Fixes:
authorSunil MS <x0190988@ti.com>
Wed, 8 Oct 2014 05:33:12 +0000 (11:03 +0530)
committerSunil MS <x0190988@ti.com>
Tue, 14 Oct 2014 09:20:15 +0000 (14:50 +0530)
MISRA.ASM.ENCAPS
MISRA.BITS.NOT_UNSIGNED
MISRA.CVALUE.IMPL.CAST
MISRA.DECL.ARRAY_SIZE
MISRA.DEFINE.BADEXP
MISRA.EXPR.PARENS
MISRA.FUNC.NOPROT.DEF
MISRA.FUNC.UNNAMED.PARAMS
MISRA.IF.NO_COMPOUND
MISRA.IF.NO_ELSE
MISRA.VAR.UNIQUE.STATIC
Signed-off-by: Sunil MS <x0190988@ti.com>
Change-Id: Ib15c65b5b3a650bcd4dc130889c4f4ceaf717003

packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_arm_int_reg.c
packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_cfg.c

index f4db950e74735d084c8fb3081c7e6929f82396db..514d26a10bf56d25c3d3f5d2cf605d3e7955e47f 100644 (file)
   */\r
 void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(uint32_t arg) =\r
                                                 {\r
   */\r
 void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(uint32_t arg) =\r
                                                 {\r
-                                                (void (*)(uint32_t))&lisrEdma3TC0ErrHandler0,\r
-                                                (void (*)(uint32_t))&lisrEdma3TC1ErrHandler0,\r
-                                                (void (*)(uint32_t))&lisrEdma3TC2ErrHandler0,\r
-                                                (void (*)(uint32_t))&lisrEdma3TC3ErrHandler0,\r
-                                                (void (*)(uint32_t))&lisrEdma3TC4ErrHandler0,\r
-                                                (void (*)(uint32_t))&lisrEdma3TC5ErrHandler0,\r
-                                                (void (*)(uint32_t))&lisrEdma3TC6ErrHandler0,\r
-                                                (void (*)(uint32_t))&lisrEdma3TC7ErrHandler0,\r
+                                                &lisrEdma3TC0ErrHandler0,\r
+                                                &lisrEdma3TC1ErrHandler0,\r
+                                                &lisrEdma3TC2ErrHandler0,\r
+                                                &lisrEdma3TC3ErrHandler0,\r
+                                                &lisrEdma3TC4ErrHandler0,\r
+                                                &lisrEdma3TC5ErrHandler0,\r
+                                                &lisrEdma3TC6ErrHandler0,\r
+                                                &lisrEdma3TC7ErrHandler0,\r
                                                 };\r
 \r
                                                 };\r
 \r
-extern unsigned int ccXferCompInt[][EDMA3_MAX_REGIONS];\r
-extern unsigned int ccErrorInt[];\r
-extern unsigned int tcErrorInt[][EDMA3_MAX_TC];\r
-extern unsigned int numEdma3Tc[];\r
+extern unsigned int ccXferCompInt[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];\r
+extern unsigned int ccErrorInt[EDMA3_MAX_EDMA3_INSTANCES];\r
+extern unsigned int tcErrorInt[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_TC];\r
+extern unsigned int numEdma3Tc[EDMA3_MAX_EDMA3_INSTANCES];\r
 \r
 /**\r
  * Variables which will be used internally for referring the hardware interrupt\r
  * for various EDMA3 interrupts.\r
  */\r
 \r
 /**\r
  * Variables which will be used internally for referring the hardware interrupt\r
  * for various EDMA3 interrupts.\r
  */\r
-extern unsigned int hwIntXferComp[];\r
-extern unsigned int hwIntCcErr[];\r
-extern unsigned int hwIntTcErr[];\r
+extern unsigned int hwIntXferComp[EDMA3_MAX_EDMA3_INSTANCES];\r
+extern unsigned int hwIntCcErr[EDMA3_MAX_EDMA3_INSTANCES];\r
+extern unsigned int hwIntTcErr[EDMA3_MAX_EDMA3_INSTANCES];\r
 \r
 extern unsigned int dsp_num;\r
 /* This variable has to be used as an extern */\r
 \r
 extern unsigned int dsp_num;\r
 /* This variable has to be used as an extern */\r
@@ -83,7 +83,7 @@ Hwi_Handle hwiTCErrInt[EDMA3_MAX_TC];
 \r
 /* External Instance Specific Configuration Structure */\r
 extern EDMA3_DRV_GblXbarToChanConfigParams \r
 \r
 /* External Instance Specific Configuration Structure */\r
 extern EDMA3_DRV_GblXbarToChanConfigParams \r
-                                                               sampleXbarChanInitConfig[][EDMA3_MAX_REGIONS];\r
+                                                               sampleXbarChanInitConfig[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];\r
 \r
 typedef struct  {\r
     volatile Uint32 TPCC_EVTMUX[32];\r
 \r
 typedef struct  {\r
     volatile Uint32 TPCC_EVTMUX[32];\r
@@ -116,6 +116,17 @@ EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum,
 \r
 void Edma3MemProtectionHandler(unsigned int edma3InstanceId);\r
 \r
 \r
 void Edma3MemProtectionHandler(unsigned int edma3InstanceId);\r
 \r
+/**  To Register the ISRs with the underlying OS, if required. */\r
+void registerEdma3Interrupts (unsigned int edma3Id);\r
+\r
+/**  To Unregister the ISRs with the underlying OS, if previously registered. */\r
+void unregisterEdma3Interrupts (unsigned int edma3Id);\r
+\r
+EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma, \r
+                                   unsigned int edma3Id);\r
+                                   \r
+void Edma3MemProtectionHandler(unsigned int edma3InstanceId);\r
+\r
 /**  To Register the ISRs with the underlying OS, if required. */\r
 void registerEdma3Interrupts (unsigned int edma3Id)\r
     {\r
 /**  To Register the ISRs with the underlying OS, if required. */\r
 void registerEdma3Interrupts (unsigned int edma3Id)\r
     {\r
@@ -142,7 +153,7 @@ void registerEdma3Interrupts (unsigned int edma3Id)
                                        ((Hwi_FuncPtr)&lisrEdma3ComplHandler0),\r
                                        (const Hwi_Params *) (&hwiParams),\r
                                        &eb);\r
                                        ((Hwi_FuncPtr)&lisrEdma3ComplHandler0),\r
                                        (const Hwi_Params *) (&hwiParams),\r
                                        &eb);\r
-    if (TRUE == Error_check(&eb))\r
+    if ((bool)TRUE == Error_check(&eb))\r
     {\r
         System_printf("HWI Create Failed\n",Error_getCode(&eb));\r
     }\r
     {\r
         System_printf("HWI Create Failed\n",Error_getCode(&eb));\r
     }\r
@@ -159,7 +170,7 @@ void registerEdma3Interrupts (unsigned int edma3Id)
                 (const Hwi_Params *) (&hwiParams),\r
                 &eb);\r
 \r
                 (const Hwi_Params *) (&hwiParams),\r
                 &eb);\r
 \r
-    if (TRUE == Error_check(&eb))\r
+    if ((bool)TRUE == Error_check(&eb))\r
     {\r
         System_printf("HWI Create Failed\n",Error_getCode(&eb));\r
     }\r
     {\r
         System_printf("HWI Create Failed\n",Error_getCode(&eb));\r
     }\r
@@ -177,7 +188,7 @@ void registerEdma3Interrupts (unsigned int edma3Id)
                     (ptrEdma3TcIsrHandler[numTc]),\r
                     (const Hwi_Params *) (&hwiParams),\r
                     &eb);\r
                     (ptrEdma3TcIsrHandler[numTc]),\r
                     (const Hwi_Params *) (&hwiParams),\r
                     &eb);\r
-        if (TRUE == Error_check(&eb))\r
+        if ((bool)TRUE == Error_check(&eb))\r
         {\r
             System_printf("HWI Create Failed\n",Error_getCode(&eb));\r
         }\r
         {\r
             System_printf("HWI Create Failed\n",Error_getCode(&eb));\r
         }\r
@@ -213,11 +224,11 @@ void registerEdma3Interrupts (unsigned int edma3Id)
 /**  To Unregister the ISRs with the underlying OS, if previously registered. */\r
 void unregisterEdma3Interrupts (unsigned int edma3Id)\r
     {\r
 /**  To Unregister the ISRs with the underlying OS, if previously registered. */\r
 void unregisterEdma3Interrupts (unsigned int edma3Id)\r
     {\r
-       static UInt32 cookie = 0;\r
+       static UInt32 cookiee = 0;\r
     unsigned int numTc = 0;\r
 \r
     /* Disabling the global interrupts */\r
     unsigned int numTc = 0;\r
 \r
     /* Disabling the global interrupts */\r
-    cookie = Hwi_disable();\r
+    cookiee = Hwi_disable();\r
 \r
     Hwi_delete(&hwiCCXferCompInt);\r
     Hwi_delete(&hwiCCErrInt);\r
 \r
     Hwi_delete(&hwiCCXferCompInt);\r
     Hwi_delete(&hwiCCErrInt);\r
@@ -227,7 +238,7 @@ void unregisterEdma3Interrupts (unsigned int edma3Id)
         numTc++;\r
        }\r
     /* Restore interrupts */\r
         numTc++;\r
        }\r
     /* Restore interrupts */\r
-    Hwi_restore(cookie);\r
+    Hwi_restore(cookiee);\r
     }\r
 \r
 /**\r
     }\r
 \r
 /**\r
@@ -283,9 +294,9 @@ EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum,
        if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_TDA2XX) &&\r
                (chanNum < EDMA3_NUM_TCC))\r
                {\r
        if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_TDA2XX) &&\r
                (chanNum < EDMA3_NUM_TCC))\r
                {\r
-               scrRegOffset = chanNum / 2;\r
-               scrChanOffset = chanNum - (scrRegOffset * 2);\r
-               xBarEvtNum = eventNum + 1;\r
+               scrRegOffset = chanNum / 2U;\r
+               scrChanOffset = chanNum - (scrRegOffset * 2U);\r
+               xBarEvtNum = eventNum + 1U;\r
                \r
                switch(scrChanOffset)\r
                        {\r
                \r
                switch(scrChanOffset)\r
                        {\r
@@ -293,7 +304,7 @@ EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum,
                                scrEvtMux->TPCC_EVTMUX[scrRegOffset] |=\r
                                        (xBarEvtNum & CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK);\r
                                break;\r
                                scrEvtMux->TPCC_EVTMUX[scrRegOffset] |=\r
                                        (xBarEvtNum & CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK);\r
                                break;\r
-                       case 1:\r
+                       case 1U:\r
                                scrEvtMux->TPCC_EVTMUX[scrRegOffset] |=\r
                                        ((xBarEvtNum << CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT) & \r
                                        (CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK));\r
                                scrEvtMux->TPCC_EVTMUX[scrRegOffset] |=\r
                                        ((xBarEvtNum << CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT) & \r
                                        (CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK));\r
@@ -329,5 +340,8 @@ EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma,
 \r
 void Edma3MemProtectionHandler(unsigned int edma3InstanceId)\r
     {\r
 \r
 void Edma3MemProtectionHandler(unsigned int edma3InstanceId)\r
     {\r
+#ifdef EDMA3_RM_DEBUG\r
+    /*  Added to fix Misra C error */\r
     printf("memory Protection error");\r
     printf("memory Protection error");\r
+#endif\r
     }\r
     }\r
index 7bbfc10bf6a28fd13bb662183f8d74b0f99a2237..a5551d3109c9d4efe3a256c4bcc3ad1f075a8ef7 100644 (file)
@@ -54,24 +54,41 @@ int myCoreNum;
 #define PID0_ADDRESS 0xE00FFFE0\r
 #define CORE_ID_C0 0x0\r
 #define CORE_ID_C1 0x1\r
 #define PID0_ADDRESS 0xE00FFFE0\r
 #define CORE_ID_C0 0x0\r
 #define CORE_ID_C1 0x1\r
-unsigned short determineProcId()\r
-{\r
-unsigned short regionNo = numEdma3Instances;\r
-#ifdef BUILD_TDA2XX_DSP\r
-extern __cregister volatile unsigned int DNUM;\r
-#endif\r
-myCoreNum = numDsps;\r
-#ifdef BUILD_TDA2XX_MPU\r
 \r
 \r
+#ifdef BUILD_TDA2XX_MPU\r
+void __inline readProcFeatureReg(void);\r
+void __inline readProcFeatureReg(void)\r
+{\r
     asm ("    push    {r0-r2} \n\t"\r
             "    MRC p15, 0, r0, c0, c0, 5\n\t"\r
                 "    LDR      r1, =myCoreNum\n\t"\r
                 "    STR      r0, [r1]\n\t"\r
                 "    pop    {r0-r2}\n\t");\r
     asm ("    push    {r0-r2} \n\t"\r
             "    MRC p15, 0, r0, c0, c0, 5\n\t"\r
                 "    LDR      r1, =myCoreNum\n\t"\r
                 "    STR      r0, [r1]\n\t"\r
                 "    pop    {r0-r2}\n\t");\r
-       if((myCoreNum & 0x03) == 1)\r
-               regionNo = 1;\r
-       else\r
-               regionNo = 0;\r
+}\r
+#endif\r
+\r
+signed char*  getGlobalAddr(signed char* addr);\r
+\r
+unsigned short isGblConfigRequired(unsigned int dspNum);\r
+\r
+unsigned short determineProcId(void);\r
+\r
+unsigned short determineProcId(void)\r
+{\r
+unsigned short regionNo = (unsigned short)numEdma3Instances;\r
+#ifdef BUILD_TDA2XX_DSP\r
+extern __cregister volatile unsigned int DNUM;\r
+#endif\r
+myCoreNum = (int)numDsps;\r
+#ifdef BUILD_TDA2XX_MPU\r
+\r
+    readProcFeatureReg();\r
+               regionNo = 0U;\r
+/* myCoreNum is always 1 here, fix for klocwork error(Unreachable code) */\r
+       if(((unsigned int)myCoreNum & 0x03U) == 1U)\r
+    {\r
+               regionNo = 1U;\r
+    }\r
 #elif defined(BUILD_TDA2XX_IPU)\r
 myCoreNum = (*(unsigned int *)(PID0_ADDRESS));\r
 if(Core_getIpuId() == 1){\r
 #elif defined(BUILD_TDA2XX_IPU)\r
 myCoreNum = (*(unsigned int *)(PID0_ADDRESS));\r
 if(Core_getIpuId() == 1){\r
@@ -104,7 +121,7 @@ unsigned short isGblConfigRequired(unsigned int dspNum)
 {\r
     (void) dspNum;\r
 \r
 {\r
     (void) dspNum;\r
 \r
-    return 1;\r
+    return 1U;\r
 }\r
 \r
 /* Semaphore handles */\r
 }\r
 \r
 /* Semaphore handles */\r
@@ -265,7 +282,11 @@ unsigned int hwIntTcErr[NUM_EDMA3_INSTANCES][8] = {
                                                         EDMA3_0_HWI_INT_TC0_ERR,\r
                                                         EDMA3_0_HWI_INT_TC1_ERR,\r
                                                         EDMA3_0_HWI_INT_TC2_ERR,\r
                                                         EDMA3_0_HWI_INT_TC0_ERR,\r
                                                         EDMA3_0_HWI_INT_TC1_ERR,\r
                                                         EDMA3_0_HWI_INT_TC2_ERR,\r
-                                                        EDMA3_0_HWI_INT_TC3_ERR\r
+                                                        EDMA3_0_HWI_INT_TC3_ERR,\r
+                                                        0U,\r
+                                                        0U,\r
+                                                        0U,\r
+                                                        0U\r
                                                      }\r
                                                };\r
 \r
                                                      }\r
                                                };\r
 \r