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raw | patch | inline | side by side (parent: cddbfad)
raw | patch | inline | side by side (parent: cddbfad)
author | Sinthu Raja M <x0257345@ti.com> | |
Wed, 7 Feb 2018 07:37:16 +0000 (13:07 +0530) | ||
committer | Pratap Reddy <x0257344@ti.com> | |
Wed, 21 Feb 2018 20:16:41 +0000 (01:46 +0530) |
Removed generic allocation request modification as per review
comments.
comments.
packages/ti/sdo/edma3/drv/sample/src/platforms/sample_am335x_cfg.c | patch | blob | history | |
packages/ti/sdo/edma3/rm/sample/src/platforms/sample_am335x_cfg.c | patch | blob | history |
diff --git a/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_am335x_cfg.c b/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_am335x_cfg.c
index 142cd13fa93360023af24bc787c2689c6eeac611..459b97f2cc6129361e564764b4c25f71745b11c0 100644 (file)
@@ -455,7 +455,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
{
/* Resources owned by Region 0 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
/* 31 0 63 32 95 64 127 96 */
{0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
/* 159 128 191 160 223 192 255 224 */
@@ -464,16 +463,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -514,16 +503,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
{
/* Resources owned by Region 1 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -532,7 +511,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -573,16 +551,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
{
/* Resources owned by Region 2 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -591,7 +559,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -632,16 +599,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
{
/* Resources owned by Region 3 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -650,7 +607,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -691,16 +647,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
{
/* Resources owned by Region 4 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -709,7 +655,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -750,16 +695,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
{
/* Resources owned by Region 5 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -768,7 +703,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -809,16 +743,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
{
/* Resources owned by Region 6 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -827,7 +751,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -868,16 +791,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
{
/* Resources owned by Region 7 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -886,7 +799,6 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
diff --git a/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_am335x_cfg.c b/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_am335x_cfg.c
index 21f98ad34c1db2a032b61c8056b2e1c49e7e284d..b810963dad49a5a266439bb6ae7b83612585a9fd 100644 (file)
@@ -454,16 +454,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
{
/* Resources owned by Region 0 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -472,7 +462,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -572,16 +561,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
{
/* Resources owned by Region 2 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -590,7 +569,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -631,16 +609,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
{
/* Resources owned by Region 3 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -649,7 +617,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -690,16 +657,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
{
/* Resources owned by Region 4 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -708,7 +665,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -749,16 +705,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
{
/* Resources owned by Region 5 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -767,7 +713,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -808,16 +753,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
{
/* Resources owned by Region 6 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -826,7 +761,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */
@@ -867,16 +801,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
{
/* Resources owned by Region 7 */
/* ownPaRAMSets */
-#ifdef EDMA3_RES_USER_REQ
- /* 31 0 63 32 95 64 127 96 */
- {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 159 128 191 160 223 192 255 224 */
- 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
- /* 287 256 319 288 351 320 383 352 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
- /* 415 384 447 416 479 448 511 480 */
- 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#else
/* 31 0 63 32 95 64 127 96 */
{0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 159 128 191 160 223 192 255 224 */
@@ -885,7 +809,6 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
/* 415 384 447 416 479 448 511 480 */
0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
-#endif
/* ownDmaChannels */
/* 31 0 63 32 */