Fix for SDOCM00086934 same interrupt number is used for all TC error
authorPrasad Konnur <prasad.konnur@ti.com>
Thu, 1 Dec 2011 11:27:06 +0000 (16:57 +0530)
committerPrasad Konnur <prasad.konnur@ti.com>
Thu, 1 Dec 2011 11:27:06 +0000 (16:57 +0530)
packages/ti/sdo/edma3/drv/sample/src/platforms/sample_ti814x_cfg.c
packages/ti/sdo/edma3/drv/sample/src/platforms/sample_ti816x_cfg.c

index d6544f2b5d8d6cf19b95a8ddd74d0046f008191e..07aa75b5af751ff5a5fa061ff2e975fe94ffd223 100755 (executable)
@@ -145,9 +145,9 @@ EDMA3_OS_Sem_Handle semHandle[NUM_EDMA3_INSTANCES] = {NULL};
 
 #ifdef BUILD_CENTAURUS_A8
 #define EDMA3_TC0_ERROR_INT                             EDMA3_TC0_ERROR_INT_A8
-#define EDMA3_TC1_ERROR_INT                             EDMA3_TC0_ERROR_INT_A8
-#define EDMA3_TC2_ERROR_INT                             EDMA3_TC0_ERROR_INT_A8
-#define EDMA3_TC3_ERROR_INT                             EDMA3_TC0_ERROR_INT_A8
+#define EDMA3_TC1_ERROR_INT                             EDMA3_TC1_ERROR_INT_A8
+#define EDMA3_TC2_ERROR_INT                             EDMA3_TC2_ERROR_INT_A8
+#define EDMA3_TC3_ERROR_INT                             EDMA3_TC3_ERROR_INT_A8
 #elif defined BUILD_CENTAURUS_DSP
 #define EDMA3_TC0_ERROR_INT                             EDMA3_TC0_ERROR_INT_DSP
 #define EDMA3_TC1_ERROR_INT                             EDMA3_TC1_ERROR_INT_DSP
index a15f8908f70bff39006ca0fde02275b0b051b961..7c0999ad933555a0d2cee3c4e6359a178aaf9da1 100644 (file)
@@ -141,9 +141,9 @@ EDMA3_OS_Sem_Handle semHandle[NUM_EDMA3_INSTANCES] = {NULL};
 
 #ifdef BUILD_NETRA_A8
 #define EDMA3_TC0_ERROR_INT                             {EDMA3_TC0_ERROR_INT_A8}
-#define EDMA3_TC1_ERROR_INT                             {EDMA3_TC0_ERROR_INT_A8}
-#define EDMA3_TC2_ERROR_INT                             {EDMA3_TC0_ERROR_INT_A8}
-#define EDMA3_TC3_ERROR_INT                             {EDMA3_TC0_ERROR_INT_A8}
+#define EDMA3_TC1_ERROR_INT                             {EDMA3_TC1_ERROR_INT_A8}
+#define EDMA3_TC2_ERROR_INT                             {EDMA3_TC2_ERROR_INT_A8}
+#define EDMA3_TC3_ERROR_INT                             {EDMA3_TC3_ERROR_INT_A8}
 #elif defined BUILD_NETRA_DSP
 #define EDMA3_TC0_ERROR_INT                             {EDMA3_TC0_ERROR_INT_DSP}
 #define EDMA3_TC1_ERROR_INT                             (0u)