fixed warnings in building edma libs
authorPrasad Konnur <prasad.konnur@ti.com>
Wed, 4 Jan 2012 13:13:44 +0000 (18:43 +0530)
committerPrasad Konnur <prasad.konnur@ti.com>
Wed, 4 Jan 2012 13:13:44 +0000 (18:43 +0530)
fix for IR: SDOCM00088023

Signed-off-by: Prasad Konnur <prasad.konnur@ti.com>
16 files changed:
packages/ti/sdo/edma3/drv/makefile
packages/ti/sdo/edma3/drv/sample/makefile
packages/ti/sdo/edma3/drv/sample/src/platforms/sample_ti814x_arm_int_reg.c
packages/ti/sdo/edma3/drv/sample/src/platforms/sample_ti816x_arm_int_reg.c
packages/ti/sdo/edma3/drv/sample/src/platforms/sample_ti816x_cfg.c
packages/ti/sdo/edma3/drv/sample/src/sample_arm_init.c
packages/ti/sdo/edma3/drv/sample/src/sample_init.c
packages/ti/sdo/edma3/drv/src/edma3_drv_adv.c
packages/ti/sdo/edma3/drv/src/edma3_drv_basic.c
packages/ti/sdo/edma3/rm/makefile
packages/ti/sdo/edma3/rm/sample/makefile
packages/ti/sdo/edma3/rm/sample/src/platforms/sample_ti814x_m3video_int_reg.c
packages/ti/sdo/edma3/rm/sample/src/platforms/sample_ti814x_m3vpss_int_reg.c
packages/ti/sdo/edma3/rm/sample/src/platforms/sample_ti816x_m3video_int_reg.c
packages/ti/sdo/edma3/rm/sample/src/platforms/sample_ti816x_m3vpss_int_reg.c
packages/ti/sdo/edma3/rm/src/edma3resmgr.c

index d77d41abf0ab363eef50d9532b975a6f271fca07..c6f5ccc228ccc196885f862d111549d3dcd4cf41 100644 (file)
@@ -11,7 +11,9 @@ INCLUDE_EXERNAL_INTERFACES =
 
 # Common source files and CFLAGS across all platforms and cores
 SRCS_COMMON = edma3_drv_init.c edma3_drv_basic.c edma3_drv_adv.c
+ifeq ($(CORE),c6xdsp)
 CFLAGS_LOCAL_COMMON = -mi10
+endif
 
 # Core/SoC/platform specific source files and CFLAGS
 # Example: 
index f74b656d126ddb539d78256230f32b13f5bcc8d0..cba3f438233a22552d3d7e0e78cde8e2a83a1a72 100755 (executable)
@@ -15,7 +15,9 @@ SRCS_COMMON = sample_cs.c sample_init.c
 else
 SRCS_COMMON = sample_arm_cs.c sample_arm_init.c
 endif
+ifeq ($(CORE),c6xdsp)
 CFLAGS_LOCAL_COMMON = -mi10
+endif
 
 # Core/SoC/platform specific source files and CFLAGS
 # Example: 
index 47fe3014c7896b8a3bd538fccc8a72f92fc2752f..c79edca725b3e598683b31338e056d3d1f0cd390 100755 (executable)
@@ -134,7 +134,9 @@ void Edma3MemProtectionHandler(unsigned int edma3InstanceId);
 void registerEdma3Interrupts (unsigned int edma3Id)
     {
     static UInt32 cookie = 0;
+#ifdef BUILD_CENTAURUS_A8
     unsigned int numTc = 0;
+#endif
     Hwi_Params hwiParams; 
     Error_Block      eb;
 
index 1dd930d7ffcd8176187fc7dd39e2020765f97daa..2679965ec6cc993ce24dd02fe33eca386102a038 100755 (executable)
@@ -87,7 +87,9 @@ Hwi_Handle hwiTCErrInt[EDMA3_MAX_TC];
 void registerEdma3Interrupts (unsigned int edma3Id)
     {
     static UInt32 cookie = 0;
+#ifdef BUILD_NETRA_A8
     unsigned int numTc = 0;
+#endif
     Hwi_Params hwiParams; 
     Error_Block      eb;
 
index 7c0999ad933555a0d2cee3c4e6359a178aaf9da1..5bf805d20fce3ede0e0ff441f05a47a12a9de386 100644 (file)
@@ -125,9 +125,9 @@ EDMA3_OS_Sem_Handle semHandle[NUM_EDMA3_INSTANCES] = {NULL};
 #define EDMA3_CC_ERROR_INT_DSP                          (21u)
 
 #ifdef BUILD_NETRA_A8
-#define EDMA3_CC_ERROR_INT                              {EDMA3_CC_ERROR_INT_A8}
+#define EDMA3_CC_ERROR_INT                              EDMA3_CC_ERROR_INT_A8
 #elif defined BUILD_NETRA_DSP
-#define EDMA3_CC_ERROR_INT                              {EDMA3_CC_ERROR_INT_DSP}
+#define EDMA3_CC_ERROR_INT                              EDMA3_CC_ERROR_INT_DSP
 #else
 #define EDMA3_CC_ERROR_INT                              (0u)
 #endif
@@ -140,12 +140,12 @@ EDMA3_OS_Sem_Handle semHandle[NUM_EDMA3_INSTANCES] = {NULL};
 #define EDMA3_TC3_ERROR_INT_A8                          (115u)
 
 #ifdef BUILD_NETRA_A8
-#define EDMA3_TC0_ERROR_INT                             {EDMA3_TC0_ERROR_INT_A8}
-#define EDMA3_TC1_ERROR_INT                             {EDMA3_TC1_ERROR_INT_A8}
-#define EDMA3_TC2_ERROR_INT                             {EDMA3_TC2_ERROR_INT_A8}
-#define EDMA3_TC3_ERROR_INT                             {EDMA3_TC3_ERROR_INT_A8}
+#define EDMA3_TC0_ERROR_INT                             EDMA3_TC0_ERROR_INT_A8
+#define EDMA3_TC1_ERROR_INT                             EDMA3_TC1_ERROR_INT_A8
+#define EDMA3_TC2_ERROR_INT                             EDMA3_TC2_ERROR_INT_A8
+#define EDMA3_TC3_ERROR_INT                             EDMA3_TC3_ERROR_INT_A8
 #elif defined BUILD_NETRA_DSP
-#define EDMA3_TC0_ERROR_INT                             {EDMA3_TC0_ERROR_INT_DSP}
+#define EDMA3_TC0_ERROR_INT                             EDMA3_TC0_ERROR_INT_DSP
 #define EDMA3_TC1_ERROR_INT                             (0u)
 #define EDMA3_TC2_ERROR_INT                             (0u)
 #define EDMA3_TC3_ERROR_INT                             (0u)
index 8375caee739a0630d892fa3212306319c7696b28..b31a6623548a840cd7d2365a5b2028fb1b355cd4 100644 (file)
@@ -88,6 +88,10 @@ extern EDMA3_DRV_GblConfigParams sampleEdma3GblCfgParams[];
 /* External Instance Specific Configuration Structure */
 extern EDMA3_DRV_InstanceInitConfig sampleInstInitConfig[][EDMA3_MAX_REGIONS];
 
+#if defined (CHIP_TI814X)
+extern EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma, unsigned int edma3Id);
+#endif
+
 /**
  * \brief   EDMA3 Initialization
  *
index d5329e04db1f9a8e83e928bfb4a5bfaa644a25f4..ae2bbbd93aab1a7f71849ab0075d633c9b565d8f 100755 (executable)
@@ -85,6 +85,10 @@ extern EDMA3_DRV_GblConfigParams sampleEdma3GblCfgParams[];
 /* External Instance Specific Configuration Structure */
 extern EDMA3_DRV_InstanceInitConfig sampleInstInitConfig[][EDMA3_MAX_REGIONS];
 
+#if defined (CHIP_TI814X)
+extern EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma, unsigned int edma3Id);
+#endif
+
 /**
  * \brief   EDMA3 Initialization
  *
index 58a1e2b6e2ffcb35f6a2986c6bb6ec2205300b82..7892fab8abff27de098e863e0c57e4d3db795a47 100755 (executable)
@@ -583,7 +583,7 @@ EDMA3_DRV_Result EDMA3_DRV_setQdmaTrigWord (EDMA3_DRV_Handle hEdma,
        /* If parameter checking is enabled... */
 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
     if((hEdma == NULL)
-        || ((trigWord < EDMA3_RM_QDMA_TRIG_OPT)
+        || (((int32_t)trigWord < (int32_t)EDMA3_RM_QDMA_TRIG_OPT)
         || (trigWord > EDMA3_RM_QDMA_TRIG_CCNT)))
         {
         result = EDMA3_DRV_E_INVALID_PARAM;
@@ -812,7 +812,7 @@ EDMA3_DRV_Result EDMA3_DRV_setPaRAMEntry (EDMA3_DRV_Handle hEdma,
        /* If parameter checking is enabled... */
 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
     if((hEdma == NULL)
-        || ((paRAMEntry < EDMA3_DRV_PARAM_ENTRY_OPT)
+        || (((int32_t)paRAMEntry < (int32_t)EDMA3_DRV_PARAM_ENTRY_OPT)
         || (paRAMEntry > EDMA3_DRV_PARAM_ENTRY_CCNT)))
         {
         result = EDMA3_DRV_E_INVALID_PARAM;
@@ -896,7 +896,7 @@ EDMA3_DRV_Result EDMA3_DRV_getPaRAMEntry (EDMA3_DRV_Handle hEdma,
         result = EDMA3_DRV_E_INVALID_PARAM;
         }
 
-    if((paRAMEntry < EDMA3_DRV_PARAM_ENTRY_OPT)
+    if(((int32_t)paRAMEntry < (int32_t)EDMA3_DRV_PARAM_ENTRY_OPT)
         || (paRAMEntry > EDMA3_DRV_PARAM_ENTRY_CCNT))
         {
         result = EDMA3_DRV_E_INVALID_PARAM;
@@ -977,7 +977,7 @@ EDMA3_DRV_Result EDMA3_DRV_setPaRAMField (EDMA3_DRV_Handle hEdma,
        /* If parameter checking is enabled... */
 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
     if((hEdma == NULL)
-        || ((paRAMField < EDMA3_DRV_PARAM_FIELD_OPT)
+        || (((int32_t)paRAMField < (int32_t)EDMA3_DRV_PARAM_FIELD_OPT)
         || (paRAMField > EDMA3_DRV_PARAM_FIELD_CCNT)))
         {
         result =  EDMA3_DRV_E_INVALID_PARAM;
@@ -1159,7 +1159,7 @@ EDMA3_DRV_Result EDMA3_DRV_getPaRAMField (EDMA3_DRV_Handle hEdma,
         result =  EDMA3_DRV_E_INVALID_PARAM;
         }
 
-    if((paRAMField < EDMA3_DRV_PARAM_FIELD_OPT)
+    if(((int32_t)paRAMField < (int32_t)EDMA3_DRV_PARAM_FIELD_OPT)
        || (paRAMField > EDMA3_DRV_PARAM_FIELD_CCNT))
         {
         result =  EDMA3_DRV_E_INVALID_PARAM;
@@ -2320,7 +2320,7 @@ EDMA3_DRV_Result EDMA3_DRV_setTcErrorInt(uint32_t phyCtrllerInstId,
         result = EDMA3_DRV_E_INVALID_PARAM;
         }
 
-    if ((tcErr < EDMA3_DRV_TC_ERR_BUSERR_DIS)
+    if (((int32_t)tcErr < (int32_t)EDMA3_DRV_TC_ERR_BUSERR_DIS)
         || (tcErr > EDMA3_DRV_TC_ERR_EN))
         {
         result = EDMA3_DRV_E_INVALID_PARAM;
index a89a86460b25bc537af8c6f492004eab68916610..ba26f8ca46990c51f968777747ee36422fdc2fc4 100755 (executable)
@@ -933,7 +933,7 @@ EDMA3_DRV_Result EDMA3_DRV_setOptField (EDMA3_DRV_Handle hEdma,
        /* If parameter checking is enabled... */
 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
     if ((hEdma == NULL)
-        || ((optField < EDMA3_DRV_OPT_FIELD_SAM)
+        || (((int32_t)optField < (int32_t)EDMA3_DRV_OPT_FIELD_SAM)
         || (optField > EDMA3_DRV_OPT_FIELD_ITCCHEN)))
         {
         result = EDMA3_DRV_E_INVALID_PARAM;
@@ -1077,7 +1077,7 @@ EDMA3_DRV_Result EDMA3_DRV_getOptField (EDMA3_DRV_Handle hEdma,
        /* If parameter checking is enabled... */
 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
     if (((hEdma == NULL) || (optFieldVal == NULL))
-        || ((optField < EDMA3_DRV_OPT_FIELD_SAM)
+        || (((int32_t)optField < (int32_t)EDMA3_DRV_OPT_FIELD_SAM)
         || (optField > EDMA3_DRV_OPT_FIELD_ITCCHEN)))
         {
         result = EDMA3_DRV_E_INVALID_PARAM;
@@ -1200,8 +1200,8 @@ EDMA3_DRV_Result EDMA3_DRV_setSrcParams (EDMA3_DRV_Handle hEdma,
        /* If parameter checking is enabled... */
 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
     if ((hEdma == NULL)
-        || (((addrMode < EDMA3_DRV_ADDR_MODE_INCR) || (addrMode > EDMA3_DRV_ADDR_MODE_FIFO))
-        || ((fifoWidth < EDMA3_DRV_W8BIT) || (fifoWidth > EDMA3_DRV_W256BIT))))
+        || ((((int32_t)addrMode < (int32_t)EDMA3_DRV_ADDR_MODE_INCR) || (addrMode > EDMA3_DRV_ADDR_MODE_FIFO))
+        || (((int32_t)fifoWidth < (int32_t)EDMA3_DRV_W8BIT) || (fifoWidth > EDMA3_DRV_W256BIT))))
         {
         result = EDMA3_DRV_E_INVALID_PARAM;
         }
@@ -1345,8 +1345,8 @@ EDMA3_DRV_Result EDMA3_DRV_setDestParams (EDMA3_DRV_Handle hEdma,
        /* If parameter checking is enabled... */
 #ifndef EDMA3_DRV_PARAM_CHECK_DISABLE
     if ((hEdma == NULL)
-        || (((addrMode < EDMA3_DRV_ADDR_MODE_INCR) || (addrMode > EDMA3_DRV_ADDR_MODE_FIFO))
-        || ((fifoWidth < EDMA3_DRV_W8BIT) || (fifoWidth > EDMA3_DRV_W256BIT))))
+        || ((((int32_t)addrMode < (int32_t)EDMA3_DRV_ADDR_MODE_INCR) || (addrMode > EDMA3_DRV_ADDR_MODE_FIFO))
+        || (((int32_t)fifoWidth < (int32_t)EDMA3_DRV_W8BIT) || (fifoWidth > EDMA3_DRV_W256BIT))))
         {
         result = EDMA3_DRV_E_INVALID_PARAM;
         }
@@ -1711,7 +1711,7 @@ EDMA3_DRV_Result EDMA3_DRV_setTransferParams (EDMA3_DRV_Handle hEdma,
         || (bCnt > EDMA3_DRV_BCNT_MAX_VAL))
         || ((cCnt > EDMA3_DRV_CCNT_MAX_VAL)
         || (bCntReload > EDMA3_DRV_BCNTRELD_MAX_VAL)))
-        || ((syncType < EDMA3_DRV_SYNC_A) || (syncType > EDMA3_DRV_SYNC_AB)))
+        || (((int32_t)syncType < (int32_t)EDMA3_DRV_SYNC_A) || (syncType > EDMA3_DRV_SYNC_AB)))
         {
         result = EDMA3_DRV_E_INVALID_PARAM;
         }
index fe82afac6549c2464f6c27970664dc8686771d70..5a62350937a869a2f488c5128bc5bdb0ddc315ee 100644 (file)
@@ -11,7 +11,9 @@ INCLUDE_EXERNAL_INTERFACES =
 
 # Common source files and CFLAGS across all platforms and cores
 SRCS_COMMON = edma3resmgr.c edma3_rm_gbl_data.c
+ifeq ($(CORE),c6xdsp)
 CFLAGS_LOCAL_COMMON = -mi10
+endif
 
 # Core/SoC/platform specific source files and CFLAGS
 # Example: 
index 339ba9d608af6b9e7e7350fada27e79afd4e0a23..b6a632fd3acddd6fc60c13fb04e4fc5933cb20b8 100755 (executable)
@@ -15,7 +15,9 @@ SRCS_COMMON = sample_cs.c sample_init.c
 else
 SRCS_COMMON = sample_arm_cs.c sample_arm_init.c
 endif
+ifeq ($(CORE),c6xdsp)
 CFLAGS_LOCAL_COMMON = -mi10
+endif
 
 # Core/SoC/platform specific source files and CFLAGS
 # Example: 
index 79347dc020f105c03f9630daa5003f1fdb6fe122..f6dabd784ff6a7072979e2cb09f819eaf5a43176 100644 (file)
@@ -87,7 +87,7 @@ Hwi_Handle hwiTCErrInt[EDMA3_MAX_TC];
 void registerEdma3Interrupts (unsigned int edma3Id)
     {
     static UInt32 cookie = 0;
-    unsigned int numTc = 0;
+    //unsigned int numTc = 0;
     Hwi_Params hwiParams; 
     Error_Block      eb;
 
index 79347dc020f105c03f9630daa5003f1fdb6fe122..f6dabd784ff6a7072979e2cb09f819eaf5a43176 100644 (file)
@@ -87,7 +87,7 @@ Hwi_Handle hwiTCErrInt[EDMA3_MAX_TC];
 void registerEdma3Interrupts (unsigned int edma3Id)
     {
     static UInt32 cookie = 0;
-    unsigned int numTc = 0;
+    //unsigned int numTc = 0;
     Hwi_Params hwiParams; 
     Error_Block      eb;
 
index 79347dc020f105c03f9630daa5003f1fdb6fe122..f6dabd784ff6a7072979e2cb09f819eaf5a43176 100755 (executable)
@@ -87,7 +87,7 @@ Hwi_Handle hwiTCErrInt[EDMA3_MAX_TC];
 void registerEdma3Interrupts (unsigned int edma3Id)
     {
     static UInt32 cookie = 0;
-    unsigned int numTc = 0;
+    //unsigned int numTc = 0;
     Hwi_Params hwiParams; 
     Error_Block      eb;
 
index 79347dc020f105c03f9630daa5003f1fdb6fe122..f6dabd784ff6a7072979e2cb09f819eaf5a43176 100755 (executable)
@@ -87,7 +87,7 @@ Hwi_Handle hwiTCErrInt[EDMA3_MAX_TC];
 void registerEdma3Interrupts (unsigned int edma3Id)
     {
     static UInt32 cookie = 0;
-    unsigned int numTc = 0;
+    //unsigned int numTc = 0;
     Hwi_Params hwiParams; 
     Error_Block      eb;
 
index 0d0f893ed290b9f58fc9b536ad901bf80178e189..1b09d7d494940ce22699542b032699f7c9299fdf 100755 (executable)
@@ -3010,7 +3010,7 @@ EDMA3_RM_Result EDMA3_RM_mapQdmaChannel (EDMA3_RM_Handle hEdmaResMgr,
        /* If parameter checking is enabled... */
 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
     if ((hEdmaResMgr == NULL)
-        || ((trigWord < EDMA3_RM_QDMA_TRIG_OPT)
+        || (((int32_t)trigWord < (int32_t)EDMA3_RM_QDMA_TRIG_OPT)
         || (trigWord > EDMA3_RM_QDMA_TRIG_CCNT)))
         {
         result = EDMA3_RM_E_INVALID_PARAM;
@@ -4835,7 +4835,7 @@ EDMA3_RM_Result EDMA3_RM_getBaseAddress (EDMA3_RM_Handle hEdmaResMgr,
                /* If parameter checking is enabled... */
 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
         /* Verify the 'controllerId' */
-        if ((controllerId < ((EDMA3_RM_Cntrlr_PhyAddr)(EDMA3_RM_CC_PHY_ADDR)))
+        if (((int32_t)controllerId < (int32_t)((EDMA3_RM_Cntrlr_PhyAddr)(EDMA3_RM_CC_PHY_ADDR)))
             || (controllerId > (EDMA3_RM_Cntrlr_PhyAddr)(rmObj->gblCfgParams.numTcs)))
             {
             /* Invalid controllerId */