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raw | patch | inline | side by side (parent: f8ccdb5)
raw | patch | inline | side by side (parent: f8ccdb5)
author | Prasad Konnur <prasadkonnur@ti.com> | |
Wed, 26 Jun 2013 13:25:14 +0000 (18:55 +0530) | ||
committer | Prasad Konnur <prasadkonnur@ti.com> | |
Wed, 26 Jun 2013 13:25:14 +0000 (18:55 +0530) |
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
15 files changed:
index 9cf2127c106334c884443d4029e7f27d6b0a8878..7d12c52a9c491c926773300fb3fa0d129d32175f 100644 (file)
signed char _srcBuff1[MAX_BUFFER_SIZE];
#else
#ifdef EDMA3_ENABLE_DCACHE
-signed char _srcBuff1[MAX_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
+signed char __attribute__((section(".my_sect_ddr"))) _srcBuff1[MAX_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
#else
-signed char _srcBuff1[MAX_BUFFER_SIZE];
+signed char __attribute__((section(".my_sect_ddr"))) _srcBuff1[MAX_BUFFER_SIZE];
#endif
#endif
signed char _dstBuff1[MAX_BUFFER_SIZE];
#else
#ifdef EDMA3_ENABLE_DCACHE
-signed char _dstBuff1[MAX_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
+signed char __attribute__((section(".my_sect_ddr"))) _dstBuff1[MAX_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
#else
-signed char _dstBuff1[MAX_BUFFER_SIZE];
+signed char __attribute__((section(".my_sect_ddr"))) _dstBuff1[MAX_BUFFER_SIZE];
#endif
#endif
signed char _srcBuff2[MAX_BUFFER_SIZE];
#else
#ifdef EDMA3_ENABLE_DCACHE
-signed char _srcBuff2[MAX_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
+signed char __attribute__((section(".my_sect_ddr"))) _srcBuff2[MAX_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
#else
-signed char _srcBuff2[MAX_BUFFER_SIZE];
+signed char __attribute__((section(".my_sect_ddr"))) _srcBuff2[MAX_BUFFER_SIZE];
#endif
#endif
signed char _dstBuff2[MAX_BUFFER_SIZE];
#else
#ifdef EDMA3_ENABLE_DCACHE
-signed char _dstBuff2[MAX_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
+signed char __attribute__((section(".my_sect_ddr"))) _dstBuff2[MAX_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
#else
-signed char _dstBuff2[MAX_BUFFER_SIZE];
+signed char __attribute__((section(".my_sect_ddr"))) _dstBuff2[MAX_BUFFER_SIZE];
#endif
#endif
/* Callback function 1 */
-void callback1 (unsigned int tcc, EDMA3_RM_TccStatus status,
+void callback1 (uint32_t tcc, EDMA3_RM_TccStatus status,
void *appData)
{
(void)tcc;
/* Callback function 2 */
-void callback2 (unsigned int tcc, EDMA3_RM_TccStatus status,
+void callback2 (uint32_t tcc, EDMA3_RM_TccStatus status,
void *appData)
{
(void)tcc;
diff --git a/examples/edma3_driver/src/dma_chain_test.c b/examples/edma3_driver/src/dma_chain_test.c
index f45e234e129d86df1144435b580787e4f4414bf0..f8e53a65a140262f2e7f738139d3ba1f894aa949 100755 (executable)
*/
EDMA3_DRV_Result edma3_test_with_chaining(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType)
{
EDMA3_DRV_ChainOptions chain = {EDMA3_DRV_TCCHEN_DIS,
EDMA3_DRV_TCINTEN_DIS,
EDMA3_DRV_ITCINTEN_DIS};
EDMA3_DRV_Result result = EDMA3_DRV_SOK;
- unsigned int BRCnt = 0;
+ uint32_t BRCnt = 0;
int srcbidx = 0, desbidx = 0;
int srccidx = 0, descidx = 0;
- unsigned int ch1Id = 0;
- unsigned int ch2Id = 0;
- unsigned int tcc1 = 0;
- unsigned int tcc2 = 0;
+ uint32_t ch1Id = 0;
+ uint32_t ch2Id = 0;
+ uint32_t tcc1 = 0;
+ uint32_t tcc2 = 0;
int i;
- unsigned int numenabled = 0;
- unsigned int count;
- unsigned int Istestpassed1 = 0u;
- unsigned int Istestpassed2 = 0u;
+ uint32_t numenabled = 0;
+ uint32_t count;
+ uint32_t Istestpassed1 = 0u;
+ uint32_t Istestpassed2 = 0u;
srcBuff1 = (signed char*) GLOBAL_ADDR(_srcBuff1);
/* Flush the Source Buffers */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheFlush((unsigned int)srcBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheFlush((uint32_t)srcBuff1, (acnt*bcnt*ccnt));
}
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheFlush((unsigned int)srcBuff2, (acnt*bcnt*ccnt));
+ result = Edma3_CacheFlush((uint32_t)srcBuff2, (acnt*bcnt*ccnt));
}
/* Invalidate the Destination Buffers */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheInvalidate((uint32_t)dstBuff1, (acnt*bcnt*ccnt));
}
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstBuff2, (acnt*bcnt*ccnt));
+ result = Edma3_CacheInvalidate((uint32_t)dstBuff2, (acnt*bcnt*ccnt));
}
#endif /* EDMA3_ENABLE_DCACHE */
if (result == EDMA3_DRV_SOK)
{
result = EDMA3_DRV_setSrcParams (hEdma, ch1Id,
- (unsigned int)(srcBuff1),
+ (uint32_t)(srcBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
if (result == EDMA3_DRV_SOK)
{
result = EDMA3_DRV_setDestParams (hEdma, ch1Id,
- (unsigned int)(dstBuff1),
+ (uint32_t)(dstBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
if (result == EDMA3_DRV_SOK)
{
- result = EDMA3_DRV_setSrcParams (hEdma, ch2Id, (unsigned int)(srcBuff2),
+ result = EDMA3_DRV_setSrcParams (hEdma, ch2Id, (uint32_t)(srcBuff2),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
if (result == EDMA3_DRV_SOK)
{
result = EDMA3_DRV_setDestParams (hEdma, ch2Id,
- (unsigned int)(dstBuff2),
+ (uint32_t)(dstBuff2),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
index 20d5cd8b9860a177c3a99408e234fd2a82b28e10..46c322dfeab7c062e13d9203b8f0f68f726532ad 100755 (executable)
*/
EDMA3_DRV_Result edma3_test_with_link(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType)
{
EDMA3_DRV_Result result = EDMA3_DRV_SOK;
EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0};
- unsigned int ch1Id = 0;
- unsigned int ch2Id = 0;
- unsigned int tcc1 = 0;
- unsigned int tcc2 = 0;
+ uint32_t ch1Id = 0;
+ uint32_t ch2Id = 0;
+ uint32_t tcc1 = 0;
+ uint32_t tcc2 = 0;
int i;
- unsigned int count;
- unsigned int Istestpassed1 = 0u;
- unsigned int Istestpassed2 = 0u;
- unsigned int numenabled = 0;
- unsigned int BRCnt = 0;
+ uint32_t count;
+ uint32_t Istestpassed1 = 0u;
+ uint32_t Istestpassed2 = 0u;
+ uint32_t numenabled = 0;
+ uint32_t BRCnt = 0;
int srcbidx = 0, desbidx = 0;
int srccidx = 0, descidx = 0;
/* Flush the Source Buffers */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheFlush((unsigned int)srcBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheFlush((uint32_t)srcBuff1, (acnt*bcnt*ccnt));
}
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheFlush((unsigned int)srcBuff2, (acnt*bcnt*ccnt));
+ result = Edma3_CacheFlush((uint32_t)srcBuff2, (acnt*bcnt*ccnt));
}
/* Invalidate the Destination Buffers */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheInvalidate((uint32_t)dstBuff1, (acnt*bcnt*ccnt));
}
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstBuff2, (acnt*bcnt*ccnt));
+ result = Edma3_CacheInvalidate((uint32_t)dstBuff2, (acnt*bcnt*ccnt));
}
#endif /* EDMA3_ENABLE_DCACHE */
if (result == EDMA3_DRV_SOK)
{
/* Fill the PaRAM Set with transfer specific information */
- paramSet.srcAddr = (unsigned int)(srcBuff1);
- paramSet.destAddr = (unsigned int)(dstBuff1);
+ paramSet.srcAddr = (uint32_t)(srcBuff1);
+ paramSet.destAddr = (uint32_t)(dstBuff1);
/**
* Be Careful !!!
if (result == EDMA3_DRV_SOK)
{
- result = EDMA3_DRV_setSrcParams (hEdma, ch1Id, (unsigned int)(srcBuff1),
+ result = EDMA3_DRV_setSrcParams (hEdma, ch1Id, (uint32_t)(srcBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
if (result == EDMA3_DRV_SOK)
{
result = EDMA3_DRV_setDestParams (hEdma, ch1Id,
- (unsigned int)(dstBuff1),
+ (uint32_t)(dstBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
* Fill the PaRAM Set for the LINK channel
* with transfer specific information.
*/
- paramSet.srcAddr = (unsigned int)(srcBuff2);
- paramSet.destAddr = (unsigned int)(dstBuff2);
+ paramSet.srcAddr = (uint32_t)(srcBuff2);
+ paramSet.destAddr = (uint32_t)(dstBuff2);
/**
* Be Careful !!!
if (result == EDMA3_DRV_SOK)
{
- result = EDMA3_DRV_setSrcParams (hEdma, ch2Id, (unsigned int)(srcBuff2),
+ result = EDMA3_DRV_setSrcParams (hEdma, ch2Id, (uint32_t)(srcBuff2),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
if (result == EDMA3_DRV_SOK)
{
result = EDMA3_DRV_setDestParams (hEdma, ch2Id,
- (unsigned int)(dstBuff2),
+ (uint32_t)(dstBuff2),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
index 6117c2d391a955f75808d3ceb84eba6e77046e89..372bf35c65b1ca7261e3d4d73f9e12519928f9d3 100644 (file)
EDMA3_DRV_Result edma3_misc_test(EDMA3_DRV_Handle hEdma)
{
EDMA3_DRV_Result drvResult = EDMA3_DRV_SOK;
- unsigned int ccRegOffset = 0u;
- unsigned int ccRegVal = 0u;
- unsigned int newRegVal = 0u;
- unsigned int origRegVal = 0u;
+ uint32_t ccRegOffset = 0u;
+ uint32_t ccRegVal = 0u;
+ uint32_t newRegVal = 0u;
+ uint32_t origRegVal = 0u;
/**
diff --git a/examples/edma3_driver/src/dma_ping_pong_test.c b/examples/edma3_driver/src/dma_ping_pong_test.c
index 4d796627c5ec922e6be50e645c4df5b3e4f86e56..b86fbdd64536d7529b56dcaf7c937176c5f487aa 100755 (executable)
/* Ping pong source buffer */
+#ifndef BUILD_TDA2XX_MPU
#ifdef EDMA3_ENABLE_DCACHE
/* Cache line aligned big source buffer. */
/**
#endif /* #ifdef EDMA3_ENABLE_DCACHE */
#pragma DATA_SECTION(_pingpongSrcBuf, ".my_sect_ddr");
signed char _pingpongSrcBuf[PING_PONG_DDR_BUFFER_SIZE];
-
+#else
+#ifdef EDMA3_ENABLE_DCACHE
+signed char __attribute__((section(".my_sect_ddr"))) _pingpongSrcBuf[PING_PONG_DDR_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
+#else
+signed char __attribute__((section(".my_sect_ddr"))) _pingpongSrcBuf[PING_PONG_DDR_BUFFER_SIZE];
+#endif
+#endif
/**
* Ping pong destination buffer.
* It will be used to copy data from L1D ping/pong buffers to check the
* validity.
*/
+#ifndef BUILD_TDA2XX_MPU
#ifdef EDMA3_ENABLE_DCACHE
/* Cache line aligned big destination buffer. */
/**
#endif /* #ifdef EDMA3_ENABLE_DCACHE */
#pragma DATA_SECTION(_pingpongDestBuf, ".my_sect_ddr");
signed char _pingpongDestBuf[PING_PONG_DDR_BUFFER_SIZE];
+#else
+#ifdef EDMA3_ENABLE_DCACHE
+signed char __attribute__((section(".my_sect_ddr"))) _pingpongDestBuf[PING_PONG_DDR_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
+#else
+signed char __attribute__((section(".my_sect_ddr"))) _pingpongDestBuf[PING_PONG_DDR_BUFFER_SIZE];
+#endif
+#endif
/* These destination buffers are in IRAM. */
+#ifndef BUILD_TDA2XX_MPU
#ifdef EDMA3_ENABLE_DCACHE
/* Cache line aligned destination buffer 1 i.e. Ping buffer. */
/**
#pragma DATA_SECTION(_dstL1DBuff1, ".my_sect_iram");
#endif
signed char _dstL1DBuff1[PING_PONG_L1D_BUFFER_SIZE];
+#else
+#ifdef EDMA3_ENABLE_DCACHE
+#ifdef __TMS470__
+signed char __attribute__((section(".my_sect_ddr"))) _dstL1DBuff1[PING_PONG_L1D_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
+#else
+signed char __attribute__((section(".my_sect_iram"))) _dstL1DBuff1[PING_PONG_L1D_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
+#endif
+#else
+#ifdef __TMS470__
+signed char __attribute__((section(".my_sect_ddr"))) _dstL1DBuff1[PING_PONG_L1D_BUFFER_SIZE];
+#else
+signed char __attribute__((section(".my_sect_iram"))) _dstL1DBuff1[PING_PONG_L1D_BUFFER_SIZE];
+#endif
+#endif
+#endif
+#ifndef BUILD_TDA2XX_MPU
#ifdef EDMA3_ENABLE_DCACHE
/* Cache line aligned destination buffer 2 i.e. Pong buffer. */
/**
#pragma DATA_SECTION(_dstL1DBuff2, ".my_sect_iram");
#endif
signed char _dstL1DBuff2[PING_PONG_L1D_BUFFER_SIZE];
+#else
+#ifdef EDMA3_ENABLE_DCACHE
+signed char __attribute__((section(".my_sect_ddr"))) _dstL1DBuff2[PING_PONG_L1D_BUFFER_SIZE] __attribute__ ((aligned (EDMA3_CACHE_LINE_SIZE_IN_BYTES)));
+#else
+signed char __attribute__((section(".my_sect_ddr"))) _dstL1DBuff2[PING_PONG_L1D_BUFFER_SIZE];
+#endif
+#endif
/* Pointers for all those buffers */
signed char *pingpongSrcBuf;
extern void *AppSemHandle1;
/** Local MemCpy function */
-extern void edma3MemCpy(void *dst, const void *src, unsigned int len);
+extern void edma3MemCpy(void *dst, const void *src, uint32_t len);
EDMA3_DRV_Result process_ping_pong_buffer(unsigned short buff_id)
{
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstL1DBuff2,
+ result = Edma3_CacheInvalidate((uint32_t)dstL1DBuff2,
PING_PONG_L1D_BUFFER_SIZE);
}
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstL1DBuff1,
+ result = Edma3_CacheInvalidate((uint32_t)dstL1DBuff1,
PING_PONG_L1D_BUFFER_SIZE);
}
EDMA3_DRV_Result result = EDMA3_DRV_SOK;
EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0};
/* One master channel */
- unsigned int chId = 0;
+ uint32_t chId = 0;
/* Two link channels */
- unsigned int lChId1 = 0;
- unsigned int lChId2 = 0;
- unsigned int tcc = 0;
+ uint32_t lChId1 = 0;
+ uint32_t lChId2 = 0;
+ uint32_t tcc = 0;
int i;
- unsigned int count;
- unsigned int Istestpassed = 0u;
- unsigned int BRCnt = 0;
+ uint32_t count;
+ uint32_t Istestpassed = 0u;
+ uint32_t BRCnt = 0;
int srcbidx = 0, desbidx = 0;
int srccidx = 0, descidx = 0;
/* PaRAM Set handle */
- unsigned int phyaddress = 0;
+ uint32_t phyaddress = 0;
EDMA3_DRV_ParamentryRegs *param_handle = NULL;
/* Number of triggers for EDMA3. */
- unsigned int numenabled = PING_PONG_NUM_TRIGGERS;
+ uint32_t numenabled = PING_PONG_NUM_TRIGGERS;
pingpongSrcBuf = (signed char*)GLOBAL_ADDR(_pingpongSrcBuf);
pingpongDestBuf = (signed char*)GLOBAL_ADDR(_pingpongDestBuf);
/* Flush the Source Buffer */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheFlush((unsigned int)pingpongSrcBuf, PING_PONG_DDR_BUFFER_SIZE);
+ result = Edma3_CacheFlush((uint32_t)pingpongSrcBuf, PING_PONG_DDR_BUFFER_SIZE);
}
/* Invalidate the Destination Buffers */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)pingpongDestBuf, PING_PONG_DDR_BUFFER_SIZE);
+ result = Edma3_CacheInvalidate((uint32_t)pingpongDestBuf, PING_PONG_DDR_BUFFER_SIZE);
}
/**
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstL1DBuff1, PING_PONG_L1D_BUFFER_SIZE);
+ result = Edma3_CacheInvalidate((uint32_t)dstL1DBuff1, PING_PONG_L1D_BUFFER_SIZE);
}
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstL1DBuff2, PING_PONG_L1D_BUFFER_SIZE);
+ result = Edma3_CacheInvalidate((uint32_t)dstL1DBuff2, PING_PONG_L1D_BUFFER_SIZE);
}
#endif /* EDMA3_ENABLE_DCACHE */
/* Program the source and dest addresses for master DMA channel */
- paramSet.srcAddr = (unsigned int)(pingpongSrcBuf);
- paramSet.destAddr = (unsigned int)(dstL1DBuff1);
+ paramSet.srcAddr = (uint32_t)(pingpongSrcBuf);
+ paramSet.destAddr = (uint32_t)(dstL1DBuff1);
/* Write to the master DMA channel first. */
*/
if (result == EDMA3_DRV_SOK)
{
- paramSet.destAddr = (unsigned int)(dstL1DBuff2);
+ paramSet.destAddr = (uint32_t)(dstL1DBuff2);
result = EDMA3_DRV_setPaRAM(hEdma, lChId2, ¶mSet);
}
* loaded to the master dma channel and trigger
* the transfer again..
*/
- param_handle->SRC = (unsigned int)pingpongSrcBufCopy;
+ param_handle->SRC = (uint32_t)pingpongSrcBufCopy;
/* Step 3 */
result = EDMA3_DRV_enableTransfer (hEdma, chId,
* Now modify the source buffer in the param set
* again and trigger the transfer...
*/
- param_handle->SRC = (unsigned int)pingpongSrcBufCopy;
+ param_handle->SRC = (uint32_t)pingpongSrcBufCopy;
result = EDMA3_DRV_enableTransfer (hEdma, chId,
EDMA3_DRV_TRIG_MODE_MANUAL);
index 9705f454d23ff9eafdaeab53286b2d9ea65ff150..8a7737e9c03336771629843c7f37e2483435abf4 100644 (file)
*/
EDMA3_DRV_Result edma3_test_poll_mode(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType)
{
EDMA3_DRV_Result result = EDMA3_DRV_SOK;
- unsigned int chId = 0;
- unsigned int tcc = 0;
+ uint32_t chId = 0;
+ uint32_t tcc = 0;
int i;
- unsigned int count;
- unsigned int Istestpassed = 0u;
- unsigned int numenabled = 0;
- unsigned int BRCnt = 0;
+ uint32_t count;
+ uint32_t Istestpassed = 0u;
+ uint32_t numenabled = 0;
+ uint32_t BRCnt = 0;
int srcbidx = 0, desbidx = 0;
int srccidx = 0, descidx = 0;
/* Flush the Source Buffer */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheFlush((unsigned int)srcBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheFlush((uint32_t)srcBuff1, (acnt*bcnt*ccnt));
}
/* Invalidate the Destination Buffer */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheInvalidate((uint32_t)dstBuff1, (acnt*bcnt*ccnt));
}
#endif /* EDMA3_ENABLE_DCACHE */
if (result == EDMA3_DRV_SOK)
{
- result = EDMA3_DRV_setSrcParams (hEdma, chId, (unsigned int)(srcBuff1),
+ result = EDMA3_DRV_setSrcParams (hEdma, chId, (uint32_t)(srcBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
if (result == EDMA3_DRV_SOK)
{
- result = EDMA3_DRV_setDestParams (hEdma, chId, (unsigned int)(dstBuff1),
+ result = EDMA3_DRV_setDestParams (hEdma, chId, (uint32_t)(dstBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
index a1b0873f47826cf546b389a9e539f1fe28d3f3aa..d68ce31f249a6c13c3b0b98a73346b4052a3e9ba 100755 (executable)
*/
EDMA3_DRV_Result edma3_test(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType)
{
EDMA3_DRV_Result result = EDMA3_DRV_SOK;
EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0};
- unsigned int chId = 0;
- unsigned int tcc = 0;
+ uint32_t chId = 0;
+ uint32_t tcc = 0;
int i;
- unsigned int count;
- unsigned int Istestpassed = 0u;
- unsigned int numenabled = 0;
- unsigned int BRCnt = 0;
+ uint32_t count;
+ uint32_t Istestpassed = 0u;
+ uint32_t numenabled = 0;
+ uint32_t BRCnt = 0;
int srcbidx = 0, desbidx = 0;
int srccidx = 0, descidx = 0;
/* Flush the Source Buffer */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheFlush((unsigned int)srcBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheFlush((uint32_t)srcBuff1, (acnt*bcnt*ccnt));
}
/* Invalidate the Destination Buffer */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheInvalidate((uint32_t)dstBuff1, (acnt*bcnt*ccnt));
}
#endif /* EDMA3_ENABLE_DCACHE */
if (result == EDMA3_DRV_SOK)
{
/* Fill the PaRAM Set with transfer specific information */
- paramSet.srcAddr = (unsigned int)(srcBuff1);
- paramSet.destAddr = (unsigned int)(dstBuff1);
+ paramSet.srcAddr = (uint32_t)(srcBuff1);
+ paramSet.destAddr = (uint32_t)(dstBuff1);
/**
* Be Careful !!!
/*
if (result == EDMA3_DRV_SOK)
{
- result = EDMA3_DRV_setSrcParams (hEdma, chId, (unsigned int)(srcBuff1),
+ result = EDMA3_DRV_setSrcParams (hEdma, chId, (uint32_t)(srcBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
if (result == EDMA3_DRV_SOK)
{
- result = EDMA3_DRV_setDestParams (hEdma, chId, (unsigned int)(dstBuff1),
+ result = EDMA3_DRV_setDestParams (hEdma, chId, (uint32_t)(dstBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
if (result != EDMA3_DRV_SOK)
{
printf ("edma3_test: EDMA3_DRV_enableTransfer " \
- "Failed, error code: %d\r\n", result);
+ "Failed, error code: %d\r\n", (int)result);
break;
}
edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
if (result != EDMA3_DRV_SOK)
{
printf("edma3_test: EDMA3_DRV_freeChannel() FAILED, " \
- "error code: %d\r\n", result);
+ "error code: %d\r\n", (int)result);
}
}
index 1744d0dc995b505c3bac1bbe02ece0a410cca02f..0f508b8b04819c7f37f395471983690be8276b0f 100644 (file)
#include <ti/sysbios/BIOS.h>
#include "sample.h"
-extern const unsigned int numEdma3Instances;
+extern const uint32_t numEdma3Instances;
/**
* DSP instance number on which the executable is running. Its value is
* determined by reading the processor specific register DNUM.
*/
-unsigned int dsp_num_tmp;
+uint32_t dsp_num_tmp;
/* To find out the DSP# */
extern unsigned short determineProcId();
extern EDMA3_DRV_InstanceInitConfig sampleInstInitConfig[][EDMA3_MAX_REGIONS];
static void tskHeartBit(void);
void echo(void);
-void main()
+int main()
{
Task_create((Task_FuncPtr)echo, NULL, NULL);
BIOS_start();
+
+ return 0;
}
static void printWelcomeBanner(void)
printf("* *** *\n\r");
printf("* *\n\r");
printf("* TI EDMA3 LOW LEVEL DRIVER *\n\r");
- printf("* Version: 0x%x *\n\r",EDMA3_DRV_getVersion());
+ printf("* Version: 0x%x *\n\r",(unsigned int)EDMA3_DRV_getVersion());
printf("* %s *\n\r",EDMA3_DRV_getVersionStr());
printf("* *\n\r");
printf("* *\n\r");
*
* \return TRUE if bypass; FALSE if testing will done.
*/
-unsigned int bypassCore(unsigned int edmaInstNum)
+uint32_t bypassCore(uint32_t edmaInstNum)
{
- unsigned int i, bypassFlag = 1;
+ uint32_t i, bypassFlag = 1;
#ifndef EDMA3_DRV_USE_DEF_RM_CFG
EDMA3_DRV_InstanceInitConfig *instanceConfig = NULL;
void echo()
{
EDMA3_DRV_Result edmaResult = EDMA3_DRV_SOK;
- unsigned int i, bypass;
- unsigned int count=0;
+ uint32_t i, bypass;
+ uint32_t count=0;
EDMA3_DRV_Handle hEdma[MAX_NUM_EDMA_INSTANCES];
Semaphore_Params semParams;
if(numEdma3Instances > MAX_NUM_EDMA_INSTANCES)
{
- printf("Error numEdma3Instances:%d > MAX_NUM_EDMA_INSTANCES: %d\n", numEdma3Instances, MAX_NUM_EDMA_INSTANCES);
+ printf("Error numEdma3Instances:%d > MAX_NUM_EDMA_INSTANCES: %d\n", (int)numEdma3Instances, MAX_NUM_EDMA_INSTANCES);
return;
}
*/
if(bypass)
{
- printf("Bypassing init for Core %d on EDMA3 instance %d\n", dsp_num_tmp, i);
+ printf("Bypassing init for Core %d on EDMA3 instance %d\n", (int)dsp_num_tmp, (int)i);
continue;
}
}
else
{
- printf("edma3init() Failed, error code: %d\n", edmaResult);
+ printf("edma3init() Failed, error code: %d\n", (int)edmaResult);
}
}
}
for (count=0; count<10; count++)
{
- printf ("\nCount = %d\n",count);
+ printf ("\nCount = %d\n",(int)count);
for (i = 0; i < numEdma3Instances; i++)
{
bypass = bypassCore(i);
if(bypass)
{
- printf("Bypass Core %d on EDMA3 instance %d\n", dsp_num_tmp, i);
+ printf("Bypass Core %d on EDMA3 instance %d\n", (int)dsp_num_tmp, (int)i);
}
else
{
}
else
{
- printf("edma3init() Failed, error code: %d\n", edmaResult);
+ printf("edma3init() Failed, error code: %d\n", (int)edmaResult);
}
}
if (edmaResult == EDMA3_DRV_SOK)
{
- printf("\nStart -> EDMA3 Test memory to memory copy on Instance %d\n",i);
+ printf("\nStart -> EDMA3 Test memory to memory copy on Instance %d\n",(int)i);
edmaResult = edma3MemToMemCpytest(hEdma[i]);
edmaResult = edma3deinit(i, hEdma[i]);
if (edmaResult != EDMA3_DRV_SOK)
{
- printf("edma3deinit() Failed, error code: %d\n", edmaResult);
+ printf("edma3deinit() Failed, error code: %d\n", (int)edmaResult);
}
else
{
{
if(bypass)
{
- printf("Bypassing de-init for Core %d on EDMA3 instance %d\n", dsp_num_tmp, i);
+ printf("Bypassing de-init for Core %d on EDMA3 instance %d\n", (int)dsp_num_tmp, (int)i);
continue;
}
edmaResult = edma3deinit(i, hEdma[i]);
if (edmaResult != EDMA3_DRV_SOK)
{
- printf("edma3deinit() Failed, error code: %d\n", edmaResult);
+ printf("edma3deinit() Failed, error code: %d\n", (int)edmaResult);
}
else
{
void tskHeartBit()
{
- static unsigned int counter = 0u;
+ static uint32_t counter = 0u;
while (counter < 0x1000000u)
{
- printf("\r\n\r\n!!! EDMA3 LLD HrtBt %x", counter);
+ printf("\r\n\r\n!!! EDMA3 LLD HrtBt %x", (unsigned int)counter);
counter++;
}
}
diff --git a/examples/edma3_driver/src/qdma_link_test.c b/examples/edma3_driver/src/qdma_link_test.c
index 4e67ee99ecf0e9a9388dabccde76f686f4179933..0ca5753157c5c0ab4db41ea22d6909f6925e2ea6 100755 (executable)
*/
EDMA3_DRV_Result qdma_test_with_link(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType)
{
EDMA3_DRV_Result result = EDMA3_DRV_SOK;
- unsigned int i;
- unsigned int count;
- unsigned int Istestpassed1 = 0u;
- unsigned int Istestpassed2 = 0u;
- unsigned int qCh1Id=0;
- unsigned int qTcc1 = 0;
- unsigned int qCh2Id=0;
- unsigned int qTcc2 = 0;
- unsigned int BRCnt = 0;
+ uint32_t i;
+ uint32_t count;
+ uint32_t Istestpassed1 = 0u;
+ uint32_t Istestpassed2 = 0u;
+ uint32_t qCh1Id=0;
+ uint32_t qTcc1 = 0;
+ uint32_t qCh2Id=0;
+ uint32_t qTcc2 = 0;
+ uint32_t BRCnt = 0;
int srcbidx = 0, desbidx = 0;
int srccidx = 0, descidx = 0;
- unsigned int numenabled = 0;
+ uint32_t numenabled = 0;
static signed char* tmpSrcBuff1 = NULL;
static signed char* tmpDstBuff1 = NULL;
static signed char* tmpSrcBuff2 = NULL;
static signed char* tmpDstBuff2 = NULL;
- unsigned int abCNT = 0;
- unsigned int bcntReloadLinkField = 0x0u;
+ uint32_t abCNT = 0;
+ uint32_t bcntReloadLinkField = 0x0u;
srcBuff1 = (signed char*) GLOBAL_ADDR(_srcBuff1);
/* Flush the Source Buffers */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheFlush((unsigned int)srcBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheFlush((uint32_t)srcBuff1, (acnt*bcnt*ccnt));
}
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheFlush((unsigned int)srcBuff2, (acnt*bcnt*ccnt));
+ result = Edma3_CacheFlush((uint32_t)srcBuff2, (acnt*bcnt*ccnt));
}
/* Invalidate the Destination Buffers */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheInvalidate((uint32_t)dstBuff1, (acnt*bcnt*ccnt));
}
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstBuff2, (acnt*bcnt*ccnt));
+ result = Edma3_CacheInvalidate((uint32_t)dstBuff2, (acnt*bcnt*ccnt));
}
#endif /* EDMA3_ENABLE_DCACHE */
if (result == EDMA3_DRV_SOK)
{
result = EDMA3_DRV_setSrcParams (hEdma, qCh2Id,
- (unsigned int)(srcBuff2),
+ (uint32_t)(srcBuff2),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
if (result == EDMA3_DRV_SOK)
{
result = EDMA3_DRV_setDestParams (hEdma, qCh2Id,
- (unsigned int)(dstBuff2),
+ (uint32_t)(dstBuff2),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
}
/* Write to the Source Address */
result = EDMA3_DRV_setSrcParams (hEdma, qCh1Id,
- (unsigned int)(srcBuff1),
+ (uint32_t)(srcBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
if (result != EDMA3_DRV_SOK)
/* Write to the Destination Address */
result = EDMA3_DRV_setDestParams(hEdma, qCh1Id,
- (unsigned int)(dstBuff1),
+ (uint32_t)(dstBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
if (result != EDMA3_DRV_SOK)
/* Write to the Source Address */
result = EDMA3_DRV_setSrcParams (hEdma, qCh1Id,
- (unsigned int)(srcBuff2),
+ (uint32_t)(srcBuff2),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
if (result != EDMA3_DRV_SOK)
/* Write to the Destination Address */
result = EDMA3_DRV_setDestParams(hEdma, qCh1Id,
- (unsigned int)(dstBuff2),
+ (uint32_t)(dstBuff2),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
if (result != EDMA3_DRV_SOK)
Istestpassed1 = 0;
printf("qdma_test_with_link: Data write-read " \
"matching FAILED at i = %d " \
- "(srcBuff1 -> dstBuff1)\r\r\n", i);
+ "(srcBuff1 -> dstBuff1)\r\r\n", (int)i);
break;
}
}
Istestpassed2 = 0;
printf("qdma_test_with_link: Data write-read " \
"matching FAILED at i = %d " \
- "(srcBuff2 -> dstBuff2)\r\n", i);
+ "(srcBuff2 -> dstBuff2)\r\n", (int)i);
break;
}
}
result = EDMA3_DRV_freeChannel (hEdma, qCh1Id);
if (result != EDMA3_DRV_SOK)
{
- printf("qdma_test_with_link: EDMA3_DRV_freeChannel() for qCh1Id FAILED, error code: %d\r\n", result);
+ printf("qdma_test_with_link: EDMA3_DRV_freeChannel() for qCh1Id FAILED, error code: %d\r\n", (int)result);
}
else
{
result = EDMA3_DRV_freeChannel (hEdma, qCh2Id);
if (result != EDMA3_DRV_SOK)
{
- printf("qdma_test_with_link: EDMA3_DRV_freeChannel() for qCh2Id FAILED, error code: %d\r\n", result);
+ printf("qdma_test_with_link: EDMA3_DRV_freeChannel() for qCh2Id FAILED, error code: %d\r\n", (int)result);
}
}
}
index d743b80657a8515be23f42eb6d6ae539da061753..b81cc3637f60622f5b75b3e1cb7b1b6e2bb502a8 100755 (executable)
*/
EDMA3_DRV_Result qdma_test(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType)
{
EDMA3_DRV_Result result = EDMA3_DRV_SOK;
- unsigned int i;
- unsigned int count;
- unsigned int Istestpassed = 0u;
- unsigned int numenabled = 0;
- unsigned int qCh1Id=0;
- unsigned int qTcc1 = 0;
- unsigned int BRCnt = 0;
+ uint32_t i;
+ uint32_t count;
+ uint32_t Istestpassed = 0u;
+ uint32_t numenabled = 0;
+ uint32_t qCh1Id=0;
+ uint32_t qTcc1 = 0;
+ uint32_t BRCnt = 0;
int srcbidx = 0, desbidx = 0;
int srccidx = 0, descidx = 0;
static signed char* tmpSrcBuff1 = NULL;
/* Flush the Source Buffer */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheFlush((unsigned int)srcBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheFlush((uint32_t)srcBuff1, (acnt*bcnt*ccnt));
}
/* Invalidate the Destination Buffer */
if (result == EDMA3_DRV_SOK)
{
- result = Edma3_CacheInvalidate((unsigned int)dstBuff1, (acnt*bcnt*ccnt));
+ result = Edma3_CacheInvalidate((uint32_t)dstBuff1, (acnt*bcnt*ccnt));
}
#endif /* EDMA3_ENABLE_DCACHE */
/* Write to the Source Address */
result = EDMA3_DRV_setSrcParams (hEdma, qCh1Id,
- (unsigned int)(srcBuff1),
+ (uint32_t)(srcBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
/*
{
result = EDMA3_DRV_setPaRAMEntry (hEdma, qCh1Id,
EDMA3_DRV_PARAM_ENTRY_DST,
- (unsigned int)(dstBuff1));
+ (uint32_t)(dstBuff1));
if (result != EDMA3_DRV_SOK)
{
printf ("error from qdma_test\n\r\n");
{
Istestpassed = 0u;
printf("qdma_test: Data write-read matching FAILED" \
- " at i = %d\r\n", i);
+ " at i = %d\r\n", (int)i);
break;
}
}
result = EDMA3_DRV_freeChannel (hEdma, qCh1Id);
if (result != EDMA3_DRV_SOK)
{
- printf("qdma_test: EDMA3_DRV_freeChannel() FAILED, error code: %d\r\n", result);
+ printf("qdma_test: EDMA3_DRV_freeChannel() FAILED, error code: %d\r\n", (int)result);
}
}
index 74f80b8f77b69e3994a02986ea1688e8e319490b..bea000f853352bbfb1d69835f720c9a31ce73765 100644 (file)
*/
extern EDMA3_DRV_Handle hEdma[];
-extern void callback1 (unsigned int tcc, EDMA3_RM_TccStatus status,
+extern void callback1 (uint32_t tcc, EDMA3_RM_TccStatus status,
void *appData);
-extern void callback2 (unsigned int tcc, EDMA3_RM_TccStatus status,
+extern void callback2 (uint32_t tcc, EDMA3_RM_TccStatus status,
void *appData);
extern signed char* getGlobalAddr(signed char* addr);
*/
EDMA3_DRV_Result edma3_test(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType);
*/
EDMA3_DRV_Result edma3_test_with_link(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType);
*/
EDMA3_DRV_Result qdma_test(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType);
*/
EDMA3_DRV_Result qdma_test_with_link(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType);
*/
EDMA3_DRV_Result edma3_test_with_chaining(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType);
*/
EDMA3_DRV_Result edma3_test_poll_mode(
EDMA3_DRV_Handle hEdma,
- unsigned int acnt,
- unsigned int bcnt,
- unsigned int ccnt,
+ uint32_t acnt,
+ uint32_t bcnt,
+ uint32_t ccnt,
EDMA3_DRV_SyncType syncType);
diff --git a/packages/ti/sdo/edma3/drv/src/edma3_drv_basic.c b/packages/ti/sdo/edma3/drv/src/edma3_drv_basic.c
index ba26f8ca46990c51f968777747ee36422fdc2fc4..4468f67d98fc778fdd2b57fee58b3503a2b81fb2 100755 (executable)
}
}
break;
+ default:
+ break;
}
}
else
diff --git a/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_arm_int_reg.c b/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_arm_int_reg.c
index 5d9ce96d9a603ba9eab521f3d7450ca6bc3b9ac8..09dae796874d3cdcf7c96f30fac68bed9ac34477 100644 (file)
* (Not all TC error ISRs need to be registered, register only for the\r
* available Transfer Controllers).\r
*/\r
-void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(unsigned int arg) =\r
+void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(uint32_t arg) =\r
{\r
&lisrEdma3TC0ErrHandler0,\r
&lisrEdma3TC1ErrHandler0,\r
{\r
retVal = EDMA3_DRV_initXbarEventMap(hEdma, \r
sampleXbarToChanConfig, \r
- &sampleMapXbarEvtToChan, \r
- &sampleConfigScr);\r
+ (EDMA3_DRV_mapXbarEvtToChan)&sampleMapXbarEvtToChan, \r
+ (EDMA3_DRV_xbarConfigScr)&sampleConfigScr);\r
}\r
\r
return retVal;\r
diff --git a/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_cfg.c b/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_cfg.c
index 3ae4baadb70d8bf74abe018d761bc9cc96486f20..189c5f3f98569c9c28745414a837b456bbc773b4 100644 (file)
@@ -798,59 +798,59 @@ EDMA3_RM_GblXbarToChanConfigParams sampleXbarChanInitConfig[NUM_EDMA3_INSTANCES]
{\r
/* Event to channel map for region 0 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 1 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, 26, 27, -1, -1, -1, -1\r
+ -1, 26, 27, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 2 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 3 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 4 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 5 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 6 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 7 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
}\r
};\r
diff --git a/packages/ti/sdo/edma3/rm/src/configs/edma3_tda2xx_cfg.c b/packages/ti/sdo/edma3/rm/src/configs/edma3_tda2xx_cfg.c
index e2d7ceac9d7c329b2c4959491e73153054227dec..4a4f4753933fdf885dbd2f0ac68fa6cb10a70d4e 100644 (file)
@@ -692,59 +692,59 @@ EDMA3_RM_GblXbarToChanConfigParams defXbarChanInitConfig[NUM_EDMA3_INSTANCES][ED
{\r
/* Event to channel map for region 0 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 1 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 2 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 3 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 4 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 5 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 6 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
/* Event to channel map for region 7 */\r
{\r
+ {-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, -1, -1, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1}\r
},\r
}\r
};\r