Misra C Fixes
authorSunil MS <x0190988@ti.com>
Fri, 5 Sep 2014 09:19:22 +0000 (14:49 +0530)
committerSunil MS <x0190988@ti.com>
Thu, 9 Oct 2014 14:11:27 +0000 (19:41 +0530)
Following Rules fixed.
MISRA.BITS.NOT_UNSIGNED
MISRA.BUILTIN_NUMERIC
MISRA.CAST.INT
MISRA.CAST.UNSIGNED_BITS
MISRA.FOR.COND
MISRA.IF.NO_ELSE
MISRA.INIT.BRACES
MISRA.SWITCH.NO_BREAK

Change-Id: Ie4ad9ffa5b88b073663683b71056576ed7946072
Signed-off-by: Sunil MS <x0190988@ti.com>
packages/ti/sdo/edma3/drv/src/edma3_drv_basic.c
packages/ti/sdo/edma3/drv/src/edma3_drv_init.c
packages/ti/sdo/edma3/rm/src/edma3_rm_gbl_data.c
packages/ti/sdo/edma3/rm/src/edma3resmgr.c

index 25323b610e50fe8a7755eb92827bb161bd5e86f9..b3c798ccb4a1b713c14e890e72219d578d304114 100755 (executable)
@@ -1217,7 +1217,7 @@ EDMA3_DRV_Result EDMA3_DRV_setSrcParams (EDMA3_DRV_Handle hEdma,
 
     /** In FIFO Addressing mode, memory location must be 32 bytes aligned */
     if ((addrMode == EDMA3_DRV_ADDR_MODE_FIFO)
-        && ((srcAddr & 0x1FU) != NULL))
+        && ((srcAddr & 0x1FU) != 0x0))
         {
         /** Memory is not 32 bytes aligned */
         result = EDMA3_DRV_E_ADDRESS_NOT_ALIGNED;
@@ -1362,7 +1362,7 @@ EDMA3_DRV_Result EDMA3_DRV_setDestParams (EDMA3_DRV_Handle hEdma,
 
     /** In FIFO Addressing mode, memory location must be 32 bytes aligned */
     if ((addrMode == EDMA3_DRV_ADDR_MODE_FIFO)
-        && ((destAddr & 0x1FU)!=NULL))
+        && ((destAddr & 0x1FU)!=0x0))
         {
         /** Memory is not 32 bytes aligned */
         result = EDMA3_DRV_E_ADDRESS_NOT_ALIGNED;
index 050ab448e1613ec909fc71ba0fe1ea8dfdd3dc3d..5dc98bfe3b1d3f835de2b6248da535f6c6e2f255 100755 (executable)
@@ -365,7 +365,7 @@ EDMA3_DRV_Result EDMA3_DRV_delete(uint32_t phyCtrllerInstId,
          * If number of Driver Instances is 0, then state should be
          * EDMA3_DRV_CLOSED OR EDMA3_DRV_CREATED.
          */
-        if ((NULL == drvObj[phyCtrllerInstId].numOpens)
+        if ((0 == drvObj[phyCtrllerInstId].numOpens)
             && ((drvObj[phyCtrllerInstId].state != EDMA3_DRV_CLOSED)
             && (drvObj[phyCtrllerInstId].state != EDMA3_DRV_CREATED)))
             {
@@ -377,7 +377,7 @@ EDMA3_DRV_Result EDMA3_DRV_delete(uint32_t phyCtrllerInstId,
              * If number of Driver Instances is NOT 0, then this function
              * SHOULD NOT be called by anybody.
              */
-            if (NULL != drvObj[phyCtrllerInstId].numOpens)
+            if (0 != drvObj[phyCtrllerInstId].numOpens)
                 {
                 result = EDMA3_DRV_E_INVALID_STATE;
                 }
@@ -450,7 +450,7 @@ EDMA3_DRV_Handle EDMA3_DRV_open (uint32_t phyCtrllerInstId,
                     /* if no instance is opened and this is the first one,
                     * then state should be created/closed.
                     */
-                    if (((drvObject->numOpens == NULL) && (drvObject->state != EDMA3_DRV_CREATED))
+                    if (((drvObject->numOpens == 0) && (drvObject->state != EDMA3_DRV_CREATED))
                         && (drvObject->state != EDMA3_DRV_CLOSED))
                         {
                         result = EDMA3_DRV_E_INVALID_STATE;
@@ -596,7 +596,7 @@ EDMA3_DRV_Result EDMA3_DRV_close(EDMA3_DRV_Handle hEdma,
                                                                                &intState);
                     /* Decrease the Number of Opens */
                     --drvObject->numOpens;
-                    if (NULL == drvObject->numOpens)
+                    if (0 == drvObject->numOpens)
                         {
                         drvObject->state = EDMA3_DRV_CLOSED;
                         }
index c74562e47ab415eb580e471116921e8fd836e357..7d3f1745e095a654bbabe04667237485686a129b 100755 (executable)
@@ -44,9 +44,9 @@
  * USE THE SAME VALUE FOR BOTH THE #DEFINE AND CONST UNSIGNED INT BELOW.
  */
 /* This #define is needed for array declarations. */
-#define MAX_EDMA3_RM_INSTANCES (8u)
+#define MAX_EDMA3_RM_INSTANCES (8U)
 /* This const is required to access this constant in other header files */
-const uint32_t EDMA3_MAX_RM_INSTANCES = 8u;
+const uint32_t EDMA3_MAX_RM_INSTANCES = 8U;
 
 /**
  * \brief Region Specific Configuration structure for
index c8a61e04ce86f77bc1530525d59c1580fdf2f480..27da1a7829d58e168a85c70ed8083e365bb78da2 100755 (executable)
@@ -74,7 +74,7 @@
  *         'n' number of times.
  *         Minumum value is 1.
  */
-#define EDMA3_RM_COMPL_HANDLER_RETRY_COUNT (10u)
+#define EDMA3_RM_COMPL_HANDLER_RETRY_COUNT (10U)
 
 /**
  * \brief EDMA3 Resource Manager retry count to check the pending CC Error Interrupt inside ISR
@@ -82,7 +82,7 @@
  *         interrupt for 'n' number of times.
  *         Minumum value is 1.
  */
-#define EDMA3_RM_CCERR_HANDLER_RETRY_COUNT (10u)
+#define EDMA3_RM_CCERR_HANDLER_RETRY_COUNT (10U)
 
 
 
@@ -237,7 +237,7 @@ static EDMA3_RM_RegionId edma3RegionId = EDMA3_MAX_REGIONS;
 #ifdef BUILD_C6XDSP
 #pragma DATA_SECTION(masterExists, ".fardata:.edma3Globals");
 #endif
-static uint32_t masterExists [EDMA3_MAX_EDMA3_INSTANCES] = {FALSE,FALSE,FALSE};
+static uint32_t masterExists [EDMA3_MAX_EDMA3_INSTANCES] = {FALSE,FALSE,FALSE,FALSE,FALSE};
 
 /**
  * Number of PaRAM Sets actually present on the SoC. This will be updated
@@ -256,11 +256,13 @@ uint32_t edma3NumPaRAMSets = EDMA3_MAX_PARAM_SETS;
 #ifdef BUILD_C6XDSP
 #pragma DATA_SECTION(allocatedTCCs, ".fardata:.edma3Globals");
 #endif
-static uint32_t allocatedTCCs[EDMA3_MAX_EDMA3_INSTANCES][2u] =
+static uint32_t allocatedTCCs[EDMA3_MAX_EDMA3_INSTANCES][2U] =
                                                                                        {
-                                                                                       {0x0u, 0x0u},
-                                                                                       {0x0u, 0x0u},
-                                                                                       {0x0u, 0x0u},
+                                                                                       {0x0U, 0x0U},
+                                                                                       {0x0U, 0x0U},
+                                                                                       {0x0U, 0x0U},
+                                            {0x0U, 0x0U},
+                                            {0x0U, 0x0U},
                                                                                        };
 
 
@@ -272,7 +274,7 @@ static uint32_t allocatedTCCs[EDMA3_MAX_EDMA3_INSTANCES][2u] =
 #ifdef BUILD_C6XDSP
 #pragma DATA_SECTION(contiguousDmaRes, ".fardata:.edma3Globals");
 #endif
-static uint32_t contiguousDmaRes[EDMA3_MAX_DMA_CHAN_DWRDS] = {0x0u, 0x0u};
+static uint32_t contiguousDmaRes[EDMA3_MAX_DMA_CHAN_DWRDS] = {0x0U, 0x0U};
 
 /**
  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
@@ -282,7 +284,7 @@ static uint32_t contiguousDmaRes[EDMA3_MAX_DMA_CHAN_DWRDS] = {0x0u, 0x0u};
 #ifdef BUILD_C6XDSP
 #pragma DATA_SECTION(contiguousQdmaRes, ".fardata:.edma3Globals");
 #endif
-static uint32_t contiguousQdmaRes[EDMA3_MAX_QDMA_CHAN_DWRDS] = {0x0u};
+static uint32_t contiguousQdmaRes[EDMA3_MAX_QDMA_CHAN_DWRDS] = {0x0U};
 
 /**
  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
@@ -292,7 +294,7 @@ static uint32_t contiguousQdmaRes[EDMA3_MAX_QDMA_CHAN_DWRDS] = {0x0u};
 #ifdef BUILD_C6XDSP
 #pragma DATA_SECTION(contiguousTccRes, ".fardata:.edma3Globals");
 #endif
-static uint32_t contiguousTccRes[EDMA3_MAX_TCC_DWRDS] = {0x0u, 0x0u};
+static uint32_t contiguousTccRes[EDMA3_MAX_TCC_DWRDS] = {0x0U, 0x0U};
 
 /**
  * Arrays ownDmaChannels[], resvdDmaChannels and avlblDmaChannels will be ANDed
@@ -324,7 +326,7 @@ static EDMA3_RM_ChBoundResources edma3RmChBoundRes [EDMA3_MAX_EDMA3_INSTANCES][E
 #ifdef BUILD_C6XDSP
 #pragma DATA_SECTION(rmInitDone, ".fardata:.edma3Globals");
 #endif
- static unsigned short rmInitDone = FALSE;
+ static uint16_t rmInitDone = FALSE;
 
 /*---------------------------------------------------------------------------*/
 
@@ -361,7 +363,7 @@ void edma3MemZero(void *dst, uint32_t len);
 /** Local MemCpy function */
 void edma3MemCpy(void *dst, const void *src, uint32_t len);
 /* Local MemCopy function to copy Param Set ONLY */
-void edma3ParamCpy(void *dst, const void *src);
+void edma3ParamCpy(volatile void *dst, const volatile void *src);
 
 /** Initialization of the Global region registers of the EDMA3 Controller */
 static void edma3GlobalRegionInit (uint32_t phyCtrllerInstId, uint32_t numDmaChannels);
@@ -409,7 +411,7 @@ EDMA3_RM_Result EDMA3_RM_create (uint32_t phyCtrllerInstId,
                                 const EDMA3_RM_GblConfigParams *gblCfgParams,
                                 const void *miscParam)
     {
-    uint32_t count = 0u;
+    uint32_t count = 0U;
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     const EDMA3_RM_MiscParam *miscOpt = (const EDMA3_RM_MiscParam *)miscParam;
 
@@ -446,7 +448,7 @@ EDMA3_RM_Result EDMA3_RM_create (uint32_t phyCtrllerInstId,
             {
             edma3MemZero((void *)&(resMgrObj[count]),
                                sizeof(resMgrObj));
-            edma3MemZero((void *)(&(edma3IntrParams[0u])),
+            edma3MemZero((void *)(&(edma3IntrParams[0U])),
                 sizeof(edma3IntrParams));
 
             rmInitDone = TRUE;
@@ -490,7 +492,7 @@ EDMA3_RM_Result EDMA3_RM_create (uint32_t phyCtrllerInstId,
               */
             if (FALSE == resMgrObj[phyCtrllerInstId].gblCfgParams.dmaChPaRAMMapExists)
                 {
-                for (count = 0u; count < resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels; count++)
+                for (count = 0U; count < resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels; count++)
                     {
                     resMgrObj[phyCtrllerInstId].gblCfgParams.dmaChannelPaRAMMap[count] = count;
                     }
@@ -502,19 +504,19 @@ EDMA3_RM_Result EDMA3_RM_create (uint32_t phyCtrllerInstId,
              * Initialize Boundary Values for Logical Channel Ranges.
              */
             edma3NumPaRAMSets = resMgrObj[phyCtrllerInstId].gblCfgParams.numPaRAMSets;
-                       edma3_dma_ch_max_val[phyCtrllerInstId] = resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels - 1u;
-                       edma3_link_ch_min_val[phyCtrllerInstId] = edma3_dma_ch_max_val[phyCtrllerInstId] + 1u;
-                       edma3_link_ch_max_val[phyCtrllerInstId] = edma3_link_ch_min_val[phyCtrllerInstId] + resMgrObj[phyCtrllerInstId].gblCfgParams.numPaRAMSets - 1u;
-                       edma3_qdma_ch_min_val[phyCtrllerInstId] = edma3_link_ch_max_val[phyCtrllerInstId] + 1u;
-                       edma3_qdma_ch_max_val[phyCtrllerInstId] = edma3_qdma_ch_min_val[phyCtrllerInstId] + resMgrObj[phyCtrllerInstId].gblCfgParams.numQdmaChannels - 1u;
+                       edma3_dma_ch_max_val[phyCtrllerInstId] = resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels - 1U;
+                       edma3_link_ch_min_val[phyCtrllerInstId] = edma3_dma_ch_max_val[phyCtrllerInstId] + 1U;
+                       edma3_link_ch_max_val[phyCtrllerInstId] = edma3_link_ch_min_val[phyCtrllerInstId] + (resMgrObj[phyCtrllerInstId].gblCfgParams.numPaRAMSets - 1U);
+                       edma3_qdma_ch_min_val[phyCtrllerInstId] = edma3_link_ch_max_val[phyCtrllerInstId] + 1U;
+                       edma3_qdma_ch_max_val[phyCtrllerInstId] = edma3_qdma_ch_min_val[phyCtrllerInstId] + (resMgrObj[phyCtrllerInstId].gblCfgParams.numQdmaChannels - 1U);
                        edma3_log_ch_max_val[phyCtrllerInstId] = edma3_qdma_ch_max_val[phyCtrllerInstId];
 
             resMgrObj[phyCtrllerInstId].phyCtrllerInstId = phyCtrllerInstId;
             resMgrObj[phyCtrllerInstId].state = EDMA3_RM_CREATED;
-            resMgrObj[phyCtrllerInstId].numOpens = 0u;
+            resMgrObj[phyCtrllerInstId].numOpens = 0U;
 
             /* Make all the RM instances for this EDMA3 HW NULL */
-            for (count = 0u; count < EDMA3_MAX_RM_INSTANCES; count++)
+            for (count = 0U; count < EDMA3_MAX_RM_INSTANCES; count++)
                 {
                 edma3MemZero((void *)((EDMA3_RM_Instance *)(ptrRMIArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + count),
                             sizeof(EDMA3_RM_Instance));
@@ -525,7 +527,7 @@ EDMA3_RM_Result EDMA3_RM_create (uint32_t phyCtrllerInstId,
                 }
 
             /* Initialize the global edma3DmaChTccMapping array with EDMA3_MAX_TCC */
-            for (  count = 0u;
+            for (  count = 0U;
                     count < resMgrObj[phyCtrllerInstId].gblCfgParams.numDmaChannels;
                     count++
                 )
@@ -534,7 +536,7 @@ EDMA3_RM_Result EDMA3_RM_create (uint32_t phyCtrllerInstId,
                 }
 
             /* Initialize the global edma3QdmaChTccMapping array with EDMA3_MAX_TCC */
-            for (   count = 0u;
+            for (   count = 0U;
                     count < resMgrObj[phyCtrllerInstId].gblCfgParams.numQdmaChannels;
                     count++
                 )
@@ -543,14 +545,14 @@ EDMA3_RM_Result EDMA3_RM_create (uint32_t phyCtrllerInstId,
                 }
 
             /* Reset edma3RmChBoundRes Array*/
-            for (count = 0u; count < EDMA3_MAX_LOGICAL_CH; count++)
+            for (count = 0U; count < EDMA3_MAX_LOGICAL_CH; count++)
                 {
                 edma3RmChBoundRes[phyCtrllerInstId][count].paRAMId = -1;
                 edma3RmChBoundRes[phyCtrllerInstId][count].tcc = EDMA3_MAX_TCC;
                 }
 
             /* Make the contiguousParamRes array NULL */
-            edma3MemZero((void *)(&(contiguousParamRes[0u])),
+            edma3MemZero((void *)(&(contiguousParamRes[0U])),
                 sizeof(contiguousParamRes));
 
 
@@ -595,14 +597,11 @@ EDMA3_RM_Result EDMA3_RM_delete (uint32_t phyCtrllerInstId,
        /* Check if the parameters are OK. */
        if (EDMA3_RM_SOK == result)
         {
-        /*to remove CCS remark: parameter "param" was never referenced */
-        (void)param;
-
         /**
          * If number of RM Instances is 0, then state should be
          * EDMA3_RM_CLOSED OR EDMA3_RM_CREATED.
          */
-        if ((NULL == resMgrObj[phyCtrllerInstId].numOpens)
+        if ((0 == resMgrObj[phyCtrllerInstId].numOpens)
             && ((resMgrObj[phyCtrllerInstId].state != EDMA3_RM_CLOSED)
             && (resMgrObj[phyCtrllerInstId].state != EDMA3_RM_CREATED)))
             {
@@ -614,7 +613,7 @@ EDMA3_RM_Result EDMA3_RM_delete (uint32_t phyCtrllerInstId,
              * If number of RM Instances is NOT 0, then this function
              * SHOULD NOT be called by anybody.
              */
-            if (NULL != resMgrObj[phyCtrllerInstId].numOpens)
+            if (0 != resMgrObj[phyCtrllerInstId].numOpens)
                 {
                 result = EDMA3_RM_E_INVALID_STATE;
                 }
@@ -624,8 +623,8 @@ EDMA3_RM_Result EDMA3_RM_delete (uint32_t phyCtrllerInstId,
                 resMgrObj[phyCtrllerInstId].state = EDMA3_RM_DELETED;
 
                 /* Reset the Allocated TCCs Array also. */
-                allocatedTCCs[phyCtrllerInstId][0u] = 0x0u;
-                allocatedTCCs[phyCtrllerInstId][1u] = 0x0u;
+                allocatedTCCs[phyCtrllerInstId][0U] = 0x0U;
+                allocatedTCCs[phyCtrllerInstId][1U] = 0x0U;
 
                 /* Also, reset the RM Object Global Config Info */
                 edma3MemZero((void *)&(resMgrObj[phyCtrllerInstId].gblCfgParams),
@@ -641,16 +640,16 @@ EDMA3_RM_Handle EDMA3_RM_open (uint32_t phyCtrllerInstId,
                                 const EDMA3_RM_Param *initParam,
                                 EDMA3_RM_Result *errorCode)
     {
-    uint32_t intState           = 0u;
-    uint32_t resMgrIdx          = 0u;
+    uint32_t intState           = 0U;
+    uint32_t resMgrIdx          = 0U;
     EDMA3_RM_Result result          = EDMA3_RM_SOK;
     EDMA3_RM_Obj *rmObj             = NULL;
     EDMA3_RM_Instance *rmInstance   = NULL;
     EDMA3_RM_Instance *temp_ptr_rm_inst   = NULL;
     EDMA3_RM_Handle retVal          = NULL;
-    uint32_t dmaChDwrds = 0u;
-    uint32_t paramSetDwrds = 0u;
-    uint32_t tccDwrds = 0u;
+    uint32_t dmaChDwrds = 0U;
+    uint32_t paramSetDwrds = 0U;
+    uint32_t tccDwrds = 0U;
     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
 
 #ifdef GENERIC
@@ -702,7 +701,7 @@ EDMA3_RM_Handle EDMA3_RM_open (uint32_t phyCtrllerInstId,
                   * If no RM instance is opened and this is the first one,
                   * then state should be created/closed.
                   */
-                if ((rmObj->numOpens == NULL) &&
+                if ((rmObj->numOpens == 0) &&
                     ((rmObj->state != EDMA3_RM_CREATED) &&
                     (rmObj->state != EDMA3_RM_CLOSED)))
                     {
@@ -761,7 +760,7 @@ EDMA3_RM_Handle EDMA3_RM_open (uint32_t phyCtrllerInstId,
         else
             {
             /* Create Res Mgr Instance */
-            for (resMgrIdx = 0u; resMgrIdx < EDMA3_MAX_RM_INSTANCES; resMgrIdx++)
+            for (resMgrIdx = 0U; resMgrIdx < EDMA3_MAX_RM_INSTANCES; resMgrIdx++)
                 {
                 temp_ptr_rm_inst = ((EDMA3_RM_Instance *)(ptrRMIArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx);
 
@@ -839,43 +838,43 @@ EDMA3_RM_Handle EDMA3_RM_open (uint32_t phyCtrllerInstId,
                     rmInstance->initParam.rmInstInitConfig =
                                 ((EDMA3_RM_InstanceInitConfig *)(ptrInitCfgArray) + (phyCtrllerInstId*EDMA3_MAX_RM_INSTANCES) + resMgrIdx);
 
-                    dmaChDwrds = rmObj->gblCfgParams.numDmaChannels / 32u;
+                    dmaChDwrds = rmObj->gblCfgParams.numDmaChannels / 32U;
                                        if (dmaChDwrds == 0)
                                                {
                                                /* In case DMA channels are < 32 */
                                                dmaChDwrds = 1;
                                                }
 
-                    paramSetDwrds = rmObj->gblCfgParams.numPaRAMSets / 32u;
+                    paramSetDwrds = rmObj->gblCfgParams.numPaRAMSets / 32U;
                                        if (paramSetDwrds == 0)
                                                {
                                                /* In case PaRAM Sets are < 32 */
                                                paramSetDwrds = 1;
                                                }
 
-                    tccDwrds = rmObj->gblCfgParams.numTccs / 32u;
+                    tccDwrds = rmObj->gblCfgParams.numTccs / 32U;
                                        if (tccDwrds == 0)
                                                {
                                                /* In case TCCs are < 32 */
                                                tccDwrds = 1;
                                                }
 
-                    for (resMgrIdx = 0u; resMgrIdx < dmaChDwrds; ++resMgrIdx)
+                    for (resMgrIdx = 0U; resMgrIdx < dmaChDwrds; ++resMgrIdx)
                         {
                         rmInstance->avlblDmaChannels[resMgrIdx]
                             = rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resMgrIdx];
                         }
 
-                    rmInstance->avlblQdmaChannels[0u]
-                        = rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0u];
+                    rmInstance->avlblQdmaChannels[0U]
+                        = rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0U];
 
-                    for (resMgrIdx = 0u; resMgrIdx < paramSetDwrds; ++resMgrIdx)
+                    for (resMgrIdx = 0U; resMgrIdx < paramSetDwrds; ++resMgrIdx)
                         {
                         rmInstance->avlblPaRAMSets[resMgrIdx]
                             = rmInstance->initParam.rmInstInitConfig->ownPaRAMSets[resMgrIdx];
                         }
 
-                    for (resMgrIdx = 0u; resMgrIdx < tccDwrds; ++resMgrIdx)
+                    for (resMgrIdx = 0U; resMgrIdx < tccDwrds; ++resMgrIdx)
                         {
                         rmInstance->avlblTccs [resMgrIdx]
                             = rmInstance->initParam.rmInstInitConfig->ownTccs[resMgrIdx];
@@ -888,9 +887,9 @@ EDMA3_RM_Handle EDMA3_RM_open (uint32_t phyCtrllerInstId,
                      * will not be returned in case user requests for ANY link
                      * channel.
                      */
-                    for (resMgrIdx = 0u; resMgrIdx < rmObj->gblCfgParams.numDmaChannels; ++resMgrIdx)
+                    for (resMgrIdx = 0U; resMgrIdx < rmObj->gblCfgParams.numDmaChannels; ++resMgrIdx)
                         {
-                        rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets[resMgrIdx/32u] |= (1u<<(resMgrIdx%32u));
+                        rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets[resMgrIdx/32U] |= ((uint32_t)1U<<(resMgrIdx%32U));
                         }
 
                     /*
@@ -960,17 +959,14 @@ EDMA3_RM_Result EDMA3_RM_close (EDMA3_RM_Handle hEdmaResMgr,
                                     const void *param)
     {
     EDMA3_RM_Result result = EDMA3_RM_SOK;
-    uint32_t intState = 0u;
-    uint32_t resMgrIdx = 0u;
+    uint32_t intState = 0U;
+    uint32_t resMgrIdx = 0U;
     EDMA3_RM_Obj *rmObj             = NULL;
     EDMA3_RM_Instance *rmInstance   = NULL;
     uint32_t dmaChDwrds;
     uint32_t paramSetDwrds;
     uint32_t tccDwrds;
 
-    /*to remove CCS remark: parameter "param" was never referenced */
-    (void)param;
-
        /* If parameter checking is enabled... */
 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
     if (NULL == hEdmaResMgr)
@@ -998,23 +994,23 @@ EDMA3_RM_Result EDMA3_RM_close (EDMA3_RM_Handle hEdmaResMgr,
                 }
             else
                 {
-                dmaChDwrds = rmObj->gblCfgParams.numDmaChannels / 32u;
-                paramSetDwrds = rmObj->gblCfgParams.numPaRAMSets / 32u;
-                tccDwrds = rmObj->gblCfgParams.numTccs / 32u;
+                dmaChDwrds = rmObj->gblCfgParams.numDmaChannels / 32U;
+                paramSetDwrds = rmObj->gblCfgParams.numPaRAMSets / 32U;
+                tccDwrds = rmObj->gblCfgParams.numTccs / 32U;
 
                 /* Set the instance config as NULL*/
-                for (resMgrIdx = 0u; resMgrIdx < dmaChDwrds; ++resMgrIdx)
+                for (resMgrIdx = 0U; resMgrIdx < dmaChDwrds; ++resMgrIdx)
                     {
-                    rmInstance->avlblDmaChannels[resMgrIdx] = 0x0u;
+                    rmInstance->avlblDmaChannels[resMgrIdx] = 0x0U;
                     }
-                for (resMgrIdx = 0u; resMgrIdx < paramSetDwrds; ++resMgrIdx)
+                for (resMgrIdx = 0U; resMgrIdx < paramSetDwrds; ++resMgrIdx)
                     {
-                    rmInstance->avlblPaRAMSets[resMgrIdx] = 0x0u;
+                    rmInstance->avlblPaRAMSets[resMgrIdx] = 0x0U;
                     }
-                rmInstance->avlblQdmaChannels[0u] = 0x0u;
-                for (resMgrIdx = 0u; resMgrIdx < tccDwrds; ++resMgrIdx)
+                rmInstance->avlblQdmaChannels[0U] = 0x0U;
+                for (resMgrIdx = 0U; resMgrIdx < tccDwrds; ++resMgrIdx)
                     {
-                    rmInstance->avlblTccs[resMgrIdx] = 0x0u;
+                    rmInstance->avlblTccs[resMgrIdx] = 0x0U;
                     }
 
                 /**
@@ -1038,7 +1034,7 @@ EDMA3_RM_Result EDMA3_RM_close (EDMA3_RM_Handle hEdmaResMgr,
 
                 /* Decrease the Number of Opens */
                 --rmObj->numOpens;
-                if (NULL == rmObj->numOpens)
+                if (0 == rmObj->numOpens)
                     {
                     edma3MemZero((void *)&(edma3RmChBoundRes[rmObj->phyCtrllerInstId]),
                                             sizeof(edma3RmChBoundRes[rmObj->phyCtrllerInstId]));
@@ -1068,7 +1064,7 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Obj *rmObj = NULL;
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_Result semResult = EDMA3_RM_SOK;
-    uint32_t avlblIdx = 0u;
+    uint32_t avlblIdx = 0U;
     uint32_t resIdClr = 0x0;
     uint32_t resIdSet = 0x0;
     uint32_t resId;
@@ -1110,8 +1106,8 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
             edma3Id = rmObj->phyCtrllerInstId;
             resId = resObj->resId;
 
-            resIdClr = (uint32_t)(~(1u << (resId%32u)));
-            resIdSet = (1u << (resId%32u));
+            resIdClr = (uint32_t)(~((uint32_t)1U << (resId%32U)));
+            resIdSet = (1U << (resId%32U));
 
             if ( rmInstance->mapXbarToChan != NULL)
                 {
@@ -1147,18 +1143,18 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                    {
                                    if (resId == EDMA3_RM_RES_ANY)
                                        {
-                                       for (avlblIdx=0u;
+                                       for (avlblIdx=0U;
                                             avlblIdx <
                                                    rmObj->gblCfgParams.numDmaChannels;
                                             ++avlblIdx)
                                            {
-                                           if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[avlblIdx/32u])
+                                           if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[avlblIdx/32U])
                                                  &
-                                                 (rmInstance->avlblDmaChannels[avlblIdx/32u])
+                                                 (rmInstance->avlblDmaChannels[avlblIdx/32U])
                                                  &
-                                                 ~(rmInstance->initParam.rmInstInitConfig->resvdDmaChannels[avlblIdx/32u])
+                                                 ~(rmInstance->initParam.rmInstInitConfig->resvdDmaChannels[avlblIdx/32U])
                                                  &
-                                                 (1u << (avlblIdx%32u))) != FALSE)
+                                                 ((uint32_t)1U << (avlblIdx%32U))) != FALSE)
                                                {
                                                /*
                                                 * Match found.
@@ -1171,7 +1167,7 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                 * Mark the 'match found' resource as "Not Available"
                                                 * for future requests
                                                 */
-                                        rmInstance->avlblDmaChannels[avlblIdx/32u] &= (uint32_t)(~(1u << (avlblIdx%32u)));
+                                        rmInstance->avlblDmaChannels[avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
        
                                                /**
                                                 * Check if the register modification flag is
@@ -1183,15 +1179,15 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                     * Enable the DMA channel in the
                                                     * DRAE/DRAEH registers also.
                                                     */
-                                                   if (avlblIdx < 32u)
+                                                   if (avlblIdx < 32U)
                                                        {
                                                        gblRegs->DRA[rmInstance->initParam.regionId].DRAE
-                                                           |= (0x1u << avlblIdx);
+                                                           |= ((uint32_t)0x1U << avlblIdx);
                                                        }
                                                    else
                                                        {
                                                        gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
-                                                           |= (0x1u << (avlblIdx - 32u));
+                                                           |= ((uint32_t)0x1U << (avlblIdx - 32U));
                                                        }
                                                    }
        
@@ -1216,16 +1212,16 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                             * Check if specified resource is owned
                                             * by this instance of the resource manager
                                             */
-                                           if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resId/32u])&(resIdSet))!=FALSE)
+                                           if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resId/32U])&(resIdSet))!=FALSE)
                                               {
                                                /* Now check if specified resource is available presently*/
-                                               if (((rmInstance->avlblDmaChannels[resId/32u])&(resIdSet))!=FALSE)
+                                               if (((rmInstance->avlblDmaChannels[resId/32U])&(resIdSet))!=FALSE)
                                                    {
                                                    /*
                                                     * Mark the specified channel as "Not Available"
                                                     * for future requests
                                                     */
-                                                   rmInstance->avlblDmaChannels[resId/32u] &= resIdClr;
+                                                   rmInstance->avlblDmaChannels[resId/32U] &= resIdClr;
        
                                                    /**
                                                     * Check if the register modification flag is
@@ -1233,7 +1229,7 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                     */
                                                    if (TRUE == rmInstance->regModificationRequired)
                                                        {
-                                                       if (resId < 32u)
+                                                       if (resId < 32U)
                                                            {
                                                            rmInstance->shadowRegs->EECR = (1UL << resId);
        
@@ -1242,7 +1238,7 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                             * DRAE registers also.
                                                             */
                                                            gblRegs->DRA[rmInstance->initParam.regionId].DRAE
-                                                               |= (0x1u << resId);
+                                                               |= ((uint32_t)0x1U << resId);
                                                            }
                                                        else
                                                            {
@@ -1253,7 +1249,7 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                             * DRAEH registers also.
                                                             */
                                                            gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
-                                                               |= (0x1u << (resId - 32u));
+                                                               |= ((uint32_t)0x1U << (resId - 32U));
                                                            }
                                                        }
        
@@ -1286,18 +1282,18 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                {
                                if (resId == EDMA3_RM_RES_ANY)
                                    {
-                                   for (avlblIdx=0u; avlblIdx<rmObj->gblCfgParams.numQdmaChannels; ++avlblIdx)
+                                   for (avlblIdx=0U; avlblIdx<rmObj->gblCfgParams.numQdmaChannels; ++avlblIdx)
                                        {
-                                       if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[avlblIdx/32u])
+                                       if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[avlblIdx/32U])
                                                  &
-                                                 (rmInstance->avlblQdmaChannels[avlblIdx/32u])
+                                                 (rmInstance->avlblQdmaChannels[avlblIdx/32U])
                                                  &
-                                                 ~(rmInstance->initParam.rmInstInitConfig->resvdQdmaChannels[avlblIdx/32u])
+                                                 ~(rmInstance->initParam.rmInstInitConfig->resvdQdmaChannels[avlblIdx/32U])
                                                  &
-                                                 (1u << (avlblIdx%32u))) != FALSE)
+                                                 ((uint32_t)1U << (avlblIdx%32U))) != FALSE)
                                            {
                                            resObj->resId = avlblIdx;
-                                    rmInstance->avlblQdmaChannels[avlblIdx/32u] &= (uint32_t)(~(1u << (avlblIdx%32u)));
+                                    rmInstance->avlblQdmaChannels[avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
        
                                            /**
                                             * Check if the register modification flag is
@@ -1310,7 +1306,7 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                 * QRAE register also.
                                                 */
                                                gblRegs->QRAE[rmInstance->initParam.regionId]
-                                                   |= (0x1u << avlblIdx);
+                                                   |= ((uint32_t)0x1U << avlblIdx);
                                                }
        
                                            result = EDMA3_RM_SOK;
@@ -1330,11 +1326,11 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                    {
                                    if (resId < rmObj->gblCfgParams.numQdmaChannels)
                                        {
-                                       if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels [resId/32u])&(resIdSet))!=FALSE)
+                                       if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels [resId/32U])&(resIdSet))!=FALSE)
                                            {
-                                           if (((rmInstance->avlblQdmaChannels [resId/32u])&(resIdSet))!=FALSE)
+                                           if (((rmInstance->avlblQdmaChannels [resId/32U])&(resIdSet))!=FALSE)
                                                {
-                                               rmInstance->avlblQdmaChannels [resId/32u] &= resIdClr;
+                                               rmInstance->avlblQdmaChannels [resId/32U] &= resIdClr;
        
                                                /**
                                                 * Check if the register modification flag is
@@ -1347,7 +1343,7 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                     * QRAE register also.
                                                     */
                                                    gblRegs->QRAE[rmInstance->initParam.regionId]
-                                                       |= (0x1u << resId);
+                                                       |= ((uint32_t)0x1U << resId);
                                                    }
        
                                                result = EDMA3_RM_SOK;
@@ -1379,15 +1375,15 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                {
                                if (resId == EDMA3_RM_RES_ANY)
                                    {
-                                   for (avlblIdx=0u; avlblIdx<rmObj->gblCfgParams.numTccs; ++avlblIdx)
+                                   for (avlblIdx=0U; avlblIdx<rmObj->gblCfgParams.numTccs; ++avlblIdx)
                                        {
-                                       if (((rmInstance->initParam.rmInstInitConfig->ownTccs [avlblIdx/32u])
-                                           & (rmInstance->avlblTccs [avlblIdx/32u])
-                                           & ~(rmInstance->initParam.rmInstInitConfig->resvdTccs [avlblIdx/32u])
-                                           & (1u << (avlblIdx%32u)))!=FALSE)
+                                       if (((rmInstance->initParam.rmInstInitConfig->ownTccs [avlblIdx/32U])
+                                           & (rmInstance->avlblTccs [avlblIdx/32U])
+                                           & ~(rmInstance->initParam.rmInstInitConfig->resvdTccs [avlblIdx/32U])
+                                           & ((uint32_t)1U << (avlblIdx%32U)))!=FALSE)
                                            {
                                            resObj->resId = avlblIdx;
-                                    rmInstance->avlblTccs [avlblIdx/32u] &= (uint32_t)(~(1u << (avlblIdx%32u)));
+                                    rmInstance->avlblTccs [avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
        
                                            /**
                                             * Check if the register modification flag is
@@ -1404,10 +1400,10 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                 * getting the interrupts on the same side.
                                                 * So save the TCC in the allocatedTCCs[] array.
                                                 */
-                                               if (avlblIdx < 32u)
+                                               if (avlblIdx < 32U)
                                                    {
                                                    gblRegs->DRA[rmInstance->initParam.regionId].DRAE
-                                                       |= (0x1u << avlblIdx);
+                                                       |= ((uint32_t)0x1U << avlblIdx);
        
                                                    /**
                                                     * Do not modify this global array if the register
@@ -1418,13 +1414,13 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                     */
                                                    if (edma3RegionId == rmInstance->initParam.regionId)
                                                        {
-                                                       allocatedTCCs[edma3Id][0u] |= (0x1u << avlblIdx);
+                                                       allocatedTCCs[edma3Id][0U] |= ((uint32_t)0x1U << avlblIdx);
                                                        }
                                                    }
                                                else
                                                    {
                                                    gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
-                                                       |= (0x1u << (avlblIdx - 32u));
+                                                       |= ((uint32_t)0x1U << (avlblIdx - 32U));
        
                                                    /**
                                                     * Do not modify this global array if the register
@@ -1435,7 +1431,7 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                     */
                                                    if (edma3RegionId == rmInstance->initParam.regionId)
                                                        {
-                                                       allocatedTCCs[edma3Id][1u] |= (0x1u << (avlblIdx - 32u));
+                                                       allocatedTCCs[edma3Id][1U] |= ((uint32_t)0x1U << (avlblIdx - 32U));
                                                        }
                                                    }
                                                }
@@ -1458,11 +1454,11 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                    {
                                    if (resId < rmObj->gblCfgParams.numTccs)
                                        {
-                                       if (((rmInstance->initParam.rmInstInitConfig->ownTccs [resId/32u])&(resIdSet))!=FALSE)
+                                       if (((rmInstance->initParam.rmInstInitConfig->ownTccs [resId/32U])&(resIdSet))!=FALSE)
                                            {
-                                           if (((rmInstance->avlblTccs [resId/32u])&(resIdSet))!=FALSE)
+                                           if (((rmInstance->avlblTccs [resId/32U])&(resIdSet))!=FALSE)
                                                {
-                                               rmInstance->avlblTccs [resId/32u] &= resIdClr;
+                                               rmInstance->avlblTccs [resId/32U] &= resIdClr;
        
                                                /**
                                                 * Check if the register modification flag is
@@ -1479,10 +1475,10 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                     * getting the interrupts on the same side.
                                                     * So save the TCC in the allocatedTCCs[] array.
                                                     */
-                                                   if (resId < 32u)
+                                                   if (resId < 32U)
                                                        {
                                                        gblRegs->DRA[rmInstance->initParam.regionId].DRAE
-                                                           |= (0x1u << resId);
+                                                           |= ((uint32_t)0x1U << resId);
        
                                                        /**
                                                         * Do not modify this global array if the register
@@ -1493,13 +1489,13 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                         */
                                                        if (edma3RegionId == rmInstance->initParam.regionId)
                                                            {
-                                                           allocatedTCCs[edma3Id][0u] |= (0x1u << resId);
+                                                           allocatedTCCs[edma3Id][0U] |= ((uint32_t)0x1U << resId);
                                                            }
                                                        }
                                                    else
                                                        {
                                                        gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
-                                                           |= (0x1u << (resId - 32u));
+                                                           |= ((uint32_t)0x1U << (resId - 32U));
        
                                                        /**
                                                         * Do not modify this global array if the register
@@ -1510,7 +1506,7 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                                         */
                                                        if (edma3RegionId == rmInstance->initParam.regionId)
                                                            {
-                                                           allocatedTCCs[edma3Id][1u] |= (0x1u << (resId - 32u));
+                                                           allocatedTCCs[edma3Id][1U] |= ((uint32_t)0x1U << (resId - 32U));
                                                            }
                                                        }
                                                    }
@@ -1544,18 +1540,18 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                {
                                if (resId == EDMA3_RM_RES_ANY)
                                    {
-                                   for (avlblIdx=0u; avlblIdx<rmObj->gblCfgParams.numPaRAMSets; ++avlblIdx)
+                                   for (avlblIdx=0U; avlblIdx<rmObj->gblCfgParams.numPaRAMSets; ++avlblIdx)
                                        {
-                                       if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [avlblIdx/32u])
+                                       if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [avlblIdx/32U])
                                              &
-                                             (rmInstance->avlblPaRAMSets [avlblIdx/32u])
+                                             (rmInstance->avlblPaRAMSets [avlblIdx/32U])
                                              &
-                                             ~(rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets [avlblIdx/32u])
+                                             ~(rmInstance->initParam.rmInstInitConfig->resvdPaRAMSets [avlblIdx/32U])
                                              &
-                                             (1u << (avlblIdx%32u)))!=FALSE)
+                                             ((uint32_t)1U << (avlblIdx%32U)))!=FALSE)
                                            {
                                            resObj->resId = avlblIdx;
-                                    rmInstance->avlblPaRAMSets [avlblIdx/32u] &= (uint32_t)(~(1u << (avlblIdx%32u)));
+                                    rmInstance->avlblPaRAMSets [avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
        
                                            /**
                                             * Also, make the actual PARAM Set NULL, checking the flag
@@ -1585,11 +1581,11 @@ EDMA3_RM_Result EDMA3_RM_allocResource(EDMA3_RM_Handle hEdmaResMgr,
                                    {
                                    if (resId < rmObj->gblCfgParams.numPaRAMSets)
                                        {
-                                       if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [resId/32u])&(resIdSet))!=FALSE)
+                                       if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [resId/32U])&(resIdSet))!=FALSE)
                                            {
-                                           if (((rmInstance->avlblPaRAMSets [resId/32u])&(resIdSet)) !=FALSE)
+                                           if (((rmInstance->avlblPaRAMSets [resId/32U])&(resIdSet)) !=FALSE)
                                                {
-                                               rmInstance->avlblPaRAMSets [resId/32u] &= resIdClr;
+                                               rmInstance->avlblPaRAMSets [resId/32U] &= resIdClr;
        
                                                /**
                                                 * Also, make the actual PARAM Set NULL, checking the flag
@@ -1715,7 +1711,7 @@ EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
             edma3Id = rmObj->phyCtrllerInstId;
             resId = resObj->resId;
 
-            resIdSet = 1u << (resId%32u);
+            resIdSet = 1U << (resId%32U);
 
            /**
              * Take the instance specific semaphore, to prevent simultaneous
@@ -1732,15 +1728,15 @@ EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
                         {
                         if (resId < rmObj->gblCfgParams.numDmaChannels)
                             {
-                            if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels [resId/32u]) & (resIdSet))!=FALSE)
+                            if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels [resId/32U]) & (resIdSet))!=FALSE)
                                 {
-                                if (((~(rmInstance->avlblDmaChannels[resId/32u]))&(resIdSet))!=FALSE)
+                                if (((~(rmInstance->avlblDmaChannels[resId/32U]))&(resIdSet))!=FALSE)
                                     {
                                     /*
                                      * Mark the specified channel as "Available"
                                      * for future requests
                                      */
-                                    rmInstance->avlblDmaChannels[resId/32u] |= resIdSet;
+                                    rmInstance->avlblDmaChannels[resId/32U] |= resIdSet;
 
                                     /**
                                      * Check if the register modification flag is
@@ -1753,15 +1749,15 @@ EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
                                          * Reset the bit specific to the DMA channel
                                          * in the DRAE/DRAEH register also.
                                          */
-                                        if (resId < 32u)
+                                        if (resId < 32U)
                                             {
                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAE
-                                                            &= (~(0x1u << resId));
+                                                            &= (~((uint32_t)0x1U << resId));
                                             }
                                         else
                                             {
                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
-                                                            &= (~(0x1u << (resId-32u)));
+                                                            &= (~((uint32_t)0x1U << (resId-32U)));
                                             }
                                         }
 
@@ -1792,11 +1788,11 @@ EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
                         {
                         if (resId < rmObj->gblCfgParams.numQdmaChannels)
                             {
-                            if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels [resId/32u]) & (resIdSet))!=FALSE)
+                            if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels [resId/32U]) & (resIdSet))!=FALSE)
                                 {
-                                if (((~(rmInstance->avlblQdmaChannels [resId/32u])) & (resIdSet))!=FALSE)
+                                if (((~(rmInstance->avlblQdmaChannels [resId/32U])) & (resIdSet))!=FALSE)
                                     {
-                                    rmInstance->avlblQdmaChannels [resId/32u] |= resIdSet;
+                                    rmInstance->avlblQdmaChannels [resId/32U] |= resIdSet;
 
                                     /**
                                      * Check if the register modification flag is
@@ -1810,7 +1806,7 @@ EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
                                          * in the QRAE register also.
                                          */
                                         gblRegs->QRAE[rmInstance->initParam.regionId]
-                                                        &= (~(0x1u << resId));
+                                                        &= (~((uint32_t)0x1U << resId));
                                         }
 
                                     result = EDMA3_RM_SOK;
@@ -1840,11 +1836,11 @@ EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
                         {
                         if (resId < rmObj->gblCfgParams.numTccs)
                             {
-                            if (((rmInstance->initParam.rmInstInitConfig->ownTccs [resId/32u]) & (resIdSet))!=FALSE)
+                            if (((rmInstance->initParam.rmInstInitConfig->ownTccs [resId/32U]) & (resIdSet))!=FALSE)
                                 {
-                                if (((~(rmInstance->avlblTccs [resId/32u])) & (resIdSet))!=FALSE)
+                                if (((~(rmInstance->avlblTccs [resId/32U])) & (resIdSet))!=FALSE)
                                     {
-                                    rmInstance->avlblTccs [resId/32u] |= resIdSet;
+                                    rmInstance->avlblTccs [resId/32U] |= resIdSet;
 
                                     /**
                                      * Check if the register modification flag is
@@ -1860,24 +1856,24 @@ EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
                                          * TCC in allocatedTCCs[] array,
                                          * remove it from there too.
                                          */
-                                        if (resId < 32u)
+                                        if (resId < 32U)
                                             {
                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAE
-                                                            &= (~(0x1u << resId));
+                                                            &= (~((uint32_t)0x1U << resId));
 
                                             if (edma3RegionId == rmInstance->initParam.regionId)
                                                 {
-                                                allocatedTCCs[edma3Id][0u] &= (~(0x1u << resId));
+                                                allocatedTCCs[edma3Id][0U] &= (~((uint32_t)0x1U << resId));
                                                 }
                                             }
                                         else
                                             {
                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
-                                                            &= (~(0x1u << (resId-32u)));
+                                                            &= (~((uint32_t)0x1U << (resId-32U)));
 
                                             if (edma3RegionId == rmInstance->initParam.regionId)
                                                 {
-                                                allocatedTCCs[edma3Id][1u] &= (~(0x1u << (resId -32u)));
+                                                allocatedTCCs[edma3Id][1U] &= (~((uint32_t)0x1U << (resId -32U)));
                                                 }
                                             }
                                         }
@@ -1909,11 +1905,11 @@ EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
                         {
                         if (resId < rmObj->gblCfgParams.numPaRAMSets)
                             {
-                            if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [resId/32u])&(resIdSet))!=FALSE)
+                            if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets [resId/32U])&(resIdSet))!=FALSE)
                                 {
-                                if (((~(rmInstance->avlblPaRAMSets [resId/32u]))&(resIdSet))!=FALSE)
+                                if (((~(rmInstance->avlblPaRAMSets [resId/32U]))&(resIdSet))!=FALSE)
                                     {
-                                    rmInstance->avlblPaRAMSets [resId/32u] |= resIdSet;
+                                    rmInstance->avlblPaRAMSets [resId/32U] |= resIdSet;
 
                                     result = EDMA3_RM_SOK;
                                     }
@@ -1983,7 +1979,7 @@ EDMA3_RM_Result EDMA3_RM_allocLogicalChannel(EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_Instance *rmInstance = NULL;
     EDMA3_RM_Obj *rmObj = NULL;
-    uint32_t mappedPaRAMId=0u;
+    uint32_t mappedPaRAMId=0U;
     uint32_t mappedTcc = EDMA3_RM_CH_NO_TCC_MAP;
     int32_t paRAMId = (int32_t)EDMA3_RM_RES_ANY;
     volatile EDMA3_CCRL_Regs *gblRegs = NULL;
@@ -2338,7 +2334,7 @@ EDMA3_RM_Result EDMA3_RM_allocLogicalChannel(EDMA3_RM_Handle hEdmaResMgr,
                                 if (TRUE == rmInstance->regModificationRequired)
                                     {
                                     *((&gblRegs->PARAMENTRY[chObj->resId].OPT)
-                                            + (uint32_t)EDMA3_RM_PARAM_ENTRY_LINK_BCNTRLD) = 0xFFFFu;
+                                            + (uint32_t)EDMA3_RM_PARAM_ENTRY_LINK_BCNTRLD) = 0xFFFFU;
                                     }
                                 }
                             }
@@ -2347,7 +2343,10 @@ EDMA3_RM_Result EDMA3_RM_allocLogicalChannel(EDMA3_RM_Handle hEdmaResMgr,
                     break;
 
             default:
-                    result = EDMA3_RM_E_INVALID_PARAM;
+                    {
+                        result = EDMA3_RM_E_INVALID_PARAM;
+                        break;
+                    }
             }
         }
 
@@ -2430,7 +2429,7 @@ EDMA3_RM_Result EDMA3_RM_allocLogicalChannel(EDMA3_RM_Handle hEdmaResMgr,
 
                         /* Remove any linking */
                         *((&gblRegs->PARAMENTRY[*pParam].OPT)
-                                + (uint32_t)EDMA3_RM_PARAM_ENTRY_LINK_BCNTRLD) = 0xFFFFu;
+                                + (uint32_t)EDMA3_RM_PARAM_ENTRY_LINK_BCNTRLD) = 0xFFFFU;
                         }
                     }
                 else
@@ -2532,10 +2531,10 @@ EDMA3_RM_Result EDMA3_RM_allocLogicalChannel(EDMA3_RM_Handle hEdmaResMgr,
 
                         /* Remove any linking */
                         *((&gblRegs->PARAMENTRY[*pParam].OPT)
-                                + (uint32_t)EDMA3_RM_PARAM_ENTRY_LINK_BCNTRLD) = 0xFFFFu;
+                                + (uint32_t)EDMA3_RM_PARAM_ENTRY_LINK_BCNTRLD) = 0xFFFFU;
 
                         /* Enable the transfer also. */
-                        rmInstance->shadowRegs->QEESR = (1u << chObj->resId);
+                        rmInstance->shadowRegs->QEESR = (1U << chObj->resId);
                         }
                     }
                 else
@@ -2673,37 +2672,37 @@ EDMA3_RM_Result EDMA3_RM_freeLogicalChannel (EDMA3_RM_Handle hEdmaResMgr,
                 /* It should be owned and allocated by this RM only. */
                 if (result == EDMA3_RM_SOK)
                     {
-                    if (((rmConfig->ownDmaChannels[dmaChId/32u])
+                    if (((rmConfig->ownDmaChannels[dmaChId/32U])
                           &
-                          (~(rmInstance->avlblDmaChannels[dmaChId/32u]))
+                          (~(rmInstance->avlblDmaChannels[dmaChId/32U]))
                           &
-                          (1u << (dmaChId%32u))) != FALSE)
+                          ((uint32_t)1U << (dmaChId%32U))) != FALSE)
                         {
                         /** Perfectly valid channel id.
                          * Clear some channel specific registers, if it is permitted.
                          */
                         if (TRUE == rmInstance->regModificationRequired)
                             {
-                            if (dmaChId < 32u)
+                            if (dmaChId < 32U)
                                 {
-                                if((rmInstance->shadowRegs->SER & (1u<<dmaChId))!=FALSE)
+                                if((rmInstance->shadowRegs->SER & ((uint32_t)1U<<dmaChId))!=FALSE)
                                     {
-                                    rmInstance->shadowRegs->SECR = (1u<<dmaChId);
+                                    rmInstance->shadowRegs->SECR = (1U<<dmaChId);
                                     }
-                                if((globalRegs->EMR & (1u<<dmaChId))!=FALSE)
+                                if((globalRegs->EMR & ((uint32_t)1U<<dmaChId))!=FALSE)
                                     {
-                                    globalRegs->EMCR = (1u<<dmaChId);
+                                    globalRegs->EMCR = (1U<<dmaChId);
                                     }
                                 }
                             else
                                 {
-                                if((rmInstance->shadowRegs->SERH & (1u<<(dmaChId-32u)))!=FALSE)
+                                if((rmInstance->shadowRegs->SERH & ((uint32_t)1U<<(dmaChId-32U)))!=FALSE)
                                     {
-                                    rmInstance->shadowRegs->SECRH = (1u<<(dmaChId-32u));
+                                    rmInstance->shadowRegs->SECRH = (1U<<(dmaChId-32U));
                                     }
-                                if((globalRegs->EMRH & (1u<<(dmaChId-32u)))!=FALSE)
+                                if((globalRegs->EMRH & ((uint32_t)1U<<(dmaChId-32U)))!=FALSE)
                                     {
-                                    globalRegs->EMCRH = (1u<<(dmaChId-32u));
+                                    globalRegs->EMCRH = (1U<<(dmaChId-32U));
                                     }
                                 }
 
@@ -2785,11 +2784,11 @@ EDMA3_RM_Result EDMA3_RM_freeLogicalChannel (EDMA3_RM_Handle hEdmaResMgr,
                 /* It should be owned and allocated by this RM only. */
                 if (result == EDMA3_RM_SOK)
                     {
-                    if (((rmConfig->ownQdmaChannels[0u])
+                    if (((rmConfig->ownQdmaChannels[0U])
                           &
-                          (~(rmInstance->avlblQdmaChannels[0u]))
+                          (~(rmInstance->avlblQdmaChannels[0U]))
                           &
-                          (1u << chObj->resId)) != FALSE)
+                          ((uint32_t)1U << chObj->resId)) != FALSE)
                         {
                         /** Perfectly valid channel id.
                          * Clear some channel specific registers, if
@@ -2797,11 +2796,11 @@ EDMA3_RM_Result EDMA3_RM_freeLogicalChannel (EDMA3_RM_Handle hEdmaResMgr,
                          */
                         if (TRUE == rmInstance->regModificationRequired)
                             {
-                            rmInstance->shadowRegs->QEECR = (1u<<chObj->resId);
+                            rmInstance->shadowRegs->QEECR = (1U<<chObj->resId);
 
-                            if((globalRegs->QEMR & (1u<<chObj->resId))!=FALSE)
+                            if((globalRegs->QEMR & ((uint32_t)1U<<chObj->resId))!=FALSE)
                                 {
-                                globalRegs->QEMCR = (1u<<chObj->resId);
+                                globalRegs->QEMCR = (1U<<chObj->resId);
                                 }
 
                             /* Unmap PARAM Set Number for specified channelId */
@@ -2897,7 +2896,10 @@ EDMA3_RM_Result EDMA3_RM_freeLogicalChannel (EDMA3_RM_Handle hEdmaResMgr,
                 break;
 
             default:
-                result = EDMA3_RM_E_INVALID_PARAM;
+                {
+                    result = EDMA3_RM_E_INVALID_PARAM;
+                    break;
+                }
             }
         }
 
@@ -2982,18 +2984,18 @@ EDMA3_RM_Result EDMA3_RM_mapEdmaChannel (EDMA3_RM_Handle hEdmaResMgr,
     /* DMA channel and PaRAM Set should be previously allocated. */
     if (result == EDMA3_RM_SOK)
         {
-        if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[channelId/32u])
+        if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[channelId/32U])
                                                   &
-                                                  (~(rmInstance->avlblDmaChannels[channelId/32u]))
+                                                  (~(rmInstance->avlblDmaChannels[channelId/32U]))
                                                   &
-                                                  (1u << (channelId%32u))) != FALSE)
+                                                  ((uint32_t)1U << (channelId%32U))) != FALSE)
             {
             /* DMA channel allocated, check for the PaRAM Set */
-            if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets[paRAMId/32u])
+            if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets[paRAMId/32U])
                                           &
-                                          (~(rmInstance->avlblPaRAMSets[paRAMId/32u]))
+                                          (~(rmInstance->avlblPaRAMSets[paRAMId/32U]))
                                           &
-                                          (1u << (paRAMId%32u))) == FALSE)
+                                          ((uint32_t)1U << (paRAMId%32U))) == FALSE)
                 {
                 /* PaRAM Set NOT allocated, return error */
                 result = EDMA3_RM_E_RES_NOT_ALLOCATED;
@@ -3111,18 +3113,18 @@ EDMA3_RM_Result EDMA3_RM_mapQdmaChannel (EDMA3_RM_Handle hEdmaResMgr,
     /* QDMA channel and PaRAM Set should be previously allocated. */
     if (result == EDMA3_RM_SOK)
         {
-        if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[channelId/32u])
+        if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[channelId/32U])
                                                   &
-                                                  (~(rmInstance->avlblQdmaChannels[channelId/32u]))
+                                                  (~(rmInstance->avlblQdmaChannels[channelId/32U]))
                                                   &
-                                                  (1u << (channelId%32u))) != FALSE)
+                                                  ((uint32_t)1U << (channelId%32U))) != FALSE)
             {
             /* QDMA channel allocated, check for the PaRAM Set */
-            if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets[paRAMId/32u])
+            if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets[paRAMId/32U])
                                           &
-                                          (~(rmInstance->avlblPaRAMSets[paRAMId/32u]))
+                                          (~(rmInstance->avlblPaRAMSets[paRAMId/32U]))
                                           &
-                                          (1u << (paRAMId%32u))) == FALSE)
+                                          ((uint32_t)1U << (paRAMId%32U))) == FALSE)
                 {
                 /* PaRAM Set NOT allocated, return error */
                 result = EDMA3_RM_E_RES_NOT_ALLOCATED;
@@ -3270,13 +3272,13 @@ EDMA3_RM_Result EDMA3_RM_registerTccCb(EDMA3_RM_Handle hEdmaResMgr,
         {
 
         /* Enable the interrupts in IESR/IESRH */
-        if (tcc < 32u)
+        if (tcc < 32U)
             {
             rmInstance->shadowRegs->IESR = (1UL << tcc);
             }
         else
             {
-            rmInstance->shadowRegs->IESRH = (1UL << (tcc-32u));
+            rmInstance->shadowRegs->IESRH = (1UL << (tcc-32U));
             }
 
         /* Save the callback functions also */
@@ -3395,13 +3397,18 @@ EDMA3_RM_Result EDMA3_RM_unregisterTccCb(EDMA3_RM_Handle hEdmaResMgr,
         {
 
         /* Remove the callback function too */
-        if (mappedTcc < 32u)
+        if (mappedTcc < 32U)
             {
             rmInstance->shadowRegs->IECR = (1UL << mappedTcc);
             }
         else if(mappedTcc < 64)
             {
-            rmInstance->shadowRegs->IECRH = (1UL << (mappedTcc-32u));
+            rmInstance->shadowRegs->IECRH = (1UL << (mappedTcc-32U));
+            }
+        else
+            {
+            /* To Comply MISRA C warning */
+                       result = EDMA3_RM_SOK;
             }
 
         if(mappedTcc < EDMA3_MAX_TCC)
@@ -3430,16 +3437,16 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Obj *rmObj = NULL;
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_ResDesc *resObj = NULL;
-    uint32_t resAllocIdx = 0u;
+    uint32_t resAllocIdx = 0U;
     uint32_t firstResId;
-    uint32_t lastResId = 0u;
-    uint32_t maxNumResources = 0u;
+    uint32_t lastResId = 0U;
+    uint32_t maxNumResources = 0U;
     EDMA3_RM_Result semResult = EDMA3_RM_SOK;
     uint32_t resIdClr = 0x0;
     uint32_t resIdSet = 0x0;
     volatile EDMA3_CCRL_Regs *gblRegs = NULL;
-    uint32_t i = 0u;
-    uint32_t position = 0u;
+    uint32_t i = 0U;
+    uint32_t position = 0U;
        uint32_t edma3Id;
 
 #ifdef EDMA3_INSTRUMENTATION_ENABLED
@@ -3571,22 +3578,22 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
                             {
                             for (resAllocIdx = firstResId; resAllocIdx < lastResId; ++resAllocIdx)
                                 {
-                                resIdClr = (uint32_t)(~(1u << (resAllocIdx%32u)));
-                                resIdSet = (1u << (resAllocIdx%32u));
+                                resIdClr = (uint32_t)(~((uint32_t)1U << (resAllocIdx%32U)));
+                                resIdSet = (1U << (resAllocIdx%32U));
 
                                 /* Check whether it is owned or not */
-                                if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resAllocIdx/32u])&(resIdSet)) != FALSE)
+                                if (((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[resAllocIdx/32U])&(resIdSet)) != FALSE)
                                    {
                                     /* Now check if specified resource is available presently*/
-                                    if (((rmInstance->avlblDmaChannels[resAllocIdx/32u])&(resIdSet)) != FALSE)
+                                    if (((rmInstance->avlblDmaChannels[resAllocIdx/32U])&(resIdSet)) != FALSE)
                                         {
                                         /*
                                          * Mark the specified resource as "Not Available"
                                          * for future requests
                                          */
-                                        rmInstance->avlblDmaChannels[resAllocIdx/32u] &= resIdClr;
+                                        rmInstance->avlblDmaChannels[resAllocIdx/32U] &= resIdClr;
 
-                                        if (resAllocIdx < 32u)
+                                        if (resAllocIdx < 32U)
                                             {
                                             rmInstance->shadowRegs->EECR = (1UL << resAllocIdx);
 
@@ -3595,18 +3602,18 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
                                              * DRAE registers also.
                                              */
                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAE
-                                                |= (0x1u << resAllocIdx);
+                                                |= ((uint32_t)0x1U << resAllocIdx);
                                             }
                                         else
                                             {
-                                            rmInstance->shadowRegs->EECRH = (1UL << (resAllocIdx - 32u));
+                                            rmInstance->shadowRegs->EECRH = (1UL << (resAllocIdx - 32U));
 
                                             /**
                                              * Enable the DMA channel in the
                                              * DRAEH registers also.
                                              */
                                             gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
-                                                |= (0x1u << (resAllocIdx - 32u));
+                                                |= ((uint32_t)0x1U << (resAllocIdx - 32U));
                                             }
 
                                         result = EDMA3_RM_SOK;
@@ -3636,27 +3643,27 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
                             {
                             for (resAllocIdx = firstResId; resAllocIdx < lastResId; ++resAllocIdx)
                                 {
-                                resIdClr = (uint32_t)(~(1u << resAllocIdx));
-                                resIdSet = (1u << resAllocIdx);
+                                resIdClr = (uint32_t)(~((uint32_t)1U << resAllocIdx));
+                                resIdSet = (1U << resAllocIdx);
 
                                 /* Check whether it is owned or not */
-                                if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0u])&(resIdSet))!=FALSE)
+                                if (((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0U])&(resIdSet))!=FALSE)
                                    {
                                     /* Now check if specified resource is available presently*/
-                                    if (((rmInstance->avlblQdmaChannels[0u])&(resIdSet))!=FALSE)
+                                    if (((rmInstance->avlblQdmaChannels[0U])&(resIdSet))!=FALSE)
                                         {
                                         /*
                                          * Mark the specified resource as "Not Available"
                                          * for future requests
                                          */
-                                        rmInstance->avlblQdmaChannels[0u] &= resIdClr;
+                                        rmInstance->avlblQdmaChannels[0U] &= resIdClr;
 
                                         /**
                                          * Enable the QDMA channel in the
                                          * QRAE register also.
                                          */
                                         gblRegs->QRAE[rmInstance->initParam.regionId]
-                                            |= (0x1u << resAllocIdx);
+                                            |= ((uint32_t)0x1U << resAllocIdx);
 
                                         result = EDMA3_RM_SOK;
                                         }
@@ -3685,20 +3692,20 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
                             {
                             for (resAllocIdx = firstResId; resAllocIdx < lastResId; ++resAllocIdx)
                                 {
-                                resIdClr = (uint32_t)(~(1u << (resAllocIdx%32u)));
-                                resIdSet = (1u << (resAllocIdx%32u));
+                                resIdClr = (uint32_t)(~((uint32_t)1U << (resAllocIdx%32U)));
+                                resIdSet = (1U << (resAllocIdx%32U));
 
                                 /* Check whether it is owned or not */
-                                if (((rmInstance->initParam.rmInstInitConfig->ownTccs[resAllocIdx/32u])&(resIdSet))!=FALSE)
+                                if (((rmInstance->initParam.rmInstInitConfig->ownTccs[resAllocIdx/32U])&(resIdSet))!=FALSE)
                                    {
                                     /* Now check if specified resource is available presently*/
-                                    if (((rmInstance->avlblTccs[resAllocIdx/32u])&(resIdSet))!=FALSE)
+                                    if (((rmInstance->avlblTccs[resAllocIdx/32U])&(resIdSet))!=FALSE)
                                         {
                                         /*
                                          * Mark the specified resource as "Not Available"
                                          * for future requests
                                          */
-                                        rmInstance->avlblTccs[resAllocIdx/32u] &= resIdClr;
+                                        rmInstance->avlblTccs[resAllocIdx/32U] &= resIdClr;
 
                                         /**
                                          * If the region id coming from this
@@ -3709,13 +3716,13 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
                                          */
                                         if (edma3RegionId == rmInstance->initParam.regionId)
                                             {
-                                               if (resAllocIdx < 32u)
+                                               if (resAllocIdx < 32U)
                                                    {
-                                                                                               allocatedTCCs[edma3Id][0u] |= (0x1u << resAllocIdx);
+                                                                                               allocatedTCCs[edma3Id][0U] |= ((uint32_t)0x1U << resAllocIdx);
                                                    }
                                                else
                                                    {
-                                                   allocatedTCCs[edma3Id][1u] |= (0x1u << (resAllocIdx - 32u));
+                                                   allocatedTCCs[edma3Id][1U] |= ((uint32_t)0x1U << (resAllocIdx - 32U));
                                                    }
                                                }
                                         result = EDMA3_RM_SOK;
@@ -3745,20 +3752,20 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
                             {
                             for (resAllocIdx = firstResId; resAllocIdx < lastResId; ++resAllocIdx)
                                 {
-                                resIdClr = (uint32_t)(~(1u << (resAllocIdx%32u)));
-                                resIdSet = (1u << (resAllocIdx%32u));
+                                resIdClr = (uint32_t)(~((uint32_t)1U << (resAllocIdx%32U)));
+                                resIdSet = (1U << (resAllocIdx%32U));
 
                                 /* Check whether it is owned or not */
-                                if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets[resAllocIdx/32u])&(resIdSet))!=FALSE)
+                                if (((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets[resAllocIdx/32U])&(resIdSet))!=FALSE)
                                    {
                                     /* Now check if specified resource is available presently*/
-                                    if (((rmInstance->avlblPaRAMSets[resAllocIdx/32u])&(resIdSet))!=FALSE)
+                                    if (((rmInstance->avlblPaRAMSets[resAllocIdx/32U])&(resIdSet))!=FALSE)
                                         {
                                         /*
                                          * Mark the specified resource as "Not Available"
                                          * for future requests
                                          */
-                                        rmInstance->avlblPaRAMSets[resAllocIdx/32u] &= resIdClr;
+                                        rmInstance->avlblPaRAMSets[resAllocIdx/32U] &= resIdClr;
 
                                         /**
                                          * Also, make the actual PARAM Set NULL, checking the flag
@@ -3828,13 +3835,13 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
                     case EDMA3_RM_RES_DMA_CHANNEL:
                         {
                         /* AND all the arrays to look into */
-                        contiguousDmaRes[0u] = ((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[0u]
-                                                & rmInstance->avlblDmaChannels[0u])
-                                                & (~(rmInstance->initParam.rmInstInitConfig->resvdDmaChannels[0u]))
+                        contiguousDmaRes[0U] = ((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[0U]
+                                                & rmInstance->avlblDmaChannels[0U])
+                                                & (~(rmInstance->initParam.rmInstInitConfig->resvdDmaChannels[0U]))
                                                 );
-                        contiguousDmaRes[1u] = ((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[1u]
-                                                & rmInstance->avlblDmaChannels[1u])
-                                                & (~(rmInstance->initParam.rmInstInitConfig->resvdDmaChannels[1u]))
+                        contiguousDmaRes[1U] = ((rmInstance->initParam.rmInstInitConfig->ownDmaChannels[1U]
+                                                & rmInstance->avlblDmaChannels[1U])
+                                                & (~(rmInstance->initParam.rmInstInitConfig->resvdDmaChannels[1U]))
                                                 );
                         }
                         break;
@@ -3842,9 +3849,9 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
                     case EDMA3_RM_RES_QDMA_CHANNEL:
                         {
                         /* AND all the arrays to look into */
-                        contiguousQdmaRes[0u] = ((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0u]
-                                                & rmInstance->avlblQdmaChannels[0u])
-                                                & (~(rmInstance->initParam.rmInstInitConfig->resvdQdmaChannels[0u]))
+                        contiguousQdmaRes[0U] = ((rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0U]
+                                                & rmInstance->avlblQdmaChannels[0U])
+                                                & (~(rmInstance->initParam.rmInstInitConfig->resvdQdmaChannels[0U]))
                                                 );
                         }
                         break;
@@ -3852,13 +3859,13 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
                     case EDMA3_RM_RES_TCC:
                         {
                         /* AND all the arrays to look into */
-                        contiguousTccRes[0u] = ((rmInstance->initParam.rmInstInitConfig->ownTccs[0u]
-                                                & rmInstance->avlblTccs[0u])
-                                                & (~(rmInstance->initParam.rmInstInitConfig->resvdTccs[0u]))
+                        contiguousTccRes[0U] = ((rmInstance->initParam.rmInstInitConfig->ownTccs[0U]
+                                                & rmInstance->avlblTccs[0U])
+                                                & (~(rmInstance->initParam.rmInstInitConfig->resvdTccs[0U]))
                                                 );
-                        contiguousTccRes[1u] = ((rmInstance->initParam.rmInstInitConfig->ownTccs[1u]
-                                                & rmInstance->avlblTccs[1u])
-                                                & (~(rmInstance->initParam.rmInstInitConfig->resvdTccs[1u]))
+                        contiguousTccRes[1U] = ((rmInstance->initParam.rmInstInitConfig->ownTccs[1U]
+                                                & rmInstance->avlblTccs[1U])
+                                                & (~(rmInstance->initParam.rmInstInitConfig->resvdTccs[1U]))
                                                 );
                         }
                         break;
@@ -3866,7 +3873,7 @@ EDMA3_RM_Result EDMA3_RM_allocContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
                     case EDMA3_RM_RES_PARAM_SET:
                         {
                         /* AND all the arrays to look into */
-                        for (i = 0u; i < (maxNumResources/32u); ++i)
+                        for (i = 0U; i < (maxNumResources/32U); ++i)
                             {
                             contiguousParamRes[i] = ((rmInstance->initParam.rmInstInitConfig->ownPaRAMSets[i]
                                                     & rmInstance->avlblPaRAMSets[i])
@@ -3949,10 +3956,10 @@ EDMA3_RM_Result EDMA3_RM_freeContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Obj *rmObj = NULL;
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_ResDesc *resObj;
-    uint32_t resFreeIdx = 0u;
+    uint32_t resFreeIdx = 0U;
     uint32_t firstResId;
     uint32_t lastResId;
-    uint32_t maxNumResources = 0u;
+    uint32_t maxNumResources = 0U;
 
 #ifdef EDMA3_INSTRUMENTATION_ENABLED
     EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3",
@@ -3986,7 +3993,7 @@ EDMA3_RM_Result EDMA3_RM_freeContiguousResource(EDMA3_RM_Handle hEdmaResMgr,
             if (resObj != NULL)
                 {
                 firstResId = resObj->resId;
-                lastResId = firstResId + (numResources - 1u);
+                lastResId = firstResId + (numResources - 1U);
                 }
 
             switch (resObj->type)
@@ -4050,7 +4057,7 @@ EDMA3_RM_Result EDMA3_RM_setCCRegister (EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_Instance *rmInstance = NULL;
     EDMA3_RM_Obj *rmObj = NULL;
-    volatile uint32_t regPhyAddr = 0x0u;
+    volatile uint32_t regPhyAddr = 0x0U;
 
 
 #ifdef EDMA3_INSTRUMENTATION_ENABLED
@@ -4064,7 +4071,7 @@ EDMA3_RM_Result EDMA3_RM_setCCRegister (EDMA3_RM_Handle hEdmaResMgr,
 
        /* If parameter checking is enabled... */
 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
-    if ((hEdmaResMgr == NULL) || ((regOffset % 4u) != 0))
+    if ((hEdmaResMgr == NULL) || ((regOffset % 4U) != 0))
         {
         result = (EDMA3_RM_E_INVALID_PARAM);
         }
@@ -4132,7 +4139,7 @@ EDMA3_RM_Result EDMA3_RM_getCCRegister (EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_Instance *rmInstance = NULL;
     EDMA3_RM_Obj *rmObj = NULL;
-    volatile uint32_t regPhyAddr = 0x0u;
+    volatile uint32_t regPhyAddr = 0x0U;
 
 
 #ifdef EDMA3_INSTRUMENTATION_ENABLED
@@ -4147,7 +4154,7 @@ EDMA3_RM_Result EDMA3_RM_getCCRegister (EDMA3_RM_Handle hEdmaResMgr,
        /* If parameter checking is enabled... */
 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
     if (((hEdmaResMgr == NULL) || (regValue == NULL))
-        || ((regOffset % 4u) != 0))
+        || ((regOffset % 4U) != 0))
         {
         result = (EDMA3_RM_E_INVALID_PARAM);
         }
@@ -4195,7 +4202,7 @@ EDMA3_RM_Result EDMA3_RM_waitAndClearTcc (EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Obj *rmObj = NULL;
     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
-    uint32_t tccBitMask = 0x0u;
+    uint32_t tccBitMask = 0x0U;
 
 
 #ifdef EDMA3_INSTRUMENTATION_ENABLED
@@ -4245,9 +4252,9 @@ EDMA3_RM_Result EDMA3_RM_waitAndClearTcc (EDMA3_RM_Handle hEdmaResMgr,
 
                 if (shadowRegs != NULL)
                     {
-                    if(tccNo < 32u)
+                    if(tccNo < 32U)
                         {
-                        tccBitMask = (1u << tccNo);
+                        tccBitMask = (1U << tccNo);
 
                         /* Check the status of the IPR[tccNo] bit. */
                         while (FALSE == (shadowRegs->IPR & tccBitMask))
@@ -4263,7 +4270,7 @@ EDMA3_RM_Result EDMA3_RM_waitAndClearTcc (EDMA3_RM_Handle hEdmaResMgr,
                         }
                     else
                         {
-                        tccBitMask = (1u << (tccNo - 32u));
+                        tccBitMask = (1U << (tccNo - 32U));
 
                         /* Check the status of the IPRH[tccNo-32] bit. */
                         while (FALSE == (shadowRegs->IPRH & tccBitMask))
@@ -4304,7 +4311,7 @@ EDMA3_RM_Result EDMA3_RM_checkAndClearTcc (EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Obj *rmObj = NULL;
     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
-    uint32_t tccBitMask = 0x0u;
+    uint32_t tccBitMask = 0x0U;
 
 
 #ifdef EDMA3_INSTRUMENTATION_ENABLED
@@ -4356,9 +4363,9 @@ EDMA3_RM_Result EDMA3_RM_checkAndClearTcc (EDMA3_RM_Handle hEdmaResMgr,
 
                 if (shadowRegs != NULL)
                     {
-                    if(tccNo < 32u)
+                    if(tccNo < 32U)
                         {
-                        tccBitMask = (1u << tccNo);
+                        tccBitMask = (1U << tccNo);
 
                         /* Check the status of the IPR[tccNo] bit. */
                         if ((shadowRegs->IPR & tccBitMask) != FALSE)
@@ -4372,7 +4379,7 @@ EDMA3_RM_Result EDMA3_RM_checkAndClearTcc (EDMA3_RM_Handle hEdmaResMgr,
                         }
                     else
                         {
-                        tccBitMask = (1u << (tccNo - 32u));
+                        tccBitMask = (1U << (tccNo - 32U));
 
                         /* Check the status of the IPRH[tccNo-32] bit. */
                         if ((shadowRegs->IPRH & tccBitMask) != FALSE)
@@ -4409,8 +4416,8 @@ EDMA3_RM_Result EDMA3_RM_setPaRAM (EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_Instance *rmInstance = NULL;
     EDMA3_RM_Obj *rmObj = NULL;
-    int32_t paRAMId = 0u;
-    uint32_t qdmaChId = 0u;
+    int32_t paRAMId = 0U;
+    uint32_t qdmaChId = 0U;
     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
        uint32_t edma3Id;
 
@@ -4515,7 +4522,10 @@ EDMA3_RM_Result EDMA3_RM_setPaRAM (EDMA3_RM_Handle hEdmaResMgr,
                 break;
 
             default:
-                result = EDMA3_RM_E_INVALID_PARAM;
+                {
+                    result = EDMA3_RM_E_INVALID_PARAM;
+                    break;
+                }
             }
         }
 
@@ -4526,7 +4536,7 @@ EDMA3_RM_Result EDMA3_RM_setPaRAM (EDMA3_RM_Handle hEdmaResMgr,
         if ((paRAMId != -1) && ((uint32_t)paRAMId < edma3NumPaRAMSets))
             {
             /* Set the PaRAM Set now. */
-            edma3ParamCpy ((void *)(&(globalRegs->PARAMENTRY[paRAMId].OPT)),
+            edma3ParamCpy ((volatile void *)(&(globalRegs->PARAMENTRY[paRAMId].OPT)),
                                (const void *)newPaRAM);
             }
         else
@@ -4554,8 +4564,8 @@ EDMA3_RM_Result EDMA3_RM_getPaRAM (EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_Instance *rmInstance = NULL;
     EDMA3_RM_Obj *rmObj = NULL;
-    int32_t paRAMId = 0u;
-    uint32_t qdmaChId = 0u;
+    int32_t paRAMId = 0U;
+    uint32_t qdmaChId = 0U;
     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
        uint32_t edma3Id;
 
@@ -4660,7 +4670,10 @@ EDMA3_RM_Result EDMA3_RM_getPaRAM (EDMA3_RM_Handle hEdmaResMgr,
                 break;
 
             default:
-                result = EDMA3_RM_E_INVALID_PARAM;
+                {
+                    result = EDMA3_RM_E_INVALID_PARAM;
+                    break;
+                }
             }
         }
 
@@ -4672,7 +4685,7 @@ EDMA3_RM_Result EDMA3_RM_getPaRAM (EDMA3_RM_Handle hEdmaResMgr,
             {
             /* Get the PaRAM Set now. */
             edma3ParamCpy ((void *)currPaRAM ,
-                                       (const void *)(&(globalRegs->PARAMENTRY [paRAMId].OPT)));
+                                       (const volatile void *)(&(globalRegs->PARAMENTRY [paRAMId].OPT)));
             }
         else
             {
@@ -4700,8 +4713,8 @@ EDMA3_RM_Result EDMA3_RM_getPaRAMPhyAddr(EDMA3_RM_Handle hEdmaResMgr,
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_Instance *rmInstance = NULL;
     EDMA3_RM_Obj *rmObj = NULL;
-    int32_t paRAMId = 0u;
-    uint32_t qdmaChId = 0u;
+    int32_t paRAMId = 0U;
+    uint32_t qdmaChId = 0U;
     volatile EDMA3_CCRL_Regs *globalRegs = NULL;
        uint32_t edma3Id;
 
@@ -4806,7 +4819,10 @@ EDMA3_RM_Result EDMA3_RM_getPaRAMPhyAddr(EDMA3_RM_Handle hEdmaResMgr,
                 break;
 
             default:
-                result = EDMA3_RM_E_INVALID_PARAM;
+                {
+                    result = EDMA3_RM_E_INVALID_PARAM;
+                    break;
+                }
             }
         }
 
@@ -4907,7 +4923,7 @@ EDMA3_RM_Result EDMA3_RM_getBaseAddress (EDMA3_RM_Handle hEdmaResMgr,
                  * Since the TCs enum start from 1, and TCs start from 0,
                  * subtract 1 from the enum to get the actual address.
                  */
-                *phyAddress = (uint32_t)(rmObj->gblCfgParams.tcRegs[controllerId-1u]);
+                *phyAddress = (uint32_t)(rmObj->gblCfgParams.tcRegs[controllerId-1U]);
                 }
             }
         }
@@ -4972,7 +4988,7 @@ EDMA3_RM_Result EDMA3_RM_getInstanceInitCfg (
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_Instance *rmInstance = NULL;
     EDMA3_RM_Obj *rmObj = NULL;
-    uint32_t resMgrIdx = 0u;
+    uint32_t resMgrIdx = 0U;
     uint32_t hwId;
 
 #ifdef EDMA3_INSTRUMENTATION_ENABLED
@@ -5015,7 +5031,7 @@ EDMA3_RM_Result EDMA3_RM_getInstanceInitCfg (
         {
         hwId = rmObj->phyCtrllerInstId;
 
-        for (resMgrIdx = 0u; resMgrIdx < EDMA3_MAX_RM_INSTANCES; resMgrIdx++)
+        for (resMgrIdx = 0U; resMgrIdx < EDMA3_MAX_RM_INSTANCES; resMgrIdx++)
             {
                 if (rmInstance == ((EDMA3_RM_Instance *)(ptrRMIArray) +
                                             (hwId*EDMA3_MAX_RM_INSTANCES) +
@@ -5058,8 +5074,8 @@ EDMA3_RM_Result EDMA3_RM_Ioctl(
     {
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     EDMA3_RM_Instance *rmInstance = NULL;
-    uint32_t paramInitRequired = 0xFFu;
-    uint32_t regModificationRequired = 0xFFu;
+    uint32_t paramInitRequired = 0xFFU;
+    uint32_t regModificationRequired = 0xFFU;
     uint32_t *ret_val = NULL;
 
 #ifdef EDMA3_INSTRUMENTATION_ENABLED
@@ -5094,9 +5110,6 @@ EDMA3_RM_Result EDMA3_RM_Ioctl(
             }
         }
 
-    /* To remove CCS warnings */
-    (void)param;
-
     if (result == EDMA3_RM_SOK)
         {
         switch (cmd)
@@ -5107,8 +5120,8 @@ EDMA3_RM_Result EDMA3_RM_Ioctl(
 
                                /* If parameter checking is enabled... */
 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
-                if ((paramInitRequired != 0u)
-                    && (paramInitRequired != 1u))
+                if ((paramInitRequired != 0U)
+                    && (paramInitRequired != 1U))
                     {
                        result = EDMA3_RM_E_INVALID_PARAM;
                     }
@@ -5152,8 +5165,8 @@ EDMA3_RM_Result EDMA3_RM_Ioctl(
 
                                /* If parameter checking is enabled... */
 #ifndef EDMA3_RM_PARAM_CHECK_DISABLE
-                if ((regModificationRequired != 0u)
-                    && (regModificationRequired != 1u))
+                if ((regModificationRequired != 0U)
+                    && (regModificationRequired != 1U))
                     {
                     /* All other values are invalid. */
                     result = EDMA3_RM_E_INVALID_PARAM;
@@ -5199,8 +5212,11 @@ EDMA3_RM_Result EDMA3_RM_Ioctl(
                 }
 
             default:
-                /* Hey dude! you passed invalid IOCTL cmd */
-                result = EDMA3_RM_E_INVALID_PARAM;
+                {
+                    /* Hey dude! you passed invalid IOCTL cmd */
+                    result = EDMA3_RM_E_INVALID_PARAM;
+                    break;
+                }
 
             }
         }
@@ -5261,16 +5277,19 @@ static void edma3ComplHandler (const EDMA3_RM_Obj *rmObj)
                                     (&ptrEdmaccRegs->SHADOW[edma3RegionId]);
         }
 
-    Cnt = 0u;
-    pendingIrqs = 0u;
-    indexl = 1u;
-    indexh = 1u;
+    Cnt = 0U;
+    pendingIrqs = 0U;
+    indexl = 1U;
+    indexh = 1U;
 
     if (numTCCs > 32)
+    {
        isIPR = shadowRegs->IPR | shadowRegs->IPRH;
+    }
        else
-               isIPR = shadowRegs->IPR;
-
+    {
+       isIPR = shadowRegs->IPR;
+    }
     if(isIPR)
         {
         /**
@@ -5289,21 +5308,21 @@ static void edma3ComplHandler (const EDMA3_RM_Obj *rmObj)
         /* Loop for EDMA3_RM_COMPL_HANDLER_RETRY_COUNT number of time,
                   breaks when no pending interrupt is found */
         while ((Cnt < EDMA3_RM_COMPL_HANDLER_RETRY_COUNT)
-                    && ((indexl != 0u) || (indexh != 0u)))
+                    && ((indexl != 0U) || (indexh != 0U)))
             {
-            indexl = 0u;
+            indexl = 0U;
             pendingIrqs = shadowRegs->IPR;
 
             /**
              * Choose interrupts coming from our allocated TCCs
              * and MASK remaining ones.
              */
-            pendingIrqs = (pendingIrqs & allocatedTCCs[edma3Id][0u]);
+            pendingIrqs = (pendingIrqs & allocatedTCCs[edma3Id][0U]);
 
             while (pendingIrqs)
                 {
                 /*Process all the pending interrupts*/
-                if((pendingIrqs & 1u) == TRUE)
+                if((pendingIrqs & 1U) == TRUE)
                     {
                     /**
                      * If the user has not given any callback function
@@ -5313,7 +5332,7 @@ static void edma3ComplHandler (const EDMA3_RM_Obj *rmObj)
                     if(edma3IntrParams[edma3Id][indexl].tccCb != NULL)
                         {
                          /* here write to ICR to clear the corresponding IPR bits*/
-                        shadowRegs->ICR = (1u << indexl);
+                        shadowRegs->ICR = (1U << indexl);
 
                         edma3IntrParams[edma3Id][indexl].tccCb (indexl,
                                     EDMA3_RM_XFER_COMPLETE,
@@ -5321,60 +5340,62 @@ static void edma3ComplHandler (const EDMA3_RM_Obj *rmObj)
                         }
                     }
                 ++indexl;
-                pendingIrqs >>= 1u;
+                pendingIrqs >>= 1U;
                 }
 
             if(numTCCs > 32)
                {
-                   indexh = 0u;
+                   indexh = 0U;
                    pendingIrqs = shadowRegs->IPRH;
        
                    /**
                     * Choose interrupts coming from our allocated TCCs
                     * and MASK remaining ones.
                     */
-                   pendingIrqs = (pendingIrqs & allocatedTCCs[edma3Id][1u]);
+                   pendingIrqs = (pendingIrqs & allocatedTCCs[edma3Id][1U]);
        
                    while (pendingIrqs)
                        {
                        /*Process all the pending interrupts*/
-                       if((pendingIrqs & 1u)==TRUE)
+                       if((pendingIrqs & 1U)==TRUE)
                            {
                            /**
                             * If the user has not given any callback function
                             * while requesting the TCC, its TCC specific bit
                             * in the IPRH register will NOT be cleared.
                             */
-                           if(edma3IntrParams[edma3Id][32u+indexh].tccCb!=NULL)
+                           if(edma3IntrParams[edma3Id][32U+indexh].tccCb!=NULL)
                                {
                                 /* here write to ICR to clear the corresponding IPR bits*/
-                               shadowRegs->ICRH = (1u << indexh);
-       
-                               edma3IntrParams[edma3Id][32u+indexh].tccCb(32u+indexh,
+                               shadowRegs->ICRH = (1U << indexh);
+
+                            edma3IntrParams[edma3Id][32U+indexh].tccCb(32U+indexh,
                                            EDMA3_RM_XFER_COMPLETE,
-                                           edma3IntrParams[edma3Id][32u+indexh].cbData);
+                                           edma3IntrParams[edma3Id][32U+indexh].cbData);
                                }
                            }
                        ++indexh;
-                       pendingIrqs >>= 1u;
+                       pendingIrqs >>= 1U;
                        }
                }
 
             Cnt++;
             }
 
-        indexl = (shadowRegs->IPR & allocatedTCCs[edma3Id][0u]);
+        indexl = (shadowRegs->IPR & allocatedTCCs[edma3Id][0U]);
         if (numTCCs > 32)
-            indexh = (shadowRegs->IPRH & allocatedTCCs[edma3Id][1u]);
+        {
+            indexh = (shadowRegs->IPRH & allocatedTCCs[edma3Id][1U]);
+        }
 
         if((indexl !=0 ) || (indexh !=0 ))
             {
-            shadowRegs->IEVAL=0x1u;
+            shadowRegs->IEVAL=0x1U;
             }
 
         edma3OsProtectExit (rmObj->phyCtrllerInstId,
                                                        EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION,
-                                                       NULL);
+                                                       0);
         }
 
 #ifdef EDMA3_INSTRUMENTATION_ENABLED
@@ -5405,8 +5426,8 @@ void lisrEdma3ComplHandler0(uint32_t edma3InstanceId)
  */
 static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
     {
-    uint32_t Cnt = 0u;
-    uint32_t resMgrInstIdx = 0u;
+    uint32_t Cnt = 0U;
+    uint32_t resMgrInstIdx = 0U;
     volatile EDMA3_CCRL_Regs *ptrEdmaccRegs = NULL;
     volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
     volatile uint32_t pendingIrqs = 0;
@@ -5448,7 +5469,7 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
             {
             pendingIrqs = pendingIrqs || (ptrEdmaccRegs->EMRH != 0 );
             }
-        index = 1u;
+        index = 1U;
 
         if(pendingIrqs)
             {
@@ -5459,17 +5480,17 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
             /* Loop for EDMA3_RM_CCERR_HANDLER_RETRY_COUNT number of time,
                           breaks when no pending interrupt is found */
             while ((Cnt < EDMA3_RM_CCERR_HANDLER_RETRY_COUNT)
-                        && (index != 0u))
+                        && (index != 0U))
                 {
-                index = 0u;
+                index = 0U;
                 pendingIrqs = ptrEdmaccRegs->EMR;
 
                 while (pendingIrqs)
                     {
                     /*Process all the pending interrupts*/
-                    if((pendingIrqs & 1u)==TRUE)
+                    if((pendingIrqs & 1U)==TRUE)
                         {
-                        uint32_t mappedTcc = 0u;
+                        uint32_t mappedTcc = 0U;
 
                         /**
                          * Using the 'index' value (basically the DMA
@@ -5488,9 +5509,9 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
                              * TCC owned and allocated by RM.
                              * Write to EMCR to clear the corresponding EMR bits.
                              */
-                            ptrEdmaccRegs->EMCR = (1u<<index);
+                            ptrEdmaccRegs->EMCR = (1U<<index);
                             /*Clear any SER*/
-                            shadowRegs->SECR = (1u<<index);
+                            shadowRegs->SECR = (1U<<index);
 
                             /* Call the callback function if registered earlier. */
                             if((edma3IntrParams[edma3Id][mappedTcc].tccCb) != NULL)
@@ -5512,33 +5533,33 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
                              */
 #if (EDMA3_RM_RES_CLEAR_ERROR_STATUS_FOR_ALL_CHANNELS == TRUE)
                                 /* here write to EMCR to clear the corresponding EMR bits. */
-                                ptrEdmaccRegs->EMCR = (1u<<index);
+                                ptrEdmaccRegs->EMCR = (1U<<index);
                                 /*Clear any SER*/
-                                ptrEdmaccRegs->SECR = (1u<<index);
+                                ptrEdmaccRegs->SECR = (1U<<index);
 #endif
                             }
                         }
                     ++index;
-                    pendingIrqs >>= 1u;
+                    pendingIrqs >>= 1U;
                     }
 
                 if(numTCCs > 32)
                 {
-                index = 0u;
+                index = 0U;
                 pendingIrqs = ptrEdmaccRegs->EMRH;
                 while (pendingIrqs)
                     {
                     /*Process all the pending interrupts*/
-                    if((pendingIrqs & 1u)==TRUE)
+                    if((pendingIrqs & 1U)==TRUE)
                         {
-                        uint32_t mappedTcc = 0u;
+                        uint32_t mappedTcc = 0U;
 
                         /**
                          * Using the 'index' value (basically the DMA
                          * channel), fetch the corresponding TCC
                          * value, mapped to this DMA channel.
                          */
-                        mappedTcc = edma3DmaChTccMapping[edma3Id][32u+index];
+                        mappedTcc = edma3DmaChTccMapping[edma3Id][32U+index];
 
                         /**
                          * Ensure that the mapped tcc is valid and the call
@@ -5550,9 +5571,9 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
                              * TCC owned and allocated by RM.
                              * Write to EMCR to clear the corresponding EMR bits.
                              */
-                            ptrEdmaccRegs->EMCRH = (1u<<index);
+                            ptrEdmaccRegs->EMCRH = (1U<<index);
                             /*Clear any SERH*/
-                            shadowRegs->SECRH = (1u<<index);
+                            shadowRegs->SECRH = (1U<<index);
 
                             /* Call the callback function if registered earlier. */
                             if((edma3IntrParams[edma3Id][mappedTcc].tccCb) != NULL)
@@ -5577,25 +5598,25 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
                                  * TCC NOT owned by RM.
                                  * Write to EMCRH to clear the corresponding EMRH bits.
                                  */
-                                ptrEdmaccRegs->EMCRH = (1u<<index);
+                                ptrEdmaccRegs->EMCRH = (1U<<index);
                                 /*Clear any SERH*/
-                                shadowRegs->SECRH = (1u<<index);
+                                shadowRegs->SECRH = (1U<<index);
 #endif
                             }
                         }
                     ++index;
-                    pendingIrqs >>= 1u;
+                    pendingIrqs >>= 1U;
                     }
                 }
 
-                index = 0u;
+                index = 0U;
                 pendingIrqs = ptrEdmaccRegs->QEMR;
                 while (pendingIrqs)
                     {
                     /*Process all the pending interrupts*/
-                    if((pendingIrqs & 1u)==TRUE)
+                    if((pendingIrqs & 1U)==TRUE)
                         {
-                        uint32_t mappedTcc = 0u;
+                        uint32_t mappedTcc = 0U;
 
                         /**
                          * Using the 'index' value (basically the QDMA
@@ -5607,9 +5628,9 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
                         if (mappedTcc < EDMA3_MAX_TCC)
                            {
                             /* here write to QEMCR to clear the corresponding QEMR bits*/
-                            ptrEdmaccRegs->QEMCR = (1u<<index);
+                            ptrEdmaccRegs->QEMCR = (1U<<index);
                             /*Clear any QSER*/
-                            shadowRegs->QSECR = (1u<<index);
+                            shadowRegs->QSECR = (1U<<index);
 
                             if((edma3IntrParams[edma3Id][mappedTcc].tccCb) != NULL)
                                 {
@@ -5630,35 +5651,35 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
                              */
 #if (EDMA3_RM_RES_CLEAR_ERROR_STATUS_FOR_ALL_CHANNELS == TRUE)
                                 /* here write to QEMCR to clear the corresponding QEMR bits*/
-                                ptrEdmaccRegs->QEMCR = (1u<<index);
+                                ptrEdmaccRegs->QEMCR = (1U<<index);
 
                                 /*Clear any QSER*/
-                                ptrEdmaccRegs->QSECR = (1u<<index);
+                                ptrEdmaccRegs->QSECR = (1U<<index);
 #endif
                             }
                         }
                     ++index;
-                    pendingIrqs >>= 1u;
+                    pendingIrqs >>= 1U;
                     }
 
-                index = 0u;
+                index = 0U;
                 pendingIrqs = ptrEdmaccRegs->CCERR;
-                if (pendingIrqs!=NULL)
+                if (pendingIrqs!=0)
                     {
                     /* Process all the pending CC error interrupts. */
 
                     /* Queue threshold error for different event queues.*/
-                    for (evtqueNum = 0u; evtqueNum < rmObj->gblCfgParams.numEvtQueue; evtqueNum++)
+                    for (evtqueNum = 0U; evtqueNum < rmObj->gblCfgParams.numEvtQueue; evtqueNum++)
                         {
-                        if((pendingIrqs & (1u << evtqueNum)) != NULL)
+                        if((pendingIrqs & ((uint32_t)1U << evtqueNum)) != 0)
                             {
                             /**
                              * Queue threshold error for queue 'evtqueNum' raised.
                              * Inform all the RM instances working on this region
                              * about the error by calling their global callback functions.
                              */
-                            num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
-                            for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
+                            resMgrInstIdx = 0U;
+                            for (num_rm_instances_opened = resMgrObj[edma3Id].numOpens; num_rm_instances_opened != 0; num_rm_instances_opened--)
                                 {
                                 /* Check whether the RM instance opened working on this region */
                                 rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
@@ -5677,26 +5698,27 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
                                         }
                                     }
 
+                                ++resMgrInstIdx;
                                 /* Check next opened instance */
-                                num_rm_instances_opened--;
                                 }
 
                             /* Clear the error interrupt. */
-                            ptrEdmaccRegs->CCERRCLR = (1u << evtqueNum);
+                            ptrEdmaccRegs->CCERRCLR = (1U << evtqueNum);
                             }
                         }
 
 
                     /* Transfer completion code error. */
-                    if ((pendingIrqs & (1 << EDMA3_CCRL_CCERR_TCCERR_SHIFT))!=NULL)
+                    if ((pendingIrqs & ((uint32_t)1 << EDMA3_CCRL_CCERR_TCCERR_SHIFT))!=0)
                         {
                         /**
                          * Transfer completion code error raised.
                          * Inform all the RM instances working on this region
                          * about the error by calling their global callback functions.
                          */
-                        num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
-                        for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
+                        
+                        resMgrInstIdx = 0U;
+                        for (num_rm_instances_opened = resMgrObj[edma3Id].numOpens; num_rm_instances_opened != 0;  num_rm_instances_opened--)
                             {
                             /* Check whether the RM instance opened working on this region */
                             rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
@@ -5709,17 +5731,17 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
                                         {
                                         rm_instance->initParam.gblerrCbParams.gblerrCb(
                                                 EDMA3_RM_E_CC_TCC,
-                                                NULL,
+                                                0,
                                                 rm_instance->initParam.gblerrCbParams.gblerrData);
                                         }
                                     }
                                 }
 
+                            ++resMgrInstIdx;
                             /* Check next opened instance */
-                            num_rm_instances_opened--;
                             }
 
-                        ptrEdmaccRegs->CCERRCLR = (1<<EDMA3_CCRL_CCERR_TCCERR_SHIFT);
+                        ptrEdmaccRegs->CCERRCLR = ((uint32_t)1<<EDMA3_CCRL_CCERR_TCCERR_SHIFT);
                         }
 
                     ++index;
@@ -5744,25 +5766,27 @@ static void edma3CCErrHandler(const EDMA3_RM_Obj *rmObj)
                 /* Check all the error bits. */
                 ownedDmaError = ptrEdmaccRegs->EMR;
                 if (numTCCs > 32)
+                {
                     ownedDmaHError = ptrEdmaccRegs->EMRH;
+                }
                 ownedQdmaError = ptrEdmaccRegs->QEMR;
 #else
                 /* Check ONLY owned error bits. */
-                ownedDmaError = (ptrEdmaccRegs->EMR & rmInstance->initParam.rmInstInitConfig->ownDmaChannels[0u]);
+                ownedDmaError = (ptrEdmaccRegs->EMR & rmInstance->initParam.rmInstInitConfig->ownDmaChannels[0U]);
                 if (numTCCs > 32)
-                    ownedDmaHError = (ptrEdmaccRegs->EMRH & rmInstance->initParam.rmInstInitConfig->ownDmaChannels[1u]);
-                ownedQdmaError = (ptrEdmaccRegs->QEMR & rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0u]);
+                    ownedDmaHError = (ptrEdmaccRegs->EMRH & rmInstance->initParam.rmInstInitConfig->ownDmaChannels[1U]);
+                ownedQdmaError = (ptrEdmaccRegs->QEMR & rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0U]);
 #endif
 
             if (((ownedDmaError != 0 ) || (ownedDmaHError != 0 ))
                         || ((ownedQdmaError != 0) || (ptrEdmaccRegs->CCERR != 0)))
                 {
-                ptrEdmaccRegs->EEVAL=0x1u;
+                ptrEdmaccRegs->EEVAL=0x1U;
                 }
 
             edma3OsProtectExit (rmObj->phyCtrllerInstId,
                                                                EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR,
-                                                               NULL);
+                                                               0);
             }
         }
 
@@ -5795,8 +5819,8 @@ void lisrEdma3CCErrHandler0(uint32_t edma3InstanceId)
 static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, uint32_t tcNum)
     {
     volatile EDMA3_TCRL_Regs *tcRegs = NULL;
-    uint32_t tcMemErrRdWr = 0u;
-    uint32_t resMgrInstIdx = 0u;
+    uint32_t tcMemErrRdWr = 0U;
+    uint32_t resMgrInstIdx = 0U;
     EDMA3_RM_Instance *rm_instance = NULL;
     uint32_t edma3Id;
     uint32_t num_rm_instances_opened;
@@ -5825,7 +5849,7 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, uint32_t tcNum)
                                                                EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR,
                                                                &tcNum);
 
-            if((tcRegs->ERRSTAT & (1 << EDMA3_TCRL_ERRSTAT_BUSERR_SHIFT))!=NULL)
+            if((tcRegs->ERRSTAT & ((uint32_t)1 << EDMA3_TCRL_ERRSTAT_BUSERR_SHIFT))!= 0)
                 {
                 /* Bus error event. */
                 /**
@@ -5834,14 +5858,14 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, uint32_t tcNum)
                  * details register (ERRDET).
                  */
                 tcMemErrRdWr = tcRegs->ERRDET & (EDMA3_TCRL_ERRDET_STAT_MASK);
-                if ((tcMemErrRdWr > 0u) && (tcMemErrRdWr < 8u))
+                if ((tcMemErrRdWr > 0U) && (tcMemErrRdWr < 8U))
                     {
                     /**
                      * Inform all the RM instances working on this region
                      * about the error by calling their global callback functions.
                      */
-                    num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
-                    for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
+                    resMgrInstIdx = 0U;
+                    for (num_rm_instances_opened = resMgrObj[edma3Id].numOpens; num_rm_instances_opened != 0; num_rm_instances_opened--)
                         {
                         /* Check whether the RM instance opened working on this region */
                         rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
@@ -5860,20 +5884,20 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, uint32_t tcNum)
                                 }
                             }
 
+                            ++resMgrInstIdx;
                             /* Check next opened instance */
-                            num_rm_instances_opened--;
                         }
                     }
                 else
                     {
-                    if ((tcMemErrRdWr >= 8u) && (tcMemErrRdWr <= 0xFu))
+                    if ((tcMemErrRdWr >= 8U) && (tcMemErrRdWr <= 0xFU))
                         {
                         /**
                          * Inform all the RM instances working on this region
                          * about the error by calling their global callback functions.
                          */
-                        num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
-                        for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
+                        resMgrInstIdx = 0U;
+                        for (num_rm_instances_opened = resMgrObj[edma3Id].numOpens; num_rm_instances_opened != 0; num_rm_instances_opened--)
                             {
                             /* Check whether the RM instance opened working on this region */
                             rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
@@ -5892,20 +5916,20 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, uint32_t tcNum)
                                     }
                                 }
 
+                                ++resMgrInstIdx;
                                 /* Check next opened instance */
-                                num_rm_instances_opened--;
                             }
                         }
                     }
-                tcRegs->ERRCLR = (1<<EDMA3_TCRL_ERRSTAT_BUSERR_SHIFT);
+                tcRegs->ERRCLR = ((uint32_t)1<<EDMA3_TCRL_ERRSTAT_BUSERR_SHIFT);
                 }
             else
                 {
                 /* Transfer request (TR) error event. */
-                if((tcRegs->ERRSTAT & (1 << EDMA3_TCRL_ERRSTAT_TRERR_SHIFT))!=NULL)
+                if((tcRegs->ERRSTAT & ((uint32_t)1 << EDMA3_TCRL_ERRSTAT_TRERR_SHIFT))!= 0)
                     {
-                    num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
-                    for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
+                    resMgrInstIdx = 0U;
+                    for (num_rm_instances_opened = resMgrObj[edma3Id].numOpens; num_rm_instances_opened != 0; num_rm_instances_opened--)
                         {
                         /* Check whether the RM instance opened working on this region */
                         rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
@@ -5924,18 +5948,18 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, uint32_t tcNum)
                                 }
                             }
 
+                            ++resMgrInstIdx;
                             /* Check next opened instance */
-                            num_rm_instances_opened--;
                         }
 
-                    tcRegs->ERRCLR = (1<<EDMA3_TCRL_ERRSTAT_TRERR_SHIFT);
+                    tcRegs->ERRCLR = ((uint32_t)1<<EDMA3_TCRL_ERRSTAT_TRERR_SHIFT);
                     }
                 else
                     {
-                    if((tcRegs->ERRSTAT & (1 << EDMA3_TCRL_ERRSTAT_MMRAERR_SHIFT))!=NULL)
+                    if((tcRegs->ERRSTAT & ((uint32_t)1 << EDMA3_TCRL_ERRSTAT_MMRAERR_SHIFT))!= 0)
                         {
-                        num_rm_instances_opened = resMgrObj[edma3Id].numOpens;
-                        for (resMgrInstIdx = 0u; num_rm_instances_opened; ++resMgrInstIdx)
+                        resMgrInstIdx = 0U;
+                        for (num_rm_instances_opened = resMgrObj[edma3Id].numOpens; num_rm_instances_opened != 0; num_rm_instances_opened--)
                             {
                             /* Check whether the RM instance opened working on this region */
                             rm_instance = ((EDMA3_RM_Instance *)(ptrRMIArray) + (edma3Id*EDMA3_MAX_RM_INSTANCES) + resMgrInstIdx);
@@ -5954,11 +5978,11 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, uint32_t tcNum)
                                     }
                                 }
 
+                                ++resMgrInstIdx;
                                 /* Check next opened instance */
-                                num_rm_instances_opened--;
                             }
 
-                        tcRegs->ERRCLR = (1<<EDMA3_TCRL_ERRSTAT_MMRAERR_SHIFT);
+                        tcRegs->ERRCLR = ((uint32_t)1<<EDMA3_TCRL_ERRSTAT_MMRAERR_SHIFT);
                         }
                     }
                 }
@@ -5987,7 +6011,7 @@ static void edma3TCErrHandler (const EDMA3_RM_Obj *rmObj, uint32_t tcNum)
 void lisrEdma3TC0ErrHandler0(uint32_t edma3InstanceId)
     {
     /* Invoke Error Handler ISR for TC0*/
-    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 0u);
+    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 0U);
     }
 
 
@@ -5998,7 +6022,7 @@ void lisrEdma3TC0ErrHandler0(uint32_t edma3InstanceId)
 void lisrEdma3TC1ErrHandler0(uint32_t edma3InstanceId)
     {
     /* Invoke Error Handler ISR for TC1*/
-    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 1u);
+    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 1U);
     }
 
 /*
@@ -6008,7 +6032,7 @@ void lisrEdma3TC1ErrHandler0(uint32_t edma3InstanceId)
 void lisrEdma3TC2ErrHandler0(uint32_t edma3InstanceId)
     {
     /* Invoke Error Handler ISR for TC2*/
-    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 2u);
+    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 2U);
     }
 
 /*
@@ -6018,7 +6042,7 @@ void lisrEdma3TC2ErrHandler0(uint32_t edma3InstanceId)
 void lisrEdma3TC3ErrHandler0(uint32_t edma3InstanceId)
     {
     /* Invoke Error Handler ISR for TC3*/
-    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 3u);
+    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 3U);
     }
 
 /*
@@ -6028,7 +6052,7 @@ void lisrEdma3TC3ErrHandler0(uint32_t edma3InstanceId)
 void lisrEdma3TC4ErrHandler0(uint32_t edma3InstanceId)
     {
     /* Invoke Error Handler ISR for TC4*/
-    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 4u);
+    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 4U);
     }
 
 
@@ -6039,7 +6063,7 @@ void lisrEdma3TC4ErrHandler0(uint32_t edma3InstanceId)
 void lisrEdma3TC5ErrHandler0(uint32_t edma3InstanceId)
     {
     /* Invoke Error Handler ISR for TC5*/
-    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 5u);
+    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 5U);
     }
 
 /*
@@ -6050,7 +6074,7 @@ void lisrEdma3TC5ErrHandler0(uint32_t edma3InstanceId)
 void lisrEdma3TC6ErrHandler0(uint32_t edma3InstanceId)
     {
     /* Invoke Error Handler ISR for TC6*/
-    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 6u);
+    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 6U);
     }
 
 /*
@@ -6060,7 +6084,7 @@ void lisrEdma3TC6ErrHandler0(uint32_t edma3InstanceId)
 void lisrEdma3TC7ErrHandler0(uint32_t edma3InstanceId)
     {
     /* Invoke Error Handler ISR for TC7*/
-    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 7u);
+    edma3TCErrHandler(&resMgrObj[edma3InstanceId], 7U);
     }
 
 
@@ -6070,7 +6094,7 @@ void lisrEdma3TC7ErrHandler0(uint32_t edma3InstanceId)
 /** Initialization of the Global region registers of the EDMA3 Controller */
 static void edma3GlobalRegionInit (uint32_t phyCtrllerInstId, uint32_t numDmaChannels)
     {
-    uint32_t evtQNum = 0u;
+    uint32_t evtQNum = 0U;
     volatile EDMA3_CCRL_Regs *ptrEdmaccRegs = NULL;
 
     assert (phyCtrllerInstId < EDMA3_MAX_EDMA3_INSTANCES);
@@ -6110,7 +6134,7 @@ static void edma3GlobalRegionInit (uint32_t phyCtrllerInstId, uint32_t numDmaCha
             }
 
         /* Clear CCERR register */
-        ptrEdmaccRegs ->CCERRCLR = 0xFFFFu;
+        ptrEdmaccRegs ->CCERRCLR = 0xFFFFU;
         }
 
     return;
@@ -6143,44 +6167,44 @@ static void edma3ShadowRegionInit (const EDMA3_RM_Instance *pRMInstance)
             ptrEdmaShadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)
                                     (&ptrEdmaccRegs->SHADOW[regionId]);
 
-            ptrEdmaShadowRegs->ECR      = (rmInstInitConfig->ownDmaChannels[0u]
-                                            | rmInstInitConfig->ownTccs[0u]);
-            ptrEdmaShadowRegs->ECRH     = (rmInstInitConfig->ownDmaChannels[1u]
-                                            | rmInstInitConfig->ownTccs[1u]);
-            ptrEdmaShadowRegs->EECR     = (rmInstInitConfig->ownDmaChannels[0u]
-                                            | rmInstInitConfig->ownTccs[0u]);
-            ptrEdmaShadowRegs->SECR     = (rmInstInitConfig->ownDmaChannels[0u]
-                                            | rmInstInitConfig->ownTccs[0u]);
-            ptrEdmaShadowRegs->SECRH    = (rmInstInitConfig->ownDmaChannels[1u]
-                                            | rmInstInitConfig->ownTccs[1u]);
-            ptrEdmaShadowRegs->EECR     = (rmInstInitConfig->ownDmaChannels[0u]
-                                            | rmInstInitConfig->ownTccs[0u]);
-            ptrEdmaShadowRegs->EECRH    = (rmInstInitConfig->ownDmaChannels[1u]
-                                            | rmInstInitConfig->ownTccs[1u]);
-
-            ptrEdmaShadowRegs->QEECR    = rmInstInitConfig->ownQdmaChannels[0u];
-
-            ptrEdmaShadowRegs->IECR     = (rmInstInitConfig->ownDmaChannels[0u]
-                                            | rmInstInitConfig->ownTccs[0u]);
-            ptrEdmaShadowRegs->IECRH    = (rmInstInitConfig->ownDmaChannels[1u]
-                                            | rmInstInitConfig->ownTccs[1u]);
-            ptrEdmaShadowRegs->ICR      = (rmInstInitConfig->ownDmaChannels[0u]
-                                            | rmInstInitConfig->ownTccs[0u]);
-            ptrEdmaShadowRegs->ICRH     = (rmInstInitConfig->ownDmaChannels[1u]
-                                            | rmInstInitConfig->ownTccs[1u]);
-
-            ptrEdmaShadowRegs->QSECR    = rmInstInitConfig->ownQdmaChannels[0u];
+            ptrEdmaShadowRegs->ECR      = (rmInstInitConfig->ownDmaChannels[0U]
+                                            | rmInstInitConfig->ownTccs[0U]);
+            ptrEdmaShadowRegs->ECRH     = (rmInstInitConfig->ownDmaChannels[1U]
+                                            | rmInstInitConfig->ownTccs[1U]);
+            ptrEdmaShadowRegs->EECR     = (rmInstInitConfig->ownDmaChannels[0U]
+                                            | rmInstInitConfig->ownTccs[0U]);
+            ptrEdmaShadowRegs->SECR     = (rmInstInitConfig->ownDmaChannels[0U]
+                                            | rmInstInitConfig->ownTccs[0U]);
+            ptrEdmaShadowRegs->SECRH    = (rmInstInitConfig->ownDmaChannels[1U]
+                                            | rmInstInitConfig->ownTccs[1U]);
+            ptrEdmaShadowRegs->EECR     = (rmInstInitConfig->ownDmaChannels[0U]
+                                            | rmInstInitConfig->ownTccs[0U]);
+            ptrEdmaShadowRegs->EECRH    = (rmInstInitConfig->ownDmaChannels[1U]
+                                            | rmInstInitConfig->ownTccs[1U]);
+
+            ptrEdmaShadowRegs->QEECR    = rmInstInitConfig->ownQdmaChannels[0U];
+
+            ptrEdmaShadowRegs->IECR     = (rmInstInitConfig->ownDmaChannels[0U]
+                                            | rmInstInitConfig->ownTccs[0U]);
+            ptrEdmaShadowRegs->IECRH    = (rmInstInitConfig->ownDmaChannels[1U]
+                                            | rmInstInitConfig->ownTccs[1U]);
+            ptrEdmaShadowRegs->ICR      = (rmInstInitConfig->ownDmaChannels[0U]
+                                            | rmInstInitConfig->ownTccs[0U]);
+            ptrEdmaShadowRegs->ICRH     = (rmInstInitConfig->ownDmaChannels[1U]
+                                            | rmInstInitConfig->ownTccs[1U]);
+
+            ptrEdmaShadowRegs->QSECR    = rmInstInitConfig->ownQdmaChannels[0U];
 
             /*
             * Set all EDMA3 Resource<->Region mapping parameters
             */
 
             /* 1. Dma Channel (and TCC) <-> Region */
-            ptrEdmaccRegs->DRA[regionId].DRAE = 0u;
-            ptrEdmaccRegs->DRA[regionId].DRAEH = 0u;
+            ptrEdmaccRegs->DRA[regionId].DRAE = 0U;
+            ptrEdmaccRegs->DRA[regionId].DRAEH = 0U;
 
             /* 2. Qdma Channel <-> Region */
-            ptrEdmaccRegs->QRAE[regionId] = 0u;
+            ptrEdmaccRegs->QRAE[regionId] = 0U;
             }
         }
 
@@ -6192,14 +6216,14 @@ static void edma3ShadowRegionInit (const EDMA3_RM_Instance *pRMInstance)
 /** Local MemZero function */
 void edma3MemZero(void *dst, uint32_t len)
     {
-    uint32_t i = 0u;
+    uint32_t i = 0U;
     uint32_t *ds = NULL;
 
     assert (dst != NULL);
 
     ds = (uint32_t *)dst;
 
-    for (i = 0 ; i < len/4 ; i++)
+    for (i = 0 ; i < (len/4) ; i++)
         {
         *ds = 0x0;
         ds++;
@@ -6212,16 +6236,16 @@ void edma3MemZero(void *dst, uint32_t len)
 /* Local MemCopy function */
 void edma3MemCpy(void *dst, const void *src, uint32_t len)
     {
-    uint32_t i=0u;
+    uint32_t i=0U;
     const uint32_t *sr;
     uint32_t *ds;
 
-    assert ((src != NULL) && (dst != NULL) && ((len)%4 == 0));
+    assert ((src != NULL) && (dst != NULL) && ((len%4) == 0));
 
     sr = (const uint32_t *)src;
     ds = (uint32_t *)dst;
 
-    for (i = 0 ; i < len/4 ; i++)
+    for (i = 0 ; i < (len/4) ; i++)
         {
         *ds = *sr;
         ds++;
@@ -6233,16 +6257,16 @@ void edma3MemCpy(void *dst, const void *src, uint32_t len)
 
 
 /* Local MemCopy function to copy Param Set ONLY */
-void edma3ParamCpy(void *dst, const void *src)
+void edma3ParamCpy(volatile void *dst, const volatile void *src)
     {
-    uint32_t i = 0u;
-    const uint32_t *sr;
-    uint32_t *ds;
+    uint32_t i = 0U;
+    const volatile uint32_t *sr;
+    volatile uint32_t *ds;
 
     assert ((src != NULL) && (dst != NULL));
 
-    sr = (const uint32_t *)src;
-    ds = (uint32_t *)dst;
+    sr = (const volatile uint32_t *)src;
+    ds = (volatile uint32_t *)dst;
 
     for (i = 0; i < 8; i++)
         {
@@ -6264,16 +6288,18 @@ static int32_t findBitInWord (int32_t source, uint32_t start, uint16_t bit)
     uint32_t position = start;
     uint16_t found = 0;
     uint32_t iterations_left = 0;
+    uint32_t sourceTmp=0;
 
     switch (bit)
         {
-        case 1:
+        case 1U:
             {
-            source >>= (start%32u);
+            sourceTmp = (uint32_t)source >> (start%32U);
+            source = (int32_t)sourceTmp;
 
-            while ((found==0u) && (source!=0))
+            while ((found==0U) && (source!=0))
                 {
-                if ((source & 0x1) == 0x1)
+                if (((uint32_t)source & 0x1U) == 0x1U)
                     {
                     /* 1 */
                     found++;
@@ -6281,7 +6307,8 @@ static int32_t findBitInWord (int32_t source, uint32_t start, uint16_t bit)
                 else
                     {
                     /* 0 */
-                    source >>= 1;
+                    sourceTmp = (uint32_t)source >> 1;
+                    source = (int32_t)sourceTmp;
                     position++;
                     }
                 }
@@ -6291,15 +6318,17 @@ static int32_t findBitInWord (int32_t source, uint32_t start, uint16_t bit)
 
         case 0:
             {
-            source >>= (start%32u);
-            iterations_left = 32u - (start%32u);
+            sourceTmp = (uint32_t)source >> (start%32U);
+            source = (int32_t)sourceTmp;
+            iterations_left = (uint32_t)32U - (start%32U);
 
-            while ((found==0u) && (iterations_left>0u))
+            while ((found==0U) && (iterations_left>0U))
                 {
-                if ((source & 0x1) == 0x1)
+                if (((uint32_t)source & 0x1U) == 0x1U)
                     {
                     /* 1 */
-                    source >>= 1;
+                    sourceTmp = (uint32_t)source >> 1;
+                    source = (int32_t)sourceTmp;
                     position++;
                     iterations_left--;
                     }
@@ -6330,8 +6359,8 @@ static int32_t findBit (EDMA3_RM_ResType resType,
                             uint16_t bit)
     {
     int32_t position = -1;
-    uint32_t start_index = start / 32u;
-    uint32_t end_index = end / 32u;
+    uint32_t start_index = start / 32U;
+    uint32_t end_index = end / 32U;
     int32_t i;
     uint32_t *resPtr = 0x0;
     int32_t ret = -1;
@@ -6376,7 +6405,7 @@ static int32_t findBit (EDMA3_RM_ResType resType,
             case 1:
                 {
                 /* Find '1' in first word. */
-                position = findBitInWord (resPtr[start_index], start, 1u);
+                position = findBitInWord (resPtr[start_index], start, 1U);
 
                 if (position != -1)
                     {
@@ -6385,9 +6414,9 @@ static int32_t findBit (EDMA3_RM_ResType resType,
                 else
                     {
                     /* '1' NOT found, look into other words. */
-                    for (i = (int32_t)(start_index + 1u); i <= (int32_t)(end_index - 1u); i++)
+                    for (i = (int32_t)((int32_t)start_index + 1U); i <= (int32_t)((int32_t)end_index - 1U); i++)
                         {
-                        position = findBitInWord (resPtr[i], 0u, 1u);
+                        position = findBitInWord (resPtr[i], 0U, 1U);
                         if (position != -1)
                             {
                             /* '1' Found... */
@@ -6400,11 +6429,11 @@ static int32_t findBit (EDMA3_RM_ResType resType,
                     if (ret == -1)
                         {
                         /* Still not found, look in the last word. */
-                        position = findBitInWord(resPtr[end_index], 0u, 1u);
+                        position = findBitInWord(resPtr[end_index], 0U, 1U);
                         if (position != -1)
                             {
                             /* Finally got it. */
-                            ret = (position + (end_index*32u));
+                            ret = (position + (end_index*32U));
                             }
                         else
                             {
@@ -6419,7 +6448,7 @@ static int32_t findBit (EDMA3_RM_ResType resType,
             case 0:
                 {
                 /* Find '0' in first word. */
-                position = findBitInWord(resPtr[start_index], start, 0u);
+                position = findBitInWord(resPtr[start_index], start, 0U);
                 if (position != -1)
                     {
                     ret = position;
@@ -6427,9 +6456,9 @@ static int32_t findBit (EDMA3_RM_ResType resType,
                 else
                     {
                     /* '0' NOT found, look into other words. */
-                    for (i = (start_index + 1u); i <= (end_index - 1u); i++)
+                    for (i = (start_index + 1U); i <= (end_index - 1U); i++)
                         {
-                        position = findBitInWord(resPtr[i], 0u, 0u);
+                        position = findBitInWord(resPtr[i], 0U, 0U);
                         if (position != -1)
                             {
                             /* '0' found... */
@@ -6441,11 +6470,11 @@ static int32_t findBit (EDMA3_RM_ResType resType,
                     /* First check whether we have found '0' or not. */
                     if (ret == -1)
                         {
-                        position = findBitInWord(resPtr[end_index], 0u, 0u);
+                        position = findBitInWord(resPtr[end_index], 0U, 0U);
                         if (position != -1)
                             {
                             /* Finally got it. */
-                            ret = (position + (end_index*32u));
+                            ret = (position + (end_index*32U));
                             }
                         else
                             {
@@ -6477,7 +6506,7 @@ static EDMA3_RM_Result allocAnyContigRes(EDMA3_RM_ResType resType,
                                     uint32_t numResources,
                                     uint32_t *positionRes)
     {
-    uint16_t found = 0u;
+    uint16_t found = 0U;
     int32_t first_one, next_zero;
     uint32_t num_available;
     int32_t ret = -1;
@@ -6490,19 +6519,19 @@ static EDMA3_RM_Result allocAnyContigRes(EDMA3_RM_ResType resType,
     switch (resType)
         {
         case EDMA3_RM_RES_DMA_CHANNEL:
-            end = EDMA3_MAX_DMA_CH - 1u;
+            end = EDMA3_MAX_DMA_CH - 1U;
             break;
 
         case EDMA3_RM_RES_QDMA_CHANNEL:
-            end = EDMA3_MAX_QDMA_CH - 1u;
+            end = EDMA3_MAX_QDMA_CH - 1U;
             break;
 
         case EDMA3_RM_RES_TCC:
-            end = EDMA3_MAX_TCC - 1u;
+            end = EDMA3_MAX_TCC - 1U;
             break;
 
         case EDMA3_RM_RES_PARAM_SET:
-            end = edma3NumPaRAMSets - 1u;
+            end = edma3NumPaRAMSets - 1U;
             break;
 
         default:
@@ -6527,18 +6556,18 @@ static EDMA3_RM_Result allocAnyContigRes(EDMA3_RM_ResType resType,
          * Step d) If result < N, do the whole process again untill you
          * reach end. Else you have found enough resources, return success.
          */
-        while((found == 0) && (start<=end) && (((end-start)+1u) >= numResources))
+        while((found == 0) && (start<=end) && (((end-start)+1U) >= numResources))
             {
             /* Find first '1' starting from 'start' till 'end'. */
-            first_one = findBit (resType, start, end, 1u);
+            first_one = findBit (resType, start, end, 1U);
             if (first_one != -1)
                 {
                 /* Got first 1, search for first '0' now. */
-                next_zero = findBit (resType, first_one+1, end, 0u);
+                next_zero = findBit (resType, first_one+1, end, 0U);
                 if (next_zero == -1)
                     {
                     /* Unable to find next zero, all 1' are there */
-                    next_zero = end + 1u;
+                    next_zero = end + 1U;
                     }
 
                 /* check no of resources available */
@@ -6546,7 +6575,7 @@ static EDMA3_RM_Result allocAnyContigRes(EDMA3_RM_ResType resType,
                 if (num_available >= numResources)
                     {
                     /* hurrah..., we have found enough resources. */
-                    found = 1u;
+                    found = 1U;
                     ret = first_one;
                     }
                 else
@@ -6566,7 +6595,7 @@ static EDMA3_RM_Result allocAnyContigRes(EDMA3_RM_ResType resType,
 
     if (result == EDMA3_RM_SOK)
         {
-        if (found == 1u)
+        if (found == 1U)
             {
             /* required resources found, retrun the first available res id. */
             *positionRes = (uint32_t)ret;
@@ -6595,9 +6624,9 @@ static EDMA3_RM_Result gblChngAllocContigRes(EDMA3_RM_Instance *rmInstance,
     EDMA3_RM_Result result = EDMA3_RM_SOK;
     volatile EDMA3_CCRL_Regs *gblRegs = NULL;
     EDMA3_RM_Obj *rmObj = NULL;
-    uint32_t avlblIdx = 0u;
-    uint32_t firstResId=0u;
-    uint32_t lastResId=0u;
+    uint32_t avlblIdx = 0U;
+    uint32_t firstResId=0U;
+    uint32_t lastResId=0U;
        uint32_t edma3Id;
 
     assert ((rmInstance != NULL) && (firstResIdObj != NULL));
@@ -6627,24 +6656,24 @@ static EDMA3_RM_Result gblChngAllocContigRes(EDMA3_RM_Instance *rmInstance,
             case EDMA3_RM_RES_DMA_CHANNEL:
                 {
                 firstResId = firstResIdObj->resId;
-                lastResId = firstResId + (numResources - 1u);
+                lastResId = firstResId + (numResources - 1U);
 
                 for (avlblIdx=firstResId; avlblIdx <= lastResId; ++avlblIdx)
                     {
-                    rmInstance->avlblDmaChannels[avlblIdx/32u] &= (uint32_t)(~(1u << (avlblIdx%32u)));
+                    rmInstance->avlblDmaChannels[avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
 
                     /**
                      * Enable the DMA channel in the DRAE/DRAEH registers also.
                      */
-                    if (avlblIdx < 32u)
+                    if (avlblIdx < 32U)
                         {
                         gblRegs->DRA[rmInstance->initParam.regionId].DRAE
-                            |= (0x1u << avlblIdx);
+                            |= ((uint32_t)0x1U << avlblIdx);
                         }
                     else
                         {
                         gblRegs->DRA[rmInstance->initParam.regionId].DRAEH
-                            |= (0x1u << (avlblIdx - 32u));
+                            |= ((uint32_t)0x1U << (avlblIdx - 32U));
                         }
                     }
                 }
@@ -6653,17 +6682,17 @@ static EDMA3_RM_Result gblChngAllocContigRes(EDMA3_RM_Instance *rmInstance,
             case EDMA3_RM_RES_QDMA_CHANNEL:
                 {
                 firstResId = firstResIdObj->resId;
-                lastResId = firstResId + (numResources - 1u);
+                lastResId = firstResId + (numResources - 1U);
 
                 for (avlblIdx=firstResId; avlblIdx <= lastResId; ++avlblIdx)
                     {
-                    rmInstance->avlblQdmaChannels[avlblIdx/32u] &= (uint32_t)(~(1u << (avlblIdx%32u)));
+                    rmInstance->avlblQdmaChannels[avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
 
                     /**
                      * Enable the QDMA channel in the QRAE register also.
                      */
                     gblRegs->QRAE[rmInstance->initParam.regionId]
-                        |= (0x1u << avlblIdx);
+                        |= ((uint32_t)0x1U << avlblIdx);
                     }
                 }
                 break;
@@ -6671,11 +6700,11 @@ static EDMA3_RM_Result gblChngAllocContigRes(EDMA3_RM_Instance *rmInstance,
             case EDMA3_RM_RES_TCC:
                 {
                 firstResId = firstResIdObj->resId;
-                lastResId = firstResId + (numResources - 1u);
+                lastResId = firstResId + (numResources - 1U);
 
                 for (avlblIdx=firstResId; avlblIdx <= lastResId; ++avlblIdx)
                     {
-                    rmInstance->avlblTccs[avlblIdx/32u] &= (uint32_t)(~(1u << (avlblIdx%32u)));
+                    rmInstance->avlblTccs[avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
 
                     /**
                                         * If the region id coming from this
@@ -6686,13 +6715,13 @@ static EDMA3_RM_Result gblChngAllocContigRes(EDMA3_RM_Instance *rmInstance,
                      */
                     if (edma3RegionId == rmInstance->initParam.regionId)
                         {
-                           if (avlblIdx < 32u)
+                           if (avlblIdx < 32U)
                                {
-                               allocatedTCCs[edma3Id][0u] |= (0x1u << avlblIdx);
+                               allocatedTCCs[edma3Id][0U] |= ((uint32_t)0x1U << avlblIdx);
                                }
                            else
                                {
-                               allocatedTCCs[edma3Id][1u] |= (0x1u << (avlblIdx - 32u));
+                               allocatedTCCs[edma3Id][1U] |= ((uint32_t)0x1U << (avlblIdx - 32U));
                                }
                        }
                     }
@@ -6702,11 +6731,11 @@ static EDMA3_RM_Result gblChngAllocContigRes(EDMA3_RM_Instance *rmInstance,
             case EDMA3_RM_RES_PARAM_SET:
                 {
                 firstResId = firstResIdObj->resId;
-                lastResId = firstResId + (numResources - 1u);
+                lastResId = firstResId + (numResources - 1U);
 
                 for (avlblIdx=firstResId; avlblIdx <= lastResId; ++avlblIdx)
                     {
-                    rmInstance->avlblPaRAMSets [avlblIdx/32u] &= (uint32_t)(~(1u << (avlblIdx%32u)));
+                    rmInstance->avlblPaRAMSets [avlblIdx/32U] &= (uint32_t)(~((uint32_t)1U << (avlblIdx%32U)));
 
                     /**
                      * Also, make the actual PARAM Set NULL, checking the flag