PRSDK-415: Updated config file to be generic
authorSinthu Raja M <x0257345@ti.com>
Tue, 6 Feb 2018 08:44:47 +0000 (14:14 +0530)
committerPratap Reddy <x0257344@ti.com>
Wed, 21 Feb 2018 20:16:41 +0000 (01:46 +0530)
 Updated AM335x config file generically on all EDMA3 regions
 to allocate user request PARAM set from any regions.

packages/ti/sdo/edma3/drv/sample/src/platforms/sample_am335x_cfg.c
packages/ti/sdo/edma3/rm/sample/src/platforms/sample_am335x_cfg.c

index c4f85738064c35e46511b096e7e48846c6bdf5d1..142cd13fa93360023af24bc787c2689c6eeac611 100644 (file)
@@ -455,6 +455,16 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
           {
             /* Resources owned by Region 0 */
             /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
             /* 159  128     191  160     223  192     255  224 */
@@ -463,6 +473,7 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -562,6 +573,16 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
           {
             /* Resources owned by Region 2 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -570,6 +591,7 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -610,6 +632,16 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
           {
             /* Resources owned by Region 3 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -618,6 +650,7 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -658,6 +691,16 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
           {
             /* Resources owned by Region 4 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -666,6 +709,7 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -706,6 +750,16 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
           {
             /* Resources owned by Region 5 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -714,6 +768,7 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -754,6 +809,16 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
           {
             /* Resources owned by Region 6 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -762,6 +827,7 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -802,6 +868,16 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
           {
             /* Resources owned by Region 7 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -810,6 +886,7 @@ EDMA3_DRV_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NU
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
index 11ae7cd0f5f7eb433dc7719df00eb173f0cc922d..21f98ad34c1db2a032b61c8056b2e1c49e7e284d 100644 (file)
@@ -454,6 +454,16 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
           {
             /* Resources owned by Region 0 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -462,6 +472,7 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -537,7 +548,7 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
             /* Resources reserved by Region 1 */
             /* resvdPaRAMSets */
             /* 31     0     63    32     95    64     127   96 */
-            {0x00000000u, 0xFFFFFFFFu, 0x00000000u, 0x00000000u,
+            {0xFFFFFFFFu, 0xFFFFFFFFu, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 287  256     319  288     351  320     383  352 */
@@ -561,6 +572,16 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
           {
             /* Resources owned by Region 2 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -569,6 +590,7 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -609,6 +631,16 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
           {
             /* Resources owned by Region 3 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -617,6 +649,7 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -657,6 +690,16 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
           {
             /* Resources owned by Region 4 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -665,6 +708,7 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -705,6 +749,16 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
           {
             /* Resources owned by Region 5 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -713,6 +767,7 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -753,6 +808,16 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
           {
             /* Resources owned by Region 6 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -761,6 +826,7 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */
@@ -801,6 +867,16 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
           {
             /* Resources owned by Region 7 */
              /* ownPaRAMSets */
+#ifdef EDMA3_RES_USER_REQ
+            /* 31     0     63    32     95    64     127   96 */
+            {0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 159  128     191  160     223  192     255  224 */
+            0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
+            /* 287  256     319  288     351  320     383  352 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+            /* 415  384     447  416     479  448     511  480 */
+             0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#else
             /* 31     0     63    32     95    64     127   96 */
             {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 159  128     191  160     223  192     255  224 */
@@ -809,6 +885,7 @@ EDMA3_RM_InstanceInitConfig sampleInstInitConfig [NUM_EDMA3_INSTANCES][EDMA3_NUM
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
             /* 415  384     447  416     479  448     511  480 */
              0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},
+#endif
 
             /* ownDmaChannels */
             /* 31     0     63    32 */