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raw | patch | inline | side by side (parent: 4db1b86)
raw | patch | inline | side by side (parent: 4db1b86)
author | Prasad Konnur <prasadkonnur@ti.com> | |
Thu, 18 Apr 2013 13:22:09 +0000 (18:52 +0530) | ||
committer | Prasad Konnur <prasadkonnur@ti.com> | |
Thu, 18 Apr 2013 13:22:09 +0000 (18:52 +0530) |
Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
diff --git a/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_tda2xx_arm_int_reg.c b/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_tda2xx_arm_int_reg.c
index cae613892d2f7e9e8f2cbbec36af92d6d1c65f6e..e27b67b45951bb0b5c5434761222bd0ef73facf8 100644 (file)
numTc++;\r
}\r
\r
- /**\r
- * Enabling the HWI_ID.\r
- * EDMA3 interrupts (transfer completion, CC error etc.)\r
- * correspond to different ECM events (SoC specific). These ECM events come\r
- * under ECM block XXX (handling those specific ECM events). Normally, block\r
- * 0 handles events 4-31 (events 0-3 are reserved), block 1 handles events\r
- * 32-63 and so on. This ECM block XXX (or interrupt selection number XXX)\r
- * is mapped to a specific HWI_INT YYY in the tcf file. So to enable this\r
- * mapped HWI_INT YYY, one should use the corresponding bitmask in the\r
- * API C64_enableIER(), in which the YYY bit is SET.\r
- */\r
Hwi_enableInterrupt(ccErrorInt[edma3Id]);\r
Hwi_enableInterrupt(ccXferCompInt[edma3Id][dsp_num]);\r
numTc = 0;\r
unsigned int scrChanOffset = 0;\r
unsigned int scrRegOffset = 0;\r
unsigned int xBarEvtNum = 0;\r
- CSL_IntmuxRegsOvly scrEvtMux = (CSL_IntmuxRegsOvly)(0x4a002c78);\r
+ CSL_IntmuxRegsOvly scrEvtMux = (CSL_IntmuxRegsOvly)(EDMA3_EVENT_MUX_REG_BASE_ADDR);\r
\r
\r
if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_TI814X) &&\r
diff --git a/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_tda2xx_cfg.c b/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_tda2xx_cfg.c
index 0f3efdc49b0efb214f1d9d43a9ea94f17133466f..d05277b643febbc4d9f3fc834c0f820116255f71 100644 (file)
#define DSP1_EDMA3_CC_BASE_ADDR ((void *)(0x01D10000))\r
#define DSP1_EDMA3_TC0_BASE_ADDR ((void *)(0x01D05000))\r
#define DSP1_EDMA3_TC1_BASE_ADDR ((void *)(0x01D06000))\r
+\r
+#define EDMA3_EVENT_MUX_REG_BASE_ADDR (0x4a002c78)\r
/* Driver Object Initialization Configuration */\r
EDMA3_DRV_GblConfigParams sampleEdma3GblCfgParams[NUM_EDMA3_INSTANCES] =\r
{\r
{\r
0u,\r
1u,\r
- 2u,\r
- 3u,\r
+ 0u,\r
+ 0u,\r
0u,\r
0u,\r
0u,\r
{\r
16u,\r
16u,\r
- 16u,\r
- 16u,\r
+ 0u,\r
+ 0u,\r
0u,\r
0u,\r
0u,\r
{\r
16u,\r
16u,\r
- 16u,\r
- 16u,\r
+ 0u,\r
+ 0u,\r
0u,\r
0u,\r
0u,\r
{\r
0u,\r
1u,\r
- 2u,\r
- 3u,\r
+ 0u,\r
+ 0u,\r
0u,\r
0u,\r
0u,\r
{\r
16u,\r
16u,\r
- 16u,\r
- 16u,\r
+ 0u,\r
+ 0u,\r
0u,\r
0u,\r
0u,\r
{\r
16u,\r
16u,\r
- 16u,\r
- 16u,\r
+ 0u,\r
+ 0u,\r
0u,\r
0u,\r
0u,\r
@@ -1526,17 +1528,29 @@ EDMA3_DRV_GblXbarToChanConfigParams sampleXbarChanInitConfig[NUM_EDMA3_INSTANCES
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, 26, 27, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1\r
},\r
/* Event to channel map for region 1 */\r
{\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
- -1, 26, 27, -1, -1, -1, -1\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1\r
},\r
/* Event to channel map for region 2 */\r
{\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
@@ -1544,6 +1558,10 @@ EDMA3_DRV_GblXbarToChanConfigParams sampleXbarChanInitConfig[NUM_EDMA3_INSTANCES
},\r
/* Event to channel map for region 3 */\r
{\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
@@ -1551,6 +1569,10 @@ EDMA3_DRV_GblXbarToChanConfigParams sampleXbarChanInitConfig[NUM_EDMA3_INSTANCES
},\r
/* Event to channel map for region 4 */\r
{\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
@@ -1558,6 +1580,10 @@ EDMA3_DRV_GblXbarToChanConfigParams sampleXbarChanInitConfig[NUM_EDMA3_INSTANCES
},\r
/* Event to channel map for region 5 */\r
{\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
@@ -1565,6 +1591,10 @@ EDMA3_DRV_GblXbarToChanConfigParams sampleXbarChanInitConfig[NUM_EDMA3_INSTANCES
},\r
/* Event to channel map for region 6 */\r
{\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
@@ -1572,6 +1602,10 @@ EDMA3_DRV_GblXbarToChanConfigParams sampleXbarChanInitConfig[NUM_EDMA3_INSTANCES
},\r
/* Event to channel map for region 7 */\r
{\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
+ -1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
-1, -1, -1, -1, -1, -1, -1, -1,\r
diff --git a/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_tda2xx_int_reg.c b/packages/ti/sdo/edma3/drv/sample/src/platforms/sample_tda2xx_int_reg.c
index 68b3723f033429999da229f137ae1b890f792a7f..14c0e86b7abf798157aca5d9da163abdfd55c613 100644 (file)
unsigned int scrChanOffset = 0;
unsigned int scrRegOffset = 0;
unsigned int xBarEvtNum = 0;
- CSL_IntmuxRegsOvly scrEvtMux = (CSL_IntmuxRegsOvly)(0x4a002c78);
+ CSL_IntmuxRegsOvly scrEvtMux = (CSL_IntmuxRegsOvly)(EDMA3_EVENT_MUX_REG_BASE_ADDR);
if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_TI814X) &&
{
scrRegOffset = chanNum / 2;
scrChanOffset = chanNum - (scrRegOffset * 2);
- xBarEvtNum = (eventNum - EDMA3_NUM_TCC) + 1;
+ xBarEvtNum = (eventNum + 1);
switch(scrChanOffset)
{