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raw | patch | inline | side by side (parent: 7753821)
raw | patch | inline | side by side (parent: 7753821)
author | Prasad Konnur <prasad.konnur@ti.com> | |
Fri, 18 Nov 2011 08:42:57 +0000 (14:12 +0530) | ||
committer | Prasad Konnur <prasad.konnur@ti.com> | |
Fri, 18 Nov 2011 08:42:57 +0000 (14:12 +0530) |
packages/ti/sdo/edma3/rm/src/edma3resmgr.c | patch | blob | history |
diff --git a/packages/ti/sdo/edma3/rm/src/edma3resmgr.c b/packages/ti/sdo/edma3/rm/src/edma3resmgr.c
index bebf9f9e03c8a8dba0ad08514e1749fd8ef68a24..0d0f893ed290b9f58fc9b536ad901bf80178e189 100755 (executable)
EDMA3_RM_Result EDMA3_RM_freeResource(EDMA3_RM_Handle hEdmaResMgr,
const EDMA3_RM_ResDesc *resObj)
{
- uint32_t intState;
EDMA3_RM_Instance *rmInstance = NULL;
EDMA3_RM_Obj *rmObj = NULL;
EDMA3_RM_Result result = EDMA3_RM_SOK;
{
rmInstance->shadowRegs->IECR = (1UL << mappedTcc);
}
- else
+ else if(mappedTcc < 64)
{
rmInstance->shadowRegs->IECRH = (1UL << (mappedTcc-32u));
}
- edma3IntrParams[edma3Id][mappedTcc].cbData = NULL;
- edma3IntrParams[edma3Id][mappedTcc].tccCb = NULL;
+ if(mappedTcc < EDMA3_MAX_TCC)
+ {
+ edma3IntrParams[edma3Id][mappedTcc].cbData = NULL;
+ edma3IntrParams[edma3Id][mappedTcc].tccCb = NULL;
+ }
}
#ifdef EDMA3_INSTRUMENTATION_ENABLED
uint32_t resMgrInstIdx = 0u;
volatile EDMA3_CCRL_Regs *ptrEdmaccRegs = NULL;
volatile EDMA3_CCRL_ShadowRegs *shadowRegs = NULL;
- volatile uint32_t pendingIrqs;
+ volatile uint32_t pendingIrqs = 0;
uint32_t index;
uint32_t evtqueNum;
EDMA3_RM_Instance *rm_instance = NULL;
uint32_t ownedDmaError = 0;
uint32_t ownedDmaHError = 0;
uint32_t ownedQdmaError = 0;
+ uint32_t numTCCs;
#ifdef EDMA3_INSTRUMENTATION_ENABLED
EDMA3_LOG_EVENT(&DVTEvent_Log,"EDMA3_CCERR",
edma3Id = rmObj->phyCtrllerInstId;
ptrEdmaccRegs = (volatile EDMA3_CCRL_Regs *)rmObj->gblCfgParams.globalRegs;
+ numTCCs = rmObj->gblCfgParams.numTccs;
if (ptrEdmaccRegs != NULL)
{
shadowRegs = (volatile EDMA3_CCRL_ShadowRegs *)&ptrEdmaccRegs->SHADOW[edma3RegionId];
+ (edma3Id*EDMA3_MAX_RM_INSTANCES)
+ edma3RegionId);
- pendingIrqs = 0u;
+ pendingIrqs = ((ptrEdmaccRegs->EMR != 0 )
+ || (ptrEdmaccRegs->QEMR != 0)
+ || (ptrEdmaccRegs->CCERR != 0));
+ if (numTCCs > 32)
+ {
+ pendingIrqs = pendingIrqs || (ptrEdmaccRegs->EMRH != 0 );
+ }
index = 1u;
- if(((ptrEdmaccRegs->EMR != 0 )
- || (ptrEdmaccRegs->EMRH != 0 ))
- || ((ptrEdmaccRegs->QEMR != 0)
- || (ptrEdmaccRegs->CCERR != 0)))
+ if(pendingIrqs)
{
edma3OsProtectEntry (edma3Id,
EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR,
pendingIrqs >>= 1u;
}
+ if(numTCCs > 32)
+ {
index = 0u;
pendingIrqs = ptrEdmaccRegs->EMRH;
while (pendingIrqs)
++index;
pendingIrqs >>= 1u;
}
+ }
index = 0u;
pendingIrqs = ptrEdmaccRegs->QEMR;
/* Check all the error bits. */
ownedDmaError = ptrEdmaccRegs->EMR;
- ownedDmaHError = ptrEdmaccRegs->EMRH;
+ if (numTCCs > 32)
+ ownedDmaHError = ptrEdmaccRegs->EMRH;
ownedQdmaError = ptrEdmaccRegs->QEMR;
#else
/* Check ONLY owned error bits. */
ownedDmaError = (ptrEdmaccRegs->EMR & rmInstance->initParam.rmInstInitConfig->ownDmaChannels[0u]);
- ownedDmaHError = (ptrEdmaccRegs->EMRH & rmInstance->initParam.rmInstInitConfig->ownDmaChannels[1u]);
+ if (numTCCs > 32)
+ ownedDmaHError = (ptrEdmaccRegs->EMRH & rmInstance->initParam.rmInstInitConfig->ownDmaChannels[1u]);
ownedQdmaError = (ptrEdmaccRegs->QEMR & rmInstance->initParam.rmInstInitConfig->ownQdmaChannels[0u]);
#endif