Removed Busy waiting in edma examples
authorPrasad Konnur <prasadkonnur@ti.com>
Wed, 19 Jun 2013 15:51:30 +0000 (21:21 +0530)
committerPrasad Konnur <prasadkonnur@ti.com>
Wed, 19 Jun 2013 15:51:30 +0000 (21:21 +0530)
Added a Sem pend while waiting for interrupt
and Sem post in ISR servicing the interrupt

Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
examples/edma3_driver/src/common.c
examples/edma3_driver/src/dma_chain_test.c
examples/edma3_driver/src/dma_link_test.c
examples/edma3_driver/src/dma_ping_pong_test.c
examples/edma3_driver/src/dma_test.c
examples/edma3_driver/src/main.c
examples/edma3_driver/src/qdma_link_test.c
examples/edma3_driver/src/qdma_test.c

index 370c409a17929702d63c8bfe01b518b811f67eb0..9cf2127c106334c884443d4029e7f27d6b0a8878 100644 (file)
@@ -44,6 +44,11 @@ volatile short irqRaised1 = 0;
 /* Flag variable to check transfer completion on channel 2 */
 volatile short irqRaised2 = 0;
 
+/* Application Sem Handle */
+void *AppSemHandle1 = NULL;
+/* Application Sem Handle */
+void *AppSemHandle2 = NULL;
+
 
 /* Cache line aligned source buffer 1. */
 #ifndef BUILD_TDA2XX_MPU
@@ -166,6 +171,7 @@ void callback1 (unsigned int tcc, EDMA3_RM_TccStatus status,
         default:
             break;
         }
+       edma3OsSemGive(AppSemHandle1);
     }
 
 
@@ -193,6 +199,7 @@ void callback2 (unsigned int tcc, EDMA3_RM_TccStatus status,
         default:
             break;
         }
+       edma3OsSemGive(AppSemHandle2);
     }
 
 
index 17635345652d656a7883b493cefa9cf3a9a7f25c..f45e234e129d86df1144435b580787e4f4414bf0 100755 (executable)
@@ -49,7 +49,7 @@ extern signed char *srcBuff2;
 extern signed char *dstBuff1;
 extern signed char *dstBuff2;
 
-
+extern void *AppSemHandle2;
 /**
  *  \brief   EDMA3 mem-to-mem data copy test case, using two DMA channels,
  *              chained to each other.
@@ -347,6 +347,7 @@ EDMA3_DRV_Result edma3_test_with_chaining(
              * completion ISR on channel 2 first, before proceeding
              * ahead.
              */
+                       edma3OsSemTake(AppSemHandle2, EDMA3_OSSEM_NO_TIMEOUT);
             while (irqRaised2 == 0)
                 {
                 /* Wait for the Completion ISR on channel 2. */
index 1fadeadd804ad6c9e94a25c4e3f9a9ba77e482ab..20d5cd8b9860a177c3a99408e234fd2a82b28e10 100755 (executable)
@@ -49,7 +49,7 @@ extern signed char *srcBuff2;
 extern signed char *dstBuff1;
 extern signed char *dstBuff2;
 
-
+extern void *AppSemHandle1;
 /**
  *  \brief   EDMA3 mem-to-mem data copy test case, using two DMA
  *              channels, linked to each other.
@@ -469,6 +469,7 @@ EDMA3_DRV_Result edma3_test_with_link(
                 break;
                 }
 
+                       edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
             while (irqRaised1 == 0)
                 {
                 /* Wait for the Completion ISR on Master Channel. */
@@ -516,6 +517,7 @@ EDMA3_DRV_Result edma3_test_with_link(
                 break;
                 }
 
+                       edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
             while (irqRaised1 == 0)
                 {
                 /* Wait for the Completion ISR on the Link Channel. */
index cf4deb8f8b8122c79fbe98d76d99be9b447b7589..4d796627c5ec922e6be50e645c4df5b3e4f86e56 100755 (executable)
@@ -163,6 +163,8 @@ signed char *pingpongDestBufCopy;
 signed char *dstL1DBuff1;
 signed char *dstL1DBuff2;
 
+extern void *AppSemHandle1;
+
 /** Local MemCpy function */
 extern void edma3MemCpy(void *dst, const void *src, unsigned int len);
 
@@ -471,6 +473,14 @@ EDMA3_DRV_Result edma3_test_ping_pong_mode(EDMA3_DRV_Handle hEdma)
          * incremented to point it to correct source address.
          */
         pingpongSrcBufCopy += PING_PONG_L1D_BUFFER_SIZE;
+        /* Step 2 */
+        /* Wait for the Completion ISR. */
+               edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
+        while (irqRaised1 == 0u)
+            {
+            /* Wait for the Completion ISR. */
+            printf ("waiting for interrupt...\n");
+            }
         }
 
 
@@ -479,14 +489,6 @@ EDMA3_DRV_Result edma3_test_ping_pong_mode(EDMA3_DRV_Handle hEdma)
         /* Need to activate next param till numenabled is exhausted. */
         for (i = 0; numenabled; i++)
             {
-            /* Step 2 */
-            /* Wait for the Completion ISR. */
-            while (irqRaised1 == 0u)
-                {
-                /* Wait for the Completion ISR. */
-                printf ("waiting for interrupt...\n");
-                }
-
             irqRaised1 = 0;
 
             /*
@@ -537,6 +539,7 @@ EDMA3_DRV_Result edma3_test_ping_pong_mode(EDMA3_DRV_Handle hEdma)
 
             /* Step 5 */
             /* Wait for the Completion ISR. */
+                       edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
             while (irqRaised1 == 0u)
                 {
                 /* Wait for the Completion ISR. */
@@ -609,13 +612,16 @@ EDMA3_DRV_Result edma3_test_ping_pong_mode(EDMA3_DRV_Handle hEdma)
 #endif  /* EDMA3_DRV_DEBUG */
                 break;
                 }
-
-            /* Wait for the Completion ISR. */
-            while (irqRaised1 == 0u)
+            if (numenabled)
+            {
+               /* Wait for the Completion ISR. */
+               edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
+               while (irqRaised1 == 0u)
                 {
-                /* Wait for the Completion ISR. */
-                printf ("waiting for interrupt...\n");
+                       /* Wait for the Completion ISR. */
+                       printf ("waiting for interrupt...\n");
                 }
+            }
 
             /* Check the status of the completed transfer */
             if (irqRaised1 < 0)
index 38b4f96c95f38e06b027847b6da9e74f4b5313e5..a1b0873f47826cf546b389a9e539f1fe28d3f3aa 100755 (executable)
@@ -44,6 +44,8 @@ extern signed char   _dstBuff1[MAX_BUFFER_SIZE];
 extern signed char *srcBuff1;
 extern signed char *dstBuff1;
 
+extern void *AppSemHandle1;
+
 
 /**
  *  \brief   EDMA3 mem-to-mem data copy test case, using a DMA channel.
@@ -295,7 +297,7 @@ EDMA3_DRV_Result edma3_test(
                                     "Failed, error code: %d\r\n", result);
                 break;
                 }
-
+                       edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
             /* Wait for the Completion ISR. */
             while (irqRaised1 == 0u)
                 {
index 1be466a6b4316c6cda44aceabbc998e53a495c5e..1744d0dc995b505c3bac1bbe02ece0a410cca02f 100644 (file)
@@ -59,7 +59,8 @@ extern EDMA3_RM_InstanceInitConfig defInstInitConfig [][EDMA3_MAX_REGIONS];
 extern EDMA3_DRV_GblConfigParams sampleEdma3GblCfgParams[];
 
 EDMA3_DRV_Result edma3MemToMemCpytest (EDMA3_DRV_Handle hEdma);
-
+extern void *AppSemHandle1;
+extern void *AppSemHandle2;
 
 /*
  * Local References
@@ -150,11 +151,26 @@ void echo()
        unsigned int i, bypass;
        unsigned int count=0;
        EDMA3_DRV_Handle hEdma[MAX_NUM_EDMA_INSTANCES];
+       Semaphore_Params semParams;
 
     memset(hEdma,0,sizeof(hEdma));
 
     /* Print the Welcome Message */
     printWelcomeBanner();
+       
+       Semaphore_Params_init(&semParams);
+       edmaResult = edma3OsSemCreate(0, &semParams, &AppSemHandle1);
+       if((edmaResult != EDMA3_DRV_SOK) || (AppSemHandle1 == NULL))
+       {
+               printf("Error initializing the Application Semaphore handle\n");
+               return;
+       }
+       edmaResult = edma3OsSemCreate(0, &semParams, &AppSemHandle2);
+       if((edmaResult != EDMA3_DRV_SOK) || (AppSemHandle2 == NULL))
+       {
+               printf("Error initializing the Application Semaphore handle\n");
+               return;
+       }
 
     if(numEdma3Instances > MAX_NUM_EDMA_INSTANCES)
     {
index 8ede5f2c7350d9001fb2dc78e1267c2b0e0f27f1..4e67ee99ecf0e9a9388dabccde76f686f4179933 100755 (executable)
@@ -48,7 +48,7 @@ extern signed char *srcBuff1;
 extern signed char *srcBuff2;
 extern signed char *dstBuff1;
 extern signed char *dstBuff2;
-
+extern void *AppSemHandle1;
 /**
  *  \brief   EDMA3 mem-to-mem data copy test case, using a QDMA channel,
  *              linked to another LINK channel.
@@ -431,25 +431,6 @@ EDMA3_DRV_Result qdma_test_with_link(
 
 
             /* After this, transfer will start. */
-            while (irqRaised1 == 0)
-                {
-                /* Wait for the Completion ISR for the Master QDMA Channel. */
-                printf ("waiting for interrupt...\n"); 
-                }
-
-
-            /* Check the status of the completed transfer */
-            if (irqRaised1 < 0)
-                {
-                /* Some error occured, break from the FOR loop. */
-                printf ("\r\nqdma_test_with_link: Event Miss Occured!!!\r\n");
-
-                /* Clear the error bits first */
-                result = EDMA3_DRV_clearErrorBits (hEdma, qCh1Id);
-
-                break;
-                }
-
 
             /**
              * Now, update the source and destination addresses for next
@@ -494,6 +475,7 @@ EDMA3_DRV_Result qdma_test_with_link(
          * One trigger has been provided already, so first wait for
          * that transfer to complete.
          */
+               edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
         while (irqRaised1 == 0)
             {
             /* Wait for the Completion ISR for the Master QDMA Channel. */
@@ -594,6 +576,7 @@ EDMA3_DRV_Result qdma_test_with_link(
 
 
                 /* After this, transfer will start. */
+                               edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
                 while (irqRaised1 == 0)
                     {
                     /* Wait for the Completion ISR for the Link Channel. */
index 2295890a4768fee5a57c5f82d5fa102caf45361f..d743b80657a8515be23f42eb6d6ae539da061753 100755 (executable)
@@ -43,7 +43,7 @@ extern signed char   _dstBuff1[MAX_BUFFER_SIZE];
 
 extern signed char *srcBuff1;
 extern signed char *dstBuff1;
-
+extern void *AppSemHandle1;
 
 /**
  *  \brief   EDMA3 mem-to-mem data copy test case, using a QDMA channel.
@@ -261,6 +261,7 @@ EDMA3_DRV_Result qdma_test(
                 }
 
             /* Wait for the Completion ISR. */
+                       edma3OsSemTake(AppSemHandle1, EDMA3_OSSEM_NO_TIMEOUT);
             while (irqRaised1 == 0)
                 {
                 /* Wait for the Completion ISR. */